./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_15-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_15-2.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ad13fcacd201ae20f6800b42387b8ec1153fb1bf63cee7a12ec23f4a302be7c7 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:14:22,114 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:14:22,190 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:14:22,197 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:14:22,198 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:14:22,227 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:14:22,229 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:14:22,229 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:14:22,229 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:14:22,230 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:14:22,231 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:14:22,231 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:14:22,231 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:14:22,231 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:14:22,232 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:14:22,232 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:14:22,232 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:14:22,232 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:14:22,233 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:14:22,233 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:14:22,234 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:14:22,234 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:14:22,234 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:14:22,234 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:14:22,234 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:14:22,235 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:14:22,235 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:14:22,235 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:14:22,235 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:14:22,235 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:14:22,235 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:14:22,236 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:14:22,236 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ad13fcacd201ae20f6800b42387b8ec1153fb1bf63cee7a12ec23f4a302be7c7 [2025-01-10 07:14:22,535 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:14:22,545 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:14:22,548 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:14:22,549 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:14:22,549 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:14:22,550 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_15-2.c [2025-01-10 07:14:23,877 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/931f8d4ee/ca0a84aa7b7a4f5389d3f4aa411aa539/FLAG8003d7ca3 [2025-01-10 07:14:24,172 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:14:24,173 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_15-2.c [2025-01-10 07:14:24,181 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/931f8d4ee/ca0a84aa7b7a4f5389d3f4aa411aa539/FLAG8003d7ca3 [2025-01-10 07:14:24,439 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/931f8d4ee/ca0a84aa7b7a4f5389d3f4aa411aa539 [2025-01-10 07:14:24,441 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:14:24,442 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:14:24,444 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:24,444 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:14:24,448 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:14:24,449 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,450 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@69997c4b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24, skipping insertion in model container [2025-01-10 07:14:24,450 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,469 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:14:24,652 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:24,669 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:14:24,704 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:24,722 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:14:24,724 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24 WrapperNode [2025-01-10 07:14:24,725 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:24,726 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:24,726 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:14:24,726 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:14:24,732 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,739 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,761 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 190 [2025-01-10 07:14:24,762 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:24,763 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:14:24,764 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:14:24,764 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:14:24,773 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,774 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,780 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,798 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-10 07:14:24,799 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,799 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,805 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,810 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,818 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,822 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,823 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,828 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:14:24,829 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:14:24,829 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:14:24,829 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:14:24,832 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (1/1) ... [2025-01-10 07:14:24,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:14:24,850 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:14:24,872 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:14:24,876 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:14:24,905 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 07:14:24,905 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:14:24,906 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:14:24,906 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 07:14:24,979 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:14:24,981 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:14:25,269 INFO L? ?]: Removed 34 outVars from TransFormulas that were not future-live. [2025-01-10 07:14:25,271 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:14:25,281 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:14:25,282 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-10 07:14:25,282 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:25 BoogieIcfgContainer [2025-01-10 07:14:25,283 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:14:25,283 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:14:25,283 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:14:25,287 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:14:25,288 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:25,288 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:14:24" (1/3) ... [2025-01-10 07:14:25,289 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@67c71337 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:25, skipping insertion in model container [2025-01-10 07:14:25,289 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:25,289 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:24" (2/3) ... [2025-01-10 07:14:25,289 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@67c71337 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:25, skipping insertion in model container [2025-01-10 07:14:25,289 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:25,289 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:25" (3/3) ... [2025-01-10 07:14:25,291 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_15-2.c [2025-01-10 07:14:25,346 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:14:25,346 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:14:25,346 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:14:25,347 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:14:25,347 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:14:25,348 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:14:25,348 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:14:25,348 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:14:25,353 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,372 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-01-10 07:14:25,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,381 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:14:25,382 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,387 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-01-10 07:14:25,390 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,391 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,391 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,400 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:25,401 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:25,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,406 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2025-01-10 07:14:25,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237647151] [2025-01-10 07:14:25,415 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,486 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,496 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,496 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,497 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:25,500 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,503 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,520 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:25,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1133796230, now seen corresponding path program 1 times [2025-01-10 07:14:25,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515793596] [2025-01-10 07:14:25,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,531 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:25,546 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:25,548 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,548 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:25,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:25,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:25,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515793596] [2025-01-10 07:14:25,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1515793596] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:25,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:25,659 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:25,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237067641] [2025-01-10 07:14:25,660 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:25,663 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:25,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:25,689 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:25,689 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:25,691 INFO L87 Difference]: Start difference. First operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:25,738 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2025-01-10 07:14:25,739 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 189 transitions. [2025-01-10 07:14:25,743 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-01-10 07:14:25,749 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 95 states and 153 transitions. [2025-01-10 07:14:25,750 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2025-01-10 07:14:25,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2025-01-10 07:14:25,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 153 transitions. [2025-01-10 07:14:25,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:25,752 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-01-10 07:14:25,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 153 transitions. [2025-01-10 07:14:25,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2025-01-10 07:14:25,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.6105263157894736) internal successors, (153), 94 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 153 transitions. [2025-01-10 07:14:25,788 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-01-10 07:14:25,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:25,794 INFO L432 stractBuchiCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-01-10 07:14:25,794 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:14:25,795 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 153 transitions. [2025-01-10 07:14:25,796 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-01-10 07:14:25,796 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,796 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,800 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,800 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,801 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:25,801 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:25,801 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,802 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2025-01-10 07:14:25,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839882968] [2025-01-10 07:14:25,802 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:25,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,809 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,814 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,817 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:25,818 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,818 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:25,820 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,822 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,823 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,823 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,825 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:25,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,826 INFO L85 PathProgramCache]: Analyzing trace with hash -1774967672, now seen corresponding path program 1 times [2025-01-10 07:14:25,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,827 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121173298] [2025-01-10 07:14:25,827 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,840 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:25,855 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:25,856 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,856 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:25,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:25,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:25,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121173298] [2025-01-10 07:14:25,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121173298] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:25,903 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:25,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:25,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32584003] [2025-01-10 07:14:25,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:25,903 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:25,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:25,904 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:25,904 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:25,905 INFO L87 Difference]: Start difference. First operand 95 states and 153 transitions. cyclomatic complexity: 60 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:25,927 INFO L93 Difference]: Finished difference Result 186 states and 298 transitions. [2025-01-10 07:14:25,927 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 298 transitions. [2025-01-10 07:14:25,930 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-01-10 07:14:25,931 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 298 transitions. [2025-01-10 07:14:25,932 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2025-01-10 07:14:25,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2025-01-10 07:14:25,932 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 298 transitions. [2025-01-10 07:14:25,933 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:25,933 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-01-10 07:14:25,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 298 transitions. [2025-01-10 07:14:25,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2025-01-10 07:14:25,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 186 states, 186 states have (on average 1.6021505376344085) internal successors, (298), 185 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 298 transitions. [2025-01-10 07:14:25,954 INFO L240 hiAutomatonCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-01-10 07:14:25,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:25,956 INFO L432 stractBuchiCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-01-10 07:14:25,956 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:14:25,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 298 transitions. [2025-01-10 07:14:25,961 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-01-10 07:14:25,961 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,961 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,962 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,962 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,962 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:25,962 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:25,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,963 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2025-01-10 07:14:25,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236932226] [2025-01-10 07:14:25,963 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:25,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,970 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,972 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,972 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:25,973 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,973 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:25,975 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,976 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,979 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:25,980 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,980 INFO L85 PathProgramCache]: Analyzing trace with hash 2010526534, now seen corresponding path program 1 times [2025-01-10 07:14:25,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943548100] [2025-01-10 07:14:25,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,991 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:25,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:25,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,000 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943548100] [2025-01-10 07:14:26,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943548100] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781867642] [2025-01-10 07:14:26,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,032 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,033 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,033 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,034 INFO L87 Difference]: Start difference. First operand 186 states and 298 transitions. cyclomatic complexity: 116 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,081 INFO L93 Difference]: Finished difference Result 366 states and 582 transitions. [2025-01-10 07:14:26,082 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 366 states and 582 transitions. [2025-01-10 07:14:26,086 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-01-10 07:14:26,091 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 366 states to 366 states and 582 transitions. [2025-01-10 07:14:26,095 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 366 [2025-01-10 07:14:26,096 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 366 [2025-01-10 07:14:26,096 INFO L73 IsDeterministic]: Start isDeterministic. Operand 366 states and 582 transitions. [2025-01-10 07:14:26,098 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,098 INFO L218 hiAutomatonCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-01-10 07:14:26,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states and 582 transitions. [2025-01-10 07:14:26,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 366. [2025-01-10 07:14:26,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 366 states, 366 states have (on average 1.5901639344262295) internal successors, (582), 365 states have internal predecessors, (582), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 582 transitions. [2025-01-10 07:14:26,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-01-10 07:14:26,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:26,130 INFO L432 stractBuchiCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-01-10 07:14:26,130 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:14:26,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 366 states and 582 transitions. [2025-01-10 07:14:26,132 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-01-10 07:14:26,133 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:26,133 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:26,134 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:26,134 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:26,134 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:26,135 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:26,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,136 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2025-01-10 07:14:26,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501507448] [2025-01-10 07:14:26,136 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:26,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,141 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:26,146 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,148 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:26,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,148 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,152 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,154 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,154 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,154 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,162 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,162 INFO L85 PathProgramCache]: Analyzing trace with hash -361212728, now seen corresponding path program 1 times [2025-01-10 07:14:26,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548549057] [2025-01-10 07:14:26,163 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,174 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:26,182 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:26,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,246 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548549057] [2025-01-10 07:14:26,247 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548549057] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,247 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,247 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399673519] [2025-01-10 07:14:26,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,248 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,248 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,250 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,250 INFO L87 Difference]: Start difference. First operand 366 states and 582 transitions. cyclomatic complexity: 224 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,283 INFO L93 Difference]: Finished difference Result 722 states and 1138 transitions. [2025-01-10 07:14:26,283 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 722 states and 1138 transitions. [2025-01-10 07:14:26,290 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-01-10 07:14:26,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 722 states to 722 states and 1138 transitions. [2025-01-10 07:14:26,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 722 [2025-01-10 07:14:26,296 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 722 [2025-01-10 07:14:26,296 INFO L73 IsDeterministic]: Start isDeterministic. Operand 722 states and 1138 transitions. [2025-01-10 07:14:26,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-01-10 07:14:26,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states and 1138 transitions. [2025-01-10 07:14:26,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 722. [2025-01-10 07:14:26,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 722 states have (on average 1.5761772853185596) internal successors, (1138), 721 states have internal predecessors, (1138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1138 transitions. [2025-01-10 07:14:26,326 INFO L240 hiAutomatonCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-01-10 07:14:26,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:26,328 INFO L432 stractBuchiCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-01-10 07:14:26,328 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:14:26,328 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 722 states and 1138 transitions. [2025-01-10 07:14:26,332 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-01-10 07:14:26,332 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:26,332 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:26,333 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:26,333 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:26,333 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:26,334 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:26,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,335 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2025-01-10 07:14:26,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178435358] [2025-01-10 07:14:26,335 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:26,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,341 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,345 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,345 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:26,345 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,346 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,347 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,348 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,348 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,348 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,350 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,351 INFO L85 PathProgramCache]: Analyzing trace with hash -299173114, now seen corresponding path program 1 times [2025-01-10 07:14:26,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563129552] [2025-01-10 07:14:26,351 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:26,364 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:26,364 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,364 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563129552] [2025-01-10 07:14:26,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1563129552] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774685686] [2025-01-10 07:14:26,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,396 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,397 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,398 INFO L87 Difference]: Start difference. First operand 722 states and 1138 transitions. cyclomatic complexity: 432 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,426 INFO L93 Difference]: Finished difference Result 1426 states and 2226 transitions. [2025-01-10 07:14:26,426 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1426 states and 2226 transitions. [2025-01-10 07:14:26,438 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-01-10 07:14:26,447 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1426 states to 1426 states and 2226 transitions. [2025-01-10 07:14:26,447 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1426 [2025-01-10 07:14:26,448 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1426 [2025-01-10 07:14:26,448 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1426 states and 2226 transitions. [2025-01-10 07:14:26,451 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,452 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-01-10 07:14:26,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1426 states and 2226 transitions. [2025-01-10 07:14:26,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1426 to 1426. [2025-01-10 07:14:26,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1426 states, 1426 states have (on average 1.5610098176718092) internal successors, (2226), 1425 states have internal predecessors, (2226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1426 states to 1426 states and 2226 transitions. [2025-01-10 07:14:26,491 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-01-10 07:14:26,492 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:26,493 INFO L432 stractBuchiCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-01-10 07:14:26,493 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:14:26,493 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1426 states and 2226 transitions. [2025-01-10 07:14:26,502 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-01-10 07:14:26,502 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:26,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:26,503 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:26,503 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:26,503 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:26,503 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:26,504 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,504 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2025-01-10 07:14:26,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788925685] [2025-01-10 07:14:26,504 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:26,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,509 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,512 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,513 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:26,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,513 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,516 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,518 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,519 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,520 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,522 INFO L85 PathProgramCache]: Analyzing trace with hash -158624504, now seen corresponding path program 1 times [2025-01-10 07:14:26,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888647534] [2025-01-10 07:14:26,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,528 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:26,531 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:26,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,565 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,565 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888647534] [2025-01-10 07:14:26,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1888647534] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,565 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [11411372] [2025-01-10 07:14:26,566 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,566 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,566 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,566 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,567 INFO L87 Difference]: Start difference. First operand 1426 states and 2226 transitions. cyclomatic complexity: 832 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,596 INFO L93 Difference]: Finished difference Result 2818 states and 4354 transitions. [2025-01-10 07:14:26,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2818 states and 4354 transitions. [2025-01-10 07:14:26,622 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-01-10 07:14:26,639 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2818 states to 2818 states and 4354 transitions. [2025-01-10 07:14:26,640 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2818 [2025-01-10 07:14:26,644 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2818 [2025-01-10 07:14:26,646 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2818 states and 4354 transitions. [2025-01-10 07:14:26,651 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,652 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-01-10 07:14:26,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2818 states and 4354 transitions. [2025-01-10 07:14:26,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2818 to 2818. [2025-01-10 07:14:26,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2818 states, 2818 states have (on average 1.5450674237047552) internal successors, (4354), 2817 states have internal predecessors, (4354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2818 states to 2818 states and 4354 transitions. [2025-01-10 07:14:26,743 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-01-10 07:14:26,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:26,745 INFO L432 stractBuchiCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-01-10 07:14:26,746 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 07:14:26,746 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2818 states and 4354 transitions. [2025-01-10 07:14:26,762 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-01-10 07:14:26,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:26,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:26,765 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:26,765 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:26,765 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:26,766 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:26,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,766 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2025-01-10 07:14:26,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492156663] [2025-01-10 07:14:26,766 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:14:26,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,770 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,772 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,773 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,773 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,773 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,775 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,776 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,777 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,777 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,779 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,780 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,780 INFO L85 PathProgramCache]: Analyzing trace with hash -292638010, now seen corresponding path program 1 times [2025-01-10 07:14:26,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771902874] [2025-01-10 07:14:26,781 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,785 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:26,787 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:26,787 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,787 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,806 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,806 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771902874] [2025-01-10 07:14:26,806 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771902874] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,806 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,807 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,807 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123816335] [2025-01-10 07:14:26,807 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,807 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,807 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,807 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,808 INFO L87 Difference]: Start difference. First operand 2818 states and 4354 transitions. cyclomatic complexity: 1600 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,844 INFO L93 Difference]: Finished difference Result 5570 states and 8514 transitions. [2025-01-10 07:14:26,844 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5570 states and 8514 transitions. [2025-01-10 07:14:26,883 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-01-10 07:14:26,914 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5570 states to 5570 states and 8514 transitions. [2025-01-10 07:14:26,914 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5570 [2025-01-10 07:14:26,919 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5570 [2025-01-10 07:14:26,919 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5570 states and 8514 transitions. [2025-01-10 07:14:26,929 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,930 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-01-10 07:14:26,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5570 states and 8514 transitions. [2025-01-10 07:14:27,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5570 to 5570. [2025-01-10 07:14:27,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5570 states, 5570 states have (on average 1.5285457809694794) internal successors, (8514), 5569 states have internal predecessors, (8514), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5570 states to 5570 states and 8514 transitions. [2025-01-10 07:14:27,069 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-01-10 07:14:27,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:27,072 INFO L432 stractBuchiCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-01-10 07:14:27,072 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 07:14:27,072 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5570 states and 8514 transitions. [2025-01-10 07:14:27,098 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-01-10 07:14:27,098 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:27,098 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:27,100 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:27,100 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:27,100 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:27,100 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:27,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,101 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2025-01-10 07:14:27,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842012683] [2025-01-10 07:14:27,101 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:27,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,104 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,106 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,106 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:27,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,106 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:27,107 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,108 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,109 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,111 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:27,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,114 INFO L85 PathProgramCache]: Analyzing trace with hash -2098076344, now seen corresponding path program 1 times [2025-01-10 07:14:27,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806709800] [2025-01-10 07:14:27,114 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:27,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,120 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:27,123 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:27,123 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:27,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:27,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:27,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1806709800] [2025-01-10 07:14:27,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1806709800] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:27,151 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:27,151 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:27,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1530584971] [2025-01-10 07:14:27,152 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:27,152 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:27,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:27,152 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:27,152 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:27,152 INFO L87 Difference]: Start difference. First operand 5570 states and 8514 transitions. cyclomatic complexity: 3072 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:27,200 INFO L93 Difference]: Finished difference Result 11010 states and 16642 transitions. [2025-01-10 07:14:27,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11010 states and 16642 transitions. [2025-01-10 07:14:27,260 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-01-10 07:14:27,355 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11010 states to 11010 states and 16642 transitions. [2025-01-10 07:14:27,356 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11010 [2025-01-10 07:14:27,366 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11010 [2025-01-10 07:14:27,366 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11010 states and 16642 transitions. [2025-01-10 07:14:27,385 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:27,386 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-01-10 07:14:27,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11010 states and 16642 transitions. [2025-01-10 07:14:27,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11010 to 11010. [2025-01-10 07:14:27,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11010 states, 11010 states have (on average 1.5115349682107175) internal successors, (16642), 11009 states have internal predecessors, (16642), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11010 states to 11010 states and 16642 transitions. [2025-01-10 07:14:27,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-01-10 07:14:27,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:27,632 INFO L432 stractBuchiCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-01-10 07:14:27,633 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-01-10 07:14:27,633 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11010 states and 16642 transitions. [2025-01-10 07:14:27,677 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-01-10 07:14:27,678 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:27,678 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:27,679 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:27,679 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:27,679 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:27,679 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:27,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,680 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2025-01-10 07:14:27,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89663806] [2025-01-10 07:14:27,680 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:27,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,683 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,684 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,684 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:27,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,686 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:27,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,688 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,689 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,691 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:27,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1675374518, now seen corresponding path program 1 times [2025-01-10 07:14:27,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879635035] [2025-01-10 07:14:27,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:27,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:27,702 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:27,702 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,702 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:27,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:27,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:27,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879635035] [2025-01-10 07:14:27,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [879635035] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:27,727 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:27,727 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:27,727 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872821420] [2025-01-10 07:14:27,728 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:27,728 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:27,728 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:27,728 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:27,728 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:27,728 INFO L87 Difference]: Start difference. First operand 11010 states and 16642 transitions. cyclomatic complexity: 5888 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:27,804 INFO L93 Difference]: Finished difference Result 21762 states and 32514 transitions. [2025-01-10 07:14:27,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21762 states and 32514 transitions. [2025-01-10 07:14:27,934 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-01-10 07:14:28,046 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21762 states to 21762 states and 32514 transitions. [2025-01-10 07:14:28,046 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21762 [2025-01-10 07:14:28,071 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21762 [2025-01-10 07:14:28,072 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21762 states and 32514 transitions. [2025-01-10 07:14:28,106 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:28,106 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-01-10 07:14:28,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21762 states and 32514 transitions. [2025-01-10 07:14:28,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21762 to 21762. [2025-01-10 07:14:28,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21762 states, 21762 states have (on average 1.4940722360077199) internal successors, (32514), 21761 states have internal predecessors, (32514), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:28,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21762 states to 21762 states and 32514 transitions. [2025-01-10 07:14:28,615 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-01-10 07:14:28,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:28,618 INFO L432 stractBuchiCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-01-10 07:14:28,618 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-01-10 07:14:28,618 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21762 states and 32514 transitions. [2025-01-10 07:14:28,688 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-01-10 07:14:28,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:28,689 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:28,689 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:28,689 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:28,689 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:28,689 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:28,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:28,690 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2025-01-10 07:14:28,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:28,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285467855] [2025-01-10 07:14:28,690 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:28,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:28,692 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:28,695 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:28,695 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:28,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:28,696 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:28,697 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:28,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:28,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:28,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:28,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:28,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:28,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1801944328, now seen corresponding path program 1 times [2025-01-10 07:14:28,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:28,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207591364] [2025-01-10 07:14:28,703 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:28,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:28,708 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:28,710 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:28,710 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:28,710 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:28,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:28,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:28,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207591364] [2025-01-10 07:14:28,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1207591364] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:28,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:28,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:28,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942848868] [2025-01-10 07:14:28,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:28,729 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:28,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:28,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:28,730 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:28,730 INFO L87 Difference]: Start difference. First operand 21762 states and 32514 transitions. cyclomatic complexity: 11264 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:28,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:28,922 INFO L93 Difference]: Finished difference Result 43010 states and 63490 transitions. [2025-01-10 07:14:28,922 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43010 states and 63490 transitions. [2025-01-10 07:14:29,089 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-01-10 07:14:29,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43010 states to 43010 states and 63490 transitions. [2025-01-10 07:14:29,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43010 [2025-01-10 07:14:29,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43010 [2025-01-10 07:14:29,549 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43010 states and 63490 transitions. [2025-01-10 07:14:29,609 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:29,609 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-01-10 07:14:29,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43010 states and 63490 transitions. [2025-01-10 07:14:30,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43010 to 43010. [2025-01-10 07:14:30,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43010 states, 43010 states have (on average 1.4761683329458266) internal successors, (63490), 43009 states have internal predecessors, (63490), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:30,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43010 states to 43010 states and 63490 transitions. [2025-01-10 07:14:30,318 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-01-10 07:14:30,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:30,320 INFO L432 stractBuchiCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-01-10 07:14:30,320 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-01-10 07:14:30,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43010 states and 63490 transitions. [2025-01-10 07:14:30,600 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-01-10 07:14:30,600 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:30,600 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:30,601 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:30,601 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:30,602 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:30,602 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:30,602 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,602 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 11 times [2025-01-10 07:14:30,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795669349] [2025-01-10 07:14:30,602 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:30,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,606 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,608 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,608 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:30,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,608 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:30,609 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,611 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,611 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,611 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,613 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:30,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,613 INFO L85 PathProgramCache]: Analyzing trace with hash 113000586, now seen corresponding path program 1 times [2025-01-10 07:14:30,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044049420] [2025-01-10 07:14:30,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:30,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,618 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:30,620 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:30,620 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,620 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:30,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:30,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:30,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1044049420] [2025-01-10 07:14:30,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1044049420] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:30,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:30,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:30,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192586540] [2025-01-10 07:14:30,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:30,650 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:30,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:30,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:30,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:30,651 INFO L87 Difference]: Start difference. First operand 43010 states and 63490 transitions. cyclomatic complexity: 21504 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:30,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:30,974 INFO L93 Difference]: Finished difference Result 84994 states and 123906 transitions. [2025-01-10 07:14:30,974 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84994 states and 123906 transitions. [2025-01-10 07:14:31,262 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-01-10 07:14:31,750 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84994 states to 84994 states and 123906 transitions. [2025-01-10 07:14:31,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84994 [2025-01-10 07:14:31,856 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84994 [2025-01-10 07:14:31,860 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84994 states and 123906 transitions. [2025-01-10 07:14:31,948 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:31,948 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-01-10 07:14:32,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84994 states and 123906 transitions. [2025-01-10 07:14:32,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84994 to 84994. [2025-01-10 07:14:32,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84994 states, 84994 states have (on average 1.4578205520389675) internal successors, (123906), 84993 states have internal predecessors, (123906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:33,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84994 states to 84994 states and 123906 transitions. [2025-01-10 07:14:33,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-01-10 07:14:33,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:33,275 INFO L432 stractBuchiCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-01-10 07:14:33,275 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-01-10 07:14:33,275 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84994 states and 123906 transitions. [2025-01-10 07:14:33,573 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-01-10 07:14:33,573 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:33,573 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:33,574 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:33,574 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:33,575 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:33,575 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:33,575 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:33,575 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 12 times [2025-01-10 07:14:33,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:33,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564623147] [2025-01-10 07:14:33,575 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:33,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:33,579 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:33,581 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:33,581 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:33,581 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:33,581 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:33,582 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:33,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:33,583 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:33,583 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:33,585 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:33,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:33,585 INFO L85 PathProgramCache]: Analyzing trace with hash -1881144120, now seen corresponding path program 1 times [2025-01-10 07:14:33,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:33,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716674714] [2025-01-10 07:14:33,586 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:33,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:33,591 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:33,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:33,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:33,597 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:33,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:33,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:33,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716674714] [2025-01-10 07:14:33,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [716674714] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:33,622 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:33,622 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:33,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914133318] [2025-01-10 07:14:33,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:33,623 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:33,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:33,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:33,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:33,623 INFO L87 Difference]: Start difference. First operand 84994 states and 123906 transitions. cyclomatic complexity: 40960 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:34,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:34,148 INFO L93 Difference]: Finished difference Result 167938 states and 241666 transitions. [2025-01-10 07:14:34,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167938 states and 241666 transitions. [2025-01-10 07:14:34,978 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-01-10 07:14:35,509 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167938 states to 167938 states and 241666 transitions. [2025-01-10 07:14:35,509 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167938 [2025-01-10 07:14:35,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167938 [2025-01-10 07:14:35,586 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167938 states and 241666 transitions. [2025-01-10 07:14:35,650 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:35,650 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-01-10 07:14:35,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167938 states and 241666 transitions. [2025-01-10 07:14:37,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167938 to 167938. [2025-01-10 07:14:37,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167938 states, 167938 states have (on average 1.4390191618335337) internal successors, (241666), 167937 states have internal predecessors, (241666), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:37,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167938 states to 167938 states and 241666 transitions. [2025-01-10 07:14:37,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-01-10 07:14:37,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:37,769 INFO L432 stractBuchiCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-01-10 07:14:37,769 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-01-10 07:14:37,769 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167938 states and 241666 transitions. [2025-01-10 07:14:38,688 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-01-10 07:14:38,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:38,688 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:38,690 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:38,690 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:38,691 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:38,691 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:38,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:38,691 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 13 times [2025-01-10 07:14:38,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:38,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126944998] [2025-01-10 07:14:38,691 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:14:38,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:38,694 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:38,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:38,701 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:38,701 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:38,701 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:38,702 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:38,704 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:38,704 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:38,704 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:38,706 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:38,706 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:38,706 INFO L85 PathProgramCache]: Analyzing trace with hash 825475274, now seen corresponding path program 1 times [2025-01-10 07:14:38,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:38,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111770662] [2025-01-10 07:14:38,707 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:38,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:38,710 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:38,711 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:38,711 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:38,711 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:38,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:38,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:38,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111770662] [2025-01-10 07:14:38,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1111770662] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:38,727 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:38,727 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:14:38,727 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540912194] [2025-01-10 07:14:38,727 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:38,728 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:38,728 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:38,728 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:38,728 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:38,729 INFO L87 Difference]: Start difference. First operand 167938 states and 241666 transitions. cyclomatic complexity: 77824 Second operand has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:39,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:39,839 INFO L93 Difference]: Finished difference Result 331778 states and 471042 transitions. [2025-01-10 07:14:39,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 331778 states and 471042 transitions. [2025-01-10 07:14:41,443 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-01-10 07:14:42,532 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 331778 states to 331778 states and 471042 transitions. [2025-01-10 07:14:42,532 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 331778 [2025-01-10 07:14:42,710 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 331778 [2025-01-10 07:14:42,710 INFO L73 IsDeterministic]: Start isDeterministic. Operand 331778 states and 471042 transitions. [2025-01-10 07:14:42,890 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:42,891 INFO L218 hiAutomatonCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-01-10 07:14:43,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331778 states and 471042 transitions. [2025-01-10 07:14:45,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331778 to 331778. [2025-01-10 07:14:45,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 331778 states, 331778 states have (on average 1.419750556094738) internal successors, (471042), 331777 states have internal predecessors, (471042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:47,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331778 states to 331778 states and 471042 transitions. [2025-01-10 07:14:47,334 INFO L240 hiAutomatonCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-01-10 07:14:47,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:47,335 INFO L432 stractBuchiCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-01-10 07:14:47,335 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-01-10 07:14:47,335 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 331778 states and 471042 transitions. [2025-01-10 07:14:48,291 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-01-10 07:14:48,292 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:48,292 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:48,295 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:48,296 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:48,296 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:48,296 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-01-10 07:14:48,296 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:48,296 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 14 times [2025-01-10 07:14:48,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:48,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654834548] [2025-01-10 07:14:48,296 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:48,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:48,299 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:48,300 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:48,300 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:48,300 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,300 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:48,301 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:48,302 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:48,302 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:48,302 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,304 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:48,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:48,304 INFO L85 PathProgramCache]: Analyzing trace with hash -195593080, now seen corresponding path program 1 times [2025-01-10 07:14:48,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:48,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871717371] [2025-01-10 07:14:48,305 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:48,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:48,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:48,310 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:48,310 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:48,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,310 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:48,311 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:48,313 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:48,313 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:48,313 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,318 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:48,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:48,319 INFO L85 PathProgramCache]: Analyzing trace with hash -653789110, now seen corresponding path program 1 times [2025-01-10 07:14:48,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:48,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980842632] [2025-01-10 07:14:48,319 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:48,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:48,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-01-10 07:14:48,326 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-01-10 07:14:48,326 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:48,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,326 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:48,328 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-01-10 07:14:48,329 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-01-10 07:14:48,330 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:48,330 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:48,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:49,063 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:49,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:49,065 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:49,065 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:49,065 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:49,071 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:49,072 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:49,072 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:49,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:49,119 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.01 07:14:49 BoogieIcfgContainer [2025-01-10 07:14:49,119 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-01-10 07:14:49,120 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-10 07:14:49,120 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-10 07:14:49,120 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-10 07:14:49,122 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:25" (3/4) ... [2025-01-10 07:14:49,123 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-01-10 07:14:49,171 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-01-10 07:14:49,171 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-10 07:14:49,173 INFO L158 Benchmark]: Toolchain (without parser) took 24729.73ms. Allocated memory was 142.6MB in the beginning and 12.5GB in the end (delta: 12.4GB). Free memory was 105.6MB in the beginning and 9.6GB in the end (delta: -9.5GB). Peak memory consumption was 2.8GB. Max. memory is 16.1GB. [2025-01-10 07:14:49,173 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 125.9MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:49,174 INFO L158 Benchmark]: CACSL2BoogieTranslator took 281.90ms. Allocated memory is still 142.6MB. Free memory was 105.6MB in the beginning and 93.4MB in the end (delta: 12.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:49,174 INFO L158 Benchmark]: Boogie Procedure Inliner took 36.31ms. Allocated memory is still 142.6MB. Free memory was 93.4MB in the beginning and 92.4MB in the end (delta: 973.2kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:49,174 INFO L158 Benchmark]: Boogie Preprocessor took 65.17ms. Allocated memory is still 142.6MB. Free memory was 92.4MB in the beginning and 90.4MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:49,174 INFO L158 Benchmark]: RCFGBuilder took 453.78ms. Allocated memory is still 142.6MB. Free memory was 90.4MB in the beginning and 73.7MB in the end (delta: 16.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-01-10 07:14:49,175 INFO L158 Benchmark]: BuchiAutomizer took 23835.93ms. Allocated memory was 142.6MB in the beginning and 12.5GB in the end (delta: 12.4GB). Free memory was 73.7MB in the beginning and 9.6GB in the end (delta: -9.6GB). Peak memory consumption was 2.8GB. Max. memory is 16.1GB. [2025-01-10 07:14:49,175 INFO L158 Benchmark]: Witness Printer took 51.40ms. Allocated memory is still 12.5GB. Free memory was 9.6GB in the beginning and 9.6GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:49,176 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 125.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 281.90ms. Allocated memory is still 142.6MB. Free memory was 105.6MB in the beginning and 93.4MB in the end (delta: 12.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 36.31ms. Allocated memory is still 142.6MB. Free memory was 93.4MB in the beginning and 92.4MB in the end (delta: 973.2kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 65.17ms. Allocated memory is still 142.6MB. Free memory was 92.4MB in the beginning and 90.4MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 453.78ms. Allocated memory is still 142.6MB. Free memory was 90.4MB in the beginning and 73.7MB in the end (delta: 16.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 23835.93ms. Allocated memory was 142.6MB in the beginning and 12.5GB in the end (delta: 12.4GB). Free memory was 73.7MB in the beginning and 9.6GB in the end (delta: -9.6GB). Peak memory consumption was 2.8GB. Max. memory is 16.1GB. * Witness Printer took 51.40ms. Allocated memory is still 12.5GB. Free memory was 9.6GB in the beginning and 9.6GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 13 terminating modules (13 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.13 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 331778 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 23.7s and 14 iterations. TraceHistogramMax:1. Analysis of lassos took 1.7s. Construction of modules took 0.1s. Büchi inclusion checks took 19.1s. Highest rank in rank-based complementation 0. Minimization of det autom 13. Minimization of nondet autom 0. Automata minimization 9.7s AutomataMinimizationTime, 13 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 5.9s Buchi closure took 0.4s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 797 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 797 mSDsluCounter, 2490 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 966 mSDsCounter, 26 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 67 IncrementalHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 26 mSolverCounterUnsat, 1524 mSDtfsCounter, 67 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI13 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 56]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND FALSE !(p2 != 0) [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND FALSE !(p14 != 0) [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND FALSE !(p2 != 0) [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND FALSE !(p14 != 0) [L225] COND FALSE !(p15 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 56]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND FALSE !(p2 != 0) [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND FALSE !(p14 != 0) [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND FALSE !(p2 != 0) [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND FALSE !(p14 != 0) [L225] COND FALSE !(p15 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-01-10 07:14:49,194 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)