./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-09 07:26:02,129 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-09 07:26:02,203 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-01-09 07:26:02,211 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-09 07:26:02,214 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-09 07:26:02,243 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-09 07:26:02,244 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-09 07:26:02,244 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-09 07:26:02,245 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-09 07:26:02,245 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-09 07:26:02,245 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-01-09 07:26:02,245 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-01-09 07:26:02,246 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-09 07:26:02,246 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-09 07:26:02,246 INFO L153 SettingsManager]: * Use SBE=true [2025-01-09 07:26:02,246 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-09 07:26:02,247 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-01-09 07:26:02,247 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-09 07:26:02,247 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-09 07:26:02,248 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 07:26:02,248 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:02,249 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:02,249 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-01-09 07:26:02,249 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-01-09 07:26:02,250 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-01-09 07:26:02,250 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-01-09 07:26:02,250 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-01-09 07:26:02,250 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2025-01-09 07:26:02,547 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-09 07:26:02,558 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-09 07:26:02,560 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-09 07:26:02,561 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-09 07:26:02,562 INFO L274 PluginConnector]: CDTParser initialized [2025-01-09 07:26:02,563 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:03,961 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a36261e0c/be748b26b25e41339c31c50590f5e8ba/FLAGc5970b7d3 [2025-01-09 07:26:04,313 INFO L384 CDTParser]: Found 1 translation units. [2025-01-09 07:26:04,314 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:04,330 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a36261e0c/be748b26b25e41339c31c50590f5e8ba/FLAGc5970b7d3 [2025-01-09 07:26:04,547 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a36261e0c/be748b26b25e41339c31c50590f5e8ba [2025-01-09 07:26:04,550 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-09 07:26:04,551 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-09 07:26:04,553 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-09 07:26:04,553 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-09 07:26:04,557 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-09 07:26:04,558 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 07:26:04" (1/1) ... [2025-01-09 07:26:04,559 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3fe5e56f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:04, skipping insertion in model container [2025-01-09 07:26:04,559 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 07:26:04" (1/1) ... [2025-01-09 07:26:04,601 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-09 07:26:04,747 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-01-09 07:26:04,945 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 07:26:04,965 INFO L200 MainTranslator]: Completed pre-run [2025-01-09 07:26:04,973 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-01-09 07:26:05,081 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 07:26:05,094 INFO L204 MainTranslator]: Completed translation [2025-01-09 07:26:05,095 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05 WrapperNode [2025-01-09 07:26:05,095 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-09 07:26:05,096 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-09 07:26:05,096 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-09 07:26:05,096 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-09 07:26:05,106 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,142 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,362 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1945 [2025-01-09 07:26:05,362 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-09 07:26:05,363 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-09 07:26:05,363 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-09 07:26:05,363 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-09 07:26:05,375 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,377 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,408 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,479 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-09 07:26:05,480 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,480 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,540 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,559 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,573 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,607 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,625 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,666 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-09 07:26:05,667 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-09 07:26:05,667 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-09 07:26:05,668 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-09 07:26:05,669 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (1/1) ... [2025-01-09 07:26:05,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:05,687 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 07:26:05,702 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-01-09 07:26:05,708 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-01-09 07:26:05,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-09 07:26:05,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-09 07:26:05,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-09 07:26:05,728 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-09 07:26:06,008 INFO L234 CfgBuilder]: Building ICFG [2025-01-09 07:26:06,010 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-09 07:26:08,028 INFO L? ?]: Removed 1134 outVars from TransFormulas that were not future-live. [2025-01-09 07:26:08,029 INFO L283 CfgBuilder]: Performing block encoding [2025-01-09 07:26:08,052 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-09 07:26:08,052 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-09 07:26:08,052 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 07:26:08 BoogieIcfgContainer [2025-01-09 07:26:08,052 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-09 07:26:08,055 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-01-09 07:26:08,055 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-01-09 07:26:08,059 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-01-09 07:26:08,060 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.01 07:26:04" (1/3) ... [2025-01-09 07:26:08,060 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d3dd106 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 07:26:08, skipping insertion in model container [2025-01-09 07:26:08,061 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:05" (2/3) ... [2025-01-09 07:26:08,062 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d3dd106 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 07:26:08, skipping insertion in model container [2025-01-09 07:26:08,062 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 07:26:08" (3/3) ... [2025-01-09 07:26:08,063 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:08,077 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-01-09 07:26:08,079 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 498 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-01-09 07:26:08,154 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-01-09 07:26:08,167 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@25eef4c9, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-01-09 07:26:08,168 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-01-09 07:26:08,174 INFO L276 IsEmpty]: Start isEmpty. Operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:08,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2025-01-09 07:26:08,194 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:08,195 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:08,195 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:08,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:08,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1124175102, now seen corresponding path program 1 times [2025-01-09 07:26:08,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:08,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285227697] [2025-01-09 07:26:08,213 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:08,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:08,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 215 statements into 1 equivalence classes. [2025-01-09 07:26:08,789 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 215 of 215 statements. [2025-01-09 07:26:08,791 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:08,791 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:10,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:10,142 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:10,142 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [285227697] [2025-01-09 07:26:10,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [285227697] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:10,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:10,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:10,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158372640] [2025-01-09 07:26:10,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:10,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:10,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:10,170 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:10,170 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:10,174 INFO L87 Difference]: Start difference. First operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:10,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:10,291 INFO L93 Difference]: Finished difference Result 901 states and 1347 transitions. [2025-01-09 07:26:10,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:10,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 215 [2025-01-09 07:26:10,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:10,309 INFO L225 Difference]: With dead ends: 901 [2025-01-09 07:26:10,309 INFO L226 Difference]: Without dead ends: 497 [2025-01-09 07:26:10,315 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:10,321 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1468 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2205 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:10,323 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2205 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:10,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2025-01-09 07:26:10,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2025-01-09 07:26:10,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 497 states, 496 states have (on average 1.4939516129032258) internal successors, (741), 496 states have internal predecessors, (741), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:10,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 741 transitions. [2025-01-09 07:26:10,394 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 741 transitions. Word has length 215 [2025-01-09 07:26:10,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:10,397 INFO L471 AbstractCegarLoop]: Abstraction has 497 states and 741 transitions. [2025-01-09 07:26:10,397 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:10,398 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 741 transitions. [2025-01-09 07:26:10,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2025-01-09 07:26:10,404 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:10,405 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:10,405 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-01-09 07:26:10,405 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:10,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:10,406 INFO L85 PathProgramCache]: Analyzing trace with hash 491386312, now seen corresponding path program 1 times [2025-01-09 07:26:10,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:10,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641738197] [2025-01-09 07:26:10,406 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:10,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:10,499 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 216 statements into 1 equivalence classes. [2025-01-09 07:26:10,614 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 216 of 216 statements. [2025-01-09 07:26:10,614 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:10,614 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:11,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:11,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:11,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641738197] [2025-01-09 07:26:11,312 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641738197] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:11,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:11,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-01-09 07:26:11,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246296177] [2025-01-09 07:26:11,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:11,314 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-01-09 07:26:11,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:11,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-01-09 07:26:11,317 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:11,317 INFO L87 Difference]: Start difference. First operand 497 states and 741 transitions. Second operand has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:12,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:12,277 INFO L93 Difference]: Finished difference Result 1711 states and 2552 transitions. [2025-01-09 07:26:12,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-09 07:26:12,278 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 216 [2025-01-09 07:26:12,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:12,288 INFO L225 Difference]: With dead ends: 1711 [2025-01-09 07:26:12,289 INFO L226 Difference]: Without dead ends: 876 [2025-01-09 07:26:12,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2025-01-09 07:26:12,294 INFO L435 NwaCegarLoop]: 867 mSDtfsCounter, 2923 mSDsluCounter, 1907 mSDsCounter, 0 mSdLazyCounter, 581 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2923 SdHoareTripleChecker+Valid, 2774 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 581 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:12,295 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2923 Valid, 2774 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 581 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-01-09 07:26:12,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2025-01-09 07:26:12,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 695. [2025-01-09 07:26:12,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 695 states, 694 states have (on average 1.494236311239193) internal successors, (1037), 694 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:12,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 695 states and 1037 transitions. [2025-01-09 07:26:12,344 INFO L78 Accepts]: Start accepts. Automaton has 695 states and 1037 transitions. Word has length 216 [2025-01-09 07:26:12,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:12,344 INFO L471 AbstractCegarLoop]: Abstraction has 695 states and 1037 transitions. [2025-01-09 07:26:12,345 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:12,345 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 1037 transitions. [2025-01-09 07:26:12,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2025-01-09 07:26:12,351 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:12,351 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:12,352 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-01-09 07:26:12,352 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:12,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:12,355 INFO L85 PathProgramCache]: Analyzing trace with hash -907188898, now seen corresponding path program 1 times [2025-01-09 07:26:12,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:12,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006502014] [2025-01-09 07:26:12,356 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:12,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:12,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 217 statements into 1 equivalence classes. [2025-01-09 07:26:12,490 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 217 of 217 statements. [2025-01-09 07:26:12,490 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:12,490 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:13,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:13,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:13,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006502014] [2025-01-09 07:26:13,027 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1006502014] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:13,027 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:13,027 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:13,027 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [624719616] [2025-01-09 07:26:13,028 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:13,028 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:13,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:13,029 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:13,029 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:13,029 INFO L87 Difference]: Start difference. First operand 695 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:13,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:13,066 INFO L93 Difference]: Finished difference Result 1100 states and 1641 transitions. [2025-01-09 07:26:13,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:13,067 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 217 [2025-01-09 07:26:13,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:13,070 INFO L225 Difference]: With dead ends: 1100 [2025-01-09 07:26:13,070 INFO L226 Difference]: Without dead ends: 697 [2025-01-09 07:26:13,071 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:13,072 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1464 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2201 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:13,072 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2201 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:13,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2025-01-09 07:26:13,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 697. [2025-01-09 07:26:13,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 696 states have (on average 1.492816091954023) internal successors, (1039), 696 states have internal predecessors, (1039), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:13,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1039 transitions. [2025-01-09 07:26:13,098 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1039 transitions. Word has length 217 [2025-01-09 07:26:13,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:13,099 INFO L471 AbstractCegarLoop]: Abstraction has 697 states and 1039 transitions. [2025-01-09 07:26:13,099 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:13,099 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1039 transitions. [2025-01-09 07:26:13,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2025-01-09 07:26:13,102 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:13,102 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:13,102 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-01-09 07:26:13,102 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:13,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:13,104 INFO L85 PathProgramCache]: Analyzing trace with hash 843950657, now seen corresponding path program 1 times [2025-01-09 07:26:13,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:13,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005965260] [2025-01-09 07:26:13,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:13,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:13,168 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 218 statements into 1 equivalence classes. [2025-01-09 07:26:13,614 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 218 of 218 statements. [2025-01-09 07:26:13,615 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:13,615 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:14,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:14,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:14,417 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005965260] [2025-01-09 07:26:14,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005965260] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:14,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:14,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 07:26:14,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [652964207] [2025-01-09 07:26:14,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:14,418 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 07:26:14,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:14,419 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 07:26:14,419 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-01-09 07:26:14,419 INFO L87 Difference]: Start difference. First operand 697 states and 1039 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:14,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:14,520 INFO L93 Difference]: Finished difference Result 1106 states and 1648 transitions. [2025-01-09 07:26:14,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 07:26:14,521 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 218 [2025-01-09 07:26:14,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:14,524 INFO L225 Difference]: With dead ends: 1106 [2025-01-09 07:26:14,524 INFO L226 Difference]: Without dead ends: 701 [2025-01-09 07:26:14,525 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:14,526 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 535 mSDsluCounter, 1436 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 535 SdHoareTripleChecker+Valid, 2158 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:14,526 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [535 Valid, 2158 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:14,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2025-01-09 07:26:14,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 700. [2025-01-09 07:26:14,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4907010014306152) internal successors, (1042), 699 states have internal predecessors, (1042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:14,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1042 transitions. [2025-01-09 07:26:14,550 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1042 transitions. Word has length 218 [2025-01-09 07:26:14,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:14,551 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1042 transitions. [2025-01-09 07:26:14,551 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:14,551 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1042 transitions. [2025-01-09 07:26:14,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2025-01-09 07:26:14,557 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:14,557 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:14,557 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-01-09 07:26:14,557 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:14,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:14,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1957213057, now seen corresponding path program 1 times [2025-01-09 07:26:14,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:14,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741508712] [2025-01-09 07:26:14,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:14,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:14,619 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 219 statements into 1 equivalence classes. [2025-01-09 07:26:14,945 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 219 of 219 statements. [2025-01-09 07:26:14,946 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:14,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:15,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:15,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:15,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741508712] [2025-01-09 07:26:15,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1741508712] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:15,902 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:15,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:15,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104141497] [2025-01-09 07:26:15,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:15,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:15,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:15,905 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:15,905 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:15,905 INFO L87 Difference]: Start difference. First operand 700 states and 1042 transitions. Second operand has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:15,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:15,945 INFO L93 Difference]: Finished difference Result 1118 states and 1662 transitions. [2025-01-09 07:26:15,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:15,946 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 219 [2025-01-09 07:26:15,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:15,949 INFO L225 Difference]: With dead ends: 1118 [2025-01-09 07:26:15,949 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:15,951 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:15,952 INFO L435 NwaCegarLoop]: 733 mSDtfsCounter, 6 mSDsluCounter, 1456 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2189 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:15,953 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2189 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:15,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:15,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:15,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4878397711015736) internal successors, (1040), 699 states have internal predecessors, (1040), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:15,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1040 transitions. [2025-01-09 07:26:15,972 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1040 transitions. Word has length 219 [2025-01-09 07:26:15,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:15,972 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1040 transitions. [2025-01-09 07:26:15,972 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:15,972 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1040 transitions. [2025-01-09 07:26:15,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2025-01-09 07:26:15,977 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:15,977 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:15,977 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-01-09 07:26:15,978 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:15,978 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:15,978 INFO L85 PathProgramCache]: Analyzing trace with hash 2075244672, now seen corresponding path program 1 times [2025-01-09 07:26:15,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:15,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817798870] [2025-01-09 07:26:15,979 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:15,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:16,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 220 statements into 1 equivalence classes. [2025-01-09 07:26:16,182 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 220 of 220 statements. [2025-01-09 07:26:16,182 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:16,182 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:17,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:17,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:17,137 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1817798870] [2025-01-09 07:26:17,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1817798870] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:17,138 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:17,138 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:17,138 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426559471] [2025-01-09 07:26:17,138 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:17,138 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:17,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:17,143 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:17,143 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:17,143 INFO L87 Difference]: Start difference. First operand 700 states and 1040 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:17,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:17,182 INFO L93 Difference]: Finished difference Result 1266 states and 1880 transitions. [2025-01-09 07:26:17,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:17,183 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 220 [2025-01-09 07:26:17,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:17,186 INFO L225 Difference]: With dead ends: 1266 [2025-01-09 07:26:17,187 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:17,188 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:17,190 INFO L435 NwaCegarLoop]: 732 mSDtfsCounter, 6 mSDsluCounter, 1454 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2186 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:17,190 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2186 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:17,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:17,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:17,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4849785407725322) internal successors, (1038), 699 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:17,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1038 transitions. [2025-01-09 07:26:17,210 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1038 transitions. Word has length 220 [2025-01-09 07:26:17,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:17,212 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1038 transitions. [2025-01-09 07:26:17,213 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:17,213 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1038 transitions. [2025-01-09 07:26:17,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2025-01-09 07:26:17,215 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:17,215 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:17,216 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-01-09 07:26:17,216 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:17,216 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:17,216 INFO L85 PathProgramCache]: Analyzing trace with hash -1460174850, now seen corresponding path program 1 times [2025-01-09 07:26:17,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:17,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125207615] [2025-01-09 07:26:17,217 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:17,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:17,282 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 221 statements into 1 equivalence classes. [2025-01-09 07:26:17,625 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 221 of 221 statements. [2025-01-09 07:26:17,625 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:17,625 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:18,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:18,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:18,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125207615] [2025-01-09 07:26:18,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [125207615] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:18,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:18,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:18,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1825539565] [2025-01-09 07:26:18,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:18,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:18,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:18,548 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:18,548 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:18,548 INFO L87 Difference]: Start difference. First operand 700 states and 1038 transitions. Second operand has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:18,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:18,589 INFO L93 Difference]: Finished difference Result 1108 states and 1642 transitions. [2025-01-09 07:26:18,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:18,590 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 221 [2025-01-09 07:26:18,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:18,593 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:18,593 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:18,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:18,595 INFO L435 NwaCegarLoop]: 731 mSDtfsCounter, 6 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:18,596 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2183 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:18,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:18,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:18,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4835479256080115) internal successors, (1037), 699 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:18,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1037 transitions. [2025-01-09 07:26:18,614 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1037 transitions. Word has length 221 [2025-01-09 07:26:18,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:18,615 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1037 transitions. [2025-01-09 07:26:18,615 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:18,615 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1037 transitions. [2025-01-09 07:26:18,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2025-01-09 07:26:18,617 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:18,617 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:18,618 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-01-09 07:26:18,618 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:18,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:18,619 INFO L85 PathProgramCache]: Analyzing trace with hash -523909459, now seen corresponding path program 1 times [2025-01-09 07:26:18,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:18,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043318280] [2025-01-09 07:26:18,619 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:18,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:18,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 222 statements into 1 equivalence classes. [2025-01-09 07:26:18,903 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 222 of 222 statements. [2025-01-09 07:26:18,903 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:18,903 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:19,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:19,704 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:19,704 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043318280] [2025-01-09 07:26:19,704 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043318280] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:19,704 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:19,704 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:19,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777168273] [2025-01-09 07:26:19,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:19,705 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:19,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:19,706 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:19,706 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:19,706 INFO L87 Difference]: Start difference. First operand 700 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:19,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:19,742 INFO L93 Difference]: Finished difference Result 1108 states and 1640 transitions. [2025-01-09 07:26:19,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:19,742 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 222 [2025-01-09 07:26:19,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:19,745 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:19,747 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:19,748 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:19,748 INFO L435 NwaCegarLoop]: 730 mSDtfsCounter, 5 mSDsluCounter, 1450 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 2180 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:19,748 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 2180 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:19,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:19,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:19,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4821173104434906) internal successors, (1036), 699 states have internal predecessors, (1036), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:19,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1036 transitions. [2025-01-09 07:26:19,767 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1036 transitions. Word has length 222 [2025-01-09 07:26:19,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:19,767 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1036 transitions. [2025-01-09 07:26:19,768 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:19,768 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1036 transitions. [2025-01-09 07:26:19,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2025-01-09 07:26:19,773 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:19,774 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:19,774 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-01-09 07:26:19,774 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:19,774 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:19,775 INFO L85 PathProgramCache]: Analyzing trace with hash 943224598, now seen corresponding path program 1 times [2025-01-09 07:26:19,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:19,775 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630345088] [2025-01-09 07:26:19,775 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:19,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:19,840 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 223 statements into 1 equivalence classes. [2025-01-09 07:26:19,969 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 223 of 223 statements. [2025-01-09 07:26:19,970 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:19,970 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:20,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:20,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:20,743 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630345088] [2025-01-09 07:26:20,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1630345088] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:20,743 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:20,744 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:20,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70900126] [2025-01-09 07:26:20,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:20,744 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:20,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:20,745 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:20,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:20,746 INFO L87 Difference]: Start difference. First operand 700 states and 1036 transitions. Second operand has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:20,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:20,783 INFO L93 Difference]: Finished difference Result 1246 states and 1843 transitions. [2025-01-09 07:26:20,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:20,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 223 [2025-01-09 07:26:20,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:20,787 INFO L225 Difference]: With dead ends: 1246 [2025-01-09 07:26:20,787 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:20,788 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:20,789 INFO L435 NwaCegarLoop]: 729 mSDtfsCounter, 6 mSDsluCounter, 1448 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2177 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:20,789 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2177 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:20,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:20,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:20,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4792560801144492) internal successors, (1034), 699 states have internal predecessors, (1034), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:20,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1034 transitions. [2025-01-09 07:26:20,807 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1034 transitions. Word has length 223 [2025-01-09 07:26:20,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:20,807 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1034 transitions. [2025-01-09 07:26:20,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:20,808 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1034 transitions. [2025-01-09 07:26:20,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2025-01-09 07:26:20,810 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:20,811 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:20,811 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-01-09 07:26:20,811 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:20,812 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:20,815 INFO L85 PathProgramCache]: Analyzing trace with hash -29545317, now seen corresponding path program 1 times [2025-01-09 07:26:20,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:20,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497240165] [2025-01-09 07:26:20,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:20,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:20,888 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 224 statements into 1 equivalence classes. [2025-01-09 07:26:21,105 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 224 of 224 statements. [2025-01-09 07:26:21,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:21,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:21,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:21,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:21,926 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497240165] [2025-01-09 07:26:21,926 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [497240165] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:21,927 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:21,927 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:21,927 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069369779] [2025-01-09 07:26:21,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:21,927 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:21,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:21,928 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:21,929 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:21,930 INFO L87 Difference]: Start difference. First operand 700 states and 1034 transitions. Second operand has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:21,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:21,969 INFO L93 Difference]: Finished difference Result 1294 states and 1910 transitions. [2025-01-09 07:26:21,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:21,970 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 224 [2025-01-09 07:26:21,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:21,973 INFO L225 Difference]: With dead ends: 1294 [2025-01-09 07:26:21,973 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:21,974 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:21,974 INFO L435 NwaCegarLoop]: 728 mSDtfsCounter, 6 mSDsluCounter, 1446 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2174 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:21,975 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2174 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:21,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:21,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:21,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4763948497854078) internal successors, (1032), 699 states have internal predecessors, (1032), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:21,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1032 transitions. [2025-01-09 07:26:21,991 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1032 transitions. Word has length 224 [2025-01-09 07:26:21,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:21,991 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1032 transitions. [2025-01-09 07:26:21,991 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:21,992 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1032 transitions. [2025-01-09 07:26:21,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2025-01-09 07:26:21,994 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:21,994 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:21,994 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-01-09 07:26:21,994 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:21,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:21,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1774890696, now seen corresponding path program 1 times [2025-01-09 07:26:21,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:21,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009427825] [2025-01-09 07:26:21,997 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:21,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:22,064 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 225 statements into 1 equivalence classes. [2025-01-09 07:26:22,225 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 225 of 225 statements. [2025-01-09 07:26:22,226 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:22,226 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:22,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:22,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:22,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009427825] [2025-01-09 07:26:22,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2009427825] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:22,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:22,975 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:22,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [644989141] [2025-01-09 07:26:22,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:22,975 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:22,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:22,976 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:22,976 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:22,976 INFO L87 Difference]: Start difference. First operand 700 states and 1032 transitions. Second operand has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:23,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:23,012 INFO L93 Difference]: Finished difference Result 1108 states and 1632 transitions. [2025-01-09 07:26:23,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:23,013 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 225 [2025-01-09 07:26:23,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:23,016 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:23,016 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:23,017 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:23,018 INFO L435 NwaCegarLoop]: 727 mSDtfsCounter, 6 mSDsluCounter, 1444 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:23,018 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2171 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:23,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:23,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:23,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4749642346208869) internal successors, (1031), 699 states have internal predecessors, (1031), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:23,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1031 transitions. [2025-01-09 07:26:23,033 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1031 transitions. Word has length 225 [2025-01-09 07:26:23,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:23,034 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1031 transitions. [2025-01-09 07:26:23,034 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:23,034 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1031 transitions. [2025-01-09 07:26:23,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2025-01-09 07:26:23,036 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:23,037 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:23,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-01-09 07:26:23,037 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:23,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:23,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1371812033, now seen corresponding path program 1 times [2025-01-09 07:26:23,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:23,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499283243] [2025-01-09 07:26:23,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:23,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:23,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 226 statements into 1 equivalence classes. [2025-01-09 07:26:23,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 226 of 226 statements. [2025-01-09 07:26:23,299 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:23,299 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:23,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:23,942 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:23,943 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499283243] [2025-01-09 07:26:23,943 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1499283243] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:23,943 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:23,943 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:23,943 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613585143] [2025-01-09 07:26:23,943 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:23,943 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:23,943 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:23,944 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:23,944 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:23,944 INFO L87 Difference]: Start difference. First operand 700 states and 1031 transitions. Second operand has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:23,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:23,978 INFO L93 Difference]: Finished difference Result 1108 states and 1630 transitions. [2025-01-09 07:26:23,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:23,978 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 226 [2025-01-09 07:26:23,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:23,981 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:23,981 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:23,982 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:23,983 INFO L435 NwaCegarLoop]: 726 mSDtfsCounter, 6 mSDsluCounter, 1442 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2168 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:23,983 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2168 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:23,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:23,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:23,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4735336194563662) internal successors, (1030), 699 states have internal predecessors, (1030), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:23,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1030 transitions. [2025-01-09 07:26:23,999 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1030 transitions. Word has length 226 [2025-01-09 07:26:24,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:24,000 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1030 transitions. [2025-01-09 07:26:24,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:24,001 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1030 transitions. [2025-01-09 07:26:24,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2025-01-09 07:26:24,003 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:24,004 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:24,004 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-01-09 07:26:24,004 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:24,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:24,005 INFO L85 PathProgramCache]: Analyzing trace with hash -2077231164, now seen corresponding path program 1 times [2025-01-09 07:26:24,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:24,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427383703] [2025-01-09 07:26:24,005 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:24,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:24,065 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 227 statements into 1 equivalence classes. [2025-01-09 07:26:24,282 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 227 of 227 statements. [2025-01-09 07:26:24,283 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:24,283 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:24,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:24,896 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:24,896 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427383703] [2025-01-09 07:26:24,896 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1427383703] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:24,896 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:24,896 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:24,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018222201] [2025-01-09 07:26:24,896 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:24,897 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:24,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:24,897 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:24,897 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:24,898 INFO L87 Difference]: Start difference. First operand 700 states and 1030 transitions. Second operand has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:24,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:24,932 INFO L93 Difference]: Finished difference Result 1108 states and 1628 transitions. [2025-01-09 07:26:24,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:24,933 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 227 [2025-01-09 07:26:24,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:24,937 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:24,937 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:24,938 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:24,939 INFO L435 NwaCegarLoop]: 725 mSDtfsCounter, 6 mSDsluCounter, 1440 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2165 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:24,939 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2165 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:24,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:24,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:24,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4721030042918455) internal successors, (1029), 699 states have internal predecessors, (1029), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:24,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1029 transitions. [2025-01-09 07:26:24,957 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1029 transitions. Word has length 227 [2025-01-09 07:26:24,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:24,957 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1029 transitions. [2025-01-09 07:26:24,957 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:24,957 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1029 transitions. [2025-01-09 07:26:24,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2025-01-09 07:26:24,959 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:24,959 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:24,960 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-01-09 07:26:24,960 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:24,961 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:24,961 INFO L85 PathProgramCache]: Analyzing trace with hash 99784443, now seen corresponding path program 1 times [2025-01-09 07:26:24,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:24,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229652368] [2025-01-09 07:26:24,961 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:24,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:25,020 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 228 statements into 1 equivalence classes. [2025-01-09 07:26:25,207 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 228 of 228 statements. [2025-01-09 07:26:25,208 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:25,208 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:25,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:25,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:25,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229652368] [2025-01-09 07:26:25,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229652368] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:25,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:25,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:25,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761248799] [2025-01-09 07:26:25,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:25,894 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:25,894 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:25,895 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:25,895 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:25,895 INFO L87 Difference]: Start difference. First operand 700 states and 1029 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:25,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:25,930 INFO L93 Difference]: Finished difference Result 1108 states and 1626 transitions. [2025-01-09 07:26:25,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:25,931 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2025-01-09 07:26:25,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:25,934 INFO L225 Difference]: With dead ends: 1108 [2025-01-09 07:26:25,934 INFO L226 Difference]: Without dead ends: 700 [2025-01-09 07:26:25,935 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:25,936 INFO L435 NwaCegarLoop]: 724 mSDtfsCounter, 6 mSDsluCounter, 1438 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:25,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2162 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 07:26:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-01-09 07:26:25,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-01-09 07:26:25,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4706723891273248) internal successors, (1028), 699 states have internal predecessors, (1028), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:25,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1028 transitions. [2025-01-09 07:26:25,955 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1028 transitions. Word has length 228 [2025-01-09 07:26:25,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:25,956 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1028 transitions. [2025-01-09 07:26:25,957 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:25,957 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1028 transitions. [2025-01-09 07:26:25,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2025-01-09 07:26:25,959 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:25,959 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:25,959 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-01-09 07:26:25,959 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:25,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:25,960 INFO L85 PathProgramCache]: Analyzing trace with hash 26033572, now seen corresponding path program 1 times [2025-01-09 07:26:25,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:25,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122541332] [2025-01-09 07:26:25,960 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:25,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:26,014 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 229 statements into 1 equivalence classes. [2025-01-09 07:26:26,431 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 229 of 229 statements. [2025-01-09 07:26:26,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:26,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:27,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:27,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:27,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122541332] [2025-01-09 07:26:27,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2122541332] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:27,741 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:27,741 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-09 07:26:27,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524178984] [2025-01-09 07:26:27,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:27,741 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-01-09 07:26:27,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:27,742 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-09 07:26:27,742 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-01-09 07:26:27,742 INFO L87 Difference]: Start difference. First operand 700 states and 1028 transitions. Second operand has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:27,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:27,927 INFO L93 Difference]: Finished difference Result 1304 states and 1913 transitions. [2025-01-09 07:26:27,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-01-09 07:26:27,928 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 229 [2025-01-09 07:26:27,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:27,932 INFO L225 Difference]: With dead ends: 1304 [2025-01-09 07:26:27,932 INFO L226 Difference]: Without dead ends: 718 [2025-01-09 07:26:27,934 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2025-01-09 07:26:27,935 INFO L435 NwaCegarLoop]: 699 mSDtfsCounter, 691 mSDsluCounter, 3476 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 691 SdHoareTripleChecker+Valid, 4175 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:27,935 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [691 Valid, 4175 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:27,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2025-01-09 07:26:27,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 708. [2025-01-09 07:26:27,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 708 states, 707 states have (on average 1.4681753889674682) internal successors, (1038), 707 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:27,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 708 states and 1038 transitions. [2025-01-09 07:26:27,951 INFO L78 Accepts]: Start accepts. Automaton has 708 states and 1038 transitions. Word has length 229 [2025-01-09 07:26:27,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:27,951 INFO L471 AbstractCegarLoop]: Abstraction has 708 states and 1038 transitions. [2025-01-09 07:26:27,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:27,951 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 1038 transitions. [2025-01-09 07:26:27,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-01-09 07:26:27,953 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:27,954 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:27,954 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-01-09 07:26:27,954 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:27,954 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:27,954 INFO L85 PathProgramCache]: Analyzing trace with hash 794633637, now seen corresponding path program 1 times [2025-01-09 07:26:27,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:27,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616742739] [2025-01-09 07:26:27,955 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:27,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:28,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-01-09 07:26:28,265 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-01-09 07:26:28,266 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:28,266 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:29,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:29,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:29,118 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1616742739] [2025-01-09 07:26:29,119 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1616742739] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:29,119 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:29,119 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-09 07:26:29,119 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099365638] [2025-01-09 07:26:29,119 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:29,119 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-01-09 07:26:29,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:29,120 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-09 07:26:29,120 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-01-09 07:26:29,120 INFO L87 Difference]: Start difference. First operand 708 states and 1038 transitions. Second operand has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:29,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:29,213 INFO L93 Difference]: Finished difference Result 1310 states and 1920 transitions. [2025-01-09 07:26:29,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-09 07:26:29,214 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-01-09 07:26:29,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:29,217 INFO L225 Difference]: With dead ends: 1310 [2025-01-09 07:26:29,217 INFO L226 Difference]: Without dead ends: 720 [2025-01-09 07:26:29,218 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-01-09 07:26:29,220 INFO L435 NwaCegarLoop]: 719 mSDtfsCounter, 11 mSDsluCounter, 4294 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 5013 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:29,220 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 5013 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:29,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 720 states. [2025-01-09 07:26:29,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 720 to 718. [2025-01-09 07:26:29,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4672245467224547) internal successors, (1052), 717 states have internal predecessors, (1052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:29,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1052 transitions. [2025-01-09 07:26:29,237 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1052 transitions. Word has length 230 [2025-01-09 07:26:29,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:29,238 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1052 transitions. [2025-01-09 07:26:29,238 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:29,238 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1052 transitions. [2025-01-09 07:26:29,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-01-09 07:26:29,240 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:29,240 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:29,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-01-09 07:26:29,241 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:29,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:29,243 INFO L85 PathProgramCache]: Analyzing trace with hash -1702319170, now seen corresponding path program 1 times [2025-01-09 07:26:29,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:29,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154010923] [2025-01-09 07:26:29,243 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:29,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:29,306 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-01-09 07:26:29,543 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-01-09 07:26:29,543 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:29,543 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:30,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:30,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:30,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154010923] [2025-01-09 07:26:30,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154010923] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:30,404 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:30,404 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-01-09 07:26:30,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612832508] [2025-01-09 07:26:30,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:30,405 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-01-09 07:26:30,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:30,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-01-09 07:26:30,405 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:30,407 INFO L87 Difference]: Start difference. First operand 718 states and 1052 transitions. Second operand has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:30,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:30,940 INFO L93 Difference]: Finished difference Result 1474 states and 2152 transitions. [2025-01-09 07:26:30,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-09 07:26:30,941 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-01-09 07:26:30,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:30,945 INFO L225 Difference]: With dead ends: 1474 [2025-01-09 07:26:30,945 INFO L226 Difference]: Without dead ends: 872 [2025-01-09 07:26:30,946 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2025-01-09 07:26:30,946 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 589 mSDsluCounter, 1679 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2400 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:30,947 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2400 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-01-09 07:26:30,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 872 states. [2025-01-09 07:26:30,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 872 to 718. [2025-01-09 07:26:30,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4644351464435146) internal successors, (1050), 717 states have internal predecessors, (1050), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:30,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1050 transitions. [2025-01-09 07:26:30,963 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1050 transitions. Word has length 230 [2025-01-09 07:26:30,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:30,963 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1050 transitions. [2025-01-09 07:26:30,964 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:30,964 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1050 transitions. [2025-01-09 07:26:30,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-01-09 07:26:30,966 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:30,966 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:30,967 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-01-09 07:26:30,967 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:30,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:30,967 INFO L85 PathProgramCache]: Analyzing trace with hash -357936550, now seen corresponding path program 1 times [2025-01-09 07:26:30,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:30,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56255350] [2025-01-09 07:26:30,968 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:30,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:31,020 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-01-09 07:26:31,271 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-01-09 07:26:31,271 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:31,271 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:32,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:32,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:32,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56255350] [2025-01-09 07:26:32,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [56255350] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:32,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:32,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 07:26:32,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163220072] [2025-01-09 07:26:32,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:32,050 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 07:26:32,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:32,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 07:26:32,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-01-09 07:26:32,051 INFO L87 Difference]: Start difference. First operand 718 states and 1050 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:32,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:32,135 INFO L93 Difference]: Finished difference Result 1328 states and 1941 transitions. [2025-01-09 07:26:32,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 07:26:32,135 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-01-09 07:26:32,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:32,138 INFO L225 Difference]: With dead ends: 1328 [2025-01-09 07:26:32,138 INFO L226 Difference]: Without dead ends: 724 [2025-01-09 07:26:32,140 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:32,141 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 680 mSDsluCounter, 1413 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 680 SdHoareTripleChecker+Valid, 2123 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:32,141 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [680 Valid, 2123 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:32,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2025-01-09 07:26:32,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 724. [2025-01-09 07:26:32,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 724 states, 723 states have (on average 1.4605809128630705) internal successors, (1056), 723 states have internal predecessors, (1056), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:32,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 1056 transitions. [2025-01-09 07:26:32,156 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 1056 transitions. Word has length 230 [2025-01-09 07:26:32,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:32,156 INFO L471 AbstractCegarLoop]: Abstraction has 724 states and 1056 transitions. [2025-01-09 07:26:32,157 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:32,157 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 1056 transitions. [2025-01-09 07:26:32,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2025-01-09 07:26:32,159 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:32,159 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:32,159 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-01-09 07:26:32,159 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:32,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:32,160 INFO L85 PathProgramCache]: Analyzing trace with hash 1971804679, now seen corresponding path program 1 times [2025-01-09 07:26:32,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:32,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589573563] [2025-01-09 07:26:32,161 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:32,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:32,218 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 231 statements into 1 equivalence classes. [2025-01-09 07:26:32,505 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 231 of 231 statements. [2025-01-09 07:26:32,505 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:32,506 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:33,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:33,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:33,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589573563] [2025-01-09 07:26:33,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589573563] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:33,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:33,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 07:26:33,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800944154] [2025-01-09 07:26:33,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:33,406 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 07:26:33,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:33,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 07:26:33,408 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-01-09 07:26:33,408 INFO L87 Difference]: Start difference. First operand 724 states and 1056 transitions. Second operand has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:33,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:33,597 INFO L93 Difference]: Finished difference Result 1334 states and 1939 transitions. [2025-01-09 07:26:33,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-09 07:26:33,598 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2025-01-09 07:26:33,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:33,601 INFO L225 Difference]: With dead ends: 1334 [2025-01-09 07:26:33,601 INFO L226 Difference]: Without dead ends: 914 [2025-01-09 07:26:33,602 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-01-09 07:26:33,603 INFO L435 NwaCegarLoop]: 705 mSDtfsCounter, 1689 mSDsluCounter, 2818 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1689 SdHoareTripleChecker+Valid, 3523 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:33,603 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1689 Valid, 3523 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:33,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 914 states. [2025-01-09 07:26:33,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 914 to 728. [2025-01-09 07:26:33,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 728 states, 727 states have (on average 1.4594222833562587) internal successors, (1061), 727 states have internal predecessors, (1061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:33,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1061 transitions. [2025-01-09 07:26:33,619 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1061 transitions. Word has length 231 [2025-01-09 07:26:33,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:33,619 INFO L471 AbstractCegarLoop]: Abstraction has 728 states and 1061 transitions. [2025-01-09 07:26:33,619 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:33,620 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1061 transitions. [2025-01-09 07:26:33,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2025-01-09 07:26:33,622 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:33,623 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:33,623 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-01-09 07:26:33,623 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:33,623 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:33,624 INFO L85 PathProgramCache]: Analyzing trace with hash -1096975599, now seen corresponding path program 1 times [2025-01-09 07:26:33,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:33,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594706983] [2025-01-09 07:26:33,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:33,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:33,680 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 232 statements into 1 equivalence classes. [2025-01-09 07:26:34,146 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 232 of 232 statements. [2025-01-09 07:26:34,147 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:34,147 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:34,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:34,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:34,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594706983] [2025-01-09 07:26:34,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1594706983] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:34,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:34,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 07:26:34,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597698788] [2025-01-09 07:26:34,983 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:34,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 07:26:34,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:34,984 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 07:26:34,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-01-09 07:26:34,984 INFO L87 Difference]: Start difference. First operand 728 states and 1061 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:35,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:35,074 INFO L93 Difference]: Finished difference Result 1170 states and 1701 transitions. [2025-01-09 07:26:35,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 07:26:35,075 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 232 [2025-01-09 07:26:35,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:35,078 INFO L225 Difference]: With dead ends: 1170 [2025-01-09 07:26:35,078 INFO L226 Difference]: Without dead ends: 736 [2025-01-09 07:26:35,079 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:35,081 INFO L435 NwaCegarLoop]: 703 mSDtfsCounter, 589 mSDsluCounter, 1400 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2103 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:35,082 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2103 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:35,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2025-01-09 07:26:35,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 734. [2025-01-09 07:26:35,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 734 states, 733 states have (on average 1.455661664392906) internal successors, (1067), 733 states have internal predecessors, (1067), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:35,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1067 transitions. [2025-01-09 07:26:35,100 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1067 transitions. Word has length 232 [2025-01-09 07:26:35,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:35,101 INFO L471 AbstractCegarLoop]: Abstraction has 734 states and 1067 transitions. [2025-01-09 07:26:35,101 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:35,101 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1067 transitions. [2025-01-09 07:26:35,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2025-01-09 07:26:35,102 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:35,103 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:35,103 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-01-09 07:26:35,103 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:35,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:35,103 INFO L85 PathProgramCache]: Analyzing trace with hash 776328857, now seen corresponding path program 1 times [2025-01-09 07:26:35,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:35,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930359866] [2025-01-09 07:26:35,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:35,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:35,156 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 233 statements into 1 equivalence classes. [2025-01-09 07:26:35,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 233 of 233 statements. [2025-01-09 07:26:35,696 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:35,696 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:36,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:36,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:36,392 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930359866] [2025-01-09 07:26:36,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930359866] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:36,392 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:36,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 07:26:36,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460042127] [2025-01-09 07:26:36,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:36,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 07:26:36,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:36,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 07:26:36,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-01-09 07:26:36,395 INFO L87 Difference]: Start difference. First operand 734 states and 1067 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:36,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:36,482 INFO L93 Difference]: Finished difference Result 1161 states and 1686 transitions. [2025-01-09 07:26:36,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 07:26:36,483 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 233 [2025-01-09 07:26:36,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:36,487 INFO L225 Difference]: With dead ends: 1161 [2025-01-09 07:26:36,487 INFO L226 Difference]: Without dead ends: 738 [2025-01-09 07:26:36,488 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-01-09 07:26:36,489 INFO L435 NwaCegarLoop]: 703 mSDtfsCounter, 559 mSDsluCounter, 1399 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 559 SdHoareTripleChecker+Valid, 2102 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:36,489 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [559 Valid, 2102 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:36,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2025-01-09 07:26:36,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 737. [2025-01-09 07:26:36,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 737 states, 736 states have (on average 1.453804347826087) internal successors, (1070), 736 states have internal predecessors, (1070), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:36,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1070 transitions. [2025-01-09 07:26:36,504 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1070 transitions. Word has length 233 [2025-01-09 07:26:36,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:36,505 INFO L471 AbstractCegarLoop]: Abstraction has 737 states and 1070 transitions. [2025-01-09 07:26:36,505 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:36,505 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1070 transitions. [2025-01-09 07:26:36,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2025-01-09 07:26:36,506 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:36,507 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:36,507 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-01-09 07:26:36,507 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:36,507 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:36,508 INFO L85 PathProgramCache]: Analyzing trace with hash 1966964095, now seen corresponding path program 1 times [2025-01-09 07:26:36,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:36,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791007679] [2025-01-09 07:26:36,508 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:36,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:36,559 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 234 statements into 1 equivalence classes. [2025-01-09 07:26:37,105 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 234 of 234 statements. [2025-01-09 07:26:37,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:37,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:38,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:38,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 07:26:38,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791007679] [2025-01-09 07:26:38,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791007679] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:38,548 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:38,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 07:26:38,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929081495] [2025-01-09 07:26:38,549 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:38,549 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 07:26:38,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 07:26:38,549 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 07:26:38,549 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-01-09 07:26:38,550 INFO L87 Difference]: Start difference. First operand 737 states and 1070 transitions. Second operand has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:38,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:38,771 INFO L93 Difference]: Finished difference Result 1172 states and 1700 transitions. [2025-01-09 07:26:38,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-09 07:26:38,774 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2025-01-09 07:26:38,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:38,777 INFO L225 Difference]: With dead ends: 1172 [2025-01-09 07:26:38,777 INFO L226 Difference]: Without dead ends: 746 [2025-01-09 07:26:38,782 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-01-09 07:26:38,784 INFO L435 NwaCegarLoop]: 685 mSDtfsCounter, 529 mSDsluCounter, 2049 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 529 SdHoareTripleChecker+Valid, 2734 SdHoareTripleChecker+Invalid, 187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:38,786 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [529 Valid, 2734 Invalid, 187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-01-09 07:26:38,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2025-01-09 07:26:38,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 741. [2025-01-09 07:26:38,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 741 states, 740 states have (on average 1.4527027027027026) internal successors, (1075), 740 states have internal predecessors, (1075), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:38,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1075 transitions. [2025-01-09 07:26:38,818 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1075 transitions. Word has length 234 [2025-01-09 07:26:38,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:38,819 INFO L471 AbstractCegarLoop]: Abstraction has 741 states and 1075 transitions. [2025-01-09 07:26:38,823 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:38,823 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1075 transitions. [2025-01-09 07:26:38,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2025-01-09 07:26:38,824 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:38,824 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:38,824 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-01-09 07:26:38,825 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:38,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:38,826 INFO L85 PathProgramCache]: Analyzing trace with hash -529340456, now seen corresponding path program 1 times [2025-01-09 07:26:38,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 07:26:38,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014644835] [2025-01-09 07:26:38,827 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:38,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 07:26:38,938 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 235 statements into 1 equivalence classes. [2025-01-09 07:26:39,615 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 235 of 235 statements. [2025-01-09 07:26:39,616 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:39,616 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-09 07:26:39,616 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-09 07:26:39,636 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 235 statements into 1 equivalence classes. [2025-01-09 07:26:40,242 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 235 of 235 statements. [2025-01-09 07:26:40,243 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:40,243 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-09 07:26:40,385 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-09 07:26:40,386 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-01-09 07:26:40,387 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-01-09 07:26:40,389 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-01-09 07:26:40,392 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:40,570 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-01-09 07:26:40,577 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.01 07:26:40 BoogieIcfgContainer [2025-01-09 07:26:40,578 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-01-09 07:26:40,578 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-09 07:26:40,578 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-09 07:26:40,579 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-09 07:26:40,580 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 07:26:08" (3/4) ... [2025-01-09 07:26:40,582 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-01-09 07:26:40,582 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-09 07:26:40,583 INFO L158 Benchmark]: Toolchain (without parser) took 36031.66ms. Allocated memory was 142.6MB in the beginning and 419.4MB in the end (delta: 276.8MB). Free memory was 104.3MB in the beginning and 281.1MB in the end (delta: -176.8MB). Peak memory consumption was 97.8MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,583 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 201.3MB. Free memory is still 114.0MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-09 07:26:40,584 INFO L158 Benchmark]: CACSL2BoogieTranslator took 542.94ms. Allocated memory is still 142.6MB. Free memory was 104.3MB in the beginning and 67.8MB in the end (delta: 36.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,584 INFO L158 Benchmark]: Boogie Procedure Inliner took 266.28ms. Allocated memory is still 142.6MB. Free memory was 67.8MB in the beginning and 78.1MB in the end (delta: -10.3MB). Peak memory consumption was 65.4MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,585 INFO L158 Benchmark]: Boogie Preprocessor took 302.99ms. Allocated memory is still 142.6MB. Free memory was 78.1MB in the beginning and 54.6MB in the end (delta: 23.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,586 INFO L158 Benchmark]: RCFGBuilder took 2385.25ms. Allocated memory was 142.6MB in the beginning and 335.5MB in the end (delta: 192.9MB). Free memory was 54.6MB in the beginning and 124.4MB in the end (delta: -69.8MB). Peak memory consumption was 134.4MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,586 INFO L158 Benchmark]: TraceAbstraction took 32522.87ms. Allocated memory was 335.5MB in the beginning and 419.4MB in the end (delta: 83.9MB). Free memory was 123.4MB in the beginning and 284.5MB in the end (delta: -161.1MB). Peak memory consumption was 38.2MB. Max. memory is 16.1GB. [2025-01-09 07:26:40,586 INFO L158 Benchmark]: Witness Printer took 4.07ms. Allocated memory is still 419.4MB. Free memory was 284.5MB in the beginning and 281.1MB in the end (delta: 3.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-09 07:26:40,587 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 201.3MB. Free memory is still 114.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 542.94ms. Allocated memory is still 142.6MB. Free memory was 104.3MB in the beginning and 67.8MB in the end (delta: 36.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 266.28ms. Allocated memory is still 142.6MB. Free memory was 67.8MB in the beginning and 78.1MB in the end (delta: -10.3MB). Peak memory consumption was 65.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 302.99ms. Allocated memory is still 142.6MB. Free memory was 78.1MB in the beginning and 54.6MB in the end (delta: 23.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * RCFGBuilder took 2385.25ms. Allocated memory was 142.6MB in the beginning and 335.5MB in the end (delta: 192.9MB). Free memory was 54.6MB in the beginning and 124.4MB in the end (delta: -69.8MB). Peak memory consumption was 134.4MB. Max. memory is 16.1GB. * TraceAbstraction took 32522.87ms. Allocated memory was 335.5MB in the beginning and 419.4MB in the end (delta: 83.9MB). Free memory was 123.4MB in the beginning and 284.5MB in the end (delta: -161.1MB). Peak memory consumption was 38.2MB. Max. memory is 16.1GB. * Witness Printer took 4.07ms. Allocated memory is still 419.4MB. Free memory was 284.5MB in the beginning and 281.1MB in the end (delta: 3.4MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 460, overapproximation of bitwiseOr at line 400, overapproximation of bitwiseOr at line 420, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 564. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_10 mask_SORT_10 = (SORT_10)-1 >> (sizeof(SORT_10) * 8 - 32); [L33] const SORT_10 msb_SORT_10 = (SORT_10)1 << (32 - 1); [L35] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 4); [L36] const SORT_20 msb_SORT_20 = (SORT_20)1 << (4 - 1); [L38] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 10); [L39] const SORT_29 msb_SORT_29 = (SORT_29)1 << (10 - 1); [L41] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L42] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L44] const SORT_1 var_7 = 0; [L45] const SORT_10 var_12 = 1; [L46] const SORT_20 var_21 = 0; [L47] const SORT_10 var_26 = 0; [L48] const SORT_29 var_30 = 0; [L49] const SORT_1 var_122 = 1; [L50] const SORT_20 var_126 = 1; [L51] const SORT_3 var_183 = 0; [L52] const SORT_10 var_254 = 104; [L54] SORT_1 input_2; [L55] SORT_3 input_4; [L56] SORT_1 input_5; [L57] SORT_1 input_6; [L58] SORT_1 input_201; [L59] SORT_1 input_228; [L60] SORT_1 input_234; [L61] SORT_1 input_235; [L62] SORT_29 input_249; [L63] SORT_1 input_262; [L64] SORT_1 input_270; [L65] SORT_1 input_278; [L66] SORT_1 input_284; [L67] SORT_1 input_289; [L68] SORT_1 input_290; [L69] SORT_1 input_291; [L70] SORT_1 input_300; [L71] SORT_1 input_301; [L72] SORT_1 input_302; [L73] SORT_3 input_323; [L74] SORT_1 input_330; [L75] SORT_1 input_336; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L77] SORT_1 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L78] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L79] SORT_20 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L80] EXPR __VERIFIER_nondet_ushort() & mask_SORT_29 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L80] SORT_29 state_31 = __VERIFIER_nondet_ushort() & mask_SORT_29; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L81] SORT_1 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L82] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L83] SORT_20 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L84] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L85] SORT_1 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L86] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L87] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L88] SORT_1 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L89] SORT_1 state_123 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L90] SORT_1 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L91] SORT_1 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L92] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L93] SORT_1 state_153 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L94] SORT_1 state_166 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L95] SORT_1 state_177 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L96] SORT_3 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L97] SORT_1 state_197 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L98] SORT_1 state_199 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L99] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 init_9_arg_1 = var_7; [L102] state_8 = init_9_arg_1 [L103] SORT_1 init_16_arg_1 = var_7; [L104] state_15 = init_16_arg_1 [L105] SORT_20 init_23_arg_1 = var_21; [L106] state_22 = init_23_arg_1 [L107] SORT_29 init_32_arg_1 = var_30; [L108] state_31 = init_32_arg_1 [L109] SORT_1 init_39_arg_1 = var_7; [L110] state_38 = init_39_arg_1 [L111] SORT_1 init_44_arg_1 = var_7; [L112] state_43 = init_44_arg_1 [L113] SORT_20 init_50_arg_1 = var_21; [L114] state_49 = init_50_arg_1 [L115] SORT_1 init_61_arg_1 = var_7; [L116] state_60 = init_61_arg_1 [L117] SORT_1 init_65_arg_1 = var_7; [L118] state_64 = init_65_arg_1 [L119] SORT_1 init_73_arg_1 = var_7; [L120] state_72 = init_73_arg_1 [L121] SORT_1 init_87_arg_1 = var_7; [L122] state_86 = init_87_arg_1 [L123] SORT_1 init_101_arg_1 = var_7; [L124] state_100 = init_101_arg_1 [L125] SORT_1 init_124_arg_1 = var_122; [L126] state_123 = init_124_arg_1 [L127] SORT_1 init_131_arg_1 = var_7; [L128] state_130 = init_131_arg_1 [L129] SORT_1 init_136_arg_1 = var_7; [L130] state_135 = init_136_arg_1 [L131] SORT_1 init_142_arg_1 = var_7; [L132] state_141 = init_142_arg_1 [L133] SORT_1 init_154_arg_1 = var_7; [L134] state_153 = init_154_arg_1 [L135] SORT_1 init_167_arg_1 = var_7; [L136] state_166 = init_167_arg_1 [L137] SORT_1 init_178_arg_1 = var_7; [L138] state_177 = init_178_arg_1 [L139] SORT_3 init_185_arg_1 = var_183; [L140] state_184 = init_185_arg_1 [L141] SORT_1 init_198_arg_1 = var_7; [L142] state_197 = init_198_arg_1 [L143] SORT_1 init_200_arg_1 = var_7; [L144] state_199 = init_200_arg_1 [L145] SORT_1 init_204_arg_1 = var_7; [L146] state_203 = init_204_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L149] input_2 = __VERIFIER_nondet_uchar() [L150] input_4 = __VERIFIER_nondet_uchar() [L151] input_5 = __VERIFIER_nondet_uchar() [L152] input_6 = __VERIFIER_nondet_uchar() [L153] input_201 = __VERIFIER_nondet_uchar() [L154] input_228 = __VERIFIER_nondet_uchar() [L155] input_234 = __VERIFIER_nondet_uchar() [L156] input_235 = __VERIFIER_nondet_uchar() [L157] input_249 = __VERIFIER_nondet_ushort() [L158] input_262 = __VERIFIER_nondet_uchar() [L159] input_270 = __VERIFIER_nondet_uchar() [L160] input_278 = __VERIFIER_nondet_uchar() [L161] input_284 = __VERIFIER_nondet_uchar() [L162] input_289 = __VERIFIER_nondet_uchar() [L163] input_290 = __VERIFIER_nondet_uchar() [L164] input_291 = __VERIFIER_nondet_uchar() [L165] input_300 = __VERIFIER_nondet_uchar() [L166] input_301 = __VERIFIER_nondet_uchar() [L167] input_302 = __VERIFIER_nondet_uchar() [L168] input_323 = __VERIFIER_nondet_uchar() [L169] input_330 = __VERIFIER_nondet_uchar() [L170] input_336 = __VERIFIER_nondet_uchar() [L173] SORT_1 var_11_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_11_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] EXPR var_11_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] var_11_arg_0 = var_11_arg_0 & mask_SORT_1 [L175] SORT_10 var_11 = var_11_arg_0; [L176] SORT_10 var_13_arg_0 = var_11; [L177] SORT_10 var_13_arg_1 = var_12; [L178] SORT_1 var_13 = var_13_arg_0 == var_13_arg_1; [L179] SORT_1 var_14_arg_0 = var_13; [L180] SORT_1 var_14 = ~var_14_arg_0; [L181] SORT_1 var_17_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_17_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L182] EXPR var_17_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L182] var_17_arg_0 = var_17_arg_0 & mask_SORT_1 [L183] SORT_10 var_17 = var_17_arg_0; [L184] SORT_10 var_18_arg_0 = var_17; [L185] SORT_10 var_18_arg_1 = var_12; [L186] SORT_1 var_18 = var_18_arg_0 == var_18_arg_1; [L187] SORT_1 var_19_arg_0 = var_14; [L188] SORT_1 var_19_arg_1 = var_18; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19_arg_0=-1, var_19_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L189] EXPR var_19_arg_0 | var_19_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L189] SORT_1 var_19 = var_19_arg_0 | var_19_arg_1; [L190] SORT_20 var_24_arg_0 = state_22; [L191] SORT_1 var_24 = var_24_arg_0 >> 3; [L192] SORT_1 var_25_arg_0 = var_24; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_25_arg_0=0, var_26=0, var_30=0, var_7=0] [L193] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_26=0, var_30=0, var_7=0] [L193] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L194] SORT_10 var_25 = var_25_arg_0; [L195] SORT_10 var_27_arg_0 = var_25; [L196] SORT_10 var_27_arg_1 = var_26; [L197] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L198] SORT_1 var_28_arg_0 = var_19; [L199] SORT_1 var_28_arg_1 = var_27; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28_arg_0=255, var_28_arg_1=1, var_30=0, var_7=0] [L200] EXPR var_28_arg_0 & var_28_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L200] SORT_1 var_28 = var_28_arg_0 & var_28_arg_1; [L201] SORT_29 var_34_arg_0 = state_31; [L202] SORT_33 var_34 = var_34_arg_0 >> 8; [L203] SORT_33 var_35_arg_0 = var_34; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_35_arg_0=0, var_7=0] [L204] EXPR var_35_arg_0 & mask_SORT_33 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_7=0] [L204] var_35_arg_0 = var_35_arg_0 & mask_SORT_33 [L205] SORT_10 var_35 = var_35_arg_0; [L206] SORT_10 var_36_arg_0 = var_35; [L207] SORT_10 var_36_arg_1 = var_26; [L208] SORT_1 var_36 = var_36_arg_0 == var_36_arg_1; [L209] SORT_1 var_37_arg_0 = var_28; [L210] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37_arg_0=0, var_37_arg_1=1, var_7=0] [L211] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L211] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L212] SORT_1 var_40_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_40_arg_0=0, var_7=0] [L213] EXPR var_40_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L213] var_40_arg_0 = var_40_arg_0 & mask_SORT_1 [L214] SORT_10 var_40 = var_40_arg_0; [L215] SORT_10 var_41_arg_0 = var_40; [L216] SORT_10 var_41_arg_1 = var_12; [L217] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L218] SORT_1 var_42_arg_0 = var_41; [L219] SORT_1 var_42 = ~var_42_arg_0; [L220] SORT_1 var_45_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_45_arg_0=0, var_7=0] [L221] EXPR var_45_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_7=0] [L221] var_45_arg_0 = var_45_arg_0 & mask_SORT_1 [L222] SORT_10 var_45 = var_45_arg_0; [L223] SORT_10 var_46_arg_0 = var_45; [L224] SORT_10 var_46_arg_1 = var_12; [L225] SORT_1 var_46 = var_46_arg_0 == var_46_arg_1; [L226] SORT_1 var_47_arg_0 = var_42; [L227] SORT_1 var_47_arg_1 = var_46; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_47_arg_0=-1, var_47_arg_1=0, var_7=0] [L228] EXPR var_47_arg_0 | var_47_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L228] SORT_1 var_47 = var_47_arg_0 | var_47_arg_1; [L229] SORT_1 var_48_arg_0 = var_37; [L230] SORT_1 var_48_arg_1 = var_47; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_48_arg_0=0, var_48_arg_1=255, var_7=0] [L231] EXPR var_48_arg_0 & var_48_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L231] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L232] SORT_20 var_51_arg_0 = state_22; [L233] SORT_20 var_51_arg_1 = state_49; [L234] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L235] SORT_1 var_52_arg_0 = var_48; [L236] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52_arg_0=0, var_52_arg_1=1, var_7=0] [L237] EXPR var_52_arg_0 & var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L237] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L238] SORT_1 var_53_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_53_arg_0=0, var_7=0] [L239] EXPR var_53_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L239] var_53_arg_0 = var_53_arg_0 & mask_SORT_1 [L240] SORT_10 var_53 = var_53_arg_0; [L241] SORT_10 var_54_arg_0 = var_53; [L242] SORT_10 var_54_arg_1 = var_12; [L243] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55 = ~var_55_arg_0; [L246] SORT_1 var_56_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_56_arg_0=0, var_7=0] [L247] EXPR var_56_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_7=0] [L247] var_56_arg_0 = var_56_arg_0 & mask_SORT_1 [L248] SORT_10 var_56 = var_56_arg_0; [L249] SORT_10 var_57_arg_0 = var_56; [L250] SORT_10 var_57_arg_1 = var_12; [L251] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L252] SORT_1 var_58_arg_0 = var_55; [L253] SORT_1 var_58_arg_1 = var_57; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_58_arg_0=-1, var_58_arg_1=0, var_7=0] [L254] EXPR var_58_arg_0 | var_58_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L254] SORT_1 var_58 = var_58_arg_0 | var_58_arg_1; [L255] SORT_1 var_59_arg_0 = var_52; [L256] SORT_1 var_59_arg_1 = var_58; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59_arg_0=0, var_59_arg_1=255, var_7=0] [L257] EXPR var_59_arg_0 & var_59_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L257] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L258] SORT_1 var_62_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_62_arg_0=0, var_7=0] [L259] EXPR var_62_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_1 [L260] SORT_10 var_62 = var_62_arg_0; [L261] SORT_10 var_63_arg_0 = var_62; [L262] SORT_10 var_63_arg_1 = var_26; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_1 var_66_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_66_arg_0=0, var_7=0] [L265] EXPR var_66_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_7=0] [L265] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L266] SORT_10 var_66 = var_66_arg_0; [L267] SORT_10 var_67_arg_0 = var_66; [L268] SORT_10 var_67_arg_1 = var_26; [L269] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L270] SORT_1 var_68_arg_0 = var_63; [L271] SORT_1 var_68_arg_1 = var_67; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_68_arg_0=1, var_68_arg_1=1, var_7=0] [L272] EXPR var_68_arg_0 | var_68_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L272] SORT_1 var_68 = var_68_arg_0 | var_68_arg_1; [L273] SORT_1 var_69_arg_0 = var_59; [L274] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0] [L275] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_70_arg_0=0, var_7=0] [L277] EXPR var_70_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L277] var_70_arg_0 = var_70_arg_0 & mask_SORT_1 [L278] SORT_10 var_70 = var_70_arg_0; [L279] SORT_10 var_71_arg_0 = var_70; [L280] SORT_10 var_71_arg_1 = var_26; [L281] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L282] SORT_1 var_74_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_74_arg_0=0, var_7=0] [L283] EXPR var_74_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_7=0] [L283] var_74_arg_0 = var_74_arg_0 & mask_SORT_1 [L284] SORT_10 var_74 = var_74_arg_0; [L285] SORT_10 var_75_arg_0 = var_74; [L286] SORT_10 var_75_arg_1 = var_26; [L287] SORT_1 var_75 = var_75_arg_0 == var_75_arg_1; [L288] SORT_1 var_76_arg_0 = var_71; [L289] SORT_1 var_76_arg_1 = var_75; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_76_arg_0=1, var_76_arg_1=1, var_7=0] [L290] EXPR var_76_arg_0 | var_76_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L290] SORT_1 var_76 = var_76_arg_0 | var_76_arg_1; [L291] SORT_1 var_77_arg_0 = var_69; [L292] SORT_1 var_77_arg_1 = var_76; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77_arg_0=0, var_77_arg_1=1, var_7=0] [L293] EXPR var_77_arg_0 & var_77_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L293] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L294] SORT_1 var_78_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_78_arg_0=0, var_7=0] [L295] EXPR var_78_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L295] var_78_arg_0 = var_78_arg_0 & mask_SORT_1 [L296] SORT_10 var_78 = var_78_arg_0; [L297] SORT_10 var_79_arg_0 = var_78; [L298] SORT_10 var_79_arg_1 = var_26; [L299] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L300] SORT_1 var_80_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0, var_80_arg_0=0] [L301] EXPR var_80_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0] [L301] var_80_arg_0 = var_80_arg_0 & mask_SORT_1 [L302] SORT_10 var_80 = var_80_arg_0; [L303] SORT_10 var_81_arg_0 = var_80; [L304] SORT_10 var_81_arg_1 = var_26; [L305] SORT_1 var_81 = var_81_arg_0 == var_81_arg_1; [L306] SORT_1 var_82_arg_0 = var_79; [L307] SORT_1 var_82_arg_1 = var_81; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0, var_82_arg_0=1, var_82_arg_1=1] [L308] EXPR var_82_arg_0 | var_82_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L308] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L309] SORT_1 var_83_arg_0 = var_77; [L310] SORT_1 var_83_arg_1 = var_82; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83_arg_0=0, var_83_arg_1=1] [L311] EXPR var_83_arg_0 & var_83_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L311] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L312] SORT_1 var_84_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_84_arg_0=0] [L313] EXPR var_84_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L313] var_84_arg_0 = var_84_arg_0 & mask_SORT_1 [L314] SORT_10 var_84 = var_84_arg_0; [L315] SORT_10 var_85_arg_0 = var_84; [L316] SORT_10 var_85_arg_1 = var_26; [L317] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L318] SORT_1 var_88_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1, var_88_arg_0=0] [L319] EXPR var_88_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1] [L319] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L320] SORT_10 var_88 = var_88_arg_0; [L321] SORT_10 var_89_arg_0 = var_88; [L322] SORT_10 var_89_arg_1 = var_26; [L323] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L324] SORT_1 var_90_arg_0 = var_85; [L325] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_90_arg_0=1, var_90_arg_1=1] [L326] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L326] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L327] SORT_1 var_91_arg_0 = var_83; [L328] SORT_1 var_91_arg_1 = var_90; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91_arg_0=0, var_91_arg_1=1] [L329] EXPR var_91_arg_0 & var_91_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L329] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L330] SORT_1 var_92_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_92_arg_0=0] [L331] EXPR var_92_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L331] var_92_arg_0 = var_92_arg_0 & mask_SORT_1 [L332] SORT_10 var_92 = var_92_arg_0; [L333] SORT_10 var_93_arg_0 = var_92; [L334] SORT_10 var_93_arg_1 = var_26; [L335] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L336] SORT_1 var_94_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1, var_94_arg_0=0] [L337] EXPR var_94_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1] [L337] var_94_arg_0 = var_94_arg_0 & mask_SORT_1 [L338] SORT_10 var_94 = var_94_arg_0; [L339] SORT_10 var_95_arg_0 = var_94; [L340] SORT_10 var_95_arg_1 = var_26; [L341] SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; [L342] SORT_1 var_96_arg_0 = var_93; [L343] SORT_1 var_96_arg_1 = var_95; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_96_arg_0=1, var_96_arg_1=1] [L344] EXPR var_96_arg_0 | var_96_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L344] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L345] SORT_1 var_97_arg_0 = var_91; [L346] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97_arg_0=0, var_97_arg_1=1] [L347] EXPR var_97_arg_0 & var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L347] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L348] SORT_1 var_98_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_98_arg_0=0] [L349] EXPR var_98_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L349] var_98_arg_0 = var_98_arg_0 & mask_SORT_1 [L350] SORT_10 var_98 = var_98_arg_0; [L351] SORT_10 var_99_arg_0 = var_98; [L352] SORT_10 var_99_arg_1 = var_26; [L353] SORT_1 var_99 = var_99_arg_0 == var_99_arg_1; [L354] SORT_1 var_102_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_102_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] EXPR var_102_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] var_102_arg_0 = var_102_arg_0 & mask_SORT_1 [L356] SORT_10 var_102 = var_102_arg_0; [L357] SORT_10 var_103_arg_0 = var_102; [L358] SORT_10 var_103_arg_1 = var_26; [L359] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L360] SORT_1 var_104_arg_0 = var_99; [L361] SORT_1 var_104_arg_1 = var_103; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_104_arg_0=1, var_104_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] EXPR var_104_arg_0 | var_104_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L363] SORT_1 var_105_arg_0 = var_97; [L364] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105_arg_0=0, var_105_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L366] SORT_1 var_106_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_106_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] EXPR var_106_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] var_106_arg_0 = var_106_arg_0 & mask_SORT_1 [L368] SORT_10 var_106 = var_106_arg_0; [L369] SORT_10 var_107_arg_0 = var_106; [L370] SORT_10 var_107_arg_1 = var_26; [L371] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L372] SORT_1 var_108_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_108_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] EXPR var_108_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] var_108_arg_0 = var_108_arg_0 & mask_SORT_1 [L374] SORT_10 var_108 = var_108_arg_0; [L375] SORT_10 var_109_arg_0 = var_108; [L376] SORT_10 var_109_arg_1 = var_26; [L377] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L378] SORT_1 var_110_arg_0 = var_107; [L379] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_110_arg_0=1, var_110_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] EXPR var_110_arg_0 | var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] SORT_1 var_110 = var_110_arg_0 | var_110_arg_1; [L381] SORT_1 var_111_arg_0 = var_105; [L382] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111_arg_0=0, var_111_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] EXPR var_111_arg_0 & var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] SORT_1 var_111 = var_111_arg_0 & var_111_arg_1; [L384] SORT_1 var_112_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_112_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] EXPR var_112_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] var_112_arg_0 = var_112_arg_0 & mask_SORT_1 [L386] SORT_10 var_112 = var_112_arg_0; [L387] SORT_10 var_113_arg_0 = var_112; [L388] SORT_10 var_113_arg_1 = var_26; [L389] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L390] SORT_1 var_114_arg_0 = var_113; [L391] SORT_1 var_114 = ~var_114_arg_0; [L392] SORT_1 var_115_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_115_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] EXPR var_115_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] var_115_arg_0 = var_115_arg_0 & mask_SORT_1 [L394] SORT_10 var_115 = var_115_arg_0; [L395] SORT_10 var_116_arg_0 = var_115; [L396] SORT_10 var_116_arg_1 = var_26; [L397] SORT_1 var_116 = var_116_arg_0 == var_116_arg_1; [L398] SORT_1 var_117_arg_0 = var_114; [L399] SORT_1 var_117_arg_1 = var_116; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_117_arg_0=-2, var_117_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] EXPR var_117_arg_0 | var_117_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L401] SORT_1 var_118_arg_0 = var_111; [L402] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118_arg_0=0, var_118_arg_1=254, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] EXPR var_118_arg_0 & var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L404] SORT_1 var_119_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_119_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] EXPR var_119_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] var_119_arg_0 = var_119_arg_0 & mask_SORT_1 [L406] SORT_10 var_119 = var_119_arg_0; [L407] SORT_10 var_120_arg_0 = var_119; [L408] SORT_10 var_120_arg_1 = var_12; [L409] SORT_1 var_120 = var_120_arg_0 == var_120_arg_1; [L410] SORT_1 var_121_arg_0 = var_120; [L411] SORT_1 var_121 = ~var_121_arg_0; [L412] SORT_1 var_125_arg_0 = state_123; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_125_arg_0=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] EXPR var_125_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L414] SORT_20 var_125 = var_125_arg_0; [L415] SORT_20 var_127_arg_0 = var_125; [L416] SORT_20 var_127_arg_1 = var_126; [L417] SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; [L418] SORT_1 var_128_arg_0 = var_121; [L419] SORT_1 var_128_arg_1 = var_127; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_128_arg_0=-1, var_128_arg_1=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] EXPR var_128_arg_0 | var_128_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] SORT_1 var_128 = var_128_arg_0 | var_128_arg_1; [L421] SORT_1 var_129_arg_0 = var_118; [L422] SORT_1 var_129_arg_1 = var_128; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129_arg_0=0, var_129_arg_1=256, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] EXPR var_129_arg_0 & var_129_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L424] SORT_1 var_132_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_132_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L425] EXPR var_132_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L425] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L426] SORT_10 var_132 = var_132_arg_0; [L427] SORT_10 var_133_arg_0 = var_132; [L428] SORT_10 var_133_arg_1 = var_12; [L429] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L430] SORT_1 var_134_arg_0 = var_133; [L431] SORT_1 var_134 = ~var_134_arg_0; [L432] SORT_1 var_137_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_137_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L433] EXPR var_137_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L433] var_137_arg_0 = var_137_arg_0 & mask_SORT_1 [L434] SORT_10 var_137 = var_137_arg_0; [L435] SORT_10 var_138_arg_0 = var_137; [L436] SORT_10 var_138_arg_1 = var_12; [L437] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L438] SORT_1 var_139_arg_0 = var_134; [L439] SORT_1 var_139_arg_1 = var_138; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_139_arg_0=-1, var_139_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L440] EXPR var_139_arg_0 | var_139_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L440] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L441] SORT_1 var_140_arg_0 = var_129; [L442] SORT_1 var_140_arg_1 = var_139; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140_arg_0=0, var_140_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L443] EXPR var_140_arg_0 & var_140_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L443] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L444] SORT_1 var_143_arg_0 = state_141; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_143_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] EXPR var_143_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L446] SORT_10 var_143 = var_143_arg_0; [L447] SORT_10 var_144_arg_0 = var_143; [L448] SORT_10 var_144_arg_1 = var_26; [L449] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L450] SORT_1 var_145_arg_0 = var_144; [L451] SORT_1 var_145 = ~var_145_arg_0; [L452] SORT_1 var_146_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_146_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L453] EXPR var_146_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_254=104, var_26=0, var_30=0, var_7=0] [L453] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L454] SORT_10 var_146 = var_146_arg_0; [L455] SORT_10 var_147_arg_0 = var_146; [L456] SORT_10 var_147_arg_1 = var_26; [L457] SORT_1 var_147 = var_147_arg_0 == var_147_arg_1; [L458] SORT_1 var_148_arg_0 = var_145; [L459] SORT_1 var_148_arg_1 = var_147; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_148_arg_0=-2, var_148_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L460] EXPR var_148_arg_0 | var_148_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L460] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L461] SORT_1 var_149_arg_0 = var_140; [L462] SORT_1 var_149_arg_1 = var_148; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149_arg_0=0, var_149_arg_1=254, var_254=104, var_26=0, var_30=0, var_7=0] [L463] EXPR var_149_arg_0 & var_149_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L463] SORT_1 var_149 = var_149_arg_0 & var_149_arg_1; [L464] SORT_1 var_150_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_150_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] EXPR var_150_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] var_150_arg_0 = var_150_arg_0 & mask_SORT_1 [L466] SORT_10 var_150 = var_150_arg_0; [L467] SORT_10 var_151_arg_0 = var_150; [L468] SORT_10 var_151_arg_1 = var_12; [L469] SORT_1 var_151 = var_151_arg_0 == var_151_arg_1; [L470] SORT_1 var_152_arg_0 = var_151; [L471] SORT_1 var_152 = ~var_152_arg_0; [L472] SORT_1 var_155_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_155_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L473] EXPR var_155_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L473] var_155_arg_0 = var_155_arg_0 & mask_SORT_1 [L474] SORT_10 var_155 = var_155_arg_0; [L475] SORT_10 var_156_arg_0 = var_155; [L476] SORT_10 var_156_arg_1 = var_12; [L477] SORT_1 var_156 = var_156_arg_0 == var_156_arg_1; [L478] SORT_1 var_157_arg_0 = var_152; [L479] SORT_1 var_157_arg_1 = var_156; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_157_arg_0=-1, var_157_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] EXPR var_157_arg_0 | var_157_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] SORT_1 var_157 = var_157_arg_0 | var_157_arg_1; [L481] SORT_1 var_158_arg_0 = var_149; [L482] SORT_1 var_158_arg_1 = var_157; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158_arg_0=0, var_158_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L483] EXPR var_158_arg_0 & var_158_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L483] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L484] SORT_1 var_159_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_159_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] EXPR var_159_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] var_159_arg_0 = var_159_arg_0 & mask_SORT_1 [L486] SORT_10 var_159 = var_159_arg_0; [L487] SORT_10 var_160_arg_0 = var_159; [L488] SORT_10 var_160_arg_1 = var_12; [L489] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L490] SORT_1 var_161_arg_0 = var_160; [L491] SORT_1 var_161 = ~var_161_arg_0; [L492] SORT_1 var_162_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_162_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L493] EXPR var_162_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L493] var_162_arg_0 = var_162_arg_0 & mask_SORT_1 [L494] SORT_10 var_162 = var_162_arg_0; [L495] SORT_10 var_163_arg_0 = var_162; [L496] SORT_10 var_163_arg_1 = var_12; [L497] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L498] SORT_1 var_164_arg_0 = var_161; [L499] SORT_1 var_164_arg_1 = var_163; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_164_arg_0=-1, var_164_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] EXPR var_164_arg_0 | var_164_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] SORT_1 var_164 = var_164_arg_0 | var_164_arg_1; [L501] SORT_1 var_165_arg_0 = var_158; [L502] SORT_1 var_165_arg_1 = var_164; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165_arg_0=0, var_165_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L503] EXPR var_165_arg_0 & var_165_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L503] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L504] SORT_1 var_168_arg_0 = state_166; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_168_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] EXPR var_168_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L506] SORT_10 var_168 = var_168_arg_0; [L507] SORT_10 var_169_arg_0 = var_168; [L508] SORT_10 var_169_arg_1 = var_12; [L509] SORT_1 var_169 = var_169_arg_0 == var_169_arg_1; [L510] SORT_1 var_170_arg_0 = var_169; [L511] SORT_1 var_170 = ~var_170_arg_0; [L512] SORT_1 var_171_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_171_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L513] EXPR var_171_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L513] var_171_arg_0 = var_171_arg_0 & mask_SORT_1 [L514] SORT_10 var_171 = var_171_arg_0; [L515] SORT_10 var_172_arg_0 = var_171; [L516] SORT_10 var_172_arg_1 = var_12; [L517] SORT_1 var_172 = var_172_arg_0 == var_172_arg_1; [L518] SORT_1 var_173_arg_0 = var_170; [L519] SORT_1 var_173_arg_1 = var_172; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_173_arg_0=-1, var_173_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] EXPR var_173_arg_0 | var_173_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L521] SORT_1 var_174_arg_0 = var_165; [L522] SORT_1 var_174_arg_1 = var_173; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174_arg_0=0, var_174_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L523] EXPR var_174_arg_0 & var_174_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L523] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L524] SORT_1 var_175_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_175_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] EXPR var_175_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] var_175_arg_0 = var_175_arg_0 & mask_SORT_1 [L526] SORT_10 var_175 = var_175_arg_0; [L527] SORT_10 var_176_arg_0 = var_175; [L528] SORT_10 var_176_arg_1 = var_26; [L529] SORT_1 var_176 = var_176_arg_0 == var_176_arg_1; [L530] SORT_1 var_179_arg_0 = state_177; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_179_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L531] EXPR var_179_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_254=104, var_26=0, var_30=0, var_7=0] [L531] var_179_arg_0 = var_179_arg_0 & mask_SORT_1 [L532] SORT_10 var_179 = var_179_arg_0; [L533] SORT_10 var_180_arg_0 = var_179; [L534] SORT_10 var_180_arg_1 = var_26; [L535] SORT_1 var_180 = var_180_arg_0 == var_180_arg_1; [L536] SORT_1 var_181_arg_0 = var_176; [L537] SORT_1 var_181_arg_1 = var_180; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_181_arg_0=1, var_181_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L538] EXPR var_181_arg_0 | var_181_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L538] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L539] SORT_1 var_182_arg_0 = var_174; [L540] SORT_1 var_182_arg_1 = var_181; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182_arg_0=0, var_182_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] EXPR var_182_arg_0 & var_182_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L542] SORT_3 var_186_arg_0 = state_184; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_186_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] EXPR var_186_arg_0 & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] var_186_arg_0 = var_186_arg_0 & mask_SORT_3 [L544] SORT_10 var_186 = var_186_arg_0; [L545] SORT_10 var_187_arg_0 = var_186; [L546] SORT_10 var_187_arg_1 = var_26; [L547] SORT_1 var_187 = var_187_arg_0 == var_187_arg_1; [L548] SORT_1 var_188_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_188_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L549] EXPR var_188_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_254=104, var_26=0, var_30=0, var_7=0] [L549] var_188_arg_0 = var_188_arg_0 & mask_SORT_1 [L550] SORT_10 var_188 = var_188_arg_0; [L551] SORT_10 var_189_arg_0 = var_188; [L552] SORT_10 var_189_arg_1 = var_12; [L553] SORT_1 var_189 = var_189_arg_0 == var_189_arg_1; [L554] SORT_1 var_190_arg_0 = var_187; [L555] SORT_1 var_190_arg_1 = var_189; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_190_arg_0=1, var_190_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] EXPR var_190_arg_0 | var_190_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L557] SORT_1 var_191_arg_0 = var_182; [L558] SORT_1 var_191_arg_1 = var_190; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_191_arg_0=0, var_191_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] EXPR var_191_arg_0 & var_191_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] SORT_1 var_191 = var_191_arg_0 & var_191_arg_1; [L560] SORT_1 var_194_arg_0 = var_191; [L561] SORT_1 var_194 = ~var_194_arg_0; [L562] SORT_1 var_195_arg_0 = var_122; [L563] SORT_1 var_195_arg_1 = var_194; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_195_arg_0=1, var_195_arg_1=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] EXPR var_195_arg_0 & var_195_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L565] EXPR var_195 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L565] var_195 = var_195 & mask_SORT_1 [L566] SORT_1 bad_196_arg_0 = var_195; [L567] CALL __VERIFIER_assert(!(bad_196_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 498 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 32.3s, OverallIterations: 23, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8854 SdHoareTripleChecker+Valid, 2.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8854 mSDsluCounter, 55266 SdHoareTripleChecker+Invalid, 1.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 39273 mSDsCounter, 70 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2017 IncrementalHoareTripleChecker+Invalid, 2087 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 70 mSolverCounterUnsat, 15993 mSDtfsCounter, 2017 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 138 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=741occurred in iteration=22, InterpolantAutomatonStates: 110, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 22 MinimizatonAttempts, 542 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 6.9s SatisfiabilityAnalysisTime, 18.9s InterpolantComputationTime, 5185 NumberOfCodeBlocks, 5185 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 4928 ConstructedInterpolants, 0 QuantifiedInterpolants, 9902 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-01-09 07:26:40,627 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-09 07:26:42,740 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-09 07:26:42,839 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-01-09 07:26:42,845 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-09 07:26:42,848 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-09 07:26:42,883 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-09 07:26:42,885 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-09 07:26:42,886 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-09 07:26:42,886 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-09 07:26:42,886 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-09 07:26:42,886 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-01-09 07:26:42,886 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-01-09 07:26:42,887 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-09 07:26:42,887 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-09 07:26:42,887 INFO L153 SettingsManager]: * Use SBE=true [2025-01-09 07:26:42,888 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-09 07:26:42,888 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-01-09 07:26:42,888 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-09 07:26:42,888 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-01-09 07:26:42,888 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-01-09 07:26:42,888 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-09 07:26:42,890 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-09 07:26:42,890 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:42,891 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:42,891 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-01-09 07:26:42,891 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-01-09 07:26:42,892 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-01-09 07:26:42,893 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-01-09 07:26:42,893 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2025-01-09 07:26:43,191 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-09 07:26:43,199 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-09 07:26:43,203 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-09 07:26:43,204 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-09 07:26:43,204 INFO L274 PluginConnector]: CDTParser initialized [2025-01-09 07:26:43,207 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:44,464 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9ff7b3cd/814bca9a9e0c461384e2eb7c3c86ed35/FLAG3b5ace604 [2025-01-09 07:26:44,766 INFO L384 CDTParser]: Found 1 translation units. [2025-01-09 07:26:44,766 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:44,785 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9ff7b3cd/814bca9a9e0c461384e2eb7c3c86ed35/FLAG3b5ace604 [2025-01-09 07:26:44,802 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9ff7b3cd/814bca9a9e0c461384e2eb7c3c86ed35 [2025-01-09 07:26:44,804 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-09 07:26:44,805 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-09 07:26:44,806 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-09 07:26:44,806 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-09 07:26:44,810 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-09 07:26:44,811 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 07:26:44" (1/1) ... [2025-01-09 07:26:44,811 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@65b2c29d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:44, skipping insertion in model container [2025-01-09 07:26:44,811 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 07:26:44" (1/1) ... [2025-01-09 07:26:44,851 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-09 07:26:45,002 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-01-09 07:26:45,205 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 07:26:45,228 INFO L200 MainTranslator]: Completed pre-run [2025-01-09 07:26:45,237 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-01-09 07:26:45,353 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 07:26:45,365 INFO L204 MainTranslator]: Completed translation [2025-01-09 07:26:45,365 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45 WrapperNode [2025-01-09 07:26:45,365 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-09 07:26:45,366 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-09 07:26:45,366 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-09 07:26:45,366 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-09 07:26:45,370 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,393 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,458 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 969 [2025-01-09 07:26:45,458 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-09 07:26:45,459 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-09 07:26:45,459 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-09 07:26:45,459 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-09 07:26:45,471 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,472 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,483 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,508 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-09 07:26:45,508 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,508 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,534 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,537 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,541 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,549 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,556 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,568 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-09 07:26:45,572 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-09 07:26:45,572 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-09 07:26:45,572 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-09 07:26:45,573 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (1/1) ... [2025-01-09 07:26:45,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 07:26:45,592 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 07:26:45,606 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-01-09 07:26:45,612 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-01-09 07:26:45,633 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-09 07:26:45,633 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2025-01-09 07:26:45,633 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-09 07:26:45,633 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-09 07:26:45,936 INFO L234 CfgBuilder]: Building ICFG [2025-01-09 07:26:45,938 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-09 07:26:46,769 INFO L? ?]: Removed 409 outVars from TransFormulas that were not future-live. [2025-01-09 07:26:46,770 INFO L283 CfgBuilder]: Performing block encoding [2025-01-09 07:26:46,778 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-09 07:26:46,778 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-09 07:26:46,779 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 07:26:46 BoogieIcfgContainer [2025-01-09 07:26:46,779 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-09 07:26:46,781 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-01-09 07:26:46,781 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-01-09 07:26:46,786 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-01-09 07:26:46,786 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.01 07:26:44" (1/3) ... [2025-01-09 07:26:46,787 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1fbe8cd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 07:26:46, skipping insertion in model container [2025-01-09 07:26:46,788 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 07:26:45" (2/3) ... [2025-01-09 07:26:46,788 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1fbe8cd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 07:26:46, skipping insertion in model container [2025-01-09 07:26:46,788 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 07:26:46" (3/3) ... [2025-01-09 07:26:46,789 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2025-01-09 07:26:46,803 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-01-09 07:26:46,805 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 10 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-01-09 07:26:46,849 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-01-09 07:26:46,862 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7fa9be95, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-01-09 07:26:46,862 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-01-09 07:26:46,866 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:46,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2025-01-09 07:26:46,871 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:46,872 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2025-01-09 07:26:46,874 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:46,879 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:46,880 INFO L85 PathProgramCache]: Analyzing trace with hash 28694789, now seen corresponding path program 1 times [2025-01-09 07:26:46,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-01-09 07:26:46,893 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1219243894] [2025-01-09 07:26:46,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:46,895 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-09 07:26:46,895 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 07:26:46,899 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-09 07:26:46,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-01-09 07:26:47,262 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-01-09 07:26:47,375 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-01-09 07:26:47,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:47,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:47,397 WARN L254 TraceCheckSpWp]: Trace formula consists of 436 conjuncts, 285 conjuncts are in the unsatisfiable core [2025-01-09 07:26:47,447 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-09 07:26:50,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:50,956 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-01-09 07:26:50,956 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-01-09 07:26:50,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1219243894] [2025-01-09 07:26:50,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1219243894] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 07:26:50,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 07:26:50,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 07:26:50,961 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092771745] [2025-01-09 07:26:50,961 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 07:26:50,965 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 07:26:50,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-01-09 07:26:50,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 07:26:50,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 07:26:50,986 INFO L87 Difference]: Start difference. First operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:51,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 07:26:51,222 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2025-01-09 07:26:51,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 07:26:51,226 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2025-01-09 07:26:51,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 07:26:51,232 INFO L225 Difference]: With dead ends: 18 [2025-01-09 07:26:51,232 INFO L226 Difference]: Without dead ends: 10 [2025-01-09 07:26:51,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 07:26:51,239 INFO L435 NwaCegarLoop]: 4 mSDtfsCounter, 2 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 07:26:51,242 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 11 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 07:26:51,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states. [2025-01-09 07:26:51,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2025-01-09 07:26:51,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:51,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2025-01-09 07:26:51,274 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2025-01-09 07:26:51,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 07:26:51,274 INFO L471 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2025-01-09 07:26:51,275 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-09 07:26:51,275 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2025-01-09 07:26:51,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2025-01-09 07:26:51,275 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 07:26:51,275 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2025-01-09 07:26:51,287 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-01-09 07:26:51,480 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-09 07:26:51,480 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 07:26:51,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 07:26:51,481 INFO L85 PathProgramCache]: Analyzing trace with hash 152739811, now seen corresponding path program 1 times [2025-01-09 07:26:51,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-01-09 07:26:51,482 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [497057732] [2025-01-09 07:26:51,482 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 07:26:51,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-09 07:26:51,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 07:26:51,486 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-09 07:26:51,487 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-01-09 07:26:51,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-01-09 07:26:52,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-01-09 07:26:52,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 07:26:52,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 07:26:52,082 INFO L256 TraceCheckSpWp]: Trace formula consists of 815 conjuncts, 300 conjuncts are in the unsatisfiable core [2025-01-09 07:26:52,122 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-09 07:26:55,159 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 07:26:55,160 INFO L312 TraceCheckSpWp]: Computing backward predicates...