./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-09 04:18:41,841 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-09 04:18:41,897 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-01-09 04:18:41,900 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-09 04:18:41,900 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-09 04:18:41,918 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-09 04:18:41,919 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-09 04:18:41,919 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-09 04:18:41,919 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-09 04:18:41,919 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-09 04:18:41,919 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-01-09 04:18:41,919 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-01-09 04:18:41,920 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * Use SBE=true [2025-01-09 04:18:41,920 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-09 04:18:41,920 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-09 04:18:41,921 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 04:18:41,921 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 04:18:41,922 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 04:18:41,922 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-09 04:18:41,922 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-01-09 04:18:41,923 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-01-09 04:18:41,923 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-01-09 04:18:41,923 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-01-09 04:18:41,923 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-01-09 04:18:41,923 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 [2025-01-09 04:18:42,219 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-09 04:18:42,227 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-09 04:18:42,230 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-09 04:18:42,231 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-09 04:18:42,232 INFO L274 PluginConnector]: CDTParser initialized [2025-01-09 04:18:42,232 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-01-09 04:18:43,333 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/82ab03f8f/8a8dc2edfe5946d0b9f9158732cebd9b/FLAG427f5dafe [2025-01-09 04:18:43,608 INFO L384 CDTParser]: Found 1 translation units. [2025-01-09 04:18:43,609 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-01-09 04:18:43,617 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/82ab03f8f/8a8dc2edfe5946d0b9f9158732cebd9b/FLAG427f5dafe [2025-01-09 04:18:43,630 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/82ab03f8f/8a8dc2edfe5946d0b9f9158732cebd9b [2025-01-09 04:18:43,632 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-09 04:18:43,634 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-09 04:18:43,635 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-09 04:18:43,635 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-09 04:18:43,638 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-09 04:18:43,639 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,639 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@37888465 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43, skipping insertion in model container [2025-01-09 04:18:43,639 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,656 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-09 04:18:43,823 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-01-09 04:18:43,825 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 04:18:43,834 INFO L200 MainTranslator]: Completed pre-run [2025-01-09 04:18:43,889 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-01-09 04:18:43,891 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-09 04:18:43,906 INFO L204 MainTranslator]: Completed translation [2025-01-09 04:18:43,907 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43 WrapperNode [2025-01-09 04:18:43,908 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-09 04:18:43,909 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-09 04:18:43,909 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-09 04:18:43,909 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-09 04:18:43,915 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,924 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,953 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 504 [2025-01-09 04:18:43,954 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-09 04:18:43,954 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-09 04:18:43,954 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-09 04:18:43,954 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-09 04:18:43,962 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,962 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,965 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,982 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-09 04:18:43,983 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,983 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,990 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,991 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:43,999 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:44,004 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:44,006 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:44,011 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-09 04:18:44,012 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-09 04:18:44,012 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-09 04:18:44,012 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-09 04:18:44,013 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (1/1) ... [2025-01-09 04:18:44,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-01-09 04:18:44,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 04:18:44,041 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-01-09 04:18:44,045 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-01-09 04:18:44,070 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-01-09 04:18:44,070 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-01-09 04:18:44,070 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-09 04:18:44,070 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-01-09 04:18:44,070 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-01-09 04:18:44,070 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-01-09 04:18:44,071 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-01-09 04:18:44,071 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-01-09 04:18:44,071 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-01-09 04:18:44,071 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-01-09 04:18:44,071 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-01-09 04:18:44,071 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-09 04:18:44,071 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-01-09 04:18:44,071 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-01-09 04:18:44,071 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-09 04:18:44,072 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-09 04:18:44,072 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-01-09 04:18:44,072 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-01-09 04:18:44,166 INFO L234 CfgBuilder]: Building ICFG [2025-01-09 04:18:44,168 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-09 04:18:44,632 INFO L? ?]: Removed 114 outVars from TransFormulas that were not future-live. [2025-01-09 04:18:44,632 INFO L283 CfgBuilder]: Performing block encoding [2025-01-09 04:18:44,644 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-09 04:18:44,647 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-09 04:18:44,647 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 04:18:44 BoogieIcfgContainer [2025-01-09 04:18:44,647 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-09 04:18:44,649 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-01-09 04:18:44,649 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-01-09 04:18:44,652 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-01-09 04:18:44,653 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.01 04:18:43" (1/3) ... [2025-01-09 04:18:44,653 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2378126e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 04:18:44, skipping insertion in model container [2025-01-09 04:18:44,653 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.01 04:18:43" (2/3) ... [2025-01-09 04:18:44,654 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2378126e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.01 04:18:44, skipping insertion in model container [2025-01-09 04:18:44,655 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 04:18:44" (3/3) ... [2025-01-09 04:18:44,656 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-01-09 04:18:44,667 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-01-09 04:18:44,670 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c that has 8 procedures, 179 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-01-09 04:18:44,711 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-01-09 04:18:44,719 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@59518a84, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-01-09 04:18:44,719 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-01-09 04:18:44,722 INFO L276 IsEmpty]: Start isEmpty. Operand has 179 states, 139 states have (on average 1.5539568345323742) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-01-09 04:18:44,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-01-09 04:18:44,731 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:44,731 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:44,732 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:44,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:44,736 INFO L85 PathProgramCache]: Analyzing trace with hash 1097719498, now seen corresponding path program 1 times [2025-01-09 04:18:44,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:44,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211084420] [2025-01-09 04:18:44,741 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:44,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:44,810 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-09 04:18:44,854 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-09 04:18:44,854 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:44,854 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:44,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 04:18:44,986 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:44,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211084420] [2025-01-09 04:18:44,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211084420] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:44,986 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:44,987 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-09 04:18:44,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730877931] [2025-01-09 04:18:44,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:44,991 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-01-09 04:18:44,991 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:45,005 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-01-09 04:18:45,006 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-01-09 04:18:45,008 INFO L87 Difference]: Start difference. First operand has 179 states, 139 states have (on average 1.5539568345323742) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:45,043 INFO L93 Difference]: Finished difference Result 339 states and 554 transitions. [2025-01-09 04:18:45,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-01-09 04:18:45,045 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-01-09 04:18:45,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:45,053 INFO L225 Difference]: With dead ends: 339 [2025-01-09 04:18:45,054 INFO L226 Difference]: Without dead ends: 176 [2025-01-09 04:18:45,057 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-01-09 04:18:45,061 INFO L435 NwaCegarLoop]: 273 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 273 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:45,062 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 273 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:45,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2025-01-09 04:18:45,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2025-01-09 04:18:45,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.5401459854014599) internal successors, (211), 138 states have internal predecessors, (211), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-01-09 04:18:45,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 273 transitions. [2025-01-09 04:18:45,099 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 273 transitions. Word has length 28 [2025-01-09 04:18:45,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:45,099 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 273 transitions. [2025-01-09 04:18:45,099 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,100 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 273 transitions. [2025-01-09 04:18:45,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-01-09 04:18:45,101 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:45,101 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:45,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-01-09 04:18:45,101 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:45,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:45,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1316574216, now seen corresponding path program 1 times [2025-01-09 04:18:45,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:45,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660228911] [2025-01-09 04:18:45,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:45,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:45,118 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-09 04:18:45,141 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-09 04:18:45,142 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:45,142 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:45,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 04:18:45,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:45,326 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660228911] [2025-01-09 04:18:45,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1660228911] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:45,326 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:45,326 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-01-09 04:18:45,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1618771468] [2025-01-09 04:18:45,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:45,327 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-01-09 04:18:45,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:45,328 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-01-09 04:18:45,328 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-01-09 04:18:45,328 INFO L87 Difference]: Start difference. First operand 176 states and 273 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:45,413 INFO L93 Difference]: Finished difference Result 338 states and 520 transitions. [2025-01-09 04:18:45,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-09 04:18:45,413 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-01-09 04:18:45,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:45,415 INFO L225 Difference]: With dead ends: 338 [2025-01-09 04:18:45,415 INFO L226 Difference]: Without dead ends: 176 [2025-01-09 04:18:45,416 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-01-09 04:18:45,416 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 0 mSDsluCounter, 1054 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1323 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:45,416 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1323 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:45,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2025-01-09 04:18:45,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2025-01-09 04:18:45,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.4525547445255473) internal successors, (199), 138 states have internal predecessors, (199), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-01-09 04:18:45,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 261 transitions. [2025-01-09 04:18:45,430 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 261 transitions. Word has length 28 [2025-01-09 04:18:45,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:45,430 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 261 transitions. [2025-01-09 04:18:45,430 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,430 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 261 transitions. [2025-01-09 04:18:45,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2025-01-09 04:18:45,431 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:45,431 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:45,431 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-01-09 04:18:45,432 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:45,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:45,432 INFO L85 PathProgramCache]: Analyzing trace with hash 753527981, now seen corresponding path program 1 times [2025-01-09 04:18:45,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:45,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944834838] [2025-01-09 04:18:45,432 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:45,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:45,444 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-01-09 04:18:45,484 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-01-09 04:18:45,484 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:45,484 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:45,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-09 04:18:45,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:45,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944834838] [2025-01-09 04:18:45,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944834838] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:45,653 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:45,653 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:45,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164204485] [2025-01-09 04:18:45,653 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:45,653 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:45,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:45,654 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:45,654 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:45,654 INFO L87 Difference]: Start difference. First operand 176 states and 261 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:45,715 INFO L93 Difference]: Finished difference Result 339 states and 512 transitions. [2025-01-09 04:18:45,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:45,715 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2025-01-09 04:18:45,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:45,717 INFO L225 Difference]: With dead ends: 339 [2025-01-09 04:18:45,717 INFO L226 Difference]: Without dead ends: 180 [2025-01-09 04:18:45,718 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:45,718 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 3 mSDsluCounter, 500 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 755 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:45,721 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 755 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:45,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2025-01-09 04:18:45,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2025-01-09 04:18:45,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 140 states have (on average 1.4428571428571428) internal successors, (202), 141 states have internal predecessors, (202), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-01-09 04:18:45,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 264 transitions. [2025-01-09 04:18:45,733 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 264 transitions. Word has length 39 [2025-01-09 04:18:45,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:45,733 INFO L471 AbstractCegarLoop]: Abstraction has 180 states and 264 transitions. [2025-01-09 04:18:45,734 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-01-09 04:18:45,734 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 264 transitions. [2025-01-09 04:18:45,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-01-09 04:18:45,735 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:45,735 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:45,735 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-01-09 04:18:45,735 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:45,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:45,736 INFO L85 PathProgramCache]: Analyzing trace with hash 2030763167, now seen corresponding path program 1 times [2025-01-09 04:18:45,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:45,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851357958] [2025-01-09 04:18:45,736 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:45,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:45,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-01-09 04:18:45,772 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-01-09 04:18:45,772 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:45,773 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:45,837 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:45,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:45,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851357958] [2025-01-09 04:18:45,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [851357958] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:45,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:45,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-09 04:18:45,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126032594] [2025-01-09 04:18:45,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:45,837 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-01-09 04:18:45,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:45,838 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-09 04:18:45,838 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-09 04:18:45,838 INFO L87 Difference]: Start difference. First operand 180 states and 264 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:45,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:45,876 INFO L93 Difference]: Finished difference Result 494 states and 735 transitions. [2025-01-09 04:18:45,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-09 04:18:45,877 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2025-01-09 04:18:45,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:45,879 INFO L225 Difference]: With dead ends: 494 [2025-01-09 04:18:45,879 INFO L226 Difference]: Without dead ends: 331 [2025-01-09 04:18:45,880 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-09 04:18:45,880 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 212 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 523 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:45,883 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 523 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:45,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2025-01-09 04:18:45,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 326. [2025-01-09 04:18:45,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 249 states have (on average 1.461847389558233) internal successors, (364), 251 states have internal predecessors, (364), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-01-09 04:18:45,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 484 transitions. [2025-01-09 04:18:45,913 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 484 transitions. Word has length 55 [2025-01-09 04:18:45,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:45,913 INFO L471 AbstractCegarLoop]: Abstraction has 326 states and 484 transitions. [2025-01-09 04:18:45,913 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:45,913 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 484 transitions. [2025-01-09 04:18:45,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-01-09 04:18:45,917 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:45,917 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:45,917 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-01-09 04:18:45,918 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:45,919 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:45,919 INFO L85 PathProgramCache]: Analyzing trace with hash -2065531622, now seen corresponding path program 1 times [2025-01-09 04:18:45,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:45,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809607110] [2025-01-09 04:18:45,919 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:45,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:45,940 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-01-09 04:18:45,959 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-01-09 04:18:45,959 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:45,959 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:46,017 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:46,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:46,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809607110] [2025-01-09 04:18:46,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1809607110] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:46,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:46,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-09 04:18:46,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228032455] [2025-01-09 04:18:46,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:46,018 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-01-09 04:18:46,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:46,018 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-09 04:18:46,018 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-09 04:18:46,018 INFO L87 Difference]: Start difference. First operand 326 states and 484 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:46,092 INFO L93 Difference]: Finished difference Result 917 states and 1373 transitions. [2025-01-09 04:18:46,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-09 04:18:46,095 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-01-09 04:18:46,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:46,099 INFO L225 Difference]: With dead ends: 917 [2025-01-09 04:18:46,100 INFO L226 Difference]: Without dead ends: 608 [2025-01-09 04:18:46,101 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-09 04:18:46,101 INFO L435 NwaCegarLoop]: 291 mSDtfsCounter, 214 mSDsluCounter, 254 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 545 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:46,101 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 545 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:46,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2025-01-09 04:18:46,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 602. [2025-01-09 04:18:46,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 602 states, 453 states have (on average 1.4724061810154525) internal successors, (667), 457 states have internal predecessors, (667), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-01-09 04:18:46,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 602 states to 602 states and 901 transitions. [2025-01-09 04:18:46,156 INFO L78 Accepts]: Start accepts. Automaton has 602 states and 901 transitions. Word has length 56 [2025-01-09 04:18:46,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:46,156 INFO L471 AbstractCegarLoop]: Abstraction has 602 states and 901 transitions. [2025-01-09 04:18:46,157 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,157 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 901 transitions. [2025-01-09 04:18:46,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-01-09 04:18:46,159 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:46,160 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:46,160 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-01-09 04:18:46,160 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:46,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:46,160 INFO L85 PathProgramCache]: Analyzing trace with hash 949571996, now seen corresponding path program 1 times [2025-01-09 04:18:46,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:46,160 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529619859] [2025-01-09 04:18:46,160 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:46,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:46,182 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-01-09 04:18:46,203 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-01-09 04:18:46,203 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:46,203 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:46,298 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:46,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:46,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529619859] [2025-01-09 04:18:46,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529619859] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:46,298 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:46,298 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 04:18:46,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223807658] [2025-01-09 04:18:46,298 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:46,298 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 04:18:46,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:46,299 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 04:18:46,299 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:46,299 INFO L87 Difference]: Start difference. First operand 602 states and 901 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:46,475 INFO L93 Difference]: Finished difference Result 1291 states and 1928 transitions. [2025-01-09 04:18:46,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 04:18:46,476 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-01-09 04:18:46,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:46,483 INFO L225 Difference]: With dead ends: 1291 [2025-01-09 04:18:46,483 INFO L226 Difference]: Without dead ends: 706 [2025-01-09 04:18:46,485 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:46,485 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:46,485 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:46,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states. [2025-01-09 04:18:46,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 690. [2025-01-09 04:18:46,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 690 states, 528 states have (on average 1.456439393939394) internal successors, (769), 531 states have internal predecessors, (769), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:46,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 690 states to 690 states and 1017 transitions. [2025-01-09 04:18:46,552 INFO L78 Accepts]: Start accepts. Automaton has 690 states and 1017 transitions. Word has length 56 [2025-01-09 04:18:46,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:46,552 INFO L471 AbstractCegarLoop]: Abstraction has 690 states and 1017 transitions. [2025-01-09 04:18:46,552 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,552 INFO L276 IsEmpty]: Start isEmpty. Operand 690 states and 1017 transitions. [2025-01-09 04:18:46,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2025-01-09 04:18:46,553 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:46,553 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:46,553 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-01-09 04:18:46,553 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:46,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:46,553 INFO L85 PathProgramCache]: Analyzing trace with hash 858717278, now seen corresponding path program 1 times [2025-01-09 04:18:46,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:46,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284418514] [2025-01-09 04:18:46,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:46,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:46,564 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 57 statements into 1 equivalence classes. [2025-01-09 04:18:46,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 57 of 57 statements. [2025-01-09 04:18:46,580 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:46,580 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:46,682 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:46,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:46,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284418514] [2025-01-09 04:18:46,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284418514] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:46,682 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:46,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-09 04:18:46,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927277240] [2025-01-09 04:18:46,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:46,683 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-01-09 04:18:46,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:46,683 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-09 04:18:46,683 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:46,683 INFO L87 Difference]: Start difference. First operand 690 states and 1017 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:46,865 INFO L93 Difference]: Finished difference Result 1295 states and 1928 transitions. [2025-01-09 04:18:46,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 04:18:46,866 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2025-01-09 04:18:46,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:46,871 INFO L225 Difference]: With dead ends: 1295 [2025-01-09 04:18:46,873 INFO L226 Difference]: Without dead ends: 710 [2025-01-09 04:18:46,875 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:46,875 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:46,876 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:46,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 710 states. [2025-01-09 04:18:46,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 710 to 698. [2025-01-09 04:18:46,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4496268656716418) internal successors, (777), 539 states have internal predecessors, (777), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:46,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1025 transitions. [2025-01-09 04:18:46,934 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1025 transitions. Word has length 57 [2025-01-09 04:18:46,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:46,935 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1025 transitions. [2025-01-09 04:18:46,935 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:46,935 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1025 transitions. [2025-01-09 04:18:46,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2025-01-09 04:18:46,937 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:46,937 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:46,937 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-01-09 04:18:46,937 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:46,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:46,938 INFO L85 PathProgramCache]: Analyzing trace with hash 1619339248, now seen corresponding path program 1 times [2025-01-09 04:18:46,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:46,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059826719] [2025-01-09 04:18:46,939 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:46,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:46,954 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-01-09 04:18:46,968 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-01-09 04:18:46,968 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:46,968 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:47,053 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:47,054 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:47,054 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059826719] [2025-01-09 04:18:47,054 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2059826719] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:47,054 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:47,054 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:47,054 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613635533] [2025-01-09 04:18:47,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:47,055 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:47,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:47,055 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:47,055 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:47,056 INFO L87 Difference]: Start difference. First operand 698 states and 1025 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:47,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:47,191 INFO L93 Difference]: Finished difference Result 1283 states and 1908 transitions. [2025-01-09 04:18:47,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:47,191 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 59 [2025-01-09 04:18:47,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:47,196 INFO L225 Difference]: With dead ends: 1283 [2025-01-09 04:18:47,196 INFO L226 Difference]: Without dead ends: 698 [2025-01-09 04:18:47,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:47,198 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 61 mSDsluCounter, 435 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 663 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:47,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 663 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:47,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states. [2025-01-09 04:18:47,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 698. [2025-01-09 04:18:47,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4421641791044777) internal successors, (773), 539 states have internal predecessors, (773), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:47,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1021 transitions. [2025-01-09 04:18:47,248 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1021 transitions. Word has length 59 [2025-01-09 04:18:47,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:47,248 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1021 transitions. [2025-01-09 04:18:47,248 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-01-09 04:18:47,248 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1021 transitions. [2025-01-09 04:18:47,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2025-01-09 04:18:47,249 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:47,249 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:47,249 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-01-09 04:18:47,249 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:47,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:47,250 INFO L85 PathProgramCache]: Analyzing trace with hash 1923925418, now seen corresponding path program 1 times [2025-01-09 04:18:47,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:47,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388548074] [2025-01-09 04:18:47,250 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:47,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:47,264 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 60 statements into 1 equivalence classes. [2025-01-09 04:18:47,283 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 60 of 60 statements. [2025-01-09 04:18:47,284 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:47,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:47,417 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:47,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:47,417 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388548074] [2025-01-09 04:18:47,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [388548074] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:47,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:47,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:47,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388012160] [2025-01-09 04:18:47,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:47,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:47,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:47,418 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:47,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:47,418 INFO L87 Difference]: Start difference. First operand 698 states and 1021 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-01-09 04:18:47,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:47,466 INFO L93 Difference]: Finished difference Result 1303 states and 1932 transitions. [2025-01-09 04:18:47,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:47,466 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 60 [2025-01-09 04:18:47,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:47,470 INFO L225 Difference]: With dead ends: 1303 [2025-01-09 04:18:47,471 INFO L226 Difference]: Without dead ends: 718 [2025-01-09 04:18:47,472 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:47,473 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 4 mSDsluCounter, 510 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 767 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:47,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 767 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:47,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2025-01-09 04:18:47,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 718. [2025-01-09 04:18:47,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 552 states have (on average 1.4293478260869565) internal successors, (789), 555 states have internal predecessors, (789), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:47,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1037 transitions. [2025-01-09 04:18:47,514 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1037 transitions. Word has length 60 [2025-01-09 04:18:47,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:47,514 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1037 transitions. [2025-01-09 04:18:47,514 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-01-09 04:18:47,514 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1037 transitions. [2025-01-09 04:18:47,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2025-01-09 04:18:47,515 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:47,515 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:47,515 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-01-09 04:18:47,515 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:47,517 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:47,518 INFO L85 PathProgramCache]: Analyzing trace with hash -2052820272, now seen corresponding path program 1 times [2025-01-09 04:18:47,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:47,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533135465] [2025-01-09 04:18:47,518 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:47,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:47,529 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 68 statements into 1 equivalence classes. [2025-01-09 04:18:47,542 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 68 of 68 statements. [2025-01-09 04:18:47,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:47,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:47,658 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:47,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:47,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533135465] [2025-01-09 04:18:47,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [533135465] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:47,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:47,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:47,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532859471] [2025-01-09 04:18:47,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:47,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:47,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:47,659 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:47,659 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:47,659 INFO L87 Difference]: Start difference. First operand 718 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-01-09 04:18:47,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:47,729 INFO L93 Difference]: Finished difference Result 1343 states and 1976 transitions. [2025-01-09 04:18:47,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:47,730 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 68 [2025-01-09 04:18:47,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:47,735 INFO L225 Difference]: With dead ends: 1343 [2025-01-09 04:18:47,735 INFO L226 Difference]: Without dead ends: 738 [2025-01-09 04:18:47,737 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:47,738 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:47,738 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:47,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2025-01-09 04:18:47,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 738. [2025-01-09 04:18:47,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 738 states, 568 states have (on average 1.4172535211267605) internal successors, (805), 571 states have internal predecessors, (805), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:47,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1053 transitions. [2025-01-09 04:18:47,783 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1053 transitions. Word has length 68 [2025-01-09 04:18:47,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:47,784 INFO L471 AbstractCegarLoop]: Abstraction has 738 states and 1053 transitions. [2025-01-09 04:18:47,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-01-09 04:18:47,784 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1053 transitions. [2025-01-09 04:18:47,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-01-09 04:18:47,785 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:47,785 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:47,785 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-01-09 04:18:47,785 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:47,786 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:47,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1177296742, now seen corresponding path program 1 times [2025-01-09 04:18:47,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:47,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507566208] [2025-01-09 04:18:47,786 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:47,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:47,796 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-01-09 04:18:47,808 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-01-09 04:18:47,808 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:47,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:47,928 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:47,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:47,928 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507566208] [2025-01-09 04:18:47,928 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [507566208] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:47,928 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:47,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:47,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304749033] [2025-01-09 04:18:47,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:47,928 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:47,929 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:47,929 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:47,929 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:47,929 INFO L87 Difference]: Start difference. First operand 738 states and 1053 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-01-09 04:18:47,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:47,983 INFO L93 Difference]: Finished difference Result 1379 states and 1992 transitions. [2025-01-09 04:18:47,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:47,983 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-01-09 04:18:47,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:47,989 INFO L225 Difference]: With dead ends: 1379 [2025-01-09 04:18:47,989 INFO L226 Difference]: Without dead ends: 754 [2025-01-09 04:18:47,991 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:47,992 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:47,993 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:47,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2025-01-09 04:18:48,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 754. [2025-01-09 04:18:48,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 754 states, 580 states have (on average 1.4086206896551725) internal successors, (817), 583 states have internal predecessors, (817), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:48,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 754 states to 754 states and 1065 transitions. [2025-01-09 04:18:48,030 INFO L78 Accepts]: Start accepts. Automaton has 754 states and 1065 transitions. Word has length 76 [2025-01-09 04:18:48,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:48,030 INFO L471 AbstractCegarLoop]: Abstraction has 754 states and 1065 transitions. [2025-01-09 04:18:48,030 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-01-09 04:18:48,030 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 1065 transitions. [2025-01-09 04:18:48,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-01-09 04:18:48,031 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:48,031 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:48,031 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-01-09 04:18:48,031 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:48,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:48,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1219162561, now seen corresponding path program 1 times [2025-01-09 04:18:48,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:48,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531960379] [2025-01-09 04:18:48,032 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:48,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:48,041 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-01-09 04:18:48,051 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-01-09 04:18:48,051 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:48,051 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:48,154 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-01-09 04:18:48,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:48,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531960379] [2025-01-09 04:18:48,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1531960379] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:48,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:48,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:48,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361311847] [2025-01-09 04:18:48,154 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:48,154 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:48,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:48,155 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:48,155 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:48,155 INFO L87 Difference]: Start difference. First operand 754 states and 1065 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-01-09 04:18:48,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:48,223 INFO L93 Difference]: Finished difference Result 1415 states and 2032 transitions. [2025-01-09 04:18:48,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:48,223 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-01-09 04:18:48,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:48,227 INFO L225 Difference]: With dead ends: 1415 [2025-01-09 04:18:48,227 INFO L226 Difference]: Without dead ends: 774 [2025-01-09 04:18:48,229 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:48,229 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:48,230 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:48,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 774 states. [2025-01-09 04:18:48,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 774 to 774. [2025-01-09 04:18:48,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 774 states, 596 states have (on average 1.3976510067114094) internal successors, (833), 599 states have internal predecessors, (833), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:48,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 774 states to 774 states and 1081 transitions. [2025-01-09 04:18:48,267 INFO L78 Accepts]: Start accepts. Automaton has 774 states and 1081 transitions. Word has length 76 [2025-01-09 04:18:48,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:48,267 INFO L471 AbstractCegarLoop]: Abstraction has 774 states and 1081 transitions. [2025-01-09 04:18:48,267 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-01-09 04:18:48,268 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 1081 transitions. [2025-01-09 04:18:48,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-01-09 04:18:48,270 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:48,270 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:48,271 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-01-09 04:18:48,271 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:48,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:48,271 INFO L85 PathProgramCache]: Analyzing trace with hash -1073283999, now seen corresponding path program 1 times [2025-01-09 04:18:48,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:48,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308127689] [2025-01-09 04:18:48,271 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:48,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:48,282 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-01-09 04:18:48,316 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-01-09 04:18:48,316 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:48,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:48,442 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-01-09 04:18:48,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:48,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308127689] [2025-01-09 04:18:48,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1308127689] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:48,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:48,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:48,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228156096] [2025-01-09 04:18:48,443 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:48,443 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:48,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:48,444 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:48,444 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:48,444 INFO L87 Difference]: Start difference. First operand 774 states and 1081 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-01-09 04:18:48,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:48,508 INFO L93 Difference]: Finished difference Result 1459 states and 2060 transitions. [2025-01-09 04:18:48,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:48,508 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 84 [2025-01-09 04:18:48,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:48,513 INFO L225 Difference]: With dead ends: 1459 [2025-01-09 04:18:48,514 INFO L226 Difference]: Without dead ends: 798 [2025-01-09 04:18:48,515 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:48,516 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 5 mSDsluCounter, 507 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 765 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:48,516 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 765 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:48,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2025-01-09 04:18:48,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 798. [2025-01-09 04:18:48,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 798 states, 616 states have (on average 1.3847402597402598) internal successors, (853), 619 states have internal predecessors, (853), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-01-09 04:18:48,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 798 states to 798 states and 1101 transitions. [2025-01-09 04:18:48,553 INFO L78 Accepts]: Start accepts. Automaton has 798 states and 1101 transitions. Word has length 84 [2025-01-09 04:18:48,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:48,554 INFO L471 AbstractCegarLoop]: Abstraction has 798 states and 1101 transitions. [2025-01-09 04:18:48,554 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-01-09 04:18:48,554 INFO L276 IsEmpty]: Start isEmpty. Operand 798 states and 1101 transitions. [2025-01-09 04:18:48,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2025-01-09 04:18:48,557 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:48,557 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:48,557 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-01-09 04:18:48,557 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:48,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:48,558 INFO L85 PathProgramCache]: Analyzing trace with hash -1428808975, now seen corresponding path program 1 times [2025-01-09 04:18:48,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:48,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454937573] [2025-01-09 04:18:48,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:48,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:48,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 87 statements into 1 equivalence classes. [2025-01-09 04:18:48,621 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 87 of 87 statements. [2025-01-09 04:18:48,622 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:48,622 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:49,030 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-01-09 04:18:49,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:49,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454937573] [2025-01-09 04:18:49,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [454937573] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:49,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:49,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 04:18:49,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31204453] [2025-01-09 04:18:49,031 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:49,031 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 04:18:49,031 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:49,032 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 04:18:49,032 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:49,032 INFO L87 Difference]: Start difference. First operand 798 states and 1101 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-01-09 04:18:49,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:49,275 INFO L93 Difference]: Finished difference Result 2053 states and 2823 transitions. [2025-01-09 04:18:49,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-09 04:18:49,276 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 87 [2025-01-09 04:18:49,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:49,290 INFO L225 Difference]: With dead ends: 2053 [2025-01-09 04:18:49,290 INFO L226 Difference]: Without dead ends: 1368 [2025-01-09 04:18:49,292 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-01-09 04:18:49,297 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 209 mSDsluCounter, 1185 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 213 SdHoareTripleChecker+Valid, 1443 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:49,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [213 Valid, 1443 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:49,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1368 states. [2025-01-09 04:18:49,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1368 to 1082. [2025-01-09 04:18:49,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 827 states have (on average 1.3724304715840387) internal successors, (1135), 832 states have internal predecessors, (1135), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-01-09 04:18:49,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1479 transitions. [2025-01-09 04:18:49,389 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1479 transitions. Word has length 87 [2025-01-09 04:18:49,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:49,390 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1479 transitions. [2025-01-09 04:18:49,390 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-01-09 04:18:49,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1479 transitions. [2025-01-09 04:18:49,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2025-01-09 04:18:49,391 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:49,392 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:49,392 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-01-09 04:18:49,392 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:49,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:49,393 INFO L85 PathProgramCache]: Analyzing trace with hash 256918892, now seen corresponding path program 1 times [2025-01-09 04:18:49,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:49,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259074857] [2025-01-09 04:18:49,393 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:49,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:49,406 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 91 statements into 1 equivalence classes. [2025-01-09 04:18:49,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 91 of 91 statements. [2025-01-09 04:18:49,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:49,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:49,551 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-01-09 04:18:49,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:49,552 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259074857] [2025-01-09 04:18:49,552 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259074857] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:49,552 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:49,552 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:49,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1379708654] [2025-01-09 04:18:49,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:49,552 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:49,552 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:49,553 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:49,553 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:49,553 INFO L87 Difference]: Start difference. First operand 1082 states and 1479 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-01-09 04:18:49,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:49,627 INFO L93 Difference]: Finished difference Result 2007 states and 2768 transitions. [2025-01-09 04:18:49,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-09 04:18:49,627 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 91 [2025-01-09 04:18:49,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:49,634 INFO L225 Difference]: With dead ends: 2007 [2025-01-09 04:18:49,634 INFO L226 Difference]: Without dead ends: 1106 [2025-01-09 04:18:49,636 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:49,637 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:49,637 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-01-09 04:18:49,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2025-01-09 04:18:49,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1106. [2025-01-09 04:18:49,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 845 states have (on average 1.3644970414201183) internal successors, (1153), 850 states have internal predecessors, (1153), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-01-09 04:18:49,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1497 transitions. [2025-01-09 04:18:49,695 INFO L78 Accepts]: Start accepts. Automaton has 1106 states and 1497 transitions. Word has length 91 [2025-01-09 04:18:49,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:49,696 INFO L471 AbstractCegarLoop]: Abstraction has 1106 states and 1497 transitions. [2025-01-09 04:18:49,696 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-01-09 04:18:49,696 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1497 transitions. [2025-01-09 04:18:49,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2025-01-09 04:18:49,697 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:49,697 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:49,697 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-01-09 04:18:49,697 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:49,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:49,698 INFO L85 PathProgramCache]: Analyzing trace with hash -263166726, now seen corresponding path program 1 times [2025-01-09 04:18:49,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:49,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846301881] [2025-01-09 04:18:49,698 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:49,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:49,711 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-01-09 04:18:49,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-01-09 04:18:49,726 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:49,727 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:49,989 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-01-09 04:18:49,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:49,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846301881] [2025-01-09 04:18:49,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1846301881] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-09 04:18:49,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [824994279] [2025-01-09 04:18:49,990 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:49,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-09 04:18:49,990 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-09 04:18:49,992 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-09 04:18:49,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-01-09 04:18:50,086 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-01-09 04:18:50,139 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-01-09 04:18:50,139 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:50,139 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:50,143 INFO L256 TraceCheckSpWp]: Trace formula consists of 477 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-01-09 04:18:50,147 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-09 04:18:50,248 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-01-09 04:18:50,248 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-01-09 04:18:50,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [824994279] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:50,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-01-09 04:18:50,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-01-09 04:18:50,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937934598] [2025-01-09 04:18:50,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:50,248 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-01-09 04:18:50,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:50,249 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-09 04:18:50,249 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-01-09 04:18:50,249 INFO L87 Difference]: Start difference. First operand 1106 states and 1497 transitions. Second operand has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-01-09 04:18:50,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:50,428 INFO L93 Difference]: Finished difference Result 2371 states and 3335 transitions. [2025-01-09 04:18:50,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-01-09 04:18:50,429 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 90 [2025-01-09 04:18:50,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:50,439 INFO L225 Difference]: With dead ends: 2371 [2025-01-09 04:18:50,439 INFO L226 Difference]: Without dead ends: 1534 [2025-01-09 04:18:50,442 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-01-09 04:18:50,442 INFO L435 NwaCegarLoop]: 438 mSDtfsCounter, 139 mSDsluCounter, 2428 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 2866 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:50,443 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 2866 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:50,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2025-01-09 04:18:50,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 1114. [2025-01-09 04:18:50,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1114 states, 849 states have (on average 1.3557126030624265) internal successors, (1151), 856 states have internal predecessors, (1151), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-01-09 04:18:50,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1114 states to 1114 states and 1499 transitions. [2025-01-09 04:18:50,525 INFO L78 Accepts]: Start accepts. Automaton has 1114 states and 1499 transitions. Word has length 90 [2025-01-09 04:18:50,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:50,526 INFO L471 AbstractCegarLoop]: Abstraction has 1114 states and 1499 transitions. [2025-01-09 04:18:50,526 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-01-09 04:18:50,526 INFO L276 IsEmpty]: Start isEmpty. Operand 1114 states and 1499 transitions. [2025-01-09 04:18:50,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-01-09 04:18:50,528 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:50,528 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:50,537 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2025-01-09 04:18:50,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-01-09 04:18:50,729 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:50,730 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:50,730 INFO L85 PathProgramCache]: Analyzing trace with hash 64633758, now seen corresponding path program 1 times [2025-01-09 04:18:50,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:50,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356244956] [2025-01-09 04:18:50,730 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:50,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:50,744 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-01-09 04:18:50,756 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-01-09 04:18:50,756 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:50,756 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:50,845 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-01-09 04:18:50,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:50,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356244956] [2025-01-09 04:18:50,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356244956] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:50,845 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:50,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 04:18:50,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208298556] [2025-01-09 04:18:50,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:50,846 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 04:18:50,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:50,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 04:18:50,847 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:50,847 INFO L87 Difference]: Start difference. First operand 1114 states and 1499 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-01-09 04:18:51,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:51,006 INFO L93 Difference]: Finished difference Result 2010 states and 2716 transitions. [2025-01-09 04:18:51,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-09 04:18:51,006 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 93 [2025-01-09 04:18:51,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:51,013 INFO L225 Difference]: With dead ends: 2010 [2025-01-09 04:18:51,013 INFO L226 Difference]: Without dead ends: 1159 [2025-01-09 04:18:51,015 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-01-09 04:18:51,016 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 255 mSDsluCounter, 1226 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 256 SdHoareTripleChecker+Valid, 1485 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:51,016 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [256 Valid, 1485 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:51,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1159 states. [2025-01-09 04:18:51,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1159 to 1117. [2025-01-09 04:18:51,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1117 states, 863 states have (on average 1.3487833140208574) internal successors, (1164), 875 states have internal predecessors, (1164), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-01-09 04:18:51,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1117 states to 1117 states and 1488 transitions. [2025-01-09 04:18:51,092 INFO L78 Accepts]: Start accepts. Automaton has 1117 states and 1488 transitions. Word has length 93 [2025-01-09 04:18:51,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:51,092 INFO L471 AbstractCegarLoop]: Abstraction has 1117 states and 1488 transitions. [2025-01-09 04:18:51,092 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-01-09 04:18:51,092 INFO L276 IsEmpty]: Start isEmpty. Operand 1117 states and 1488 transitions. [2025-01-09 04:18:51,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-01-09 04:18:51,093 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:51,093 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:51,094 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-01-09 04:18:51,094 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:51,094 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:51,094 INFO L85 PathProgramCache]: Analyzing trace with hash -945309641, now seen corresponding path program 1 times [2025-01-09 04:18:51,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:51,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54953723] [2025-01-09 04:18:51,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:51,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:51,105 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-01-09 04:18:51,149 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-01-09 04:18:51,150 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:51,150 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:51,464 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-01-09 04:18:51,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:51,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54953723] [2025-01-09 04:18:51,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [54953723] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:51,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:51,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 04:18:51,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631202467] [2025-01-09 04:18:51,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:51,465 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 04:18:51,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:51,465 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 04:18:51,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:51,466 INFO L87 Difference]: Start difference. First operand 1117 states and 1488 transitions. Second operand has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-01-09 04:18:51,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:51,665 INFO L93 Difference]: Finished difference Result 1989 states and 2661 transitions. [2025-01-09 04:18:51,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-09 04:18:51,666 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 95 [2025-01-09 04:18:51,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:51,671 INFO L225 Difference]: With dead ends: 1989 [2025-01-09 04:18:51,672 INFO L226 Difference]: Without dead ends: 1115 [2025-01-09 04:18:51,674 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-01-09 04:18:51,674 INFO L435 NwaCegarLoop]: 288 mSDtfsCounter, 150 mSDsluCounter, 1313 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 152 SdHoareTripleChecker+Valid, 1601 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:51,674 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [152 Valid, 1601 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:51,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1115 states. [2025-01-09 04:18:51,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1115 to 1008. [2025-01-09 04:18:51,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1008 states, 781 states have (on average 1.3508322663252241) internal successors, (1055), 791 states have internal predecessors, (1055), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-01-09 04:18:51,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 1008 states and 1345 transitions. [2025-01-09 04:18:51,724 INFO L78 Accepts]: Start accepts. Automaton has 1008 states and 1345 transitions. Word has length 95 [2025-01-09 04:18:51,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:51,725 INFO L471 AbstractCegarLoop]: Abstraction has 1008 states and 1345 transitions. [2025-01-09 04:18:51,725 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-01-09 04:18:51,725 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1345 transitions. [2025-01-09 04:18:51,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2025-01-09 04:18:51,726 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:51,726 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:51,726 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-01-09 04:18:51,726 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:51,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:51,727 INFO L85 PathProgramCache]: Analyzing trace with hash -1864254117, now seen corresponding path program 1 times [2025-01-09 04:18:51,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:51,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525839471] [2025-01-09 04:18:51,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:51,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:51,737 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 96 statements into 1 equivalence classes. [2025-01-09 04:18:51,751 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 96 of 96 statements. [2025-01-09 04:18:51,752 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:51,752 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:52,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-01-09 04:18:52,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:52,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525839471] [2025-01-09 04:18:52,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1525839471] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:52,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:52,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 04:18:52,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287308681] [2025-01-09 04:18:52,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:52,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 04:18:52,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:52,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 04:18:52,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:52,089 INFO L87 Difference]: Start difference. First operand 1008 states and 1345 transitions. Second operand has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-01-09 04:18:52,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:52,537 INFO L93 Difference]: Finished difference Result 1934 states and 2578 transitions. [2025-01-09 04:18:52,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-01-09 04:18:52,537 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 96 [2025-01-09 04:18:52,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:52,543 INFO L225 Difference]: With dead ends: 1934 [2025-01-09 04:18:52,543 INFO L226 Difference]: Without dead ends: 1099 [2025-01-09 04:18:52,546 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-01-09 04:18:52,546 INFO L435 NwaCegarLoop]: 321 mSDtfsCounter, 519 mSDsluCounter, 1106 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 525 SdHoareTripleChecker+Valid, 1427 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:52,546 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [525 Valid, 1427 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-01-09 04:18:52,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states. [2025-01-09 04:18:52,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 1046. [2025-01-09 04:18:52,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1046 states, 804 states have (on average 1.3296019900497513) internal successors, (1069), 815 states have internal predecessors, (1069), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2025-01-09 04:18:52,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1377 transitions. [2025-01-09 04:18:52,620 INFO L78 Accepts]: Start accepts. Automaton has 1046 states and 1377 transitions. Word has length 96 [2025-01-09 04:18:52,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:52,620 INFO L471 AbstractCegarLoop]: Abstraction has 1046 states and 1377 transitions. [2025-01-09 04:18:52,620 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-01-09 04:18:52,621 INFO L276 IsEmpty]: Start isEmpty. Operand 1046 states and 1377 transitions. [2025-01-09 04:18:52,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2025-01-09 04:18:52,621 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:52,621 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:52,621 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-01-09 04:18:52,622 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:52,622 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:52,622 INFO L85 PathProgramCache]: Analyzing trace with hash -762764108, now seen corresponding path program 1 times [2025-01-09 04:18:52,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:52,622 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467215484] [2025-01-09 04:18:52,622 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:52,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:52,633 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 98 statements into 1 equivalence classes. [2025-01-09 04:18:52,650 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 98 of 98 statements. [2025-01-09 04:18:52,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:52,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:52,998 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-01-09 04:18:52,998 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:52,998 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467215484] [2025-01-09 04:18:52,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467215484] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:52,998 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:52,998 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-09 04:18:52,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912985386] [2025-01-09 04:18:52,998 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:52,999 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-01-09 04:18:52,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:52,999 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-09 04:18:52,999 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-01-09 04:18:52,999 INFO L87 Difference]: Start difference. First operand 1046 states and 1377 transitions. Second operand has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-01-09 04:18:53,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:53,403 INFO L93 Difference]: Finished difference Result 2019 states and 2644 transitions. [2025-01-09 04:18:53,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-01-09 04:18:53,404 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 98 [2025-01-09 04:18:53,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:53,410 INFO L225 Difference]: With dead ends: 2019 [2025-01-09 04:18:53,410 INFO L226 Difference]: Without dead ends: 1159 [2025-01-09 04:18:53,412 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-01-09 04:18:53,414 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 514 mSDsluCounter, 961 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1242 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:53,414 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1242 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 177 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-01-09 04:18:53,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1159 states. [2025-01-09 04:18:53,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1159 to 1068. [2025-01-09 04:18:53,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1068 states, 818 states have (on average 1.3141809290953546) internal successors, (1075), 830 states have internal predecessors, (1075), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2025-01-09 04:18:53,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1068 states to 1068 states and 1389 transitions. [2025-01-09 04:18:53,495 INFO L78 Accepts]: Start accepts. Automaton has 1068 states and 1389 transitions. Word has length 98 [2025-01-09 04:18:53,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:53,496 INFO L471 AbstractCegarLoop]: Abstraction has 1068 states and 1389 transitions. [2025-01-09 04:18:53,496 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-01-09 04:18:53,496 INFO L276 IsEmpty]: Start isEmpty. Operand 1068 states and 1389 transitions. [2025-01-09 04:18:53,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2025-01-09 04:18:53,497 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:53,497 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:53,497 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-01-09 04:18:53,497 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:53,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:53,498 INFO L85 PathProgramCache]: Analyzing trace with hash -462507774, now seen corresponding path program 1 times [2025-01-09 04:18:53,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:53,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626930771] [2025-01-09 04:18:53,498 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:53,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:53,509 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-01-09 04:18:53,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-01-09 04:18:53,518 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:53,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-09 04:18:53,566 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-01-09 04:18:53,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-09 04:18:53,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626930771] [2025-01-09 04:18:53,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [626930771] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-09 04:18:53,567 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-09 04:18:53,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-09 04:18:53,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509952265] [2025-01-09 04:18:53,567 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-09 04:18:53,567 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-01-09 04:18:53,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-09 04:18:53,568 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-09 04:18:53,568 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-09 04:18:53,568 INFO L87 Difference]: Start difference. First operand 1068 states and 1389 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-01-09 04:18:53,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-09 04:18:53,752 INFO L93 Difference]: Finished difference Result 2778 states and 3641 transitions. [2025-01-09 04:18:53,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-09 04:18:53,753 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2025-01-09 04:18:53,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-01-09 04:18:53,762 INFO L225 Difference]: With dead ends: 2778 [2025-01-09 04:18:53,762 INFO L226 Difference]: Without dead ends: 1974 [2025-01-09 04:18:53,764 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-09 04:18:53,765 INFO L435 NwaCegarLoop]: 460 mSDtfsCounter, 199 mSDsluCounter, 691 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1151 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-01-09 04:18:53,765 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1151 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-01-09 04:18:53,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1974 states. [2025-01-09 04:18:53,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1974 to 1793. [2025-01-09 04:18:53,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1793 states, 1355 states have (on average 1.3151291512915129) internal successors, (1782), 1375 states have internal predecessors, (1782), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2025-01-09 04:18:53,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2342 transitions. [2025-01-09 04:18:53,880 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2342 transitions. Word has length 99 [2025-01-09 04:18:53,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-01-09 04:18:53,880 INFO L471 AbstractCegarLoop]: Abstraction has 1793 states and 2342 transitions. [2025-01-09 04:18:53,881 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-01-09 04:18:53,881 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2342 transitions. [2025-01-09 04:18:53,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2025-01-09 04:18:53,882 INFO L210 NwaCegarLoop]: Found error trace [2025-01-09 04:18:53,882 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:53,882 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-01-09 04:18:53,882 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-01-09 04:18:53,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-09 04:18:53,883 INFO L85 PathProgramCache]: Analyzing trace with hash -1385413993, now seen corresponding path program 1 times [2025-01-09 04:18:53,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-09 04:18:53,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861993206] [2025-01-09 04:18:53,883 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-09 04:18:53,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-09 04:18:53,893 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-01-09 04:18:53,925 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-01-09 04:18:53,926 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:53,926 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-09 04:18:53,926 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-09 04:18:53,933 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-01-09 04:18:53,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-01-09 04:18:53,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-09 04:18:53,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-09 04:18:54,022 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-09 04:18:54,023 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-01-09 04:18:54,023 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-01-09 04:18:54,025 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-01-09 04:18:54,027 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-09 04:18:54,139 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-01-09 04:18:54,141 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.01 04:18:54 BoogieIcfgContainer [2025-01-09 04:18:54,144 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-01-09 04:18:54,145 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-09 04:18:54,145 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-09 04:18:54,145 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-09 04:18:54,145 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.01 04:18:44" (3/4) ... [2025-01-09 04:18:54,146 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-01-09 04:18:54,271 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 81. [2025-01-09 04:18:54,363 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-01-09 04:18:54,364 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-01-09 04:18:54,364 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-09 04:18:54,364 INFO L158 Benchmark]: Toolchain (without parser) took 10730.88ms. Allocated memory was 167.8MB in the beginning and 503.3MB in the end (delta: 335.5MB). Free memory was 121.6MB in the beginning and 450.7MB in the end (delta: -329.2MB). Peak memory consumption was 301.0MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,364 INFO L158 Benchmark]: CDTParser took 0.21ms. Allocated memory is still 201.3MB. Free memory is still 117.3MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: CACSL2BoogieTranslator took 273.60ms. Allocated memory is still 167.8MB. Free memory was 121.6MB in the beginning and 103.3MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: Boogie Procedure Inliner took 44.91ms. Allocated memory is still 167.8MB. Free memory was 103.3MB in the beginning and 100.7MB in the end (delta: 2.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: Boogie Preprocessor took 56.57ms. Allocated memory is still 167.8MB. Free memory was 100.7MB in the beginning and 95.9MB in the end (delta: 4.8MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: RCFGBuilder took 634.89ms. Allocated memory is still 167.8MB. Free memory was 95.9MB in the beginning and 55.9MB in the end (delta: 40.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: TraceAbstraction took 9495.41ms. Allocated memory was 167.8MB in the beginning and 503.3MB in the end (delta: 335.5MB). Free memory was 55.9MB in the beginning and 191.6MB in the end (delta: -135.7MB). Peak memory consumption was 195.2MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,365 INFO L158 Benchmark]: Witness Printer took 219.17ms. Allocated memory is still 503.3MB. Free memory was 191.6MB in the beginning and 450.7MB in the end (delta: -259.1MB). Peak memory consumption was 38.6MB. Max. memory is 16.1GB. [2025-01-09 04:18:54,366 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21ms. Allocated memory is still 201.3MB. Free memory is still 117.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 273.60ms. Allocated memory is still 167.8MB. Free memory was 121.6MB in the beginning and 103.3MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 44.91ms. Allocated memory is still 167.8MB. Free memory was 103.3MB in the beginning and 100.7MB in the end (delta: 2.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 56.57ms. Allocated memory is still 167.8MB. Free memory was 100.7MB in the beginning and 95.9MB in the end (delta: 4.8MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 634.89ms. Allocated memory is still 167.8MB. Free memory was 95.9MB in the beginning and 55.9MB in the end (delta: 40.0MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 9495.41ms. Allocated memory was 167.8MB in the beginning and 503.3MB in the end (delta: 335.5MB). Free memory was 55.9MB in the beginning and 191.6MB in the end (delta: -135.7MB). Peak memory consumption was 195.2MB. Max. memory is 16.1GB. * Witness Printer took 219.17ms. Allocated memory is still 503.3MB. Free memory was 191.6MB in the beginning and 450.7MB in the end (delta: -259.1MB). Peak memory consumption was 38.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L462] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L464] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L616] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L618] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 179 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.3s, OverallIterations: 22, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3279 SdHoareTripleChecker+Valid, 1.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3234 mSDsluCounter, 21199 SdHoareTripleChecker+Invalid, 1.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 15312 mSDsCounter, 194 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1260 IncrementalHoareTripleChecker+Invalid, 1454 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 194 mSolverCounterUnsat, 5887 mSDtfsCounter, 1260 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 252 GetRequests, 148 SyntacticMatches, 0 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1793occurred in iteration=21, InterpolantAutomatonStates: 114, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 21 MinimizatonAttempts, 1219 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 3.5s InterpolantComputationTime, 1682 NumberOfCodeBlocks, 1682 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 1559 ConstructedInterpolants, 0 QuantifiedInterpolants, 3401 SizeOfPredicates, 1 NumberOfNonLiveVariables, 477 ConjunctsInSsa, 13 ConjunctsInUnsatCore, 22 InterpolantComputations, 21 PerfectInterpolantSequences, 157/160 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-01-09 04:18:54,389 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE