./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:33:35,528 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:33:35,577 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-03-04 15:33:35,580 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:33:35,580 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:33:35,580 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:33:35,602 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:33:35,602 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:33:35,603 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:33:35,603 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:33:35,603 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:33:35,604 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:33:35,604 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:33:35,604 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:33:35,604 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:33:35,605 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:33:35,605 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:33:35,606 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:33:35,606 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:33:35,606 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:33:35,606 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2025-03-04 15:33:35,811 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:33:35,816 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:33:35,818 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:33:35,818 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:33:35,819 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:33:35,820 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2025-03-04 15:33:36,928 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/15bd700e9/581c6ecc48524e488ff025b82f185fa5/FLAGbacb5f8ec [2025-03-04 15:33:37,167 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:33:37,168 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2025-03-04 15:33:37,174 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/15bd700e9/581c6ecc48524e488ff025b82f185fa5/FLAGbacb5f8ec [2025-03-04 15:33:37,508 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/15bd700e9/581c6ecc48524e488ff025b82f185fa5 [2025-03-04 15:33:37,511 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:33:37,512 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:33:37,514 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:33:37,514 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:33:37,518 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:33:37,519 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,520 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2111d4b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37, skipping insertion in model container [2025-03-04 15:33:37,520 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,532 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:33:37,639 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:33:37,647 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:33:37,656 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:33:37,674 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:33:37,674 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37 WrapperNode [2025-03-04 15:33:37,674 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:33:37,676 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:33:37,676 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:33:37,676 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:33:37,680 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,684 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,695 INFO L138 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 42 [2025-03-04 15:33:37,695 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:33:37,696 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:33:37,696 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:33:37,696 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:33:37,701 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,701 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,706 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,715 INFO L175 MemorySlicer]: Split 3 memory accesses to 1 slices as follows [3]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 1 writes are split as follows [1]. [2025-03-04 15:33:37,715 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,715 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,720 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,723 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,724 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,724 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,725 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:33:37,726 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:33:37,726 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:33:37,726 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:33:37,726 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (1/1) ... [2025-03-04 15:33:37,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:37,744 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:37,756 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:37,759 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:33:37,779 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 15:33:37,779 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:33:37,779 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:33:37,779 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 15:33:37,779 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-04 15:33:37,779 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 15:33:37,824 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:33:37,826 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:33:37,920 INFO L1325 $ProcedureCfgBuilder]: dead code at ProgramPoint L13: call ULTIMATE.dealloc(main_~#a~0#1.base, main_~#a~0#1.offset);havoc main_~#a~0#1.base, main_~#a~0#1.offset; [2025-03-04 15:33:37,924 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2025-03-04 15:33:37,925 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:33:37,933 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:33:37,933 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:33:37,933 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:33:37 BoogieIcfgContainer [2025-03-04 15:33:37,934 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:33:37,934 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:33:37,934 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:33:37,938 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:33:37,939 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:33:37,939 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:33:37" (1/3) ... [2025-03-04 15:33:37,940 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@426dc9e2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:33:37, skipping insertion in model container [2025-03-04 15:33:37,940 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:33:37,941 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:33:37" (2/3) ... [2025-03-04 15:33:37,941 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@426dc9e2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:33:37, skipping insertion in model container [2025-03-04 15:33:37,942 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:33:37,942 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:33:37" (3/3) ... [2025-03-04 15:33:37,942 INFO L363 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2025-03-04 15:33:37,986 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:33:37,986 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:33:37,986 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:33:37,986 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:33:37,986 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:33:37,986 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:33:37,987 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:33:37,987 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:33:37,991 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:38,000 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 15:33:38,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:38,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:38,004 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:33:38,004 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:38,004 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:33:38,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:38,005 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 15:33:38,005 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:38,005 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:38,005 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:33:38,005 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:38,008 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" [2025-03-04 15:33:38,009 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-03-04 15:33:38,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:38,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1440, now seen corresponding path program 1 times [2025-03-04 15:33:38,017 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:38,017 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460205472] [2025-03-04 15:33:38,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:38,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:38,065 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:33:38,074 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:33:38,075 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,075 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,075 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:38,077 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:33:38,079 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:33:38,079 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,079 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:38,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:38,091 INFO L85 PathProgramCache]: Analyzing trace with hash 44, now seen corresponding path program 1 times [2025-03-04 15:33:38,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:38,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158691352] [2025-03-04 15:33:38,091 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:38,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:38,095 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:38,098 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:38,098 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,098 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,098 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:38,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:38,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:38,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,104 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:38,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:38,105 INFO L85 PathProgramCache]: Analyzing trace with hash 44653, now seen corresponding path program 1 times [2025-03-04 15:33:38,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:38,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950128175] [2025-03-04 15:33:38,105 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:38,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:38,110 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:33:38,118 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:33:38,118 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,118 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,118 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:38,120 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:33:38,125 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:33:38,125 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:38,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:38,334 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 15:33:38,335 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 15:33:38,335 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 15:33:38,335 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 15:33:38,335 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 15:33:38,335 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,335 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 15:33:38,336 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 15:33:38,336 INFO L132 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2025-03-04 15:33:38,336 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 15:33:38,336 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 15:33:38,348 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,358 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,361 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,364 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,447 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,449 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,452 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,455 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,459 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,462 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,466 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:33:38,594 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 15:33:38,596 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 15:33:38,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,598 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,600 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,602 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 15:33:38,603 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,614 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,615 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:33:38,615 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,615 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,615 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,619 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:33:38,620 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:33:38,622 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,629 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-04 15:33:38,631 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,631 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,633 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,634 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 15:33:38,636 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,646 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,646 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:33:38,646 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,646 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,646 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,647 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:33:38,647 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:33:38,649 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,655 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-04 15:33:38,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,655 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,658 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 15:33:38,660 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,671 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,671 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:33:38,671 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,671 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,671 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,672 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:33:38,672 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:33:38,673 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,679 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-03-04 15:33:38,679 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,680 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,681 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,683 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 15:33:38,683 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,693 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,694 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,694 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,694 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,697 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:33:38,697 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:33:38,701 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,707 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-04 15:33:38,707 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,707 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,710 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,711 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-04 15:33:38,712 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,722 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,722 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,723 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,723 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,725 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:33:38,725 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:33:38,729 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,735 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2025-03-04 15:33:38,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,736 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,738 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,740 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-04 15:33:38,741 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,751 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,751 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,751 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,751 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,753 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:33:38,753 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:33:38,756 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:33:38,762 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-03-04 15:33:38,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,765 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-04 15:33:38,768 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:33:38,778 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:33:38,778 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:33:38,778 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:33:38,778 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:33:38,782 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:33:38,782 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:33:38,789 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 15:33:38,809 INFO L443 ModelExtractionUtils]: Simplification made 9 calls to the SMT solver. [2025-03-04 15:33:38,814 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2025-03-04 15:33:38,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:33:38,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:38,818 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:33:38,819 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-04 15:33:38,820 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 15:33:38,832 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-04 15:33:38,833 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 15:33:38,833 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-04 15:33:38,839 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-04 15:33:38,851 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2025-03-04 15:33:38,859 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-04 15:33:38,860 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-04 15:33:38,878 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:38,887 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:33:38,891 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:33:38,891 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,891 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:38,893 INFO L256 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 15:33:38,893 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:38,902 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:38,904 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:38,905 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:38,905 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:38,905 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 15:33:38,906 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:38,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:38,933 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-04 15:33:38,934 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:38,960 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 12 states and 17 transitions. Complement of second has 3 states. [2025-03-04 15:33:38,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-03-04 15:33:38,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:38,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-03-04 15:33:38,976 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-03-04 15:33:38,977 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:33:38,977 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-03-04 15:33:38,977 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:33:38,977 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-03-04 15:33:38,978 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:33:38,978 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 17 transitions. [2025-03-04 15:33:38,980 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:38,981 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 11 transitions. [2025-03-04 15:33:38,983 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:33:38,983 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:38,984 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 11 transitions. [2025-03-04 15:33:38,984 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:38,984 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 11 transitions. [2025-03-04 15:33:38,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 11 transitions. [2025-03-04 15:33:38,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2025-03-04 15:33:39,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 11 transitions. [2025-03-04 15:33:39,001 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 11 transitions. [2025-03-04 15:33:39,001 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 11 transitions. [2025-03-04 15:33:39,001 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:33:39,001 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 11 transitions. [2025-03-04 15:33:39,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:39,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:39,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-03-04 15:33:39,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:39,002 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume !main_#t~short5#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:39,002 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:39,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1330237627, now seen corresponding path program 1 times [2025-03-04 15:33:39,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528385921] [2025-03-04 15:33:39,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,011 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 15:33:39,017 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 15:33:39,017 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,059 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-03-04 15:33:39,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,092 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:39,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528385921] [2025-03-04 15:33:39,094 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [528385921] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:33:39,094 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:33:39,094 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:33:39,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428229091] [2025-03-04 15:33:39,094 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:33:39,096 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:39,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,096 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 1 times [2025-03-04 15:33:39,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826990948] [2025-03-04 15:33:39,096 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,098 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,099 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,099 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,099 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,099 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:39,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,100 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,101 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,104 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:39,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:39,125 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:33:39,127 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:33:39,127 INFO L87 Difference]: Start difference. First operand 8 states and 11 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:39,136 INFO L93 Difference]: Finished difference Result 8 states and 10 transitions. [2025-03-04 15:33:39,136 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8 states and 10 transitions. [2025-03-04 15:33:39,136 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,137 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8 states to 8 states and 10 transitions. [2025-03-04 15:33:39,137 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:39,137 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:39,137 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2025-03-04 15:33:39,137 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:39,137 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-04 15:33:39,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2025-03-04 15:33:39,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2025-03-04 15:33:39,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2025-03-04 15:33:39,138 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-04 15:33:39,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:33:39,139 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-04 15:33:39,139 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:33:39,139 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2025-03-04 15:33:39,139 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,139 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:39,139 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:39,139 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:39,139 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:39,139 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume !main_#t~short5#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:39,139 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:39,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,140 INFO L85 PathProgramCache]: Analyzing trace with hash -1711322360, now seen corresponding path program 1 times [2025-03-04 15:33:39,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568082374] [2025-03-04 15:33:39,140 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,148 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-04 15:33:39,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 15:33:39,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,201 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:39,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568082374] [2025-03-04 15:33:39,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1568082374] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:39,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [850641655] [2025-03-04 15:33:39,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:39,202 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:39,203 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:39,205 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-04 15:33:39,229 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-04 15:33:39,236 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 15:33:39,236 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,237 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,237 INFO L256 TraceCheckSpWp]: Trace formula consists of 42 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 15:33:39,237 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:39,244 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-04 15:33:39,244 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-04 15:33:39,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [850641655] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:33:39,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-04 15:33:39,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2025-03-04 15:33:39,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006224822] [2025-03-04 15:33:39,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:33:39,244 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:39,245 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,245 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 2 times [2025-03-04 15:33:39,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404316859] [2025-03-04 15:33:39,245 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:33:39,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,247 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,248 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,248 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:33:39,248 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,248 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:39,248 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,249 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,249 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:39,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:39,261 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:33:39,261 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-04 15:33:39,261 INFO L87 Difference]: Start difference. First operand 8 states and 10 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:39,267 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2025-03-04 15:33:39,267 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2025-03-04 15:33:39,267 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,268 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 8 states and 9 transitions. [2025-03-04 15:33:39,268 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:39,268 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:39,268 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2025-03-04 15:33:39,268 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:39,268 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-04 15:33:39,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2025-03-04 15:33:39,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2025-03-04 15:33:39,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2025-03-04 15:33:39,269 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-04 15:33:39,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:33:39,270 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-04 15:33:39,270 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:33:39,270 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2025-03-04 15:33:39,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,270 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:39,270 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:39,270 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:39,270 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:39,271 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:39,271 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:39,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,271 INFO L85 PathProgramCache]: Analyzing trace with hash -1711322391, now seen corresponding path program 1 times [2025-03-04 15:33:39,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706207206] [2025-03-04 15:33:39,271 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,279 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-04 15:33:39,282 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 15:33:39,282 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,282 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,322 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:39,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706207206] [2025-03-04 15:33:39,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1706207206] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:39,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1538744437] [2025-03-04 15:33:39,323 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:33:39,323 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:39,323 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:39,327 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:39,328 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-04 15:33:39,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-04 15:33:39,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 15:33:39,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,363 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,364 INFO L256 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-04 15:33:39,365 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:39,377 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,377 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:33:39,389 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1538744437] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:33:39,389 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:33:39,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2025-03-04 15:33:39,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796855091] [2025-03-04 15:33:39,389 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:33:39,389 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:39,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,389 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 3 times [2025-03-04 15:33:39,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073434349] [2025-03-04 15:33:39,390 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:33:39,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,391 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,393 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,393 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:33:39,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,393 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:39,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,394 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,394 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,394 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:39,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:39,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 15:33:39,405 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-04 15:33:39,405 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:39,414 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2025-03-04 15:33:39,414 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2025-03-04 15:33:39,414 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,415 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 12 transitions. [2025-03-04 15:33:39,415 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:39,415 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:39,415 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 12 transitions. [2025-03-04 15:33:39,415 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:39,415 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2025-03-04 15:33:39,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 12 transitions. [2025-03-04 15:33:39,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2025-03-04 15:33:39,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 10 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 12 transitions. [2025-03-04 15:33:39,417 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2025-03-04 15:33:39,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 15:33:39,419 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 12 transitions. [2025-03-04 15:33:39,419 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:33:39,419 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 12 transitions. [2025-03-04 15:33:39,420 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,420 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:39,420 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:39,420 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:39,420 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:39,420 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:39,420 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:39,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,420 INFO L85 PathProgramCache]: Analyzing trace with hash 234650588, now seen corresponding path program 2 times [2025-03-04 15:33:39,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062689474] [2025-03-04 15:33:39,420 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:33:39,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,425 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 10 statements into 2 equivalence classes. [2025-03-04 15:33:39,434 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 10 of 10 statements. [2025-03-04 15:33:39,434 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:33:39,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,522 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:39,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062689474] [2025-03-04 15:33:39,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2062689474] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:39,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [288795209] [2025-03-04 15:33:39,522 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:33:39,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:39,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:39,525 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:39,525 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-04 15:33:39,549 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 10 statements into 2 equivalence classes. [2025-03-04 15:33:39,558 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 10 of 10 statements. [2025-03-04 15:33:39,558 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:33:39,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,559 INFO L256 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 15:33:39,559 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:39,571 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,571 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:33:39,616 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [288795209] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:33:39,617 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:33:39,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2025-03-04 15:33:39,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777241176] [2025-03-04 15:33:39,618 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:33:39,619 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:39,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,619 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 4 times [2025-03-04 15:33:39,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294862286] [2025-03-04 15:33:39,620 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:33:39,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,622 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-04 15:33:39,623 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,623 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:33:39,623 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,623 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:39,623 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:39,624 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:39,624 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:39,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:39,624 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:39,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:39,637 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 15:33:39,637 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-04 15:33:39,637 INFO L87 Difference]: Start difference. First operand 11 states and 12 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:39,655 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2025-03-04 15:33:39,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 18 transitions. [2025-03-04 15:33:39,655 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,655 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 17 states and 18 transitions. [2025-03-04 15:33:39,655 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:39,655 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:39,656 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 18 transitions. [2025-03-04 15:33:39,656 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:39,656 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17 states and 18 transitions. [2025-03-04 15:33:39,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 18 transitions. [2025-03-04 15:33:39,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2025-03-04 15:33:39,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 16 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:39,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 18 transitions. [2025-03-04 15:33:39,656 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 18 transitions. [2025-03-04 15:33:39,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-04 15:33:39,658 INFO L432 stractBuchiCegarLoop]: Abstraction has 17 states and 18 transitions. [2025-03-04 15:33:39,658 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:33:39,658 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 18 transitions. [2025-03-04 15:33:39,658 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:39,659 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:39,659 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:39,659 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:39,659 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:39,659 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:39,659 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:39,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:39,659 INFO L85 PathProgramCache]: Analyzing trace with hash -150785860, now seen corresponding path program 3 times [2025-03-04 15:33:39,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:39,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520097614] [2025-03-04 15:33:39,660 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:33:39,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:39,666 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 16 statements into 6 equivalence classes. [2025-03-04 15:33:39,677 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:33:39,678 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:33:39,678 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,882 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:39,882 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:39,882 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520097614] [2025-03-04 15:33:39,882 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1520097614] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:39,882 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [497707704] [2025-03-04 15:33:39,882 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:33:39,882 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:39,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:39,886 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:39,888 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-04 15:33:39,934 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 16 statements into 6 equivalence classes. [2025-03-04 15:33:39,969 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:33:39,969 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:33:39,969 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:39,970 INFO L256 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-04 15:33:39,971 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:40,005 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:40,005 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:33:40,184 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:40,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [497707704] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:33:40,184 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:33:40,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2025-03-04 15:33:40,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216479751] [2025-03-04 15:33:40,184 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:33:40,185 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:40,185 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:40,185 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 5 times [2025-03-04 15:33:40,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:40,185 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112960137] [2025-03-04 15:33:40,185 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:33:40,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:40,187 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:40,188 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:40,188 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:33:40,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:40,188 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:40,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:40,188 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:40,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:40,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:40,189 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:40,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:40,200 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-04 15:33:40,200 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-04 15:33:40,200 INFO L87 Difference]: Start difference. First operand 17 states and 18 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:40,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:40,236 INFO L93 Difference]: Finished difference Result 29 states and 30 transitions. [2025-03-04 15:33:40,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 30 transitions. [2025-03-04 15:33:40,238 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:40,238 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 30 transitions. [2025-03-04 15:33:40,238 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:40,238 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:40,238 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 30 transitions. [2025-03-04 15:33:40,238 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:40,238 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 30 transitions. [2025-03-04 15:33:40,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 30 transitions. [2025-03-04 15:33:40,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2025-03-04 15:33:40,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 28 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:40,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2025-03-04 15:33:40,239 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 30 transitions. [2025-03-04 15:33:40,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-04 15:33:40,242 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 30 transitions. [2025-03-04 15:33:40,242 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:33:40,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 30 transitions. [2025-03-04 15:33:40,242 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:40,242 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:40,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:40,243 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:40,243 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:40,243 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:40,243 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:40,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:40,244 INFO L85 PathProgramCache]: Analyzing trace with hash 300229244, now seen corresponding path program 4 times [2025-03-04 15:33:40,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:40,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307140383] [2025-03-04 15:33:40,244 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:33:40,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:40,257 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 28 statements into 2 equivalence classes. [2025-03-04 15:33:40,270 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:33:40,270 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:33:40,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:40,713 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:40,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:40,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307140383] [2025-03-04 15:33:40,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1307140383] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:40,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934181849] [2025-03-04 15:33:40,715 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:33:40,715 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:40,715 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:40,717 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:40,718 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-04 15:33:40,769 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 28 statements into 2 equivalence classes. [2025-03-04 15:33:40,795 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:33:40,796 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:33:40,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:40,797 INFO L256 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-04 15:33:40,799 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:33:40,856 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:40,856 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:33:41,470 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:41,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934181849] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:33:41,470 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:33:41,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2025-03-04 15:33:41,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343089251] [2025-03-04 15:33:41,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:33:41,471 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:33:41,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:41,471 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 6 times [2025-03-04 15:33:41,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:41,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764362843] [2025-03-04 15:33:41,471 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:33:41,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:41,473 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:41,474 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:41,474 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:33:41,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:41,474 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:33:41,474 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:33:41,474 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:33:41,474 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:33:41,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:33:41,475 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:33:41,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:33:41,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-04 15:33:41,487 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-04 15:33:41,487 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:41,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:33:41,535 INFO L93 Difference]: Finished difference Result 53 states and 54 transitions. [2025-03-04 15:33:41,535 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 54 transitions. [2025-03-04 15:33:41,536 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:41,537 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 53 states and 54 transitions. [2025-03-04 15:33:41,538 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:33:41,538 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:33:41,538 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 54 transitions. [2025-03-04 15:33:41,538 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:33:41,539 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 54 transitions. [2025-03-04 15:33:41,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 54 transitions. [2025-03-04 15:33:41,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2025-03-04 15:33:41,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 52 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:33:41,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 54 transitions. [2025-03-04 15:33:41,542 INFO L240 hiAutomatonCegarLoop]: Abstraction has 53 states and 54 transitions. [2025-03-04 15:33:41,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-04 15:33:41,542 INFO L432 stractBuchiCegarLoop]: Abstraction has 53 states and 54 transitions. [2025-03-04 15:33:41,542 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:33:41,542 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 54 transitions. [2025-03-04 15:33:41,543 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:33:41,543 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:33:41,543 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:33:41,544 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1, 1, 1, 1] [2025-03-04 15:33:41,544 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:33:41,544 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:33:41,544 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:33:41,544 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:33:41,544 INFO L85 PathProgramCache]: Analyzing trace with hash -2092751364, now seen corresponding path program 5 times [2025-03-04 15:33:41,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:33:41,544 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275460357] [2025-03-04 15:33:41,544 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:33:41,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:33:41,568 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 52 statements into 24 equivalence classes. [2025-03-04 15:33:41,637 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 52 of 52 statements. [2025-03-04 15:33:41,637 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-04 15:33:41,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:33:42,983 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:33:42,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:33:42,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275460357] [2025-03-04 15:33:42,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1275460357] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:33:42,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1999665891] [2025-03-04 15:33:42,983 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:33:42,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:33:42,983 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:33:42,985 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:33:42,986 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-04 15:33:43,046 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 52 statements into 24 equivalence classes. [2025-03-04 15:34:12,558 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 52 of 52 statements. [2025-03-04 15:34:12,558 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-04 15:34:12,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:34:12,582 INFO L256 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-04 15:34:12,584 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:34:12,684 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:34:12,684 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:34:14,605 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:34:14,605 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1999665891] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:34:14,605 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:34:14,605 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 96 [2025-03-04 15:34:14,606 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144463880] [2025-03-04 15:34:14,606 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:34:14,606 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:34:14,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:34:14,606 INFO L85 PathProgramCache]: Analyzing trace with hash 36, now seen corresponding path program 7 times [2025-03-04 15:34:14,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:34:14,606 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816103183] [2025-03-04 15:34:14,606 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:34:14,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:34:14,608 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:34:14,609 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:34:14,609 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:34:14,609 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:34:14,609 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:34:14,609 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:34:14,610 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:34:14,610 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:34:14,610 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:34:14,611 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:34:14,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:34:14,621 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-04 15:34:14,624 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-04 15:34:14,624 INFO L87 Difference]: Start difference. First operand 53 states and 54 transitions. cyclomatic complexity: 3 Second operand has 96 states, 96 states have (on average 1.0416666666666667) internal successors, (100), 96 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:34:14,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:34:14,728 INFO L93 Difference]: Finished difference Result 101 states and 102 transitions. [2025-03-04 15:34:14,729 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 102 transitions. [2025-03-04 15:34:14,730 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:34:14,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 102 transitions. [2025-03-04 15:34:14,733 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-04 15:34:14,733 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-04 15:34:14,733 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 102 transitions. [2025-03-04 15:34:14,733 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:34:14,733 INFO L218 hiAutomatonCegarLoop]: Abstraction has 101 states and 102 transitions. [2025-03-04 15:34:14,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 102 transitions. [2025-03-04 15:34:14,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2025-03-04 15:34:14,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.00990099009901) internal successors, (102), 100 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:34:14,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 102 transitions. [2025-03-04 15:34:14,738 INFO L240 hiAutomatonCegarLoop]: Abstraction has 101 states and 102 transitions. [2025-03-04 15:34:14,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-04 15:34:14,740 INFO L432 stractBuchiCegarLoop]: Abstraction has 101 states and 102 transitions. [2025-03-04 15:34:14,740 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:34:14,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 102 transitions. [2025-03-04 15:34:14,741 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 15:34:14,741 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:34:14,742 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:34:14,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1, 1, 1, 1, 1] [2025-03-04 15:34:14,743 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:34:14,743 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" "assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1;" "assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1;" "assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;" [2025-03-04 15:34:14,745 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~x~0#1 >= 0;main_~x~0#1 := main_~x~0#1 - main_~k~0#1;" [2025-03-04 15:34:14,746 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:34:14,746 INFO L85 PathProgramCache]: Analyzing trace with hash 1118285052, now seen corresponding path program 6 times [2025-03-04 15:34:14,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:34:14,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862860668] [2025-03-04 15:34:14,746 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:34:14,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:34:14,787 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 100 statements into 48 equivalence classes. [2025-03-04 15:34:14,935 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 100 of 100 statements. [2025-03-04 15:34:14,935 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-03-04 15:34:14,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:34:18,982 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:34:18,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:34:18,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862860668] [2025-03-04 15:34:18,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1862860668] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:34:18,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1963966512] [2025-03-04 15:34:18,982 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:34:18,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:34:18,983 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:34:18,984 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:34:18,986 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-04 15:34:19,093 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 100 statements into 48 equivalence classes.