./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array13_alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array13_alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:41:48,523 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:41:48,585 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-03-04 15:41:48,590 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:41:48,591 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:41:48,591 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:41:48,611 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:41:48,611 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:41:48,612 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:41:48,612 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:41:48,612 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:41:48,613 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:41:48,613 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:41:48,613 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:41:48,613 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:41:48,613 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:41:48,613 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:41:48,614 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:41:48,614 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:41:48,614 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:41:48,615 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:41:48,615 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:41:48,615 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:41:48,615 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:41:48,615 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff [2025-03-04 15:41:48,847 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:41:48,856 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:41:48,858 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:41:48,859 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:41:48,859 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:41:48,860 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array13_alloca.i [2025-03-04 15:41:50,047 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/21f260316/ea46ed2d4f604af9943ed3fa49e0865c/FLAG98c925744 [2025-03-04 15:41:50,330 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:41:50,332 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array13_alloca.i [2025-03-04 15:41:50,343 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/21f260316/ea46ed2d4f604af9943ed3fa49e0865c/FLAG98c925744 [2025-03-04 15:41:50,360 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/21f260316/ea46ed2d4f604af9943ed3fa49e0865c [2025-03-04 15:41:50,362 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:41:50,364 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:41:50,365 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:41:50,365 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:41:50,368 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:41:50,369 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,369 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@434c1a28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50, skipping insertion in model container [2025-03-04 15:41:50,371 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,398 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:41:50,564 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:41:50,571 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:41:50,610 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:41:50,630 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:41:50,630 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50 WrapperNode [2025-03-04 15:41:50,630 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:41:50,631 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:41:50,631 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:41:50,631 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:41:50,635 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,641 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,651 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2025-03-04 15:41:50,651 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:41:50,651 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:41:50,652 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:41:50,652 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:41:50,656 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,656 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,657 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,664 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-03-04 15:41:50,664 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,664 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,666 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,667 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,667 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,667 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,668 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:41:50,669 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:41:50,669 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:41:50,669 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:41:50,670 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (1/1) ... [2025-03-04 15:41:50,673 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:50,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:50,691 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:50,693 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:41:50,709 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 15:41:50,709 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 15:41:50,709 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-04 15:41:50,709 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 15:41:50,709 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:41:50,709 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:41:50,761 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:41:50,762 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:41:50,876 INFO L1325 $ProcedureCfgBuilder]: dead code at ProgramPoint L368: call ULTIMATE.dealloc(main_#t~malloc206#1.base, main_#t~malloc206#1.offset);havoc main_#t~malloc206#1.base, main_#t~malloc206#1.offset; [2025-03-04 15:41:50,880 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2025-03-04 15:41:50,880 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:41:50,885 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:41:50,885 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:41:50,885 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:41:50 BoogieIcfgContainer [2025-03-04 15:41:50,885 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:41:50,886 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:41:50,886 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:41:50,889 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:41:50,889 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:41:50,889 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:41:50" (1/3) ... [2025-03-04 15:41:50,890 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@fcb1535 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:41:50, skipping insertion in model container [2025-03-04 15:41:50,890 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:41:50,890 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:41:50" (2/3) ... [2025-03-04 15:41:50,891 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@fcb1535 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:41:50, skipping insertion in model container [2025-03-04 15:41:50,891 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:41:50,891 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:41:50" (3/3) ... [2025-03-04 15:41:50,892 INFO L363 chiAutomizerObserver]: Analyzing ICFG array13_alloca.i [2025-03-04 15:41:50,923 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:41:50,924 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:41:50,924 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:41:50,924 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:41:50,924 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:41:50,925 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:41:50,925 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:41:50,925 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:41:50,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:50,941 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-03-04 15:41:50,941 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:50,941 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:50,945 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-03-04 15:41:50,945 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-03-04 15:41:50,945 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:41:50,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:50,946 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-03-04 15:41:50,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:50,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:50,947 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-03-04 15:41:50,947 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-03-04 15:41:50,950 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" [2025-03-04 15:41:50,950 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" [2025-03-04 15:41:50,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:50,954 INFO L85 PathProgramCache]: Analyzing trace with hash 48637714, now seen corresponding path program 1 times [2025-03-04 15:41:50,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:50,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293596559] [2025-03-04 15:41:50,959 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:50,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:51,005 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-04 15:41:51,019 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-04 15:41:51,020 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,020 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,020 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:51,022 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-04 15:41:51,027 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-04 15:41:51,027 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,027 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,040 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:51,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:51,042 INFO L85 PathProgramCache]: Analyzing trace with hash 40649, now seen corresponding path program 1 times [2025-03-04 15:41:51,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:51,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962756769] [2025-03-04 15:41:51,042 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:51,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:51,048 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:41:51,055 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:41:51,056 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,056 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,057 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:51,058 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:41:51,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:41:51,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,068 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:51,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:51,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1562169880, now seen corresponding path program 1 times [2025-03-04 15:41:51,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:51,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022664195] [2025-03-04 15:41:51,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:51,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:51,076 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-04 15:41:51,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-04 15:41:51,091 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,091 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,091 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:51,094 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-04 15:41:51,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-04 15:41:51,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:51,105 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:51,351 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 15:41:51,352 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 15:41:51,352 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 15:41:51,352 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 15:41:51,352 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 15:41:51,352 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:51,352 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 15:41:51,352 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 15:41:51,352 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration1_Lasso [2025-03-04 15:41:51,352 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 15:41:51,352 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 15:41:51,365 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,371 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,499 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,501 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,503 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,505 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,506 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,508 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,510 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,512 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,514 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:51,701 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 15:41:51,703 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 15:41:51,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:51,704 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:51,706 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:51,707 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 15:41:51,709 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:51,719 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:51,719 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:51,720 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:51,720 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:51,720 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:51,723 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:51,723 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:51,725 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:51,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-03-04 15:41:51,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:51,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:51,733 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:51,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 15:41:51,737 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:51,746 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:51,746 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:51,746 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:51,746 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:51,749 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:51,749 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:51,752 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:51,758 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-04 15:41:51,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:51,758 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:51,760 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:51,761 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 15:41:51,762 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:51,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:51,772 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:51,772 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:51,772 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:51,778 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:51,778 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:51,787 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 15:41:51,825 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-03-04 15:41:51,828 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 12 variables to zero. [2025-03-04 15:41:51,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:51,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:51,832 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:51,833 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 15:41:51,835 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 15:41:51,846 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-04 15:41:51,846 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 15:41:51,846 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-04 15:41:51,852 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-03-04 15:41:51,860 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-03-04 15:41:51,867 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-04 15:41:51,868 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-04 15:41:51,869 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2025-03-04 15:41:51,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:51,895 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-04 15:41:51,903 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-04 15:41:51,903 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,903 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:51,904 INFO L256 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 15:41:51,906 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:51,918 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:41:51,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:41:51,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:51,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:51,922 INFO L256 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 15:41:51,922 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:51,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:51,958 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-03-04 15:41:51,959 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:51,990 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 20 states and 28 transitions. Complement of second has 5 states. [2025-03-04 15:41:51,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-04 15:41:51,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:51,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 13 transitions. [2025-03-04 15:41:52,001 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 3 letters. [2025-03-04 15:41:52,002 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:52,002 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 8 letters. Loop has 3 letters. [2025-03-04 15:41:52,002 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:52,002 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 6 letters. [2025-03-04 15:41:52,002 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:52,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 28 transitions. [2025-03-04 15:41:52,004 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:52,005 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 12 states and 17 transitions. [2025-03-04 15:41:52,006 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-03-04 15:41:52,006 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-04 15:41:52,006 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2025-03-04 15:41:52,006 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:52,006 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2025-03-04 15:41:52,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2025-03-04 15:41:52,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2025-03-04 15:41:52,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:52,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 16 transitions. [2025-03-04 15:41:52,021 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-03-04 15:41:52,021 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-03-04 15:41:52,021 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:41:52,021 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 16 transitions. [2025-03-04 15:41:52,022 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:52,022 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:52,022 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:52,023 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-03-04 15:41:52,023 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:52,023 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-04 15:41:52,023 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:52,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1507769141, now seen corresponding path program 1 times [2025-03-04 15:41:52,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930972581] [2025-03-04 15:41:52,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,030 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 15:41:52,035 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 15:41:52,037 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,037 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:52,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:52,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930972581] [2025-03-04 15:41:52,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930972581] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:41:52,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:41:52,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:41:52,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721644577] [2025-03-04 15:41:52,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:41:52,087 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:41:52,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 1 times [2025-03-04 15:41:52,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673987401] [2025-03-04 15:41:52,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,090 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,093 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,093 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:52,094 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,097 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,097 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,097 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,098 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:52,143 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:52,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 15:41:52,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-03-04 15:41:52,146 INFO L87 Difference]: Start difference. First operand 11 states and 16 transitions. cyclomatic complexity: 7 Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:52,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:52,168 INFO L93 Difference]: Finished difference Result 13 states and 18 transitions. [2025-03-04 15:41:52,168 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 18 transitions. [2025-03-04 15:41:52,168 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:52,169 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 18 transitions. [2025-03-04 15:41:52,169 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-03-04 15:41:52,169 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-03-04 15:41:52,169 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 18 transitions. [2025-03-04 15:41:52,169 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:52,169 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 18 transitions. [2025-03-04 15:41:52,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 18 transitions. [2025-03-04 15:41:52,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 11. [2025-03-04 15:41:52,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:52,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2025-03-04 15:41:52,170 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-03-04 15:41:52,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 15:41:52,171 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-03-04 15:41:52,171 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:41:52,172 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2025-03-04 15:41:52,172 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:52,172 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:52,172 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:52,172 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:52,172 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:52,172 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-04 15:41:52,172 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:52,172 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1182626992, now seen corresponding path program 1 times [2025-03-04 15:41:52,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150345644] [2025-03-04 15:41:52,173 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,179 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-04 15:41:52,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-04 15:41:52,187 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,187 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:52,189 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-04 15:41:52,193 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-04 15:41:52,193 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,193 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,195 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:52,195 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,195 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 2 times [2025-03-04 15:41:52,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,195 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1883456538] [2025-03-04 15:41:52,195 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:52,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,198 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,199 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,199 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:41:52,199 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,200 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:52,200 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,201 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,201 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,202 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,202 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:52,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,203 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793938, now seen corresponding path program 1 times [2025-03-04 15:41:52,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982221968] [2025-03-04 15:41:52,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,207 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-04 15:41:52,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-04 15:41:52,214 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,214 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:52,356 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-04 15:41:52,469 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:52,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982221968] [2025-03-04 15:41:52,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1982221968] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:52,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1094809169] [2025-03-04 15:41:52,470 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:52,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:52,473 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:52,474 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-04 15:41:52,498 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-04 15:41:52,505 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-04 15:41:52,505 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,505 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:52,506 INFO L256 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-03-04 15:41:52,507 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:52,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:41:52,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:41:52,591 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,591 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:52,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2025-03-04 15:41:52,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-03-04 15:41:52,654 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,654 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1094809169] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:52,654 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:52,654 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2025-03-04 15:41:52,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370869149] [2025-03-04 15:41:52,654 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:52,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:52,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-03-04 15:41:52,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2025-03-04 15:41:52,691 INFO L87 Difference]: Start difference. First operand 11 states and 15 transitions. cyclomatic complexity: 6 Second operand has 16 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:52,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:52,766 INFO L93 Difference]: Finished difference Result 20 states and 28 transitions. [2025-03-04 15:41:52,766 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 28 transitions. [2025-03-04 15:41:52,766 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-04 15:41:52,767 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 28 transitions. [2025-03-04 15:41:52,768 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-03-04 15:41:52,768 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-03-04 15:41:52,768 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 28 transitions. [2025-03-04 15:41:52,768 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:52,768 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 28 transitions. [2025-03-04 15:41:52,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 28 transitions. [2025-03-04 15:41:52,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 17. [2025-03-04 15:41:52,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.411764705882353) internal successors, (24), 16 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:52,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 24 transitions. [2025-03-04 15:41:52,769 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 24 transitions. [2025-03-04 15:41:52,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 15:41:52,770 INFO L432 stractBuchiCegarLoop]: Abstraction has 17 states and 24 transitions. [2025-03-04 15:41:52,771 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:41:52,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 24 transitions. [2025-03-04 15:41:52,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:52,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:52,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:52,771 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:52,771 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:52,771 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:52,771 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:52,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,772 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793937, now seen corresponding path program 1 times [2025-03-04 15:41:52,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918800912] [2025-03-04 15:41:52,772 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,776 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-04 15:41:52,780 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-04 15:41:52,780 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,780 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,780 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:52,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-04 15:41:52,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-04 15:41:52,785 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:52,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 3 times [2025-03-04 15:41:52,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554583602] [2025-03-04 15:41:52,788 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:52,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,791 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,794 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,794 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:41:52,794 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,794 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:52,795 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:52,798 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:52,798 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,799 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:52,799 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:52,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:52,800 INFO L85 PathProgramCache]: Analyzing trace with hash 743860845, now seen corresponding path program 1 times [2025-03-04 15:41:52,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:52,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658813280] [2025-03-04 15:41:52,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:52,803 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-04 15:41:52,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 15:41:52,807 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:52,863 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:52,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658813280] [2025-03-04 15:41:52,863 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658813280] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:52,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [936198360] [2025-03-04 15:41:52,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:52,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:52,863 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:52,865 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:52,867 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-04 15:41:52,892 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-04 15:41:52,899 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 15:41:52,899 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:52,899 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:52,899 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 15:41:52,900 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:52,933 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,933 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:52,956 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:52,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [936198360] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:52,956 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:52,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2025-03-04 15:41:52,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722076408] [2025-03-04 15:41:52,956 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:52,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:52,996 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 15:41:52,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-04 15:41:52,997 INFO L87 Difference]: Start difference. First operand 17 states and 24 transitions. cyclomatic complexity: 10 Second operand has 10 states, 10 states have (on average 2.4) internal successors, (24), 10 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:53,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:53,047 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2025-03-04 15:41:53,047 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 33 transitions. [2025-03-04 15:41:53,047 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:53,048 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 22 states and 30 transitions. [2025-03-04 15:41:53,048 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 15:41:53,048 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 15:41:53,048 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 30 transitions. [2025-03-04 15:41:53,048 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:53,048 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-03-04 15:41:53,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 30 transitions. [2025-03-04 15:41:53,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 19. [2025-03-04 15:41:53,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:53,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 26 transitions. [2025-03-04 15:41:53,050 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 26 transitions. [2025-03-04 15:41:53,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 15:41:53,051 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 26 transitions. [2025-03-04 15:41:53,051 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:41:53,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 26 transitions. [2025-03-04 15:41:53,052 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:53,052 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:53,052 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:53,052 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:53,052 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:53,053 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-04 15:41:53,053 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:53,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,053 INFO L85 PathProgramCache]: Analyzing trace with hash 24117652, now seen corresponding path program 1 times [2025-03-04 15:41:53,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583538236] [2025-03-04 15:41:53,054 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:53,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,059 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-04 15:41:53,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-04 15:41:53,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,066 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:53,068 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-04 15:41:53,076 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-04 15:41:53,077 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,077 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,078 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:53,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 4 times [2025-03-04 15:41:53,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360940784] [2025-03-04 15:41:53,081 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:41:53,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,084 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:41:53,085 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:53,085 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:41:53,085 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,085 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:53,086 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:53,087 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:53,087 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,088 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:53,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1702227282, now seen corresponding path program 1 times [2025-03-04 15:41:53,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040208734] [2025-03-04 15:41:53,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:53,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,094 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-03-04 15:41:53,100 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:41:53,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,100 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:53,347 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:53,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:53,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040208734] [2025-03-04 15:41:53,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1040208734] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:53,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610667511] [2025-03-04 15:41:53,348 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:53,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:53,348 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:53,350 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:53,351 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-04 15:41:53,379 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-03-04 15:41:53,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:41:53,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,388 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:53,389 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-03-04 15:41:53,391 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:53,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:41:53,452 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-03-04 15:41:53,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-03-04 15:41:53,467 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-03-04 15:41:53,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-03-04 15:41:53,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:41:53,503 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:53,504 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:53,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2025-03-04 15:41:53,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2025-03-04 15:41:53,703 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:53,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610667511] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:53,705 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:53,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 20 [2025-03-04 15:41:53,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572509006] [2025-03-04 15:41:53,705 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:53,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:53,746 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-03-04 15:41:53,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2025-03-04 15:41:53,746 INFO L87 Difference]: Start difference. First operand 19 states and 26 transitions. cyclomatic complexity: 10 Second operand has 21 states, 20 states have (on average 1.6) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:53,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:53,845 INFO L93 Difference]: Finished difference Result 21 states and 28 transitions. [2025-03-04 15:41:53,845 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 28 transitions. [2025-03-04 15:41:53,846 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:53,846 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 21 states and 28 transitions. [2025-03-04 15:41:53,846 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-03-04 15:41:53,846 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-03-04 15:41:53,846 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 28 transitions. [2025-03-04 15:41:53,846 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:53,846 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 28 transitions. [2025-03-04 15:41:53,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 28 transitions. [2025-03-04 15:41:53,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 16. [2025-03-04 15:41:53,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.3125) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:53,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 21 transitions. [2025-03-04 15:41:53,847 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-04 15:41:53,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 15:41:53,850 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-04 15:41:53,851 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:41:53,851 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 21 transitions. [2025-03-04 15:41:53,851 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:53,851 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:53,851 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:53,851 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:53,853 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:53,853 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:53,853 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:53,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1703150804, now seen corresponding path program 2 times [2025-03-04 15:41:53,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559835278] [2025-03-04 15:41:53,853 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:53,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,858 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 14 statements into 2 equivalence classes. [2025-03-04 15:41:53,865 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:41:53,865 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:53,865 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,865 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:53,867 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-03-04 15:41:53,871 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:41:53,872 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,872 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:53,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 5 times [2025-03-04 15:41:53,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957306276] [2025-03-04 15:41:53,877 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:41:53,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,879 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:53,880 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:53,881 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:41:53,881 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,882 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:53,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:53,883 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:53,883 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:53,883 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:53,884 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:53,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:53,884 INFO L85 PathProgramCache]: Analyzing trace with hash 345383058, now seen corresponding path program 2 times [2025-03-04 15:41:53,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:53,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527504252] [2025-03-04 15:41:53,884 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:53,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:53,890 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-03-04 15:41:53,895 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:41:53,895 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:53,895 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:54,061 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:54,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527504252] [2025-03-04 15:41:54,062 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1527504252] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:54,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [162868824] [2025-03-04 15:41:54,062 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:54,062 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:54,062 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:54,064 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:54,066 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-04 15:41:54,095 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-03-04 15:41:54,105 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:41:54,105 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:54,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:54,106 INFO L256 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-03-04 15:41:54,107 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:54,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:41:54,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:41:54,241 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,241 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:54,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-04 15:41:54,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-04 15:41:54,341 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [162868824] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:54,342 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:54,342 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 21 [2025-03-04 15:41:54,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725378368] [2025-03-04 15:41:54,342 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:54,377 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:54,378 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-04 15:41:54,378 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2025-03-04 15:41:54,378 INFO L87 Difference]: Start difference. First operand 16 states and 21 transitions. cyclomatic complexity: 7 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:54,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:54,623 INFO L93 Difference]: Finished difference Result 33 states and 44 transitions. [2025-03-04 15:41:54,623 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 44 transitions. [2025-03-04 15:41:54,624 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-04 15:41:54,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 33 states and 44 transitions. [2025-03-04 15:41:54,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2025-03-04 15:41:54,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2025-03-04 15:41:54,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 44 transitions. [2025-03-04 15:41:54,624 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:54,624 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 44 transitions. [2025-03-04 15:41:54,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 44 transitions. [2025-03-04 15:41:54,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 22. [2025-03-04 15:41:54,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:54,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 30 transitions. [2025-03-04 15:41:54,626 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-03-04 15:41:54,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-03-04 15:41:54,627 INFO L432 stractBuchiCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-03-04 15:41:54,627 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:41:54,627 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 30 transitions. [2025-03-04 15:41:54,627 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:54,627 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:54,627 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:54,627 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:54,627 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:54,627 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:54,628 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:54,628 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:54,628 INFO L85 PathProgramCache]: Analyzing trace with hash 345383059, now seen corresponding path program 3 times [2025-03-04 15:41:54,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:54,628 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177553452] [2025-03-04 15:41:54,628 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:54,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:54,632 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 16 statements into 3 equivalence classes. [2025-03-04 15:41:54,639 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:41:54,639 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-04 15:41:54,639 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,639 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:54,640 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-03-04 15:41:54,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-03-04 15:41:54,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:54,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,649 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:54,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:54,650 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 6 times [2025-03-04 15:41:54,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:54,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318452047] [2025-03-04 15:41:54,650 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:41:54,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:54,652 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:54,653 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:54,653 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:41:54,653 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,653 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:54,653 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:54,654 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:54,654 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:54,654 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,655 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:54,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:54,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1200638097, now seen corresponding path program 3 times [2025-03-04 15:41:54,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:54,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785653847] [2025-03-04 15:41:54,655 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:54,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:54,659 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-03-04 15:41:54,665 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-03-04 15:41:54,665 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-04 15:41:54,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:54,749 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:54,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785653847] [2025-03-04 15:41:54,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1785653847] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:54,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [238899713] [2025-03-04 15:41:54,749 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:54,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:54,749 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:54,751 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:54,753 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-04 15:41:54,781 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-03-04 15:41:54,791 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-03-04 15:41:54,791 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-04 15:41:54,791 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:54,791 INFO L256 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-03-04 15:41:54,792 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:54,841 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,842 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:54,879 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:54,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [238899713] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:54,880 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:54,880 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2025-03-04 15:41:54,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401818052] [2025-03-04 15:41:54,880 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:54,915 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:54,915 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 15:41:54,915 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2025-03-04 15:41:54,915 INFO L87 Difference]: Start difference. First operand 22 states and 30 transitions. cyclomatic complexity: 11 Second operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 13 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:54,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:54,967 INFO L93 Difference]: Finished difference Result 32 states and 41 transitions. [2025-03-04 15:41:54,967 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 41 transitions. [2025-03-04 15:41:54,967 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:54,967 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 27 states and 36 transitions. [2025-03-04 15:41:54,967 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-03-04 15:41:54,967 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-03-04 15:41:54,968 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 36 transitions. [2025-03-04 15:41:54,968 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:54,968 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-03-04 15:41:54,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 36 transitions. [2025-03-04 15:41:54,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 24. [2025-03-04 15:41:54,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:54,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2025-03-04 15:41:54,969 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2025-03-04 15:41:54,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 15:41:54,971 INFO L432 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2025-03-04 15:41:54,971 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:41:54,971 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2025-03-04 15:41:54,972 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:54,972 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:54,972 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:54,972 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:54,972 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:54,972 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:54,972 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:54,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:54,972 INFO L85 PathProgramCache]: Analyzing trace with hash -2060649522, now seen corresponding path program 1 times [2025-03-04 15:41:54,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:54,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935847662] [2025-03-04 15:41:54,973 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:54,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:54,978 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 15:41:54,984 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 15:41:54,984 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:54,984 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,985 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:54,987 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 15:41:54,993 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 15:41:54,993 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:54,993 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:54,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:54,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:54,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 7 times [2025-03-04 15:41:54,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:54,997 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429383920] [2025-03-04 15:41:54,997 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:41:54,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:54,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:54,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:54,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:54,999 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,000 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:55,000 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:55,001 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:55,001 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:55,001 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,002 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:55,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:55,003 INFO L85 PathProgramCache]: Analyzing trace with hash -304266996, now seen corresponding path program 1 times [2025-03-04 15:41:55,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:55,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126062345] [2025-03-04 15:41:55,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:55,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:55,010 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-03-04 15:41:55,016 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 15:41:55,016 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:55,016 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:55,209 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:55,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126062345] [2025-03-04 15:41:55,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126062345] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:55,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2142396905] [2025-03-04 15:41:55,210 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:55,210 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:55,210 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:55,212 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:55,214 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-04 15:41:55,243 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-03-04 15:41:55,252 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 15:41:55,252 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:55,252 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:55,253 INFO L256 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 19 conjuncts are in the unsatisfiable core [2025-03-04 15:41:55,254 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:55,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-04 15:41:55,303 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-04 15:41:55,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-04 15:41:55,314 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-04 15:41:55,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-04 15:41:55,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-04 15:41:55,346 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,346 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:55,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-04 15:41:55,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-04 15:41:55,439 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2142396905] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:55,440 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:55,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2025-03-04 15:41:55,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890710955] [2025-03-04 15:41:55,440 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:55,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:55,471 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-04 15:41:55,471 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2025-03-04 15:41:55,471 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 11 Second operand has 17 states, 16 states have (on average 2.0) internal successors, (32), 17 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:55,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:55,575 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2025-03-04 15:41:55,575 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 36 transitions. [2025-03-04 15:41:55,576 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:55,576 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 36 transitions. [2025-03-04 15:41:55,576 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2025-03-04 15:41:55,576 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2025-03-04 15:41:55,576 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 36 transitions. [2025-03-04 15:41:55,576 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:55,576 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 36 transitions. [2025-03-04 15:41:55,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 36 transitions. [2025-03-04 15:41:55,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 21. [2025-03-04 15:41:55,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.2857142857142858) internal successors, (27), 20 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:55,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2025-03-04 15:41:55,577 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-03-04 15:41:55,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-04 15:41:55,581 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-03-04 15:41:55,581 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:41:55,581 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 27 transitions. [2025-03-04 15:41:55,581 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:55,581 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:55,581 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:55,581 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:55,581 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:55,581 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:55,581 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:55,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:55,582 INFO L85 PathProgramCache]: Analyzing trace with hash 583236686, now seen corresponding path program 4 times [2025-03-04 15:41:55,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:55,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288609694] [2025-03-04 15:41:55,582 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:41:55,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:55,586 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 19 statements into 2 equivalence classes. [2025-03-04 15:41:55,590 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 15:41:55,591 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:41:55,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,591 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:55,592 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-03-04 15:41:55,596 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 15:41:55,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:55,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,598 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:55,598 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:55,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 8 times [2025-03-04 15:41:55,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:55,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908487203] [2025-03-04 15:41:55,599 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:55,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:55,600 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:55,601 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:55,601 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:41:55,601 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,601 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:55,601 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:55,602 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:55,602 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:55,602 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:55,602 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:55,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:55,603 INFO L85 PathProgramCache]: Analyzing trace with hash 2144706956, now seen corresponding path program 4 times [2025-03-04 15:41:55,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:55,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914152664] [2025-03-04 15:41:55,603 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:41:55,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:55,607 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-03-04 15:41:55,610 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-03-04 15:41:55,610 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-04 15:41:55,610 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:55,731 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:55,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914152664] [2025-03-04 15:41:55,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1914152664] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:55,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [418532276] [2025-03-04 15:41:55,732 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:41:55,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:55,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:55,734 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:55,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-04 15:41:55,768 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-03-04 15:41:55,776 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-03-04 15:41:55,776 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-04 15:41:55,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:55,776 INFO L256 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-03-04 15:41:55,778 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:55,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-04 15:41:55,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-04 15:41:55,841 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,841 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:55,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-04 15:41:55,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-04 15:41:55,901 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:55,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [418532276] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:55,902 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:55,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2025-03-04 15:41:55,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818457262] [2025-03-04 15:41:55,902 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:55,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:55,935 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-04 15:41:55,935 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2025-03-04 15:41:55,935 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. cyclomatic complexity: 8 Second operand has 17 states, 16 states have (on average 2.0625) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:56,050 INFO L93 Difference]: Finished difference Result 34 states and 44 transitions. [2025-03-04 15:41:56,050 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 44 transitions. [2025-03-04 15:41:56,050 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-04 15:41:56,051 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 44 transitions. [2025-03-04 15:41:56,051 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2025-03-04 15:41:56,051 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2025-03-04 15:41:56,051 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2025-03-04 15:41:56,051 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:56,051 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2025-03-04 15:41:56,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2025-03-04 15:41:56,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2025-03-04 15:41:56,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.3333333333333333) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2025-03-04 15:41:56,052 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-03-04 15:41:56,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 15:41:56,055 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-03-04 15:41:56,055 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 15:41:56,055 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 36 transitions. [2025-03-04 15:41:56,055 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:56,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:56,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:56,055 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:56,055 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:56,055 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:56,055 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:56,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,056 INFO L85 PathProgramCache]: Analyzing trace with hash 2144706957, now seen corresponding path program 5 times [2025-03-04 15:41:56,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715875197] [2025-03-04 15:41:56,056 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,060 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 21 statements into 4 equivalence classes. [2025-03-04 15:41:56,068 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 21 of 21 statements. [2025-03-04 15:41:56,068 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-04 15:41:56,068 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,068 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:56,071 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-03-04 15:41:56,075 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-03-04 15:41:56,075 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,075 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,083 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:56,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,083 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 9 times [2025-03-04 15:41:56,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296478719] [2025-03-04 15:41:56,083 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:56,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,085 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:56,085 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:56,085 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:41:56,085 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,085 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:56,086 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:56,086 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:56,086 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,086 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,087 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:56,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,087 INFO L85 PathProgramCache]: Analyzing trace with hash -520916213, now seen corresponding path program 5 times [2025-03-04 15:41:56,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836817675] [2025-03-04 15:41:56,087 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,107 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-03-04 15:41:56,113 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-03-04 15:41:56,113 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-04 15:41:56,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,198 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:56,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:56,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836817675] [2025-03-04 15:41:56,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [836817675] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:56,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [818687464] [2025-03-04 15:41:56,198 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:56,198 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:56,201 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:56,202 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-04 15:41:56,238 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-03-04 15:41:56,252 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-03-04 15:41:56,252 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-04 15:41:56,252 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,252 INFO L256 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-03-04 15:41:56,253 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:56,314 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:56,314 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:56,363 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:56,363 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [818687464] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:56,363 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:56,363 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 15 [2025-03-04 15:41:56,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850561297] [2025-03-04 15:41:56,363 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:56,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:56,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-03-04 15:41:56,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2025-03-04 15:41:56,396 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. cyclomatic complexity: 12 Second operand has 15 states, 15 states have (on average 2.0) internal successors, (30), 15 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:56,475 INFO L93 Difference]: Finished difference Result 66 states and 86 transitions. [2025-03-04 15:41:56,476 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 86 transitions. [2025-03-04 15:41:56,476 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-03-04 15:41:56,477 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 59 states and 77 transitions. [2025-03-04 15:41:56,477 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-03-04 15:41:56,477 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-03-04 15:41:56,477 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 77 transitions. [2025-03-04 15:41:56,480 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:56,480 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59 states and 77 transitions. [2025-03-04 15:41:56,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 77 transitions. [2025-03-04 15:41:56,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 55. [2025-03-04 15:41:56,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.309090909090909) internal successors, (72), 54 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 72 transitions. [2025-03-04 15:41:56,483 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 72 transitions. [2025-03-04 15:41:56,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 15:41:56,485 INFO L432 stractBuchiCegarLoop]: Abstraction has 55 states and 72 transitions. [2025-03-04 15:41:56,485 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 15:41:56,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 72 transitions. [2025-03-04 15:41:56,486 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2025-03-04 15:41:56,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:56,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:56,487 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:56,487 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1] [2025-03-04 15:41:56,487 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume main_~length~0#1 < 1;main_~length~0#1 := 1;" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:56,487 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:56,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,488 INFO L85 PathProgramCache]: Analyzing trace with hash -694079213, now seen corresponding path program 1 times [2025-03-04 15:41:56,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665159618] [2025-03-04 15:41:56,488 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:56,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,492 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-03-04 15:41:56,497 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-03-04 15:41:56,497 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,526 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2025-03-04 15:41:56,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:56,527 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665159618] [2025-03-04 15:41:56,527 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665159618] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:56,527 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1753787188] [2025-03-04 15:41:56,527 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:56,527 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:56,527 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:56,529 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:56,530 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-04 15:41:56,570 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-03-04 15:41:56,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-03-04 15:41:56,580 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,580 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,581 INFO L256 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 15:41:56,582 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:56,601 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-04 15:41:56,601 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-04 15:41:56,601 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1753787188] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:41:56,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-04 15:41:56,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2025-03-04 15:41:56,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443246795] [2025-03-04 15:41:56,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:41:56,603 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:41:56,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1106302, now seen corresponding path program 1 times [2025-03-04 15:41:56,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071654964] [2025-03-04 15:41:56,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:56,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,604 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 15:41:56,605 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 15:41:56,605 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,605 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,605 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:56,605 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 15:41:56,606 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 15:41:56,606 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,606 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,607 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:56,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:56,665 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-04 15:41:56,665 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-04 15:41:56,665 INFO L87 Difference]: Start difference. First operand 55 states and 72 transitions. cyclomatic complexity: 23 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:56,678 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2025-03-04 15:41:56,678 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 44 transitions. [2025-03-04 15:41:56,679 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:56,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 29 states and 37 transitions. [2025-03-04 15:41:56,679 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-03-04 15:41:56,679 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-03-04 15:41:56,679 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 37 transitions. [2025-03-04 15:41:56,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:56,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-03-04 15:41:56,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 37 transitions. [2025-03-04 15:41:56,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2025-03-04 15:41:56,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 28 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:56,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2025-03-04 15:41:56,681 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-03-04 15:41:56,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 15:41:56,681 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-03-04 15:41:56,681 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 15:41:56,681 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 37 transitions. [2025-03-04 15:41:56,681 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:56,682 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:56,682 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:56,682 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:56,682 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:56,682 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:56,682 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:56,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1102903438, now seen corresponding path program 2 times [2025-03-04 15:41:56,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [789037556] [2025-03-04 15:41:56,683 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,686 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 22 statements into 2 equivalence classes. [2025-03-04 15:41:56,690 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 22 of 22 statements. [2025-03-04 15:41:56,690 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:56,690 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,690 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:56,691 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-03-04 15:41:56,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-03-04 15:41:56,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,697 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:56,697 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,697 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 10 times [2025-03-04 15:41:56,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681366749] [2025-03-04 15:41:56,697 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:41:56,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,698 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:41:56,699 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:56,699 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:41:56,699 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,699 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:56,699 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:56,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:56,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:56,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:56,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:56,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:56,701 INFO L85 PathProgramCache]: Analyzing trace with hash 966718384, now seen corresponding path program 2 times [2025-03-04 15:41:56,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:56,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247482919] [2025-03-04 15:41:56,701 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:56,704 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-03-04 15:41:56,708 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-03-04 15:41:56,708 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:56,708 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,878 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:56,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:56,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247482919] [2025-03-04 15:41:56,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [247482919] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:56,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [971264895] [2025-03-04 15:41:56,879 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:56,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:56,879 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:56,882 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:56,884 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-04 15:41:56,918 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-03-04 15:41:56,930 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-03-04 15:41:56,931 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:56,931 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:56,932 INFO L256 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-03-04 15:41:56,933 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:56,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:41:57,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-04 15:41:57,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-04 15:41:57,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-04 15:41:57,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-04 15:41:57,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:41:57,151 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:57,152 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:57,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-04 15:41:57,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-04 15:41:57,303 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:57,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [971264895] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:57,303 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:57,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2025-03-04 15:41:57,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436613473] [2025-03-04 15:41:57,304 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:57,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:57,336 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-03-04 15:41:57,337 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2025-03-04 15:41:57,337 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. cyclomatic complexity: 11 Second operand has 27 states, 26 states have (on average 1.9230769230769231) internal successors, (50), 27 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:57,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:57,482 INFO L93 Difference]: Finished difference Result 35 states and 43 transitions. [2025-03-04 15:41:57,482 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 43 transitions. [2025-03-04 15:41:57,483 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:57,483 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 43 transitions. [2025-03-04 15:41:57,483 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2025-03-04 15:41:57,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2025-03-04 15:41:57,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 43 transitions. [2025-03-04 15:41:57,483 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:57,483 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 43 transitions. [2025-03-04 15:41:57,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 43 transitions. [2025-03-04 15:41:57,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 26. [2025-03-04 15:41:57,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:57,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2025-03-04 15:41:57,484 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-03-04 15:41:57,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-04 15:41:57,485 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-03-04 15:41:57,485 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 15:41:57,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 32 transitions. [2025-03-04 15:41:57,486 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:57,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:57,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:57,486 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:57,486 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:57,486 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:57,486 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:57,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:57,486 INFO L85 PathProgramCache]: Analyzing trace with hash -840736078, now seen corresponding path program 6 times [2025-03-04 15:41:57,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:57,487 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31651573] [2025-03-04 15:41:57,487 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:41:57,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:57,491 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 24 statements into 5 equivalence classes. [2025-03-04 15:41:57,497 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 24 of 24 statements. [2025-03-04 15:41:57,497 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-04 15:41:57,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:57,497 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:57,499 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-03-04 15:41:57,502 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-03-04 15:41:57,502 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:57,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:57,505 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:57,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:57,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 11 times [2025-03-04 15:41:57,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:57,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372841427] [2025-03-04 15:41:57,505 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:41:57,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:57,507 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:57,507 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:57,507 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:41:57,507 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:57,507 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:57,509 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:57,510 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:57,510 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:57,510 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:57,511 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:57,511 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:57,511 INFO L85 PathProgramCache]: Analyzing trace with hash -493519120, now seen corresponding path program 6 times [2025-03-04 15:41:57,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:57,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823887172] [2025-03-04 15:41:57,511 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:41:57,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:57,516 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-03-04 15:41:57,526 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:41:57,526 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-04 15:41:57,526 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:57,736 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:57,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:41:57,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823887172] [2025-03-04 15:41:57,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1823887172] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:41:57,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [169463738] [2025-03-04 15:41:57,737 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:41:57,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:41:57,737 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:57,740 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:41:57,743 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-04 15:41:57,782 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-03-04 15:41:57,796 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:41:57,796 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-04 15:41:57,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:57,797 INFO L256 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-03-04 15:41:57,798 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:57,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:41:58,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:41:58,012 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:58,012 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:41:58,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-04 15:41:58,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-04 15:41:58,184 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:58,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [169463738] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:41:58,184 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:41:58,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 33 [2025-03-04 15:41:58,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446733308] [2025-03-04 15:41:58,184 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:41:58,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:41:58,220 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-03-04 15:41:58,220 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=984, Unknown=0, NotChecked=0, Total=1122 [2025-03-04 15:41:58,220 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. cyclomatic complexity: 8 Second operand has 34 states, 33 states have (on average 2.0) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:58,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:41:58,797 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2025-03-04 15:41:58,797 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2025-03-04 15:41:58,798 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2025-03-04 15:41:58,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 67 transitions. [2025-03-04 15:41:58,798 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2025-03-04 15:41:58,798 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2025-03-04 15:41:58,798 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 67 transitions. [2025-03-04 15:41:58,798 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:41:58,798 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 67 transitions. [2025-03-04 15:41:58,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 67 transitions. [2025-03-04 15:41:58,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 36. [2025-03-04 15:41:58,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2777777777777777) internal successors, (46), 35 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:58,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 46 transitions. [2025-03-04 15:41:58,800 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-03-04 15:41:58,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-03-04 15:41:58,803 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-03-04 15:41:58,803 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 15:41:58,803 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 46 transitions. [2025-03-04 15:41:58,803 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-04 15:41:58,803 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:58,803 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:58,803 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:58,803 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:58,803 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-04 15:41:58,804 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-04 15:41:58,804 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:58,804 INFO L85 PathProgramCache]: Analyzing trace with hash 573126517, now seen corresponding path program 2 times [2025-03-04 15:41:58,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:58,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577120525] [2025-03-04 15:41:58,804 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:41:58,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:58,827 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 18 statements into 2 equivalence classes. [2025-03-04 15:41:58,834 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 18 of 18 statements. [2025-03-04 15:41:58,834 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:41:58,834 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,834 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:58,835 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-03-04 15:41:58,839 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-03-04 15:41:58,839 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:58,839 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,840 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:58,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:58,841 INFO L85 PathProgramCache]: Analyzing trace with hash 1152, now seen corresponding path program 1 times [2025-03-04 15:41:58,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:58,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200323264] [2025-03-04 15:41:58,841 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:41:58,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:58,842 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:58,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:58,843 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:58,843 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,843 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:58,843 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:58,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:58,843 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:58,843 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,844 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:58,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:58,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1018769140, now seen corresponding path program 7 times [2025-03-04 15:41:58,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:58,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11234829] [2025-03-04 15:41:58,845 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:41:58,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:58,849 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-03-04 15:41:58,853 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-03-04 15:41:58,853 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:58,853 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,853 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:41:58,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-03-04 15:41:58,860 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-03-04 15:41:58,860 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:58,860 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:41:58,862 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:41:59,278 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 15:41:59,278 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 15:41:59,278 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 15:41:59,278 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 15:41:59,278 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 15:41:59,278 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,278 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 15:41:59,278 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 15:41:59,278 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration14_Lasso [2025-03-04 15:41:59,278 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 15:41:59,278 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 15:41:59,279 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,282 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,283 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,285 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,286 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,287 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,289 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,291 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,292 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,294 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,395 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:41:59,489 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 15:41:59,489 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 15:41:59,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,490 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,492 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,492 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2025-03-04 15:41:59,493 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,503 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,503 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,504 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,504 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,504 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,504 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,504 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,505 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,510 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2025-03-04 15:41:59,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,511 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,513 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,514 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2025-03-04 15:41:59,515 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,524 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,524 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,524 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,524 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,524 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,525 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,525 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,526 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,531 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2025-03-04 15:41:59,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,533 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2025-03-04 15:41:59,534 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,544 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,544 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,544 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,544 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,544 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,544 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,544 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,545 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,550 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2025-03-04 15:41:59,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,551 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,552 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,553 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2025-03-04 15:41:59,555 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,565 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,565 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,565 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,565 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,565 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,566 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,566 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,567 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,572 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2025-03-04 15:41:59,572 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,572 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,574 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,575 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2025-03-04 15:41:59,575 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,585 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,585 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,585 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,585 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,586 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,586 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,587 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,592 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2025-03-04 15:41:59,592 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,592 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,594 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,595 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2025-03-04 15:41:59,596 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,605 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,605 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,605 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,605 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,605 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,605 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,606 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,606 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,612 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2025-03-04 15:41:59,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,612 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,614 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,614 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2025-03-04 15:41:59,615 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,625 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,625 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,625 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,625 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,625 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,625 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,625 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,626 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,635 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2025-03-04 15:41:59,636 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,636 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,637 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,638 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2025-03-04 15:41:59,639 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,649 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,649 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,649 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,649 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,649 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,649 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,649 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,650 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,656 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2025-03-04 15:41:59,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,658 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2025-03-04 15:41:59,659 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,669 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,670 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:41:59,670 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,670 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,670 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,670 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:41:59,670 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:41:59,671 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,676 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2025-03-04 15:41:59,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,677 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,678 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2025-03-04 15:41:59,680 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,689 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,690 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,690 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,690 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,691 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:59,691 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:59,693 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,698 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2025-03-04 15:41:59,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,698 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,700 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,700 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2025-03-04 15:41:59,701 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,711 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,711 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,711 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,711 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,712 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:59,712 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:59,716 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,721 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2025-03-04 15:41:59,721 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,723 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,723 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2025-03-04 15:41:59,724 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,734 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,734 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,734 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,734 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,736 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:59,736 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:59,739 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:41:59,745 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2025-03-04 15:41:59,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,747 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,747 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2025-03-04 15:41:59,749 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:41:59,758 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:41:59,759 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:41:59,759 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:41:59,759 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:41:59,762 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:41:59,762 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:41:59,769 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 15:41:59,780 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-03-04 15:41:59,780 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2025-03-04 15:41:59,780 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:41:59,780 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:41:59,782 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:41:59,784 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2025-03-04 15:41:59,784 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 15:41:59,796 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-04 15:41:59,796 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 15:41:59,796 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2025-03-04 15:41:59,802 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2025-03-04 15:41:59,808 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-03-04 15:41:59,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:59,823 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-03-04 15:41:59,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-03-04 15:41:59,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:59,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:59,829 INFO L256 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 15:41:59,830 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:59,854 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:41:59,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:41:59,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:41:59,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:41:59,857 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 15:41:59,858 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:41:59,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:41:59,867 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-03-04 15:41:59,867 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 36 states and 46 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:59,878 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 36 states and 46 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 46 states and 59 transitions. Complement of second has 5 states. [2025-03-04 15:41:59,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-04 15:41:59,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:59,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2025-03-04 15:41:59,879 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 18 letters. Loop has 2 letters. [2025-03-04 15:41:59,879 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:59,879 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 20 letters. Loop has 2 letters. [2025-03-04 15:41:59,879 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:59,879 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 18 letters. Loop has 4 letters. [2025-03-04 15:41:59,879 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:41:59,879 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 59 transitions. [2025-03-04 15:41:59,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:59,880 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 38 states and 48 transitions. [2025-03-04 15:41:59,880 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 15:41:59,880 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-04 15:41:59,880 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 48 transitions. [2025-03-04 15:41:59,880 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 15:41:59,880 INFO L218 hiAutomatonCegarLoop]: Abstraction has 38 states and 48 transitions. [2025-03-04 15:41:59,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 48 transitions. [2025-03-04 15:41:59,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2025-03-04 15:41:59,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:41:59,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2025-03-04 15:41:59,881 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-03-04 15:41:59,881 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-03-04 15:41:59,881 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-04 15:41:59,881 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2025-03-04 15:41:59,884 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:41:59,884 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:41:59,884 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:41:59,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:41:59,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:41:59,885 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:59,885 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:41:59,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:41:59,886 INFO L85 PathProgramCache]: Analyzing trace with hash 1446443562, now seen corresponding path program 3 times [2025-03-04 15:41:59,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:41:59,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666639408] [2025-03-04 15:41:59,886 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:41:59,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:41:59,893 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-03-04 15:41:59,912 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-03-04 15:41:59,912 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:41:59,912 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:00,100 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:00,299 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:00,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:42:00,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666639408] [2025-03-04 15:42:00,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666639408] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:42:00,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1335344160] [2025-03-04 15:42:00,299 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:42:00,299 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:42:00,299 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:42:00,301 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:42:00,302 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2025-03-04 15:42:00,339 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-03-04 15:42:00,359 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-03-04 15:42:00,359 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:42:00,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:00,360 INFO L256 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-03-04 15:42:00,364 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:42:00,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-04 15:42:00,486 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-03-04 15:42:00,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 15 [2025-03-04 15:42:00,518 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-03-04 15:42:00,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 19 [2025-03-04 15:42:00,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-04 15:42:00,633 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-04 15:42:00,633 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:42:00,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-04 15:42:00,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-04 15:42:00,874 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-04 15:42:00,874 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1335344160] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:42:00,874 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:42:00,874 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 13] total 37 [2025-03-04 15:42:00,874 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769638686] [2025-03-04 15:42:00,874 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:42:00,874 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:42:00,875 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:00,875 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 12 times [2025-03-04 15:42:00,875 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:00,875 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404799699] [2025-03-04 15:42:00,875 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:42:00,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:00,876 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:00,877 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:00,877 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:42:00,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:00,877 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:42:00,877 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:00,878 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:00,878 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:00,878 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:00,881 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:42:00,912 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:42:00,913 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2025-03-04 15:42:00,913 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=1228, Unknown=0, NotChecked=0, Total=1406 [2025-03-04 15:42:00,913 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 38 states, 37 states have (on average 1.972972972972973) internal successors, (73), 38 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:01,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:42:01,689 INFO L93 Difference]: Finished difference Result 67 states and 80 transitions. [2025-03-04 15:42:01,689 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 80 transitions. [2025-03-04 15:42:01,689 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:01,689 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 54 states and 66 transitions. [2025-03-04 15:42:01,689 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-04 15:42:01,689 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-04 15:42:01,689 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 66 transitions. [2025-03-04 15:42:01,690 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 15:42:01,690 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 66 transitions. [2025-03-04 15:42:01,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 66 transitions. [2025-03-04 15:42:01,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 36. [2025-03-04 15:42:01,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.25) internal successors, (45), 35 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:01,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. [2025-03-04 15:42:01,691 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 45 transitions. [2025-03-04 15:42:01,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2025-03-04 15:42:01,693 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2025-03-04 15:42:01,693 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-04 15:42:01,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 45 transitions. [2025-03-04 15:42:01,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:01,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:42:01,693 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:42:01,694 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:42:01,694 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:42:01,694 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:01,694 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:01,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:01,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1830542678, now seen corresponding path program 7 times [2025-03-04 15:42:01,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:01,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092060853] [2025-03-04 15:42:01,696 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:42:01,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:01,701 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-03-04 15:42:01,708 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-03-04 15:42:01,708 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:01,708 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:01,919 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:01,920 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:42:01,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092060853] [2025-03-04 15:42:01,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1092060853] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:42:01,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1588372055] [2025-03-04 15:42:01,920 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:42:01,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:42:01,920 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:42:01,922 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:42:01,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2025-03-04 15:42:01,967 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-03-04 15:42:01,983 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-03-04 15:42:01,983 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:01,983 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:01,984 INFO L256 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-03-04 15:42:01,985 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:42:02,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-04 15:42:02,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-04 15:42:02,102 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:02,102 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:42:02,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-04 15:42:02,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-04 15:42:02,208 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:02,209 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1588372055] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:42:02,209 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:42:02,209 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 22 [2025-03-04 15:42:02,209 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607464990] [2025-03-04 15:42:02,209 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:42:02,209 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:42:02,209 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:02,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 13 times [2025-03-04 15:42:02,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:02,209 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400290489] [2025-03-04 15:42:02,209 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:42:02,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:02,211 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:02,211 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:02,211 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:02,211 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:02,211 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:42:02,213 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:02,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:02,213 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:02,213 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:02,215 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:42:02,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:42:02,247 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2025-03-04 15:42:02,248 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2025-03-04 15:42:02,248 INFO L87 Difference]: Start difference. First operand 36 states and 45 transitions. cyclomatic complexity: 12 Second operand has 23 states, 22 states have (on average 2.1363636363636362) internal successors, (47), 23 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:02,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:42:02,444 INFO L93 Difference]: Finished difference Result 56 states and 69 transitions. [2025-03-04 15:42:02,444 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 69 transitions. [2025-03-04 15:42:02,444 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-04 15:42:02,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 55 states and 68 transitions. [2025-03-04 15:42:02,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-03-04 15:42:02,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-03-04 15:42:02,445 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 68 transitions. [2025-03-04 15:42:02,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 15:42:02,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 68 transitions. [2025-03-04 15:42:02,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 68 transitions. [2025-03-04 15:42:02,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2025-03-04 15:42:02,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:02,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2025-03-04 15:42:02,446 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-03-04 15:42:02,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-04 15:42:02,447 INFO L432 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-03-04 15:42:02,447 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-04 15:42:02,447 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2025-03-04 15:42:02,447 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:02,447 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:42:02,447 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:42:02,448 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:42:02,448 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:42:02,448 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:02,448 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:02,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:02,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1785078953, now seen corresponding path program 8 times [2025-03-04 15:42:02,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:02,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035219298] [2025-03-04 15:42:02,448 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:42:02,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:02,453 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-03-04 15:42:02,458 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-03-04 15:42:02,458 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:42:02,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:02,566 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:02,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:42:02,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035219298] [2025-03-04 15:42:02,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035219298] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:42:02,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [585792226] [2025-03-04 15:42:02,567 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:42:02,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:42:02,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:42:02,569 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:42:02,571 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2025-03-04 15:42:02,614 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-03-04 15:42:02,626 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-03-04 15:42:02,626 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:42:02,626 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:02,627 INFO L256 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-03-04 15:42:02,628 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:42:02,727 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:02,727 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:42:02,793 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:02,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [585792226] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:42:02,793 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:42:02,793 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2025-03-04 15:42:02,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261656737] [2025-03-04 15:42:02,793 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:42:02,793 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:42:02,794 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:02,794 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 14 times [2025-03-04 15:42:02,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:02,794 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989791311] [2025-03-04 15:42:02,794 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:42:02,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:02,795 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:02,796 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:02,796 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:42:02,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:02,796 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:42:02,796 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:02,796 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:02,796 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:02,797 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:02,797 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:42:02,829 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:42:02,830 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-04 15:42:02,830 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2025-03-04 15:42:02,830 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 22 states, 22 states have (on average 2.3636363636363638) internal successors, (52), 22 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:02,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:42:02,905 INFO L93 Difference]: Finished difference Result 58 states and 70 transitions. [2025-03-04 15:42:02,905 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 70 transitions. [2025-03-04 15:42:02,906 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:02,907 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 47 states and 59 transitions. [2025-03-04 15:42:02,907 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-04 15:42:02,907 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-04 15:42:02,907 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 59 transitions. [2025-03-04 15:42:02,907 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 15:42:02,907 INFO L218 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2025-03-04 15:42:02,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 59 transitions. [2025-03-04 15:42:02,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 42. [2025-03-04 15:42:02,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:02,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2025-03-04 15:42:02,912 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-03-04 15:42:02,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-04 15:42:02,913 INFO L432 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-03-04 15:42:02,913 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-04 15:42:02,913 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2025-03-04 15:42:02,913 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:02,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:42:02,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:42:02,913 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:42:02,915 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:42:02,916 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:02,916 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:02,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:02,916 INFO L85 PathProgramCache]: Analyzing trace with hash 1979675406, now seen corresponding path program 4 times [2025-03-04 15:42:02,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:02,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310008607] [2025-03-04 15:42:02,916 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:42:02,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:02,921 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-03-04 15:42:02,925 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-03-04 15:42:02,927 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-04 15:42:02,928 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:03,178 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:03,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:42:03,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310008607] [2025-03-04 15:42:03,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [310008607] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:42:03,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2008244567] [2025-03-04 15:42:03,178 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:42:03,178 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:42:03,179 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:42:03,181 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:42:03,186 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2025-03-04 15:42:03,230 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-03-04 15:42:03,244 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-03-04 15:42:03,245 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-04 15:42:03,245 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:03,246 INFO L256 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-03-04 15:42:03,247 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:42:03,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-04 15:42:03,304 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-04 15:42:03,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-04 15:42:03,315 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-04 15:42:03,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-04 15:42:03,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-04 15:42:03,406 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:03,406 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:42:03,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-04 15:42:03,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-04 15:42:03,558 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:03,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2008244567] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:42:03,558 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:42:03,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2025-03-04 15:42:03,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411989509] [2025-03-04 15:42:03,558 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:42:03,558 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:42:03,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:03,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 15 times [2025-03-04 15:42:03,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:03,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952122266] [2025-03-04 15:42:03,558 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:42:03,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:03,560 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:03,561 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:03,561 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:42:03,561 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:03,561 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:42:03,562 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:03,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:03,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:03,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:03,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:42:03,608 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:42:03,608 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2025-03-04 15:42:03,609 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2025-03-04 15:42:03,609 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 26 states, 25 states have (on average 2.12) internal successors, (53), 26 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:03,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:42:03,811 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2025-03-04 15:42:03,811 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2025-03-04 15:42:03,811 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:03,811 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 51 states and 62 transitions. [2025-03-04 15:42:03,811 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-04 15:42:03,811 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-04 15:42:03,811 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 62 transitions. [2025-03-04 15:42:03,812 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 15:42:03,812 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 62 transitions. [2025-03-04 15:42:03,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 62 transitions. [2025-03-04 15:42:03,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2025-03-04 15:42:03,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.236842105263158) internal successors, (47), 37 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:03,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 47 transitions. [2025-03-04 15:42:03,813 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-03-04 15:42:03,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-04 15:42:03,814 INFO L432 stractBuchiCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-03-04 15:42:03,814 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-04 15:42:03,814 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 47 transitions. [2025-03-04 15:42:03,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:42:03,814 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:42:03,814 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:42:03,815 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:42:03,815 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:42:03,815 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:03,815 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-04 15:42:03,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:03,815 INFO L85 PathProgramCache]: Analyzing trace with hash 1305105998, now seen corresponding path program 9 times [2025-03-04 15:42:03,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:03,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72917848] [2025-03-04 15:42:03,815 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:42:03,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:03,821 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-03-04 15:42:03,831 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 15:42:03,831 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-03-04 15:42:03,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:04,084 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 12 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:04,084 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:42:04,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72917848] [2025-03-04 15:42:04,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72917848] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:42:04,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1474749589] [2025-03-04 15:42:04,085 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:42:04,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:42:04,085 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:42:04,087 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:42:04,089 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2025-03-04 15:42:04,137 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-03-04 15:42:04,168 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 15:42:04,168 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-03-04 15:42:04,168 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:42:04,169 INFO L256 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-03-04 15:42:04,170 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:42:04,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2025-03-04 15:42:04,474 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2025-03-04 15:42:04,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2025-03-04 15:42:04,476 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 25 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:04,476 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:42:04,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-03-04 15:42:04,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2025-03-04 15:42:04,830 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 20 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:42:04,831 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1474749589] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:42:04,831 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:42:04,831 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 34 [2025-03-04 15:42:04,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121640985] [2025-03-04 15:42:04,831 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:42:04,831 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:42:04,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:42:04,831 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 16 times [2025-03-04 15:42:04,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:42:04,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586708123] [2025-03-04 15:42:04,831 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:42:04,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:42:04,833 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:42:04,833 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:04,833 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:42:04,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:04,834 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:42:04,834 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:42:04,834 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:42:04,834 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:42:04,834 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:42:04,835 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:42:04,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:42:04,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-03-04 15:42:04,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=975, Unknown=0, NotChecked=0, Total=1190 [2025-03-04 15:42:04,867 INFO L87 Difference]: Start difference. First operand 38 states and 47 transitions. cyclomatic complexity: 12 Second operand has 35 states, 34 states have (on average 2.0294117647058822) internal successors, (69), 35 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:42:05,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:42:05,423 INFO L93 Difference]: Finished difference Result 56 states and 66 transitions. [2025-03-04 15:42:05,423 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 66 transitions. [2025-03-04 15:42:05,423 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-03-04 15:42:05,423 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 0 states and 0 transitions. [2025-03-04 15:42:05,423 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2025-03-04 15:42:05,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2025-03-04 15:42:05,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2025-03-04 15:42:05,423 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:42:05,423 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-04 15:42:05,423 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-04 15:42:05,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2025-03-04 15:42:05,424 INFO L432 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-04 15:42:05,424 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-04 15:42:05,424 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2025-03-04 15:42:05,424 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-03-04 15:42:05,424 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-03-04 15:42:05,430 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 03:42:05 BoogieIcfgContainer [2025-03-04 15:42:05,430 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 15:42:05,430 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 15:42:05,430 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 15:42:05,430 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 15:42:05,431 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:41:50" (3/4) ... [2025-03-04 15:42:05,432 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-04 15:42:05,432 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 15:42:05,433 INFO L158 Benchmark]: Toolchain (without parser) took 15069.45ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 111.0MB in the beginning and 251.4MB in the end (delta: -140.4MB). Peak memory consumption was 183.2MB. Max. memory is 16.1GB. [2025-03-04 15:42:05,433 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 123.0MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:42:05,433 INFO L158 Benchmark]: CACSL2BoogieTranslator took 265.32ms. Allocated memory is still 142.6MB. Free memory was 111.0MB in the beginning and 92.9MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-04 15:42:05,433 INFO L158 Benchmark]: Boogie Procedure Inliner took 20.31ms. Allocated memory is still 142.6MB. Free memory was 92.9MB in the beginning and 91.5MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:42:05,433 INFO L158 Benchmark]: Boogie Preprocessor took 16.83ms. Allocated memory is still 142.6MB. Free memory was 91.5MB in the beginning and 90.2MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:42:05,434 INFO L158 Benchmark]: IcfgBuilder took 216.15ms. Allocated memory is still 142.6MB. Free memory was 90.2MB in the beginning and 78.7MB in the end (delta: 11.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:42:05,434 INFO L158 Benchmark]: BuchiAutomizer took 14544.17ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 78.7MB in the beginning and 255.5MB in the end (delta: -176.8MB). Peak memory consumption was 158.0MB. Max. memory is 16.1GB. [2025-03-04 15:42:05,434 INFO L158 Benchmark]: Witness Printer took 2.34ms. Allocated memory is still 469.8MB. Free memory was 255.5MB in the beginning and 251.4MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:42:05,435 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 123.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 265.32ms. Allocated memory is still 142.6MB. Free memory was 111.0MB in the beginning and 92.9MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 20.31ms. Allocated memory is still 142.6MB. Free memory was 92.9MB in the beginning and 91.5MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 16.83ms. Allocated memory is still 142.6MB. Free memory was 91.5MB in the beginning and 90.2MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 216.15ms. Allocated memory is still 142.6MB. Free memory was 90.2MB in the beginning and 78.7MB in the end (delta: 11.5MB). There was no memory consumed. Max. memory is 16.1GB. * BuchiAutomizer took 14544.17ms. Allocated memory was 142.6MB in the beginning and 469.8MB in the end (delta: 327.2MB). Free memory was 78.7MB in the beginning and 255.5MB in the end (delta: -176.8MB). Peak memory consumption was 158.0MB. Max. memory is 16.1GB. * Witness Printer took 2.34ms. Allocated memory is still 469.8MB. Free memory was 255.5MB in the beginning and 251.4MB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 19 terminating modules (17 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 3 locations. One deterministic module has affine ranking function (((long) -1 * j) + length) and consists of 3 locations. 17 modules have a trivial ranking function, the largest among these consists of 38 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 14.5s and 20 iterations. TraceHistogramMax:6. Analysis of lassos took 10.7s. Construction of modules took 1.6s. Büchi inclusion checks took 2.0s. Highest rank in rank-based complementation 3. Minimization of det autom 14. Minimization of nondet autom 5. Automata minimization 0.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 124 StatesRemovedByMinimization, 17 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 691 SdHoareTripleChecker+Valid, 1.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 689 mSDsluCounter, 899 SdHoareTripleChecker+Invalid, 1.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 747 mSDsCounter, 255 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3943 IncrementalHoareTripleChecker+Invalid, 4198 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 255 mSolverCounterUnsat, 152 mSDtfsCounter, 3943 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc10 concLT0 SILN0 SILU7 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital124 mio100 ax100 hnf100 lsp100 ukn74 mio100 lsp54 div137 bol100 ite100 ukn100 eq156 hnf92 smp86 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 20ms VariablesStem: 2 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-03-04 15:42:05,445 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:05,645 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:05,844 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2025-03-04 15:42:06,045 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2025-03-04 15:42:06,245 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:06,445 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:06,647 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-03-04 15:42:06,846 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:07,046 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-03-04 15:42:07,247 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:07,446 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:07,646 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:07,846 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-03-04 15:42:08,047 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-03-04 15:42:08,247 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-03-04 15:42:08,448 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-03-04 15:42:08,649 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE