./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-acceleration/array_2-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-acceleration/array_2-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 866342b97e5be917007cb97e07a0644c7c9d2aa9b428c32cf026d727d672a191 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:03:29,384 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:03:29,436 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:03:29,441 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:03:29,441 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:03:29,441 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:03:29,462 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:03:29,462 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:03:29,463 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:03:29,463 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:03:29,464 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:03:29,464 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:03:29,464 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:03:29,464 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:03:29,465 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:03:29,465 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:03:29,465 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:03:29,466 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:03:29,466 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:03:29,467 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:03:29,467 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:03:29,467 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:03:29,467 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 866342b97e5be917007cb97e07a0644c7c9d2aa9b428c32cf026d727d672a191 [2025-03-04 16:03:29,708 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:03:29,713 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:03:29,715 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:03:29,716 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:03:29,716 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:03:29,717 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-acceleration/array_2-2.i [2025-03-04 16:03:30,867 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b15127720/2ba5ba4c524945e2816155d6f3b071b4/FLAGf2e677500 [2025-03-04 16:03:31,094 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:03:31,095 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-acceleration/array_2-2.i [2025-03-04 16:03:31,103 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b15127720/2ba5ba4c524945e2816155d6f3b071b4/FLAGf2e677500 [2025-03-04 16:03:31,438 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b15127720/2ba5ba4c524945e2816155d6f3b071b4 [2025-03-04 16:03:31,440 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:03:31,441 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:03:31,442 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:03:31,442 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:03:31,445 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:03:31,446 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,446 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3867afc8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31, skipping insertion in model container [2025-03-04 16:03:31,446 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,457 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:03:31,558 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:03:31,565 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:03:31,579 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:03:31,591 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:03:31,592 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31 WrapperNode [2025-03-04 16:03:31,592 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:03:31,593 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:03:31,593 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:03:31,593 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:03:31,597 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,600 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,613 INFO L138 Inliner]: procedures = 16, calls = 18, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 49 [2025-03-04 16:03:31,614 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:03:31,614 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:03:31,615 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:03:31,615 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:03:31,619 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,620 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,621 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,633 INFO L175 MemorySlicer]: Split 8 memory accesses to 3 slices as follows [2, 3, 3]. 38 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 3 writes are split as follows [0, 1, 2]. [2025-03-04 16:03:31,634 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,635 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,639 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,639 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,640 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,640 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,646 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:03:31,647 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:03:31,648 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:03:31,648 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:03:31,648 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (1/1) ... [2025-03-04 16:03:31,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:31,662 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:31,676 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:31,678 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:03:31,696 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-03-04 16:03:31,697 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:03:31,698 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:03:31,698 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 16:03:31,698 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-04 16:03:31,698 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-03-04 16:03:31,698 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 16:03:31,750 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:03:31,751 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:03:31,843 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2025-03-04 16:03:31,843 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:03:31,852 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:03:31,852 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 16:03:31,853 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:03:31 BoogieIcfgContainer [2025-03-04 16:03:31,853 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:03:31,853 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:03:31,853 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:03:31,857 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:03:31,857 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:03:31,858 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:03:31" (1/3) ... [2025-03-04 16:03:31,860 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50147633 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:03:31, skipping insertion in model container [2025-03-04 16:03:31,860 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:03:31,861 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:03:31" (2/3) ... [2025-03-04 16:03:31,861 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@50147633 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:03:31, skipping insertion in model container [2025-03-04 16:03:31,861 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:03:31,861 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:03:31" (3/3) ... [2025-03-04 16:03:31,862 INFO L363 chiAutomizerObserver]: Analyzing ICFG array_2-2.i [2025-03-04 16:03:31,899 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:03:31,899 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:03:31,899 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:03:31,899 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:03:31,900 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:03:31,900 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:03:31,900 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:03:31,900 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:03:31,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:31,914 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 16:03:31,915 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:31,915 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:31,917 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 16:03:31,918 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:31,918 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:03:31,918 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:31,920 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 16:03:31,920 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:31,920 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:31,920 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 16:03:31,920 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:31,925 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" [2025-03-04 16:03:31,925 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-03-04 16:03:31,930 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:31,932 INFO L85 PathProgramCache]: Analyzing trace with hash 1408, now seen corresponding path program 1 times [2025-03-04 16:03:31,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:31,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421761290] [2025-03-04 16:03:31,940 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:31,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:31,995 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:03:32,012 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:03:32,014 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,014 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,014 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:32,020 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:03:32,026 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:03:32,027 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,027 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:32,043 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:32,043 INFO L85 PathProgramCache]: Analyzing trace with hash 43, now seen corresponding path program 1 times [2025-03-04 16:03:32,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:32,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922780783] [2025-03-04 16:03:32,044 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:32,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:32,053 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:32,057 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:32,059 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,059 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,059 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:32,062 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:32,069 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:32,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,074 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:32,075 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:32,076 INFO L85 PathProgramCache]: Analyzing trace with hash 43660, now seen corresponding path program 1 times [2025-03-04 16:03:32,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:32,076 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432245196] [2025-03-04 16:03:32,076 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:32,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:32,091 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:03:32,104 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:03:32,104 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,104 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,104 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:32,109 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:03:32,122 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:03:32,123 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:32,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:32,125 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:32,525 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:03:32,526 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:03:32,526 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:03:32,526 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:03:32,527 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 16:03:32,527 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:32,527 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:03:32,529 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:03:32,529 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_2-2.i_Iteration1_Lasso [2025-03-04 16:03:32,529 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:03:32,529 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:03:32,539 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,554 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,557 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,559 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,738 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,740 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,742 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,744 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,746 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,748 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:03:32,935 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:03:32,937 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 16:03:32,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:32,939 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:32,941 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:32,942 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 16:03:32,944 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:32,955 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:32,955 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:32,955 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:32,955 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:32,960 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 16:03:32,960 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 16:03:32,964 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:32,971 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:32,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:32,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:32,973 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:32,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 16:03:32,977 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:32,987 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:32,987 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:32,987 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:32,987 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:32,990 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 16:03:32,990 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 16:03:32,992 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:32,998 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:32,999 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:32,999 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,000 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,002 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 16:03:33,003 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:33,014 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:33,014 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:03:33,014 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:33,014 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:33,014 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:33,015 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:03:33,015 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:03:33,017 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:33,022 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:33,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:33,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,025 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,026 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 16:03:33,028 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:33,038 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:33,038 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:03:33,038 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:33,038 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:33,038 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:33,038 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:03:33,038 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:03:33,039 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:33,046 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:33,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:33,046 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,049 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,050 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-04 16:03:33,052 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:33,062 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:33,062 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:33,062 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:33,062 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:33,064 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 16:03:33,065 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 16:03:33,071 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:33,076 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-03-04 16:03:33,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:33,077 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,079 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,080 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-04 16:03:33,081 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:33,091 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:33,091 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:33,091 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:33,091 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:33,093 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 16:03:33,093 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 16:03:33,096 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:03:33,103 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:33,103 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:33,103 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,105 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,106 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-04 16:03:33,108 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:03:33,118 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:03:33,118 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:03:33,118 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:03:33,118 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:03:33,123 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 16:03:33,123 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 16:03:33,131 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 16:03:33,154 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-03-04 16:03:33,156 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2025-03-04 16:03:33,157 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:03:33,158 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,160 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,162 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-04 16:03:33,163 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 16:03:33,175 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-04 16:03:33,175 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 16:03:33,176 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 4095*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-04 16:03:33,182 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:33,210 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2025-03-04 16:03:33,216 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-04 16:03:33,217 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-04 16:03:33,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,240 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:03:33,253 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:03:33,254 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,254 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,255 INFO L256 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 16:03:33,256 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:33,265 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,269 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,270 INFO L256 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 16:03:33,270 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:33,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,295 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-04 16:03:33,297 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,319 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 14 states and 19 transitions. Complement of second has 3 states. [2025-03-04 16:03:33,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-03-04 16:03:33,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-03-04 16:03:33,331 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-03-04 16:03:33,332 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:03:33,332 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-03-04 16:03:33,332 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:03:33,332 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-03-04 16:03:33,332 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:03:33,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2025-03-04 16:03:33,333 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 6 states and 8 transitions. [2025-03-04 16:03:33,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2025-03-04 16:03:33,335 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-03-04 16:03:33,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6 states and 8 transitions. [2025-03-04 16:03:33,336 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:33,336 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6 states and 8 transitions. [2025-03-04 16:03:33,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6 states and 8 transitions. [2025-03-04 16:03:33,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6 to 5. [2025-03-04 16:03:33,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 7 transitions. [2025-03-04 16:03:33,355 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5 states and 7 transitions. [2025-03-04 16:03:33,355 INFO L432 stractBuchiCegarLoop]: Abstraction has 5 states and 7 transitions. [2025-03-04 16:03:33,355 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:03:33,355 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5 states and 7 transitions. [2025-03-04 16:03:33,355 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,355 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:33,355 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:33,355 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:03:33,356 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:33,356 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:33,356 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:33,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,359 INFO L85 PathProgramCache]: Analyzing trace with hash 43659, now seen corresponding path program 1 times [2025-03-04 16:03:33,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035357969] [2025-03-04 16:03:33,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:33,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,365 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:03:33,368 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:03:33,369 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,369 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:33,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035357969] [2025-03-04 16:03:33,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035357969] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:03:33,422 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:03:33,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:03:33,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610548210] [2025-03-04 16:03:33,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:03:33,424 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:03:33,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,425 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 1 times [2025-03-04 16:03:33,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,425 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050576505] [2025-03-04 16:03:33,425 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:33,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,428 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,430 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,431 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:33,432 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,434 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,434 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,435 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:33,470 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2025-03-04 16:03:33,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:03:33,528 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:03:33,528 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:03:33,529 INFO L87 Difference]: Start difference. First operand 5 states and 7 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:03:33,536 INFO L93 Difference]: Finished difference Result 6 states and 7 transitions. [2025-03-04 16:03:33,536 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6 states and 7 transitions. [2025-03-04 16:03:33,537 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,537 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6 states to 6 states and 7 transitions. [2025-03-04 16:03:33,537 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-03-04 16:03:33,537 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-03-04 16:03:33,537 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6 states and 7 transitions. [2025-03-04 16:03:33,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:33,537 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6 states and 7 transitions. [2025-03-04 16:03:33,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6 states and 7 transitions. [2025-03-04 16:03:33,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6 to 5. [2025-03-04 16:03:33,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.2) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6 transitions. [2025-03-04 16:03:33,538 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5 states and 6 transitions. [2025-03-04 16:03:33,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:03:33,539 INFO L432 stractBuchiCegarLoop]: Abstraction has 5 states and 6 transitions. [2025-03-04 16:03:33,539 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:03:33,539 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5 states and 6 transitions. [2025-03-04 16:03:33,539 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,539 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:33,539 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:33,539 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-04 16:03:33,539 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:33,540 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:33,540 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:33,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1353471, now seen corresponding path program 1 times [2025-03-04 16:03:33,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869572215] [2025-03-04 16:03:33,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:33,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,544 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 16:03:33,552 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 16:03:33,552 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,552 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,587 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:33,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869572215] [2025-03-04 16:03:33,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869572215] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:03:33,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1026448618] [2025-03-04 16:03:33,588 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:03:33,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:03:33,588 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,590 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-04 16:03:33,617 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 16:03:33,623 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 16:03:33,624 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,624 INFO L256 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-04 16:03:33,625 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:33,635 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,635 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:03:33,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1026448618] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:03:33,650 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:03:33,650 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-04 16:03:33,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983810575] [2025-03-04 16:03:33,650 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:03:33,650 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:03:33,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,650 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 2 times [2025-03-04 16:03:33,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310746365] [2025-03-04 16:03:33,650 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:03:33,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,653 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,655 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,655 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:03:33,655 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,655 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:33,656 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,658 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,658 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,659 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:33,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:03:33,711 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:03:33,711 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:03:33,711 INFO L87 Difference]: Start difference. First operand 5 states and 6 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:03:33,727 INFO L93 Difference]: Finished difference Result 12 states and 13 transitions. [2025-03-04 16:03:33,728 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 13 transitions. [2025-03-04 16:03:33,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,728 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 12 states and 13 transitions. [2025-03-04 16:03:33,728 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-03-04 16:03:33,728 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-03-04 16:03:33,728 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 13 transitions. [2025-03-04 16:03:33,728 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:33,728 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 13 transitions. [2025-03-04 16:03:33,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 13 transitions. [2025-03-04 16:03:33,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 8. [2025-03-04 16:03:33,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:33,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2025-03-04 16:03:33,730 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-04 16:03:33,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:03:33,730 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-04 16:03:33,731 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:03:33,731 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2025-03-04 16:03:33,731 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:33,731 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:33,731 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:33,731 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1] [2025-03-04 16:03:33,731 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:33,732 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:33,732 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:33,732 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,732 INFO L85 PathProgramCache]: Analyzing trace with hash 1666590603, now seen corresponding path program 2 times [2025-03-04 16:03:33,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381455589] [2025-03-04 16:03:33,732 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:03:33,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,739 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-03-04 16:03:33,751 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 16:03:33,751 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:03:33,751 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,842 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:33,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1381455589] [2025-03-04 16:03:33,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1381455589] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:03:33,842 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [750562509] [2025-03-04 16:03:33,842 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:03:33,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:03:33,842 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:33,844 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:03:33,846 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-04 16:03:33,877 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-03-04 16:03:33,890 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 16:03:33,890 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:03:33,890 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:33,891 INFO L256 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 16:03:33,892 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:33,909 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,909 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:03:33,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:33,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [750562509] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:03:33,959 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:03:33,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-04 16:03:33,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [319365023] [2025-03-04 16:03:33,960 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:03:33,960 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:03:33,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:33,960 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 3 times [2025-03-04 16:03:33,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:33,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773173639] [2025-03-04 16:03:33,960 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:03:33,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:33,964 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,968 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,968 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:03:33,969 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,969 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:33,970 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:33,972 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:33,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:33,976 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:33,977 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:34,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:03:34,043 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:03:34,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:03:34,044 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:34,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:03:34,076 INFO L93 Difference]: Finished difference Result 24 states and 25 transitions. [2025-03-04 16:03:34,076 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 25 transitions. [2025-03-04 16:03:34,077 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:34,078 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 24 states and 25 transitions. [2025-03-04 16:03:34,078 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-03-04 16:03:34,078 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-03-04 16:03:34,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 25 transitions. [2025-03-04 16:03:34,078 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:34,078 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 25 transitions. [2025-03-04 16:03:34,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 25 transitions. [2025-03-04 16:03:34,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 14. [2025-03-04 16:03:34,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:34,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2025-03-04 16:03:34,079 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-04 16:03:34,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-04 16:03:34,084 INFO L432 stractBuchiCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-04 16:03:34,084 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:03:34,084 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 15 transitions. [2025-03-04 16:03:34,084 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:34,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:34,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:34,085 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1] [2025-03-04 16:03:34,085 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:34,085 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:34,085 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:34,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:34,085 INFO L85 PathProgramCache]: Analyzing trace with hash 552481547, now seen corresponding path program 3 times [2025-03-04 16:03:34,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:34,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278032676] [2025-03-04 16:03:34,086 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:03:34,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:34,099 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-03-04 16:03:34,137 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 16:03:34,137 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 16:03:34,137 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:34,363 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:34,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:34,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278032676] [2025-03-04 16:03:34,363 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1278032676] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:03:34,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844682623] [2025-03-04 16:03:34,363 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:03:34,363 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:03:34,363 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:34,365 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:03:34,367 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-04 16:03:34,411 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-03-04 16:03:34,700 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 16:03:34,700 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 16:03:34,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:34,702 INFO L256 TraceCheckSpWp]: Trace formula consists of 234 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-04 16:03:34,704 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:34,732 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:34,732 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:03:34,907 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:34,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1844682623] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:03:34,907 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:03:34,907 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-04 16:03:34,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015456924] [2025-03-04 16:03:34,907 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:03:34,908 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:03:34,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:34,908 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 4 times [2025-03-04 16:03:34,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:34,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308613652] [2025-03-04 16:03:34,908 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:03:34,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:34,912 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-04 16:03:34,915 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:34,915 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:03:34,915 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:34,915 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:34,916 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:34,917 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:34,917 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:34,917 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:34,921 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:34,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:03:34,981 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-04 16:03:34,981 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-04 16:03:34,982 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 1.125) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:35,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:03:35,057 INFO L93 Difference]: Finished difference Result 48 states and 49 transitions. [2025-03-04 16:03:35,058 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 49 transitions. [2025-03-04 16:03:35,058 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:35,061 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 48 states and 49 transitions. [2025-03-04 16:03:35,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2025-03-04 16:03:35,062 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2025-03-04 16:03:35,062 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 49 transitions. [2025-03-04 16:03:35,062 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:35,062 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48 states and 49 transitions. [2025-03-04 16:03:35,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 49 transitions. [2025-03-04 16:03:35,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 26. [2025-03-04 16:03:35,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.0384615384615385) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:35,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2025-03-04 16:03:35,065 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-04 16:03:35,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-04 16:03:35,067 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-04 16:03:35,067 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:03:35,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 27 transitions. [2025-03-04 16:03:35,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:35,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:35,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:35,068 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1] [2025-03-04 16:03:35,068 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:35,068 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:35,070 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:35,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:35,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1601017333, now seen corresponding path program 4 times [2025-03-04 16:03:35,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:35,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449417389] [2025-03-04 16:03:35,070 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:03:35,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:35,100 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-03-04 16:03:35,122 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-03-04 16:03:35,122 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:03:35,122 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:35,673 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:35,673 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:35,673 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449417389] [2025-03-04 16:03:35,673 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449417389] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:03:35,673 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [757234131] [2025-03-04 16:03:35,673 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:03:35,673 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:03:35,673 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:35,676 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:03:35,677 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-04 16:03:35,742 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-03-04 16:03:35,783 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-03-04 16:03:35,783 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:03:35,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:35,788 INFO L256 TraceCheckSpWp]: Trace formula consists of 462 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-04 16:03:35,789 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:03:35,832 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:35,832 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:03:36,433 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:36,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [757234131] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:03:36,434 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:03:36,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-03-04 16:03:36,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360714257] [2025-03-04 16:03:36,435 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:03:36,435 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:03:36,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:36,435 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 5 times [2025-03-04 16:03:36,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:36,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735190931] [2025-03-04 16:03:36,435 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:03:36,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:36,439 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:36,441 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:36,441 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:03:36,441 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:36,441 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:03:36,441 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:03:36,442 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:03:36,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:03:36,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:03:36,444 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:03:36,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:03:36,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-04 16:03:36,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-04 16:03:36,501 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 1.0625) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:36,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:03:36,669 INFO L93 Difference]: Finished difference Result 96 states and 97 transitions. [2025-03-04 16:03:36,669 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 97 transitions. [2025-03-04 16:03:36,671 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:36,671 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 96 states and 97 transitions. [2025-03-04 16:03:36,671 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 50 [2025-03-04 16:03:36,671 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 50 [2025-03-04 16:03:36,671 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 97 transitions. [2025-03-04 16:03:36,672 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:03:36,672 INFO L218 hiAutomatonCegarLoop]: Abstraction has 96 states and 97 transitions. [2025-03-04 16:03:36,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 97 transitions. [2025-03-04 16:03:36,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 50. [2025-03-04 16:03:36,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.02) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:03:36,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2025-03-04 16:03:36,674 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-04 16:03:36,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-04 16:03:36,676 INFO L432 stractBuchiCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-04 16:03:36,676 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:03:36,676 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 51 transitions. [2025-03-04 16:03:36,677 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:03:36,677 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:03:36,677 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:03:36,677 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1] [2025-03-04 16:03:36,677 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:03:36,677 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~mem7#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~#B~0#1.base, main_~#B~0#1.offset, main_~i~0#1, main_~tmp~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(8192);call main_~#B~0#1.base, main_~#B~0#1.offset := #Ultimate.allocOnStack(8192);havoc main_~i~0#1;havoc main_~tmp~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume main_~i~0#1 < 2048;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;call write~int#2(main_#t~nondet2#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1;main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" "assume !(main_~i~0#1 < 2048);main_~i~0#1 := 0;" [2025-03-04 16:03:36,679 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 2048;call main_#t~mem4#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);main_~tmp~0#1 := main_#t~mem4#1;havoc main_#t~mem4#1;call write~int#2(main_~tmp~0#1, main_~#B~0#1.base, main_~#B~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" [2025-03-04 16:03:36,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:03:36,680 INFO L85 PathProgramCache]: Analyzing trace with hash 617306123, now seen corresponding path program 5 times [2025-03-04 16:03:36,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:03:36,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088008812] [2025-03-04 16:03:36,680 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:03:36,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:03:36,721 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes. [2025-03-04 16:03:36,858 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 49 of 49 statements. [2025-03-04 16:03:36,858 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-04 16:03:36,858 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:03:38,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:03:38,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:03:38,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088008812] [2025-03-04 16:03:38,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2088008812] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:03:38,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [549598709] [2025-03-04 16:03:38,570 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:03:38,571 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:03:38,571 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:03:38,577 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:03:38,578 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-04 16:03:38,716 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes.