./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/array-examples/standard_sentinel-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/array-examples/standard_sentinel-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:43:20,742 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:43:20,811 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 15:43:20,815 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:43:20,816 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:43:20,816 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:43:20,832 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:43:20,833 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:43:20,833 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:43:20,833 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:43:20,833 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:43:20,833 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:43:20,833 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:43:20,833 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:43:20,834 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:43:20,834 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:43:20,834 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:43:20,835 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:43:20,835 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:43:20,836 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:43:20,836 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:43:20,836 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:43:20,836 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 [2025-03-04 15:43:21,038 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:43:21,046 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:43:21,048 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:43:21,049 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:43:21,050 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:43:21,050 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/array-examples/standard_sentinel-2.i [2025-03-04 15:43:22,146 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b26a45a6b/b0f9a74963d04f999ddd055dcf7ad741/FLAG479a9d710 [2025-03-04 15:43:22,422 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:43:22,422 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i [2025-03-04 15:43:22,430 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b26a45a6b/b0f9a74963d04f999ddd055dcf7ad741/FLAG479a9d710 [2025-03-04 15:43:22,447 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b26a45a6b/b0f9a74963d04f999ddd055dcf7ad741 [2025-03-04 15:43:22,448 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:43:22,452 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:43:22,453 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:43:22,453 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:43:22,457 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:43:22,458 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,459 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d4ca3d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22, skipping insertion in model container [2025-03-04 15:43:22,459 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,472 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:43:22,579 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:43:22,588 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:43:22,602 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:43:22,615 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:43:22,616 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22 WrapperNode [2025-03-04 15:43:22,616 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:43:22,616 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:43:22,616 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:43:22,617 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:43:22,620 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,626 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,639 INFO L138 Inliner]: procedures = 16, calls = 14, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 49 [2025-03-04 15:43:22,639 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:43:22,640 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:43:22,640 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:43:22,640 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:43:22,645 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,645 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,647 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,656 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2025-03-04 15:43:22,656 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,656 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,660 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,664 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,665 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,665 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,666 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:43:22,667 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:43:22,667 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:43:22,667 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:43:22,668 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (1/1) ... [2025-03-04 15:43:22,673 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:22,682 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:22,693 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:22,696 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-04 15:43:22,719 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:43:22,720 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:43:22,720 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 15:43:22,720 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-04 15:43:22,720 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 15:43:22,768 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:43:22,770 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:43:22,886 INFO L1325 $ProcedureCfgBuilder]: dead code at ProgramPoint L16: call ULTIMATE.dealloc(main_~#a~0#1.base, main_~#a~0#1.offset);havoc main_~#a~0#1.base, main_~#a~0#1.offset; [2025-03-04 15:43:22,891 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-04 15:43:22,891 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:43:22,898 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:43:22,899 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:43:22,899 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:43:22 BoogieIcfgContainer [2025-03-04 15:43:22,899 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:43:22,900 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:43:22,900 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:43:22,904 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:43:22,905 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:43:22,906 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:43:22" (1/3) ... [2025-03-04 15:43:22,907 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@660ce92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:43:22, skipping insertion in model container [2025-03-04 15:43:22,907 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:43:22,908 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:43:22" (2/3) ... [2025-03-04 15:43:22,908 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@660ce92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:43:22, skipping insertion in model container [2025-03-04 15:43:22,908 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:43:22,908 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:43:22" (3/3) ... [2025-03-04 15:43:22,909 INFO L363 chiAutomizerObserver]: Analyzing ICFG standard_sentinel-2.i [2025-03-04 15:43:22,949 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:43:22,950 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:43:22,950 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:43:22,950 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:43:22,950 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:43:22,950 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:43:22,951 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:43:22,951 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:43:22,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:22,966 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-04 15:43:22,966 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:22,966 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:22,969 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:43:22,970 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:43:22,970 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:43:22,970 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:22,972 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-04 15:43:22,972 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:22,972 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:22,972 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:43:22,973 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 15:43:22,977 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" [2025-03-04 15:43:22,978 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-04 15:43:22,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:22,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1696, now seen corresponding path program 1 times [2025-03-04 15:43:22,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:22,990 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401916592] [2025-03-04 15:43:22,990 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:22,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:23,042 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:23,058 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:23,059 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,059 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,059 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:23,063 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:23,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:23,068 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,069 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,082 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:23,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:23,084 INFO L85 PathProgramCache]: Analyzing trace with hash 52, now seen corresponding path program 1 times [2025-03-04 15:43:23,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:23,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695778549] [2025-03-04 15:43:23,085 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:23,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:23,091 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:43:23,095 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:43:23,099 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,099 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,099 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:23,101 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:43:23,103 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:43:23,105 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,106 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:23,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:23,109 INFO L85 PathProgramCache]: Analyzing trace with hash 52597, now seen corresponding path program 1 times [2025-03-04 15:43:23,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:23,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966798951] [2025-03-04 15:43:23,110 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:23,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:23,116 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:43:23,128 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:43:23,128 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,128 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,128 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:23,131 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 15:43:23,136 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 15:43:23,136 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:23,136 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:23,138 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:23,411 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 15:43:23,411 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 15:43:23,411 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 15:43:23,412 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 15:43:23,412 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 15:43:23,412 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,412 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 15:43:23,412 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 15:43:23,412 INFO L132 ssoRankerPreferences]: Filename of dumped script: standard_sentinel-2.i_Iteration1_Lasso [2025-03-04 15:43:23,412 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 15:43:23,412 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 15:43:23,422 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,429 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,445 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,447 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,589 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,592 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,594 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,596 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,600 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,602 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 15:43:23,761 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 15:43:23,764 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 15:43:23,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,765 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,767 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,769 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 15:43:23,770 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,781 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,781 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:43:23,782 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,782 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,782 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,785 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:43:23,785 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:43:23,787 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,794 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-04 15:43:23,794 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,794 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,796 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 15:43:23,799 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,809 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,809 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,809 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,809 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,811 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:43:23,812 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:43:23,815 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,821 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-04 15:43:23,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,823 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,825 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 15:43:23,826 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,837 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,837 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,837 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,837 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,840 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:43:23,841 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:43:23,844 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,850 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-04 15:43:23,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,851 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,853 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,855 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 15:43:23,855 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,865 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,865 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 15:43:23,865 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,865 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,865 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,865 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 15:43:23,865 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 15:43:23,866 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,872 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2025-03-04 15:43:23,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,873 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,875 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,877 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-04 15:43:23,878 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,887 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,888 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,888 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,888 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,890 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:43:23,890 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:43:23,893 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,899 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2025-03-04 15:43:23,899 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,900 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,901 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,903 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-04 15:43:23,904 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,914 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,914 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,914 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,914 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,916 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:43:23,916 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:43:23,920 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 15:43:23,928 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2025-03-04 15:43:23,928 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,928 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,934 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-04 15:43:23,935 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 15:43:23,945 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 15:43:23,945 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 15:43:23,945 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 15:43:23,945 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 15:43:23,951 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-04 15:43:23,951 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-04 15:43:23,958 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 15:43:23,981 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2025-03-04 15:43:23,983 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2025-03-04 15:43:23,984 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:43:23,984 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:23,987 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:43:23,989 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-04 15:43:23,990 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 15:43:24,001 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-04 15:43:24,002 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 15:43:24,002 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-04 15:43:24,009 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2025-03-04 15:43:24,025 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-03-04 15:43:24,034 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-04 15:43:24,035 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-04 15:43:24,048 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,057 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,063 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,063 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,063 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,064 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 15:43:24,065 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:24,076 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 15:43:24,078 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 15:43:24,079 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,079 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,079 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 15:43:24,080 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:24,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,099 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-04 15:43:24,100 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,125 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 17 states and 23 transitions. Complement of second has 3 states. [2025-03-04 15:43:24,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-03-04 15:43:24,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-03-04 15:43:24,134 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-03-04 15:43:24,134 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:43:24,134 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-03-04 15:43:24,134 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:43:24,134 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-03-04 15:43:24,134 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 15:43:24,136 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 23 transitions. [2025-03-04 15:43:24,139 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,140 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 7 states and 9 transitions. [2025-03-04 15:43:24,141 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-03-04 15:43:24,141 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:24,141 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 9 transitions. [2025-03-04 15:43:24,142 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:24,142 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-04 15:43:24,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 9 transitions. [2025-03-04 15:43:24,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2025-03-04 15:43:24,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.2857142857142858) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2025-03-04 15:43:24,161 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-04 15:43:24,161 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-04 15:43:24,161 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:43:24,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 9 transitions. [2025-03-04 15:43:24,161 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:24,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:24,162 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-04 15:43:24,162 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:24,164 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:24,164 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:24,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1630494, now seen corresponding path program 1 times [2025-03-04 15:43:24,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763910202] [2025-03-04 15:43:24,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:24,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,170 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 15:43:24,175 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 15:43:24,176 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,176 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:24,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763910202] [2025-03-04 15:43:24,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763910202] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:43:24,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:43:24,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:43:24,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834855556] [2025-03-04 15:43:24,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:43:24,237 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:24,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,238 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 1 times [2025-03-04 15:43:24,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742196725] [2025-03-04 15:43:24,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:24,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,240 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,244 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,244 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,244 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,244 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:24,245 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,249 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,249 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:24,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:24,285 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:43:24,286 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:43:24,287 INFO L87 Difference]: Start difference. First operand 7 states and 9 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:24,293 INFO L93 Difference]: Finished difference Result 7 states and 8 transitions. [2025-03-04 15:43:24,293 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7 states and 8 transitions. [2025-03-04 15:43:24,294 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,294 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7 states to 7 states and 8 transitions. [2025-03-04 15:43:24,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:24,295 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:24,295 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2025-03-04 15:43:24,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:24,295 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-04 15:43:24,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2025-03-04 15:43:24,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2025-03-04 15:43:24,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2025-03-04 15:43:24,296 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-04 15:43:24,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:43:24,297 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-04 15:43:24,297 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:43:24,298 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2025-03-04 15:43:24,298 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:24,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:24,298 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-03-04 15:43:24,298 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:24,298 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:24,298 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:24,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,298 INFO L85 PathProgramCache]: Analyzing trace with hash 50546355, now seen corresponding path program 1 times [2025-03-04 15:43:24,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235734161] [2025-03-04 15:43:24,299 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:24,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,305 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-04 15:43:24,312 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-04 15:43:24,313 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,314 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,363 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:24,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235734161] [2025-03-04 15:43:24,363 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235734161] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:24,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447606211] [2025-03-04 15:43:24,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:43:24,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:24,364 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:24,365 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:24,367 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-04 15:43:24,399 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-04 15:43:24,405 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-04 15:43:24,405 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,405 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,406 INFO L256 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-04 15:43:24,406 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:24,417 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,417 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:43:24,430 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,430 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447606211] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:43:24,430 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:43:24,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2025-03-04 15:43:24,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104046581] [2025-03-04 15:43:24,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:43:24,430 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:24,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 2 times [2025-03-04 15:43:24,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892453445] [2025-03-04 15:43:24,431 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:43:24,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,433 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,434 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,434 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:43:24,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,434 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:24,435 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,436 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,436 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,436 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,437 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:24,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:24,464 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 15:43:24,464 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-04 15:43:24,464 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:24,474 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2025-03-04 15:43:24,474 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2025-03-04 15:43:24,474 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,474 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2025-03-04 15:43:24,474 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:24,474 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:24,474 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2025-03-04 15:43:24,474 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:24,474 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-04 15:43:24,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2025-03-04 15:43:24,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2025-03-04 15:43:24,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2025-03-04 15:43:24,478 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-04 15:43:24,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 15:43:24,479 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-04 15:43:24,479 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:43:24,479 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2025-03-04 15:43:24,479 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,479 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:24,479 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:24,479 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1, 1] [2025-03-04 15:43:24,479 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:24,479 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:24,479 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:24,480 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1706025378, now seen corresponding path program 2 times [2025-03-04 15:43:24,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54277605] [2025-03-04 15:43:24,480 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:43:24,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,487 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 2 equivalence classes. [2025-03-04 15:43:24,496 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-03-04 15:43:24,496 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:43:24,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,573 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-03-04 15:43:24,598 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:24,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54277605] [2025-03-04 15:43:24,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [54277605] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:24,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1796199767] [2025-03-04 15:43:24,598 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:43:24,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:24,598 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:24,600 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:24,601 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-04 15:43:24,627 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 2 equivalence classes. [2025-03-04 15:43:24,637 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-03-04 15:43:24,637 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 15:43:24,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,638 INFO L256 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 15:43:24,638 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:24,653 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,653 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:43:24,704 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1796199767] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:43:24,705 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:43:24,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2025-03-04 15:43:24,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840566524] [2025-03-04 15:43:24,705 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:43:24,705 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:24,705 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 3 times [2025-03-04 15:43:24,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,705 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770858590] [2025-03-04 15:43:24,705 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:43:24,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,708 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,709 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,709 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:43:24,709 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,709 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:24,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:24,710 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:24,710 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:24,710 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:24,711 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:24,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:24,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 15:43:24,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-04 15:43:24,741 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:24,756 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2025-03-04 15:43:24,756 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2025-03-04 15:43:24,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,757 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2025-03-04 15:43:24,757 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:24,757 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:24,757 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2025-03-04 15:43:24,757 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:24,757 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-04 15:43:24,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2025-03-04 15:43:24,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2025-03-04 15:43:24,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:24,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2025-03-04 15:43:24,758 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-04 15:43:24,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-04 15:43:24,758 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-04 15:43:24,758 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:43:24,758 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2025-03-04 15:43:24,759 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:24,759 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:24,759 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:24,759 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1, 1] [2025-03-04 15:43:24,759 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:24,759 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:24,759 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:24,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:24,759 INFO L85 PathProgramCache]: Analyzing trace with hash 828821054, now seen corresponding path program 3 times [2025-03-04 15:43:24,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:24,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2092542405] [2025-03-04 15:43:24,759 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:43:24,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:24,767 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 14 statements into 6 equivalence classes. [2025-03-04 15:43:24,791 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:43:24,793 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:43:24,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:24,990 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:24,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:24,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2092542405] [2025-03-04 15:43:24,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2092542405] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:24,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1099322073] [2025-03-04 15:43:24,991 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:43:24,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:24,991 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:24,993 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:24,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-04 15:43:25,025 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 14 statements into 6 equivalence classes. [2025-03-04 15:43:25,072 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 14 of 14 statements. [2025-03-04 15:43:25,072 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-04 15:43:25,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:25,074 INFO L256 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-04 15:43:25,075 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:25,101 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:25,102 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:43:25,283 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:25,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1099322073] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:43:25,283 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:43:25,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2025-03-04 15:43:25,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134395960] [2025-03-04 15:43:25,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:43:25,284 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:25,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:25,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 4 times [2025-03-04 15:43:25,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:25,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207346076] [2025-03-04 15:43:25,284 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:43:25,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:25,288 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:43:25,290 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:25,290 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:43:25,290 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:25,290 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:25,290 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:25,291 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:25,291 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:25,291 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:25,292 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:25,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:25,331 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-04 15:43:25,332 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-04 15:43:25,333 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.12) internal successors, (28), 25 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:25,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:25,366 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2025-03-04 15:43:25,367 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2025-03-04 15:43:25,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:25,368 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2025-03-04 15:43:25,368 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:25,368 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:25,368 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2025-03-04 15:43:25,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:25,369 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-04 15:43:25,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2025-03-04 15:43:25,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2025-03-04 15:43:25,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:25,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2025-03-04 15:43:25,370 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-04 15:43:25,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-04 15:43:25,371 INFO L432 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-04 15:43:25,371 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:43:25,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2025-03-04 15:43:25,371 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:25,371 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:25,371 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:25,372 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1, 1] [2025-03-04 15:43:25,372 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:25,372 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:25,372 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:25,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:25,373 INFO L85 PathProgramCache]: Analyzing trace with hash 908064254, now seen corresponding path program 4 times [2025-03-04 15:43:25,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:25,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800606308] [2025-03-04 15:43:25,373 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:43:25,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:25,384 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 26 statements into 2 equivalence classes. [2025-03-04 15:43:25,398 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:43:25,401 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:43:25,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:25,869 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:25,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:25,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800606308] [2025-03-04 15:43:25,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [800606308] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:25,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1421513066] [2025-03-04 15:43:25,869 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:43:25,869 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:25,869 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:25,871 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:25,872 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-04 15:43:25,913 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 26 statements into 2 equivalence classes. [2025-03-04 15:43:25,939 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:43:25,940 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:43:25,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:25,941 INFO L256 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-04 15:43:25,943 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:25,998 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:25,998 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:43:26,595 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:26,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1421513066] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:43:26,595 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:43:26,595 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2025-03-04 15:43:26,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60269314] [2025-03-04 15:43:26,596 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:43:26,596 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:26,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:26,597 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 5 times [2025-03-04 15:43:26,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:26,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52839387] [2025-03-04 15:43:26,598 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:43:26,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:26,600 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:26,601 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:26,601 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:43:26,601 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:26,601 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:26,604 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:26,606 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:26,606 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:26,606 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:26,608 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:26,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:26,637 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-04 15:43:26,638 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-04 15:43:26,638 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.0612244897959184) internal successors, (52), 49 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:26,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:26,687 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2025-03-04 15:43:26,687 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2025-03-04 15:43:26,687 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:26,688 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2025-03-04 15:43:26,688 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:26,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:26,688 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2025-03-04 15:43:26,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:26,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-04 15:43:26,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2025-03-04 15:43:26,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2025-03-04 15:43:26,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:26,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2025-03-04 15:43:26,690 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-04 15:43:26,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-04 15:43:26,691 INFO L432 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-04 15:43:26,691 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:43:26,691 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2025-03-04 15:43:26,691 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:26,692 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:26,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:26,692 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1, 1] [2025-03-04 15:43:26,692 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:26,692 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:26,692 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:26,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:26,693 INFO L85 PathProgramCache]: Analyzing trace with hash -280402562, now seen corresponding path program 5 times [2025-03-04 15:43:26,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:26,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327174778] [2025-03-04 15:43:26,693 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:43:26,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:26,712 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 50 statements into 24 equivalence classes. [2025-03-04 15:43:26,776 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 50 of 50 statements. [2025-03-04 15:43:26,776 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-04 15:43:26,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:28,203 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:28,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:28,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327174778] [2025-03-04 15:43:28,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1327174778] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:28,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1707642701] [2025-03-04 15:43:28,203 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:43:28,204 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:28,204 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:28,206 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:28,206 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-04 15:43:28,270 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 50 statements into 24 equivalence classes. [2025-03-04 15:43:44,017 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 50 of 50 statements. [2025-03-04 15:43:44,018 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-04 15:43:44,018 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:44,033 INFO L256 TraceCheckSpWp]: Trace formula consists of 550 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-04 15:43:44,035 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 15:43:44,111 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:44,111 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 15:43:45,996 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:45,997 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1707642701] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 15:43:45,997 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 15:43:45,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 96 [2025-03-04 15:43:45,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017269663] [2025-03-04 15:43:45,997 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 15:43:45,997 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 15:43:45,997 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:45,998 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 6 times [2025-03-04 15:43:45,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:45,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498143137] [2025-03-04 15:43:45,998 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:43:45,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:46,000 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:46,001 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:46,002 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:43:46,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:46,002 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:43:46,002 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:43:46,003 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:43:46,003 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:43:46,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:43:46,004 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:43:46,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:43:46,030 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-04 15:43:46,032 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-04 15:43:46,033 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 96 states, 96 states have (on average 1.0208333333333333) internal successors, (98), 96 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:46,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:43:46,139 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2025-03-04 15:43:46,139 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2025-03-04 15:43:46,144 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:46,145 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2025-03-04 15:43:46,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-04 15:43:46,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-04 15:43:46,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2025-03-04 15:43:46,145 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:43:46,145 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-04 15:43:46,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2025-03-04 15:43:46,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2025-03-04 15:43:46,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:43:46,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2025-03-04 15:43:46,150 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-04 15:43:46,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-04 15:43:46,152 INFO L432 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-04 15:43:46,152 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:43:46,152 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2025-03-04 15:43:46,153 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-04 15:43:46,153 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:43:46,153 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:43:46,154 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1, 1, 1] [2025-03-04 15:43:46,154 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 15:43:46,154 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-04 15:43:46,157 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-04 15:43:46,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:43:46,158 INFO L85 PathProgramCache]: Analyzing trace with hash -658979714, now seen corresponding path program 6 times [2025-03-04 15:43:46,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:43:46,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75199434] [2025-03-04 15:43:46,158 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:43:46,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:43:46,201 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 98 statements into 48 equivalence classes. [2025-03-04 15:43:46,386 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 98 of 98 statements. [2025-03-04 15:43:46,386 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-03-04 15:43:46,386 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:43:50,549 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:43:50,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:43:50,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75199434] [2025-03-04 15:43:50,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75199434] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 15:43:50,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1038749561] [2025-03-04 15:43:50,549 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:43:50,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 15:43:50,550 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:43:50,551 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 15:43:50,552 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-04 15:43:50,672 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 98 statements into 48 equivalence classes.