./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_nondet_test4-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_nondet_test4-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6c763f0e5b490114d32e3c1ec14f736caee058b985a7ee61f4d14ad6758e2996 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:39:20,912 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:39:20,963 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:39:20,969 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:39:20,970 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:39:20,970 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:39:20,985 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:39:20,985 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:39:20,985 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:39:20,985 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:39:20,985 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:39:20,986 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:39:20,986 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:39:20,986 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:39:20,986 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:39:20,987 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:39:20,987 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:39:20,987 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:39:20,987 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6c763f0e5b490114d32e3c1ec14f736caee058b985a7ee61f4d14ad6758e2996 [2025-03-04 16:39:21,183 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:39:21,191 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:39:21,192 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:39:21,193 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:39:21,194 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:39:21,195 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_nondet_test4-2.i [2025-03-04 16:39:22,284 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/96a342902/26bfac94c36545f796f065184cc61732/FLAG3f2e03356 [2025-03-04 16:39:22,632 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:39:22,633 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_nondet_test4-2.i [2025-03-04 16:39:22,648 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/96a342902/26bfac94c36545f796f065184cc61732/FLAG3f2e03356 [2025-03-04 16:39:22,663 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/96a342902/26bfac94c36545f796f065184cc61732 [2025-03-04 16:39:22,664 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:39:22,666 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:39:22,666 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:39:22,667 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:39:22,669 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:39:22,670 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:39:22" (1/1) ... [2025-03-04 16:39:22,671 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@51d6a3f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:22, skipping insertion in model container [2025-03-04 16:39:22,671 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:39:22" (1/1) ... [2025-03-04 16:39:22,701 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:39:23,036 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:39:23,047 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:39:23,144 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:39:23,164 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:39:23,164 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23 WrapperNode [2025-03-04 16:39:23,164 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:39:23,165 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:39:23,165 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:39:23,165 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:39:23,169 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,194 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,239 INFO L138 Inliner]: procedures = 176, calls = 377, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 1666 [2025-03-04 16:39:23,242 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:39:23,243 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:39:23,243 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:39:23,243 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:39:23,249 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,249 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,259 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,349 INFO L175 MemorySlicer]: Split 357 memory accesses to 2 slices as follows [2, 355]. 99 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 90 writes are split as follows [0, 90]. [2025-03-04 16:39:23,349 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,349 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,384 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,390 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,393 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,396 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,401 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:39:23,402 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:39:23,402 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:39:23,402 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:39:23,403 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (1/1) ... [2025-03-04 16:39:23,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:39:23,416 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:39:23,427 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:39:23,430 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:39:23,447 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-03-04 16:39:23,450 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-03-04 16:39:23,450 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-03-04 16:39:23,450 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-03-04 16:39:23,451 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 16:39:23,451 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:39:23,451 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-04 16:39:23,451 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:39:23,451 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:39:23,632 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:39:23,633 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:39:25,036 INFO L? ?]: Removed 403 outVars from TransFormulas that were not future-live. [2025-03-04 16:39:25,036 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:39:25,080 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:39:25,083 INFO L336 CfgBuilder]: Removed 2 assume(true) statements. [2025-03-04 16:39:25,083 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:39:25 BoogieIcfgContainer [2025-03-04 16:39:25,083 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:39:25,084 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:39:25,084 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:39:25,088 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:39:25,089 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:39:25,089 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:39:22" (1/3) ... [2025-03-04 16:39:25,091 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@646cad07 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:39:25, skipping insertion in model container [2025-03-04 16:39:25,091 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:39:25,092 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:39:23" (2/3) ... [2025-03-04 16:39:25,092 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@646cad07 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:39:25, skipping insertion in model container [2025-03-04 16:39:25,092 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:39:25,092 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:39:25" (3/3) ... [2025-03-04 16:39:25,093 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_nondet_test4-2.i [2025-03-04 16:39:25,134 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:39:25,135 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:39:25,135 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:39:25,135 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:39:25,135 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:39:25,135 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:39:25,135 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:39:25,136 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:39:25,140 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:25,165 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 417 [2025-03-04 16:39:25,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:25,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:25,171 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:25,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:39:25,171 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:39:25,172 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:25,179 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 417 [2025-03-04 16:39:25,179 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:25,179 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:25,179 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:25,179 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:39:25,184 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:25,184 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume !true;" "assume !true;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:25,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:25,187 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 1 times [2025-03-04 16:39:25,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:25,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733619194] [2025-03-04 16:39:25,192 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:25,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:25,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:25,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:25,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:25,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:25,251 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:25,256 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:25,259 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:25,259 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:25,259 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:25,282 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:25,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:25,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1095389337, now seen corresponding path program 1 times [2025-03-04 16:39:25,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:25,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089787670] [2025-03-04 16:39:25,284 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:25,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:25,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 16:39:25,300 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 16:39:25,303 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:25,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:25,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:25,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:25,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089787670] [2025-03-04 16:39:25,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089787670] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:25,333 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:25,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:39:25,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875254022] [2025-03-04 16:39:25,333 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:25,335 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:25,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:25,356 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-04 16:39:25,356 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-04 16:39:25,359 INFO L87 Difference]: Start difference. First operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:25,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:25,448 INFO L93 Difference]: Finished difference Result 428 states and 618 transitions. [2025-03-04 16:39:25,449 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 618 transitions. [2025-03-04 16:39:25,453 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:39:25,461 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 424 states and 613 transitions. [2025-03-04 16:39:25,462 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 424 [2025-03-04 16:39:25,464 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 424 [2025-03-04 16:39:25,464 INFO L73 IsDeterministic]: Start isDeterministic. Operand 424 states and 613 transitions. [2025-03-04 16:39:25,467 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:25,468 INFO L218 hiAutomatonCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:39:25,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states and 613 transitions. [2025-03-04 16:39:25,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 424. [2025-03-04 16:39:25,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.4412470023980815) internal successors, (601), 416 states have internal predecessors, (601), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:25,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 613 transitions. [2025-03-04 16:39:25,497 INFO L240 hiAutomatonCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:39:25,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-04 16:39:25,500 INFO L432 stractBuchiCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:39:25,500 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:39:25,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 424 states and 613 transitions. [2025-03-04 16:39:25,503 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:39:25,503 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:25,503 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:25,504 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:25,504 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:25,504 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:25,511 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem28#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem28#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem29#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem29#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem30#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem31#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem33#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem34#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem34#1 % 256 % 4294967296 else main_#t~mem34#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem177#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem177#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem178#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem178#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem179#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem179#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem180#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem180#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem181#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem181#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem182#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem183#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem183#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem183#1 % 256 % 4294967296 else main_#t~mem183#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:25,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:25,512 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 2 times [2025-03-04 16:39:25,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:25,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439481475] [2025-03-04 16:39:25,512 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:39:25,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:25,519 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:25,521 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:25,521 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:25,521 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:25,522 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:25,525 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:25,528 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:25,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:25,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:25,537 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:25,537 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:25,538 INFO L85 PathProgramCache]: Analyzing trace with hash -1619480487, now seen corresponding path program 1 times [2025-03-04 16:39:25,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:25,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363231758] [2025-03-04 16:39:25,538 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:25,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:25,624 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:39:25,649 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:39:25,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:25,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:26,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:26,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:26,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363231758] [2025-03-04 16:39:26,082 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1363231758] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:26,082 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:26,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:39:26,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045931175] [2025-03-04 16:39:26,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:26,083 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:26,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:26,083 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:39:26,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:39:26,084 INFO L87 Difference]: Start difference. First operand 424 states and 613 transitions. cyclomatic complexity: 193 Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:26,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:26,270 INFO L93 Difference]: Finished difference Result 427 states and 609 transitions. [2025-03-04 16:39:26,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 609 transitions. [2025-03-04 16:39:26,273 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 418 [2025-03-04 16:39:26,277 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 427 states and 609 transitions. [2025-03-04 16:39:26,278 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 427 [2025-03-04 16:39:26,279 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 427 [2025-03-04 16:39:26,279 INFO L73 IsDeterministic]: Start isDeterministic. Operand 427 states and 609 transitions. [2025-03-04 16:39:26,280 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:26,282 INFO L218 hiAutomatonCegarLoop]: Abstraction has 427 states and 609 transitions. [2025-03-04 16:39:26,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states and 609 transitions. [2025-03-04 16:39:26,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 424. [2025-03-04 16:39:26,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.4244604316546763) internal successors, (594), 416 states have internal predecessors, (594), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:26,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 606 transitions. [2025-03-04 16:39:26,293 INFO L240 hiAutomatonCegarLoop]: Abstraction has 424 states and 606 transitions. [2025-03-04 16:39:26,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:39:26,294 INFO L432 stractBuchiCegarLoop]: Abstraction has 424 states and 606 transitions. [2025-03-04 16:39:26,294 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:39:26,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 424 states and 606 transitions. [2025-03-04 16:39:26,296 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:39:26,296 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:26,296 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:26,298 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:26,298 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:26,298 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:26,298 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem177#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem177#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem178#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem178#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem179#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem179#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem180#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem180#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem181#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem181#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem182#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem183#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem183#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem183#1 % 256 % 4294967296 else main_#t~mem183#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:26,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:26,299 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 3 times [2025-03-04 16:39:26,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:26,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828395469] [2025-03-04 16:39:26,299 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:39:26,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:26,308 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:26,311 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:26,313 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:39:26,313 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:26,313 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:26,316 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:26,317 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:26,317 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:26,318 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:26,325 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:26,326 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:26,326 INFO L85 PathProgramCache]: Analyzing trace with hash 668906835, now seen corresponding path program 1 times [2025-03-04 16:39:26,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:26,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361836204] [2025-03-04 16:39:26,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:26,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:26,391 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:39:26,431 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:39:26,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:26,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:26,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:26,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:26,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361836204] [2025-03-04 16:39:26,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1361836204] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:26,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:26,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:39:26,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812631660] [2025-03-04 16:39:26,700 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:26,700 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:26,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:26,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:39:26,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:39:26,700 INFO L87 Difference]: Start difference. First operand 424 states and 606 transitions. cyclomatic complexity: 186 Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:26,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:26,837 INFO L93 Difference]: Finished difference Result 382 states and 529 transitions. [2025-03-04 16:39:26,838 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 382 states and 529 transitions. [2025-03-04 16:39:26,839 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 373 [2025-03-04 16:39:26,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 382 states to 382 states and 529 transitions. [2025-03-04 16:39:26,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 382 [2025-03-04 16:39:26,842 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 382 [2025-03-04 16:39:26,842 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 529 transitions. [2025-03-04 16:39:26,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:26,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:39:26,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 529 transitions. [2025-03-04 16:39:26,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2025-03-04 16:39:26,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 375 states have (on average 1.3786666666666667) internal successors, (517), 374 states have internal predecessors, (517), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:26,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 529 transitions. [2025-03-04 16:39:26,848 INFO L240 hiAutomatonCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:39:26,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:39:26,849 INFO L432 stractBuchiCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:39:26,849 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:39:26,849 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 382 states and 529 transitions. [2025-03-04 16:39:26,850 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 373 [2025-03-04 16:39:26,850 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:26,850 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:26,851 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:26,851 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:26,851 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:26,851 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:26,852 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:26,852 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 4 times [2025-03-04 16:39:26,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:26,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45516321] [2025-03-04 16:39:26,852 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:39:26,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:26,858 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:39:26,859 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:26,859 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:39:26,859 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:26,860 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:26,862 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:26,863 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:26,863 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:26,863 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:26,867 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:26,867 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:26,867 INFO L85 PathProgramCache]: Analyzing trace with hash 1594030298, now seen corresponding path program 1 times [2025-03-04 16:39:26,867 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:26,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969348493] [2025-03-04 16:39:26,868 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:26,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:26,922 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:39:27,297 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:39:27,301 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:27,302 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:27,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:27,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:27,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969348493] [2025-03-04 16:39:27,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [969348493] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:27,754 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:27,754 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:39:27,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161133032] [2025-03-04 16:39:27,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:27,755 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:27,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:27,755 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:39:27,755 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:39:27,755 INFO L87 Difference]: Start difference. First operand 382 states and 529 transitions. cyclomatic complexity: 151 Second operand has 6 states, 6 states have (on average 23.666666666666668) internal successors, (142), 6 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:28,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:28,359 INFO L93 Difference]: Finished difference Result 416 states and 573 transitions. [2025-03-04 16:39:28,359 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 573 transitions. [2025-03-04 16:39:28,361 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:39:28,363 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 573 transitions. [2025-03-04 16:39:28,363 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:39:28,363 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:39:28,364 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 573 transitions. [2025-03-04 16:39:28,364 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:28,364 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 573 transitions. [2025-03-04 16:39:28,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 573 transitions. [2025-03-04 16:39:28,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 409. [2025-03-04 16:39:28,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 402 states have (on average 1.3681592039800996) internal successors, (550), 401 states have internal predecessors, (550), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:28,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 562 transitions. [2025-03-04 16:39:28,370 INFO L240 hiAutomatonCegarLoop]: Abstraction has 409 states and 562 transitions. [2025-03-04 16:39:28,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:39:28,371 INFO L432 stractBuchiCegarLoop]: Abstraction has 409 states and 562 transitions. [2025-03-04 16:39:28,371 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:39:28,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 409 states and 562 transitions. [2025-03-04 16:39:28,373 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 400 [2025-03-04 16:39:28,373 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:28,373 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:28,374 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:28,374 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:28,374 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:28,375 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:28,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:28,375 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 5 times [2025-03-04 16:39:28,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:28,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81064665] [2025-03-04 16:39:28,376 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:39:28,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:28,383 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:28,384 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:28,384 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:28,385 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:28,385 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:28,388 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:28,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:28,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:28,389 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:28,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:28,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:28,394 INFO L85 PathProgramCache]: Analyzing trace with hash 982187058, now seen corresponding path program 1 times [2025-03-04 16:39:28,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:28,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380627544] [2025-03-04 16:39:28,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:28,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:28,447 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:39:28,469 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:39:28,469 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:28,469 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:28,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:28,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:28,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380627544] [2025-03-04 16:39:28,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [380627544] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:28,612 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:28,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:39:28,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213065910] [2025-03-04 16:39:28,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:28,612 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:28,612 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:28,613 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:39:28,613 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:39:28,613 INFO L87 Difference]: Start difference. First operand 409 states and 562 transitions. cyclomatic complexity: 157 Second operand has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:28,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:28,719 INFO L93 Difference]: Finished difference Result 403 states and 552 transitions. [2025-03-04 16:39:28,719 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 403 states and 552 transitions. [2025-03-04 16:39:28,721 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 394 [2025-03-04 16:39:28,724 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 403 states to 403 states and 552 transitions. [2025-03-04 16:39:28,724 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 403 [2025-03-04 16:39:28,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 403 [2025-03-04 16:39:28,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 403 states and 552 transitions. [2025-03-04 16:39:28,726 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:28,726 INFO L218 hiAutomatonCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:39:28,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states and 552 transitions. [2025-03-04 16:39:28,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 403. [2025-03-04 16:39:28,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 403 states, 396 states have (on average 1.3636363636363635) internal successors, (540), 395 states have internal predecessors, (540), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:28,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 403 states to 403 states and 552 transitions. [2025-03-04 16:39:28,731 INFO L240 hiAutomatonCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:39:28,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:39:28,732 INFO L432 stractBuchiCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:39:28,732 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:39:28,732 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 403 states and 552 transitions. [2025-03-04 16:39:28,733 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 394 [2025-03-04 16:39:28,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:28,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:28,734 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:28,734 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:28,734 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:28,736 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:28,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:28,736 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 6 times [2025-03-04 16:39:28,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:28,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193307100] [2025-03-04 16:39:28,736 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:39:28,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:28,745 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:28,746 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:28,746 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:39:28,746 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:28,746 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:28,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:28,749 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:28,749 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:28,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:28,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:28,755 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:28,756 INFO L85 PathProgramCache]: Analyzing trace with hash 755661365, now seen corresponding path program 1 times [2025-03-04 16:39:28,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:28,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424512095] [2025-03-04 16:39:28,757 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:28,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:28,802 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:39:28,837 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:39:28,837 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:28,837 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:29,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:29,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:29,118 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424512095] [2025-03-04 16:39:29,118 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [424512095] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:29,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:29,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:29,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728893774] [2025-03-04 16:39:29,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:29,121 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:29,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:29,121 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:29,121 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:29,122 INFO L87 Difference]: Start difference. First operand 403 states and 552 transitions. cyclomatic complexity: 153 Second operand has 7 states, 7 states have (on average 20.428571428571427) internal successors, (143), 7 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:29,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:29,683 INFO L93 Difference]: Finished difference Result 416 states and 571 transitions. [2025-03-04 16:39:29,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 571 transitions. [2025-03-04 16:39:29,685 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:39:29,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 571 transitions. [2025-03-04 16:39:29,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:39:29,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:39:29,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 571 transitions. [2025-03-04 16:39:29,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:29,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 571 transitions. [2025-03-04 16:39:29,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 571 transitions. [2025-03-04 16:39:29,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 413. [2025-03-04 16:39:29,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 406 states have (on average 1.3669950738916257) internal successors, (555), 405 states have internal predecessors, (555), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:29,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 567 transitions. [2025-03-04 16:39:29,698 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 567 transitions. [2025-03-04 16:39:29,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:29,699 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 567 transitions. [2025-03-04 16:39:29,699 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:39:29,699 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 567 transitions. [2025-03-04 16:39:29,700 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2025-03-04 16:39:29,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:29,702 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:29,702 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:29,702 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:29,703 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:29,703 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:29,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:29,703 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 7 times [2025-03-04 16:39:29,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:29,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271105699] [2025-03-04 16:39:29,704 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:39:29,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:29,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:29,710 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:29,710 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:29,710 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:29,710 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:29,712 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:29,713 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:29,713 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:29,713 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:29,717 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:29,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:29,718 INFO L85 PathProgramCache]: Analyzing trace with hash -188650322, now seen corresponding path program 1 times [2025-03-04 16:39:29,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:29,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517236999] [2025-03-04 16:39:29,718 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:29,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:29,776 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:39:29,909 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:39:29,910 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:29,910 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:30,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:30,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:30,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517236999] [2025-03-04 16:39:30,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1517236999] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:30,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:30,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:39:30,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889570488] [2025-03-04 16:39:30,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:30,206 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:30,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:30,206 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:39:30,206 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:39:30,206 INFO L87 Difference]: Start difference. First operand 413 states and 567 transitions. cyclomatic complexity: 158 Second operand has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:30,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:30,428 INFO L93 Difference]: Finished difference Result 416 states and 570 transitions. [2025-03-04 16:39:30,428 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 570 transitions. [2025-03-04 16:39:30,430 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:39:30,432 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 570 transitions. [2025-03-04 16:39:30,432 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:39:30,432 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:39:30,432 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 570 transitions. [2025-03-04 16:39:30,433 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:30,433 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 570 transitions. [2025-03-04 16:39:30,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 570 transitions. [2025-03-04 16:39:30,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 413. [2025-03-04 16:39:30,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 406 states have (on average 1.3645320197044335) internal successors, (554), 405 states have internal predecessors, (554), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:30,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 566 transitions. [2025-03-04 16:39:30,443 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 566 transitions. [2025-03-04 16:39:30,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:39:30,443 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 566 transitions. [2025-03-04 16:39:30,444 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 16:39:30,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 566 transitions. [2025-03-04 16:39:30,446 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2025-03-04 16:39:30,446 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:30,446 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:30,446 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:30,447 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:30,448 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:30,448 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:30,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:30,448 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 8 times [2025-03-04 16:39:30,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:30,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133548887] [2025-03-04 16:39:30,449 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:39:30,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:30,455 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:30,456 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:30,456 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:30,456 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:30,456 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:30,458 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:30,458 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:30,458 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:30,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:30,463 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:30,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:30,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1067456639, now seen corresponding path program 1 times [2025-03-04 16:39:30,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:30,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353444292] [2025-03-04 16:39:30,464 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:30,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:30,505 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-04 16:39:30,540 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-04 16:39:30,540 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:30,540 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:30,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:30,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:30,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1353444292] [2025-03-04 16:39:30,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1353444292] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:30,940 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:30,940 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:30,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427522858] [2025-03-04 16:39:30,941 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:30,941 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:30,941 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:30,941 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:30,941 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:30,941 INFO L87 Difference]: Start difference. First operand 413 states and 566 transitions. cyclomatic complexity: 157 Second operand has 9 states, 9 states have (on average 16.0) internal successors, (144), 9 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:31,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:31,750 INFO L93 Difference]: Finished difference Result 429 states and 588 transitions. [2025-03-04 16:39:31,750 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 429 states and 588 transitions. [2025-03-04 16:39:31,752 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 420 [2025-03-04 16:39:31,754 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 429 states to 429 states and 588 transitions. [2025-03-04 16:39:31,754 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 429 [2025-03-04 16:39:31,755 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 429 [2025-03-04 16:39:31,755 INFO L73 IsDeterministic]: Start isDeterministic. Operand 429 states and 588 transitions. [2025-03-04 16:39:31,756 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:31,756 INFO L218 hiAutomatonCegarLoop]: Abstraction has 429 states and 588 transitions. [2025-03-04 16:39:31,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states and 588 transitions. [2025-03-04 16:39:31,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 423. [2025-03-04 16:39:31,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 416 states have (on average 1.3653846153846154) internal successors, (568), 415 states have internal predecessors, (568), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:31,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 580 transitions. [2025-03-04 16:39:31,762 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 580 transitions. [2025-03-04 16:39:31,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:39:31,764 INFO L432 stractBuchiCegarLoop]: Abstraction has 423 states and 580 transitions. [2025-03-04 16:39:31,764 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 16:39:31,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 580 transitions. [2025-03-04 16:39:31,766 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 414 [2025-03-04 16:39:31,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:31,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:31,767 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:31,767 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:31,768 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:31,768 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:31,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:31,769 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 9 times [2025-03-04 16:39:31,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:31,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278592727] [2025-03-04 16:39:31,769 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:39:31,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:31,775 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:31,776 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:31,776 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:39:31,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:31,776 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:31,779 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:31,779 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:31,779 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:31,779 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:31,784 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:31,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:31,784 INFO L85 PathProgramCache]: Analyzing trace with hash -759009603, now seen corresponding path program 1 times [2025-03-04 16:39:31,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:31,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395035089] [2025-03-04 16:39:31,785 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:31,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:31,848 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-04 16:39:32,408 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-04 16:39:32,408 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:32,408 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:32,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:32,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:32,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395035089] [2025-03-04 16:39:32,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [395035089] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:32,676 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:32,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:39:32,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100864524] [2025-03-04 16:39:32,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:32,676 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:32,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:32,677 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:39:32,677 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:39:32,677 INFO L87 Difference]: Start difference. First operand 423 states and 580 transitions. cyclomatic complexity: 161 Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:33,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:33,038 INFO L93 Difference]: Finished difference Result 428 states and 586 transitions. [2025-03-04 16:39:33,038 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 586 transitions. [2025-03-04 16:39:33,040 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 419 [2025-03-04 16:39:33,043 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 428 states and 586 transitions. [2025-03-04 16:39:33,043 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 428 [2025-03-04 16:39:33,043 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 428 [2025-03-04 16:39:33,043 INFO L73 IsDeterministic]: Start isDeterministic. Operand 428 states and 586 transitions. [2025-03-04 16:39:33,044 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:33,044 INFO L218 hiAutomatonCegarLoop]: Abstraction has 428 states and 586 transitions. [2025-03-04 16:39:33,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states and 586 transitions. [2025-03-04 16:39:33,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 427. [2025-03-04 16:39:33,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 420 states have (on average 1.3642857142857143) internal successors, (573), 419 states have internal predecessors, (573), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:33,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 585 transitions. [2025-03-04 16:39:33,050 INFO L240 hiAutomatonCegarLoop]: Abstraction has 427 states and 585 transitions. [2025-03-04 16:39:33,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:39:33,051 INFO L432 stractBuchiCegarLoop]: Abstraction has 427 states and 585 transitions. [2025-03-04 16:39:33,051 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 16:39:33,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 427 states and 585 transitions. [2025-03-04 16:39:33,053 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 418 [2025-03-04 16:39:33,053 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:33,053 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:33,053 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:33,053 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:33,053 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:33,054 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:33,054 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:33,054 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 10 times [2025-03-04 16:39:33,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:33,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14791091] [2025-03-04 16:39:33,055 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:39:33,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:33,060 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:39:33,061 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:33,061 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:39:33,061 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:33,061 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:33,063 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:33,064 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:33,064 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:33,064 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:33,068 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:33,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:33,069 INFO L85 PathProgramCache]: Analyzing trace with hash 837588444, now seen corresponding path program 1 times [2025-03-04 16:39:33,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:33,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161993613] [2025-03-04 16:39:33,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:33,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:33,135 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:39:33,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:39:33,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:33,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:33,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:33,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:33,370 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161993613] [2025-03-04 16:39:33,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161993613] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:33,371 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:33,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:39:33,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248096032] [2025-03-04 16:39:33,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:33,371 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:33,371 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:33,371 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:39:33,371 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:39:33,372 INFO L87 Difference]: Start difference. First operand 427 states and 585 transitions. cyclomatic complexity: 162 Second operand has 6 states, 6 states have (on average 24.166666666666668) internal successors, (145), 6 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:33,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:33,736 INFO L93 Difference]: Finished difference Result 430 states and 588 transitions. [2025-03-04 16:39:33,736 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 430 states and 588 transitions. [2025-03-04 16:39:33,738 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:39:33,740 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 430 states to 430 states and 588 transitions. [2025-03-04 16:39:33,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 430 [2025-03-04 16:39:33,741 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 430 [2025-03-04 16:39:33,741 INFO L73 IsDeterministic]: Start isDeterministic. Operand 430 states and 588 transitions. [2025-03-04 16:39:33,741 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:33,741 INFO L218 hiAutomatonCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:39:33,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states and 588 transitions. [2025-03-04 16:39:33,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2025-03-04 16:39:33,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 423 states have (on average 1.3617021276595744) internal successors, (576), 422 states have internal predecessors, (576), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:33,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 588 transitions. [2025-03-04 16:39:33,749 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:39:33,749 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:39:33,750 INFO L432 stractBuchiCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:39:33,750 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 16:39:33,750 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 588 transitions. [2025-03-04 16:39:33,751 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:39:33,751 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:33,751 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:33,752 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:33,752 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:33,752 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:33,752 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:33,753 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:33,753 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 11 times [2025-03-04 16:39:33,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:33,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644869348] [2025-03-04 16:39:33,753 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:39:33,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:33,759 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:33,759 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:33,759 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:33,760 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:33,760 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:33,762 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:33,763 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:33,763 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:33,763 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:33,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:33,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:33,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1419049924, now seen corresponding path program 1 times [2025-03-04 16:39:33,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:33,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129531255] [2025-03-04 16:39:33,768 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:33,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:33,808 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:39:34,026 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:39:34,027 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:34,027 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:34,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:34,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:34,282 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129531255] [2025-03-04 16:39:34,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1129531255] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:34,282 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:34,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:39:34,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307084341] [2025-03-04 16:39:34,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:34,283 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:34,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:34,283 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:39:34,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:39:34,284 INFO L87 Difference]: Start difference. First operand 430 states and 588 transitions. cyclomatic complexity: 162 Second operand has 4 states, 4 states have (on average 36.25) internal successors, (145), 4 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:34,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:34,440 INFO L93 Difference]: Finished difference Result 430 states and 587 transitions. [2025-03-04 16:39:34,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 430 states and 587 transitions. [2025-03-04 16:39:34,443 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:39:34,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 430 states to 430 states and 587 transitions. [2025-03-04 16:39:34,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 430 [2025-03-04 16:39:34,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 430 [2025-03-04 16:39:34,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 430 states and 587 transitions. [2025-03-04 16:39:34,446 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:34,446 INFO L218 hiAutomatonCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:39:34,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states and 587 transitions. [2025-03-04 16:39:34,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2025-03-04 16:39:34,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 423 states have (on average 1.3593380614657211) internal successors, (575), 422 states have internal predecessors, (575), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:34,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 587 transitions. [2025-03-04 16:39:34,453 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:39:34,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:39:34,454 INFO L432 stractBuchiCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:39:34,455 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 16:39:34,455 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 587 transitions. [2025-03-04 16:39:34,456 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:39:34,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:34,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:34,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:34,457 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:34,457 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:34,458 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:34,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:34,458 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 12 times [2025-03-04 16:39:34,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:34,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1562932963] [2025-03-04 16:39:34,459 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:39:34,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:34,466 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:34,470 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:34,470 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:39:34,470 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:34,470 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:34,473 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:34,474 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:34,474 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:34,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:34,480 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:34,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:34,481 INFO L85 PathProgramCache]: Analyzing trace with hash 223389269, now seen corresponding path program 1 times [2025-03-04 16:39:34,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:34,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406857669] [2025-03-04 16:39:34,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:34,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:34,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:39:34,565 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:39:34,565 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:34,565 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:34,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:34,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:34,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406857669] [2025-03-04 16:39:34,801 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406857669] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:34,802 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:34,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:34,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347411526] [2025-03-04 16:39:34,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:34,802 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:34,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:34,802 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:34,802 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:34,803 INFO L87 Difference]: Start difference. First operand 430 states and 587 transitions. cyclomatic complexity: 161 Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:35,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:35,146 INFO L93 Difference]: Finished difference Result 435 states and 593 transitions. [2025-03-04 16:39:35,146 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 435 states and 593 transitions. [2025-03-04 16:39:35,148 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 426 [2025-03-04 16:39:35,150 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 435 states to 435 states and 593 transitions. [2025-03-04 16:39:35,150 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 435 [2025-03-04 16:39:35,151 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 435 [2025-03-04 16:39:35,151 INFO L73 IsDeterministic]: Start isDeterministic. Operand 435 states and 593 transitions. [2025-03-04 16:39:35,151 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:35,151 INFO L218 hiAutomatonCegarLoop]: Abstraction has 435 states and 593 transitions. [2025-03-04 16:39:35,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states and 593 transitions. [2025-03-04 16:39:35,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 434. [2025-03-04 16:39:35,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 427 states have (on average 1.3583138173302107) internal successors, (580), 426 states have internal predecessors, (580), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:35,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 592 transitions. [2025-03-04 16:39:35,158 INFO L240 hiAutomatonCegarLoop]: Abstraction has 434 states and 592 transitions. [2025-03-04 16:39:35,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:35,159 INFO L432 stractBuchiCegarLoop]: Abstraction has 434 states and 592 transitions. [2025-03-04 16:39:35,159 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 16:39:35,159 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 434 states and 592 transitions. [2025-03-04 16:39:35,160 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 425 [2025-03-04 16:39:35,160 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:35,160 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:35,160 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:35,160 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:35,161 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:35,162 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:35,162 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:35,162 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 13 times [2025-03-04 16:39:35,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:35,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658771837] [2025-03-04 16:39:35,162 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:39:35,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:35,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:35,170 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:35,170 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:35,170 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:35,170 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:35,172 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:35,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:35,172 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:35,172 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:35,177 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:35,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:35,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1686981098, now seen corresponding path program 1 times [2025-03-04 16:39:35,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:35,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830944398] [2025-03-04 16:39:35,178 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:35,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:35,220 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-04 16:39:35,245 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-04 16:39:35,245 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:35,245 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:35,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:35,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:35,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830944398] [2025-03-04 16:39:35,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1830944398] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:35,603 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:35,603 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:35,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759556308] [2025-03-04 16:39:35,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:35,603 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:35,604 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:35,604 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:35,604 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:35,604 INFO L87 Difference]: Start difference. First operand 434 states and 592 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.22222222222222) internal successors, (146), 9 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:36,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:36,167 INFO L93 Difference]: Finished difference Result 445 states and 606 transitions. [2025-03-04 16:39:36,167 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 606 transitions. [2025-03-04 16:39:36,169 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:36,170 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 606 transitions. [2025-03-04 16:39:36,170 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2025-03-04 16:39:36,171 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2025-03-04 16:39:36,171 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 606 transitions. [2025-03-04 16:39:36,171 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:36,171 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 606 transitions. [2025-03-04 16:39:36,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 606 transitions. [2025-03-04 16:39:36,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 442. [2025-03-04 16:39:36,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 442 states, 435 states have (on average 1.3563218390804597) internal successors, (590), 434 states have internal predecessors, (590), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:36,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 602 transitions. [2025-03-04 16:39:36,176 INFO L240 hiAutomatonCegarLoop]: Abstraction has 442 states and 602 transitions. [2025-03-04 16:39:36,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:39:36,177 INFO L432 stractBuchiCegarLoop]: Abstraction has 442 states and 602 transitions. [2025-03-04 16:39:36,177 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 16:39:36,177 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 442 states and 602 transitions. [2025-03-04 16:39:36,178 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 433 [2025-03-04 16:39:36,178 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:36,178 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:36,179 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:36,179 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:36,179 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:36,179 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:36,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:36,180 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 14 times [2025-03-04 16:39:36,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:36,180 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69463301] [2025-03-04 16:39:36,180 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:39:36,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:36,186 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:36,186 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:36,186 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:36,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:36,187 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:36,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:36,189 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:36,189 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:36,189 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:36,193 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:36,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:36,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1971323642, now seen corresponding path program 1 times [2025-03-04 16:39:36,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:36,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011533822] [2025-03-04 16:39:36,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:36,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:36,234 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-04 16:39:36,254 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-04 16:39:36,256 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:36,256 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:36,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:36,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:36,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011533822] [2025-03-04 16:39:36,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011533822] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:36,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:36,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:39:36,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [144868592] [2025-03-04 16:39:36,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:36,467 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:36,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:36,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:39:36,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:39:36,468 INFO L87 Difference]: Start difference. First operand 442 states and 602 transitions. cyclomatic complexity: 164 Second operand has 6 states, 6 states have (on average 24.333333333333332) internal successors, (146), 6 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:36,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:36,790 INFO L93 Difference]: Finished difference Result 445 states and 605 transitions. [2025-03-04 16:39:36,790 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 605 transitions. [2025-03-04 16:39:36,792 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:36,793 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:39:36,794 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2025-03-04 16:39:36,794 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2025-03-04 16:39:36,794 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 605 transitions. [2025-03-04 16:39:36,794 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:36,794 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:39:36,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 605 transitions. [2025-03-04 16:39:36,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 445. [2025-03-04 16:39:36,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3538812785388128) internal successors, (593), 437 states have internal predecessors, (593), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:36,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:39:36,800 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:39:36,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:39:36,800 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:39:36,800 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-04 16:39:36,800 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 605 transitions. [2025-03-04 16:39:36,801 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:36,801 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:36,801 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:36,802 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:36,802 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:36,802 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:36,802 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:36,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:36,803 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 15 times [2025-03-04 16:39:36,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:36,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768132480] [2025-03-04 16:39:36,803 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:39:36,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:36,808 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:36,809 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:36,809 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:39:36,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:36,809 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:36,811 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:36,811 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:36,811 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:36,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:36,816 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:36,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:36,816 INFO L85 PathProgramCache]: Analyzing trace with hash -2048233602, now seen corresponding path program 1 times [2025-03-04 16:39:36,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:36,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955557736] [2025-03-04 16:39:36,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:36,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:36,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 147 statements into 1 equivalence classes. [2025-03-04 16:39:36,963 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 147 of 147 statements. [2025-03-04 16:39:36,963 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:36,963 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:37,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:37,182 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:37,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955557736] [2025-03-04 16:39:37,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [955557736] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:37,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:37,183 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:37,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793215059] [2025-03-04 16:39:37,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:37,183 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:37,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:37,183 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:37,183 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:37,183 INFO L87 Difference]: Start difference. First operand 445 states and 605 transitions. cyclomatic complexity: 164 Second operand has 7 states, 7 states have (on average 21.0) internal successors, (147), 7 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:37,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:37,620 INFO L93 Difference]: Finished difference Result 450 states and 611 transitions. [2025-03-04 16:39:37,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 611 transitions. [2025-03-04 16:39:37,622 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 441 [2025-03-04 16:39:37,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 611 transitions. [2025-03-04 16:39:37,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2025-03-04 16:39:37,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2025-03-04 16:39:37,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 611 transitions. [2025-03-04 16:39:37,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:37,625 INFO L218 hiAutomatonCegarLoop]: Abstraction has 450 states and 611 transitions. [2025-03-04 16:39:37,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 611 transitions. [2025-03-04 16:39:37,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 445. [2025-03-04 16:39:37,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3538812785388128) internal successors, (593), 437 states have internal predecessors, (593), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:37,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:39:37,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:39:37,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:37,632 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:39:37,632 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-04 16:39:37,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 605 transitions. [2025-03-04 16:39:37,633 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:37,633 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:37,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:37,634 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:37,634 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:37,634 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:37,634 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:37,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:37,635 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 16 times [2025-03-04 16:39:37,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:37,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589075434] [2025-03-04 16:39:37,635 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:39:37,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:37,641 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:39:37,641 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:37,641 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:39:37,641 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:37,641 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:37,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:37,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:37,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:37,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:37,649 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:37,649 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:37,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1372636177, now seen corresponding path program 1 times [2025-03-04 16:39:37,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:37,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176676509] [2025-03-04 16:39:37,649 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:37,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:37,688 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 147 statements into 1 equivalence classes. [2025-03-04 16:39:37,872 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 147 of 147 statements. [2025-03-04 16:39:37,872 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:37,872 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:38,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:38,288 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:38,288 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176676509] [2025-03-04 16:39:38,288 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176676509] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:38,288 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:38,288 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-04 16:39:38,288 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [377327747] [2025-03-04 16:39:38,288 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:38,288 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:38,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:38,289 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-04 16:39:38,289 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-03-04 16:39:38,289 INFO L87 Difference]: Start difference. First operand 445 states and 605 transitions. cyclomatic complexity: 164 Second operand has 8 states, 8 states have (on average 18.375) internal successors, (147), 8 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:38,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:38,942 INFO L93 Difference]: Finished difference Result 451 states and 612 transitions. [2025-03-04 16:39:38,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 451 states and 612 transitions. [2025-03-04 16:39:38,944 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 442 [2025-03-04 16:39:38,947 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 451 states to 451 states and 612 transitions. [2025-03-04 16:39:38,947 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 451 [2025-03-04 16:39:38,947 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 451 [2025-03-04 16:39:38,948 INFO L73 IsDeterministic]: Start isDeterministic. Operand 451 states and 612 transitions. [2025-03-04 16:39:38,948 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:38,948 INFO L218 hiAutomatonCegarLoop]: Abstraction has 451 states and 612 transitions. [2025-03-04 16:39:38,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 451 states and 612 transitions. [2025-03-04 16:39:38,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 451 to 448. [2025-03-04 16:39:38,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 448 states, 441 states have (on average 1.3514739229024944) internal successors, (596), 440 states have internal predecessors, (596), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:38,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 608 transitions. [2025-03-04 16:39:38,955 INFO L240 hiAutomatonCegarLoop]: Abstraction has 448 states and 608 transitions. [2025-03-04 16:39:38,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:39:38,955 INFO L432 stractBuchiCegarLoop]: Abstraction has 448 states and 608 transitions. [2025-03-04 16:39:38,956 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-04 16:39:38,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 448 states and 608 transitions. [2025-03-04 16:39:38,957 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 439 [2025-03-04 16:39:38,957 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:38,957 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:38,958 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:38,958 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:38,958 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:38,959 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:38,959 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:38,959 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 17 times [2025-03-04 16:39:38,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:38,959 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328394152] [2025-03-04 16:39:38,959 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:39:38,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:38,967 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:38,968 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:38,968 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:38,968 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:38,968 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:38,971 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:38,972 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:38,972 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:38,972 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:38,981 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:38,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:38,982 INFO L85 PathProgramCache]: Analyzing trace with hash -2065062083, now seen corresponding path program 1 times [2025-03-04 16:39:38,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:38,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868409786] [2025-03-04 16:39:38,982 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:38,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:39,033 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-04 16:39:39,399 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-04 16:39:39,399 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:39,399 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:39,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:39,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:39,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868409786] [2025-03-04 16:39:39,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [868409786] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:39,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:39,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:39:39,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29090108] [2025-03-04 16:39:39,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:39,909 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:39,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:39,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:39:39,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:39:39,909 INFO L87 Difference]: Start difference. First operand 448 states and 608 transitions. cyclomatic complexity: 164 Second operand has 13 states, 13 states have (on average 11.384615384615385) internal successors, (148), 13 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:41,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:41,170 INFO L93 Difference]: Finished difference Result 546 states and 748 transitions. [2025-03-04 16:39:41,170 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 546 states and 748 transitions. [2025-03-04 16:39:41,172 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 537 [2025-03-04 16:39:41,175 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 546 states to 546 states and 748 transitions. [2025-03-04 16:39:41,177 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 546 [2025-03-04 16:39:41,178 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 546 [2025-03-04 16:39:41,178 INFO L73 IsDeterministic]: Start isDeterministic. Operand 546 states and 748 transitions. [2025-03-04 16:39:41,178 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:41,178 INFO L218 hiAutomatonCegarLoop]: Abstraction has 546 states and 748 transitions. [2025-03-04 16:39:41,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states and 748 transitions. [2025-03-04 16:39:41,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 454. [2025-03-04 16:39:41,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:41,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:39:41,184 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:41,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:39:41,186 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:41,186 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-04 16:39:41,186 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:39:41,187 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:39:41,187 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:41,187 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:41,188 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:41,188 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:41,188 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:41,188 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:41,189 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:41,189 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 18 times [2025-03-04 16:39:41,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:41,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612538722] [2025-03-04 16:39:41,189 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:39:41,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:41,196 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:41,197 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:41,197 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:39:41,197 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:41,197 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:41,199 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:41,199 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:41,199 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:41,199 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:41,208 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:41,208 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:41,208 INFO L85 PathProgramCache]: Analyzing trace with hash 1494827819, now seen corresponding path program 1 times [2025-03-04 16:39:41,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:41,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678150443] [2025-03-04 16:39:41,209 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:41,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:41,250 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-04 16:39:41,507 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-04 16:39:41,507 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:41,507 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:41,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:41,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:41,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678150443] [2025-03-04 16:39:41,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [678150443] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:41,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:41,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:41,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413604244] [2025-03-04 16:39:41,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:41,757 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:41,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:41,757 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:41,757 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:41,758 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 7 states, 7 states have (on average 21.142857142857142) internal successors, (148), 7 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:42,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:42,350 INFO L93 Difference]: Finished difference Result 461 states and 625 transitions. [2025-03-04 16:39:42,350 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 461 states and 625 transitions. [2025-03-04 16:39:42,354 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 452 [2025-03-04 16:39:42,356 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 461 states to 461 states and 625 transitions. [2025-03-04 16:39:42,356 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2025-03-04 16:39:42,356 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2025-03-04 16:39:42,356 INFO L73 IsDeterministic]: Start isDeterministic. Operand 461 states and 625 transitions. [2025-03-04 16:39:42,357 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:42,357 INFO L218 hiAutomatonCegarLoop]: Abstraction has 461 states and 625 transitions. [2025-03-04 16:39:42,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states and 625 transitions. [2025-03-04 16:39:42,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 454. [2025-03-04 16:39:42,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:42,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:39:42,364 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:42,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:42,364 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:42,364 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-04 16:39:42,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:39:42,365 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:39:42,365 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:42,365 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:42,366 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:42,366 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:42,366 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:42,366 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:42,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:42,367 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 19 times [2025-03-04 16:39:42,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:42,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955248747] [2025-03-04 16:39:42,367 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:39:42,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:42,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:42,374 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:42,374 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:42,374 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:42,374 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:42,376 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:42,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:42,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:42,377 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:42,380 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:42,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:42,382 INFO L85 PathProgramCache]: Analyzing trace with hash -831168952, now seen corresponding path program 1 times [2025-03-04 16:39:42,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:42,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58058706] [2025-03-04 16:39:42,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:42,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:42,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:39:42,441 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:39:42,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:42,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:42,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:42,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:42,680 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58058706] [2025-03-04 16:39:42,680 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [58058706] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:42,680 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:42,680 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:42,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676643858] [2025-03-04 16:39:42,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:42,680 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:42,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:42,681 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:42,681 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:42,681 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:43,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:43,227 INFO L93 Difference]: Finished difference Result 467 states and 632 transitions. [2025-03-04 16:39:43,227 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 467 states and 632 transitions. [2025-03-04 16:39:43,228 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 458 [2025-03-04 16:39:43,229 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 467 states to 467 states and 632 transitions. [2025-03-04 16:39:43,229 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 467 [2025-03-04 16:39:43,230 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 467 [2025-03-04 16:39:43,230 INFO L73 IsDeterministic]: Start isDeterministic. Operand 467 states and 632 transitions. [2025-03-04 16:39:43,230 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:43,230 INFO L218 hiAutomatonCegarLoop]: Abstraction has 467 states and 632 transitions. [2025-03-04 16:39:43,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states and 632 transitions. [2025-03-04 16:39:43,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 457. [2025-03-04 16:39:43,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 457 states, 450 states have (on average 1.3511111111111112) internal successors, (608), 449 states have internal predecessors, (608), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:43,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 620 transitions. [2025-03-04 16:39:43,236 INFO L240 hiAutomatonCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:39:43,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:39:43,237 INFO L432 stractBuchiCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:39:43,237 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-04 16:39:43,237 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 457 states and 620 transitions. [2025-03-04 16:39:43,238 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 448 [2025-03-04 16:39:43,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:43,238 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:43,239 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:43,239 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:43,239 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:43,239 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:43,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:43,239 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 20 times [2025-03-04 16:39:43,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:43,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991452316] [2025-03-04 16:39:43,240 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:39:43,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:43,245 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:43,246 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:43,246 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:43,246 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:43,246 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:43,248 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:43,248 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:43,248 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:43,248 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:43,252 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:43,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:43,253 INFO L85 PathProgramCache]: Analyzing trace with hash 599591432, now seen corresponding path program 1 times [2025-03-04 16:39:43,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:43,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133339624] [2025-03-04 16:39:43,253 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:43,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:43,292 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:39:43,448 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:39:43,448 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:43,448 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:43,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:43,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:43,880 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [133339624] [2025-03-04 16:39:43,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [133339624] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:43,880 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:43,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:39:43,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446901697] [2025-03-04 16:39:43,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:43,881 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:43,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:43,881 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:39:43,881 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:39:43,882 INFO L87 Difference]: Start difference. First operand 457 states and 620 transitions. cyclomatic complexity: 167 Second operand has 6 states, 6 states have (on average 24.833333333333332) internal successors, (149), 6 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:44,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:44,385 INFO L93 Difference]: Finished difference Result 454 states and 616 transitions. [2025-03-04 16:39:44,385 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 454 states and 616 transitions. [2025-03-04 16:39:44,386 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:39:44,388 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:39:44,388 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 454 [2025-03-04 16:39:44,388 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 454 [2025-03-04 16:39:44,388 INFO L73 IsDeterministic]: Start isDeterministic. Operand 454 states and 616 transitions. [2025-03-04 16:39:44,389 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:44,389 INFO L218 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:44,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 454 states and 616 transitions. [2025-03-04 16:39:44,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 454 to 454. [2025-03-04 16:39:44,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:44,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:39:44,395 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:44,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:39:44,396 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:39:44,396 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-03-04 16:39:44,396 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:39:44,397 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:39:44,397 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:44,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:44,398 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:44,398 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:44,398 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:44,399 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:44,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:44,399 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 21 times [2025-03-04 16:39:44,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:44,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722451118] [2025-03-04 16:39:44,399 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:39:44,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:44,408 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:44,408 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:44,408 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:39:44,409 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:44,409 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:44,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:44,411 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:44,411 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:44,412 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:44,417 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:44,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:44,417 INFO L85 PathProgramCache]: Analyzing trace with hash 204534078, now seen corresponding path program 1 times [2025-03-04 16:39:44,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:44,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21624345] [2025-03-04 16:39:44,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:44,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:44,469 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:39:44,963 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:39:44,963 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:44,963 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:45,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:45,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:45,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21624345] [2025-03-04 16:39:45,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21624345] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:45,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:45,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:39:45,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291440506] [2025-03-04 16:39:45,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:45,396 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:45,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:45,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:39:45,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:39:45,396 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 11 states, 11 states have (on average 13.545454545454545) internal successors, (149), 11 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:46,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:46,392 INFO L93 Difference]: Finished difference Result 526 states and 714 transitions. [2025-03-04 16:39:46,392 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 526 states and 714 transitions. [2025-03-04 16:39:46,393 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 517 [2025-03-04 16:39:46,395 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 526 states to 526 states and 714 transitions. [2025-03-04 16:39:46,395 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 526 [2025-03-04 16:39:46,395 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 526 [2025-03-04 16:39:46,395 INFO L73 IsDeterministic]: Start isDeterministic. Operand 526 states and 714 transitions. [2025-03-04 16:39:46,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:46,396 INFO L218 hiAutomatonCegarLoop]: Abstraction has 526 states and 714 transitions. [2025-03-04 16:39:46,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 526 states and 714 transitions. [2025-03-04 16:39:46,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 526 to 457. [2025-03-04 16:39:46,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 457 states, 450 states have (on average 1.3511111111111112) internal successors, (608), 449 states have internal predecessors, (608), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:46,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 620 transitions. [2025-03-04 16:39:46,403 INFO L240 hiAutomatonCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:39:46,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:39:46,404 INFO L432 stractBuchiCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:39:46,404 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-03-04 16:39:46,404 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 457 states and 620 transitions. [2025-03-04 16:39:46,405 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 448 [2025-03-04 16:39:46,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:46,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:46,406 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:46,406 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:46,406 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:46,406 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:46,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:46,407 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 22 times [2025-03-04 16:39:46,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:46,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912974764] [2025-03-04 16:39:46,407 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:39:46,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:46,415 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:39:46,416 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:46,416 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:39:46,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:46,417 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:46,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:46,420 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:46,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:46,420 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:46,426 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:46,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:46,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1116963632, now seen corresponding path program 1 times [2025-03-04 16:39:46,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:46,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873987407] [2025-03-04 16:39:46,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:46,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:46,481 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:39:46,738 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:39:46,739 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:46,739 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:47,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:47,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:47,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873987407] [2025-03-04 16:39:47,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [873987407] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:47,472 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:47,472 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:47,473 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90775312] [2025-03-04 16:39:47,473 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:47,473 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:47,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:47,473 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:47,473 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:47,473 INFO L87 Difference]: Start difference. First operand 457 states and 620 transitions. cyclomatic complexity: 167 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:48,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:48,112 INFO L93 Difference]: Finished difference Result 450 states and 609 transitions. [2025-03-04 16:39:48,112 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 609 transitions. [2025-03-04 16:39:48,113 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 441 [2025-03-04 16:39:48,114 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 609 transitions. [2025-03-04 16:39:48,115 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2025-03-04 16:39:48,115 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2025-03-04 16:39:48,115 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 609 transitions. [2025-03-04 16:39:48,115 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:48,115 INFO L218 hiAutomatonCegarLoop]: Abstraction has 450 states and 609 transitions. [2025-03-04 16:39:48,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 609 transitions. [2025-03-04 16:39:48,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 445. [2025-03-04 16:39:48,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3493150684931507) internal successors, (591), 437 states have internal predecessors, (591), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:48,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 603 transitions. [2025-03-04 16:39:48,121 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:39:48,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:39:48,122 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:39:48,122 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-03-04 16:39:48,122 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 603 transitions. [2025-03-04 16:39:48,123 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:48,123 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:48,123 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:48,124 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:48,124 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:48,124 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:48,124 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:48,125 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:48,125 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 23 times [2025-03-04 16:39:48,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:48,125 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976353525] [2025-03-04 16:39:48,125 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:39:48,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:48,131 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:48,132 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:48,132 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:48,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:48,132 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:48,136 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:48,137 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:48,137 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:48,137 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:48,141 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:48,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:48,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1355361655, now seen corresponding path program 1 times [2025-03-04 16:39:48,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:48,142 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541798101] [2025-03-04 16:39:48,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:48,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:48,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:39:48,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:39:48,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:48,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:48,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:48,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:48,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541798101] [2025-03-04 16:39:48,574 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [541798101] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:48,574 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:48,574 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:48,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502815782] [2025-03-04 16:39:48,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:48,575 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:48,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:48,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:48,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:48,575 INFO L87 Difference]: Start difference. First operand 445 states and 603 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:49,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:49,280 INFO L93 Difference]: Finished difference Result 465 states and 629 transitions. [2025-03-04 16:39:49,280 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 465 states and 629 transitions. [2025-03-04 16:39:49,281 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:39:49,282 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 465 states to 465 states and 629 transitions. [2025-03-04 16:39:49,282 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 465 [2025-03-04 16:39:49,283 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 465 [2025-03-04 16:39:49,283 INFO L73 IsDeterministic]: Start isDeterministic. Operand 465 states and 629 transitions. [2025-03-04 16:39:49,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:49,283 INFO L218 hiAutomatonCegarLoop]: Abstraction has 465 states and 629 transitions. [2025-03-04 16:39:49,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 465 states and 629 transitions. [2025-03-04 16:39:49,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 465 to 445. [2025-03-04 16:39:49,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3493150684931507) internal successors, (591), 437 states have internal predecessors, (591), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:49,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 603 transitions. [2025-03-04 16:39:49,287 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:39:49,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:49,288 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:39:49,288 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-03-04 16:39:49,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 603 transitions. [2025-03-04 16:39:49,289 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:39:49,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:49,289 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:49,289 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:49,290 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:49,290 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:49,290 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:49,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:49,290 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 24 times [2025-03-04 16:39:49,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:49,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512111540] [2025-03-04 16:39:49,291 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:39:49,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:49,297 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:49,299 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:49,299 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:39:49,299 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:49,299 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:49,301 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:49,301 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:49,301 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:49,301 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:49,306 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:49,306 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:49,306 INFO L85 PathProgramCache]: Analyzing trace with hash 898226646, now seen corresponding path program 1 times [2025-03-04 16:39:49,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:49,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829018260] [2025-03-04 16:39:49,307 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:49,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:49,343 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:39:49,550 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:39:49,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:49,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:50,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:50,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:50,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829018260] [2025-03-04 16:39:50,129 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829018260] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:50,130 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:50,130 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:39:50,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119343993] [2025-03-04 16:39:50,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:50,130 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:50,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:50,130 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:39:50,130 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:39:50,131 INFO L87 Difference]: Start difference. First operand 445 states and 603 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.666666666666668) internal successors, (150), 9 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:50,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:50,921 INFO L93 Difference]: Finished difference Result 459 states and 619 transitions. [2025-03-04 16:39:50,921 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 619 transitions. [2025-03-04 16:39:50,922 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 450 [2025-03-04 16:39:50,923 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 459 states and 619 transitions. [2025-03-04 16:39:50,924 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 459 [2025-03-04 16:39:50,924 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 459 [2025-03-04 16:39:50,924 INFO L73 IsDeterministic]: Start isDeterministic. Operand 459 states and 619 transitions. [2025-03-04 16:39:50,924 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:50,924 INFO L218 hiAutomatonCegarLoop]: Abstraction has 459 states and 619 transitions. [2025-03-04 16:39:50,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states and 619 transitions. [2025-03-04 16:39:50,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 451. [2025-03-04 16:39:50,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 451 states, 444 states have (on average 1.3468468468468469) internal successors, (598), 443 states have internal predecessors, (598), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:50,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 610 transitions. [2025-03-04 16:39:50,930 INFO L240 hiAutomatonCegarLoop]: Abstraction has 451 states and 610 transitions. [2025-03-04 16:39:50,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:50,931 INFO L432 stractBuchiCegarLoop]: Abstraction has 451 states and 610 transitions. [2025-03-04 16:39:50,931 INFO L338 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2025-03-04 16:39:50,931 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 451 states and 610 transitions. [2025-03-04 16:39:50,932 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 442 [2025-03-04 16:39:50,932 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:50,932 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:50,933 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:50,933 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:50,933 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:50,933 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:50,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:50,934 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 25 times [2025-03-04 16:39:50,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:50,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433835255] [2025-03-04 16:39:50,934 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:39:50,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:50,940 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:50,940 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:50,940 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:50,941 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:50,941 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:50,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:50,942 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:50,942 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:50,942 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:50,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:50,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:50,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1136512444, now seen corresponding path program 1 times [2025-03-04 16:39:50,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:50,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555318019] [2025-03-04 16:39:50,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:50,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:50,983 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:39:51,083 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:39:51,083 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:51,084 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:51,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:51,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:51,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555318019] [2025-03-04 16:39:51,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [555318019] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:51,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:51,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:39:51,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801131725] [2025-03-04 16:39:51,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:51,313 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:51,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:51,313 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:39:51,313 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:39:51,314 INFO L87 Difference]: Start difference. First operand 451 states and 610 transitions. cyclomatic complexity: 163 Second operand has 10 states, 10 states have (on average 15.0) internal successors, (150), 10 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:52,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:52,083 INFO L93 Difference]: Finished difference Result 472 states and 639 transitions. [2025-03-04 16:39:52,083 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 472 states and 639 transitions. [2025-03-04 16:39:52,084 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:39:52,085 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 472 states to 472 states and 639 transitions. [2025-03-04 16:39:52,085 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 472 [2025-03-04 16:39:52,086 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 472 [2025-03-04 16:39:52,086 INFO L73 IsDeterministic]: Start isDeterministic. Operand 472 states and 639 transitions. [2025-03-04 16:39:52,086 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:52,086 INFO L218 hiAutomatonCegarLoop]: Abstraction has 472 states and 639 transitions. [2025-03-04 16:39:52,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states and 639 transitions. [2025-03-04 16:39:52,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 464. [2025-03-04 16:39:52,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 464 states, 457 states have (on average 1.3457330415754925) internal successors, (615), 456 states have internal predecessors, (615), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:52,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 627 transitions. [2025-03-04 16:39:52,092 INFO L240 hiAutomatonCegarLoop]: Abstraction has 464 states and 627 transitions. [2025-03-04 16:39:52,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:52,093 INFO L432 stractBuchiCegarLoop]: Abstraction has 464 states and 627 transitions. [2025-03-04 16:39:52,093 INFO L338 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2025-03-04 16:39:52,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 464 states and 627 transitions. [2025-03-04 16:39:52,094 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 455 [2025-03-04 16:39:52,095 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:52,095 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:52,096 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:52,096 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:52,096 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:52,096 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:52,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:52,098 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 26 times [2025-03-04 16:39:52,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:52,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184670547] [2025-03-04 16:39:52,100 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:39:52,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:52,109 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:52,110 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:52,110 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:52,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:52,110 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:52,112 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:52,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:52,112 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:52,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:52,118 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:52,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:52,119 INFO L85 PathProgramCache]: Analyzing trace with hash 2092049448, now seen corresponding path program 1 times [2025-03-04 16:39:52,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:52,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403212676] [2025-03-04 16:39:52,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:52,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:52,156 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:39:52,314 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:39:52,314 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:52,314 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:52,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:52,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:52,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403212676] [2025-03-04 16:39:52,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [403212676] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:52,538 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:52,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:52,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234408951] [2025-03-04 16:39:52,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:52,538 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:52,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:52,538 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:52,538 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:52,539 INFO L87 Difference]: Start difference. First operand 464 states and 627 transitions. cyclomatic complexity: 167 Second operand has 7 states, 7 states have (on average 21.428571428571427) internal successors, (150), 7 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:53,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:53,006 INFO L93 Difference]: Finished difference Result 469 states and 633 transitions. [2025-03-04 16:39:53,006 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 469 states and 633 transitions. [2025-03-04 16:39:53,007 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 460 [2025-03-04 16:39:53,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 469 states to 469 states and 633 transitions. [2025-03-04 16:39:53,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 469 [2025-03-04 16:39:53,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 469 [2025-03-04 16:39:53,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 469 states and 633 transitions. [2025-03-04 16:39:53,009 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:53,009 INFO L218 hiAutomatonCegarLoop]: Abstraction has 469 states and 633 transitions. [2025-03-04 16:39:53,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states and 633 transitions. [2025-03-04 16:39:53,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 468. [2025-03-04 16:39:53,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 461 states have (on average 1.3449023861171367) internal successors, (620), 460 states have internal predecessors, (620), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:53,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 632 transitions. [2025-03-04 16:39:53,014 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 632 transitions. [2025-03-04 16:39:53,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:53,015 INFO L432 stractBuchiCegarLoop]: Abstraction has 468 states and 632 transitions. [2025-03-04 16:39:53,015 INFO L338 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2025-03-04 16:39:53,015 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 632 transitions. [2025-03-04 16:39:53,016 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 459 [2025-03-04 16:39:53,016 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:53,016 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:53,017 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:53,017 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:53,017 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:53,017 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:53,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:53,018 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 27 times [2025-03-04 16:39:53,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:53,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248653839] [2025-03-04 16:39:53,018 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:39:53,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:53,026 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:53,026 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:53,026 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:39:53,026 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:53,027 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:53,029 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:53,029 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:53,029 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:53,029 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:53,034 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:53,035 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:53,035 INFO L85 PathProgramCache]: Analyzing trace with hash -199484525, now seen corresponding path program 1 times [2025-03-04 16:39:53,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:53,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541202560] [2025-03-04 16:39:53,035 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:53,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:53,095 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:39:53,114 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:39:53,114 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:53,114 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:53,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:53,407 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:53,407 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541202560] [2025-03-04 16:39:53,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1541202560] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:53,407 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:53,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:39:53,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929893955] [2025-03-04 16:39:53,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:53,407 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:53,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:53,409 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:39:53,409 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:39:53,410 INFO L87 Difference]: Start difference. First operand 468 states and 632 transitions. cyclomatic complexity: 168 Second operand has 10 states, 10 states have (on average 15.0) internal successors, (150), 10 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:54,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:54,187 INFO L93 Difference]: Finished difference Result 478 states and 645 transitions. [2025-03-04 16:39:54,187 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 478 states and 645 transitions. [2025-03-04 16:39:54,188 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 469 [2025-03-04 16:39:54,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 478 states to 478 states and 645 transitions. [2025-03-04 16:39:54,190 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 478 [2025-03-04 16:39:54,190 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 478 [2025-03-04 16:39:54,190 INFO L73 IsDeterministic]: Start isDeterministic. Operand 478 states and 645 transitions. [2025-03-04 16:39:54,190 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:54,190 INFO L218 hiAutomatonCegarLoop]: Abstraction has 478 states and 645 transitions. [2025-03-04 16:39:54,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states and 645 transitions. [2025-03-04 16:39:54,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 465. [2025-03-04 16:39:54,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 465 states, 458 states have (on average 1.3427947598253276) internal successors, (615), 457 states have internal predecessors, (615), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:54,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 627 transitions. [2025-03-04 16:39:54,195 INFO L240 hiAutomatonCegarLoop]: Abstraction has 465 states and 627 transitions. [2025-03-04 16:39:54,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:54,196 INFO L432 stractBuchiCegarLoop]: Abstraction has 465 states and 627 transitions. [2025-03-04 16:39:54,196 INFO L338 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2025-03-04 16:39:54,196 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 465 states and 627 transitions. [2025-03-04 16:39:54,197 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:39:54,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:54,197 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:54,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:54,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:54,198 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:54,198 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:54,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:54,199 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 28 times [2025-03-04 16:39:54,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:54,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360216377] [2025-03-04 16:39:54,199 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:39:54,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:54,209 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:39:54,210 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:54,210 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:39:54,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:54,210 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:54,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:54,212 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:54,212 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:54,212 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:54,219 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:54,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:54,219 INFO L85 PathProgramCache]: Analyzing trace with hash 81446116, now seen corresponding path program 1 times [2025-03-04 16:39:54,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:54,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389198423] [2025-03-04 16:39:54,221 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:54,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:54,271 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:39:54,451 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:39:54,451 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:54,451 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:54,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:54,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:54,690 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389198423] [2025-03-04 16:39:54,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389198423] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:54,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:54,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:39:54,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422195950] [2025-03-04 16:39:54,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:54,691 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:54,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:54,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:39:54,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:39:54,691 INFO L87 Difference]: Start difference. First operand 465 states and 627 transitions. cyclomatic complexity: 166 Second operand has 7 states, 7 states have (on average 21.428571428571427) internal successors, (150), 7 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:55,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:55,149 INFO L93 Difference]: Finished difference Result 472 states and 633 transitions. [2025-03-04 16:39:55,149 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 472 states and 633 transitions. [2025-03-04 16:39:55,150 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:39:55,152 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 472 states to 472 states and 633 transitions. [2025-03-04 16:39:55,152 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 472 [2025-03-04 16:39:55,152 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 472 [2025-03-04 16:39:55,152 INFO L73 IsDeterministic]: Start isDeterministic. Operand 472 states and 633 transitions. [2025-03-04 16:39:55,152 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:55,152 INFO L218 hiAutomatonCegarLoop]: Abstraction has 472 states and 633 transitions. [2025-03-04 16:39:55,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states and 633 transitions. [2025-03-04 16:39:55,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 465. [2025-03-04 16:39:55,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 465 states, 458 states have (on average 1.3406113537117903) internal successors, (614), 457 states have internal predecessors, (614), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:55,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 626 transitions. [2025-03-04 16:39:55,157 INFO L240 hiAutomatonCegarLoop]: Abstraction has 465 states and 626 transitions. [2025-03-04 16:39:55,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:39:55,165 INFO L432 stractBuchiCegarLoop]: Abstraction has 465 states and 626 transitions. [2025-03-04 16:39:55,165 INFO L338 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2025-03-04 16:39:55,166 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 465 states and 626 transitions. [2025-03-04 16:39:55,166 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:39:55,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:55,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:55,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:55,167 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:55,167 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:55,168 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:55,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:55,168 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 29 times [2025-03-04 16:39:55,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:55,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841223196] [2025-03-04 16:39:55,168 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:39:55,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:55,174 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:55,175 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:55,175 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:39:55,175 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:55,175 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:55,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:55,178 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:55,178 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:55,178 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:55,182 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:55,183 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:55,183 INFO L85 PathProgramCache]: Analyzing trace with hash 2059665136, now seen corresponding path program 1 times [2025-03-04 16:39:55,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:55,184 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110764955] [2025-03-04 16:39:55,184 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:55,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:55,222 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:39:55,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:39:55,309 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:55,309 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:55,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:55,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:55,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110764955] [2025-03-04 16:39:55,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2110764955] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:55,584 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:55,584 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:39:55,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1474801878] [2025-03-04 16:39:55,584 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:55,584 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:55,584 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:55,585 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:39:55,585 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:39:55,585 INFO L87 Difference]: Start difference. First operand 465 states and 626 transitions. cyclomatic complexity: 165 Second operand has 11 states, 11 states have (on average 13.727272727272727) internal successors, (151), 11 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:56,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:56,378 INFO L93 Difference]: Finished difference Result 481 states and 646 transitions. [2025-03-04 16:39:56,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 481 states and 646 transitions. [2025-03-04 16:39:56,379 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 472 [2025-03-04 16:39:56,380 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 481 states to 481 states and 646 transitions. [2025-03-04 16:39:56,380 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 481 [2025-03-04 16:39:56,380 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 481 [2025-03-04 16:39:56,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 481 states and 646 transitions. [2025-03-04 16:39:56,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:56,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 481 states and 646 transitions. [2025-03-04 16:39:56,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states and 646 transitions. [2025-03-04 16:39:56,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 468. [2025-03-04 16:39:56,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 461 states have (on average 1.3383947939262473) internal successors, (617), 460 states have internal predecessors, (617), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:56,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 629 transitions. [2025-03-04 16:39:56,384 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 629 transitions. [2025-03-04 16:39:56,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:56,386 INFO L432 stractBuchiCegarLoop]: Abstraction has 468 states and 629 transitions. [2025-03-04 16:39:56,386 INFO L338 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2025-03-04 16:39:56,386 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 629 transitions. [2025-03-04 16:39:56,387 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 459 [2025-03-04 16:39:56,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:56,387 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:56,387 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:56,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:56,387 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:56,390 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:56,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:56,391 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 30 times [2025-03-04 16:39:56,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:56,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857561681] [2025-03-04 16:39:56,391 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:39:56,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:56,399 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:56,400 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:56,400 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:39:56,400 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:56,400 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:56,402 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:56,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:56,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:56,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:56,408 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:56,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:56,408 INFO L85 PathProgramCache]: Analyzing trace with hash -717608569, now seen corresponding path program 1 times [2025-03-04 16:39:56,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:56,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780962769] [2025-03-04 16:39:56,409 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:56,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:56,459 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:39:56,927 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:39:56,927 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:56,927 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:57,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:57,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:57,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780962769] [2025-03-04 16:39:57,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1780962769] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:57,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:57,307 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:39:57,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937881903] [2025-03-04 16:39:57,307 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:57,307 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:57,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:57,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:39:57,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:39:57,307 INFO L87 Difference]: Start difference. First operand 468 states and 629 transitions. cyclomatic complexity: 165 Second operand has 10 states, 10 states have (on average 15.1) internal successors, (151), 10 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:39:58,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:39:58,118 INFO L93 Difference]: Finished difference Result 480 states and 646 transitions. [2025-03-04 16:39:58,118 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 480 states and 646 transitions. [2025-03-04 16:39:58,119 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 471 [2025-03-04 16:39:58,121 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 480 states to 480 states and 646 transitions. [2025-03-04 16:39:58,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 480 [2025-03-04 16:39:58,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 480 [2025-03-04 16:39:58,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 646 transitions. [2025-03-04 16:39:58,121 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:39:58,121 INFO L218 hiAutomatonCegarLoop]: Abstraction has 480 states and 646 transitions. [2025-03-04 16:39:58,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 646 transitions. [2025-03-04 16:39:58,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 472. [2025-03-04 16:39:58,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 472 states, 465 states have (on average 1.3376344086021505) internal successors, (622), 464 states have internal predecessors, (622), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:39:58,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 472 states to 472 states and 634 transitions. [2025-03-04 16:39:58,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 472 states and 634 transitions. [2025-03-04 16:39:58,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:39:58,126 INFO L432 stractBuchiCegarLoop]: Abstraction has 472 states and 634 transitions. [2025-03-04 16:39:58,126 INFO L338 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2025-03-04 16:39:58,127 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 472 states and 634 transitions. [2025-03-04 16:39:58,127 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:39:58,127 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:39:58,127 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:39:58,128 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:39:58,128 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:39:58,128 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:39:58,129 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:39:58,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:58,129 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 31 times [2025-03-04 16:39:58,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:58,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399015999] [2025-03-04 16:39:58,130 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:39:58,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:58,137 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:58,138 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:58,138 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:58,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:58,138 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:39:58,139 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:39:58,140 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:39:58,140 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:58,140 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:39:58,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:39:58,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:39:58,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1048300636, now seen corresponding path program 1 times [2025-03-04 16:39:58,146 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:39:58,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925895219] [2025-03-04 16:39:58,146 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:39:58,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:39:58,191 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:39:58,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:39:58,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:39:58,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:39:59,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:39:59,055 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:39:59,055 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925895219] [2025-03-04 16:39:59,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925895219] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:39:59,055 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:39:59,056 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:39:59,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18414864] [2025-03-04 16:39:59,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:39:59,056 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:39:59,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:39:59,056 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:39:59,056 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:39:59,057 INFO L87 Difference]: Start difference. First operand 472 states and 634 transitions. cyclomatic complexity: 166 Second operand has 13 states, 13 states have (on average 11.615384615384615) internal successors, (151), 13 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:00,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:00,236 INFO L93 Difference]: Finished difference Result 543 states and 734 transitions. [2025-03-04 16:40:00,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 543 states and 734 transitions. [2025-03-04 16:40:00,237 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 534 [2025-03-04 16:40:00,239 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 543 states to 543 states and 734 transitions. [2025-03-04 16:40:00,239 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 543 [2025-03-04 16:40:00,239 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 543 [2025-03-04 16:40:00,239 INFO L73 IsDeterministic]: Start isDeterministic. Operand 543 states and 734 transitions. [2025-03-04 16:40:00,239 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:00,239 INFO L218 hiAutomatonCegarLoop]: Abstraction has 543 states and 734 transitions. [2025-03-04 16:40:00,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states and 734 transitions. [2025-03-04 16:40:00,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 478. [2025-03-04 16:40:00,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 478 states, 471 states have (on average 1.3375796178343948) internal successors, (630), 470 states have internal predecessors, (630), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:00,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 478 states and 642 transitions. [2025-03-04 16:40:00,243 INFO L240 hiAutomatonCegarLoop]: Abstraction has 478 states and 642 transitions. [2025-03-04 16:40:00,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:40:00,244 INFO L432 stractBuchiCegarLoop]: Abstraction has 478 states and 642 transitions. [2025-03-04 16:40:00,244 INFO L338 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2025-03-04 16:40:00,245 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 478 states and 642 transitions. [2025-03-04 16:40:00,246 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 469 [2025-03-04 16:40:00,246 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:00,246 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:00,246 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:00,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:00,248 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:00,248 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:00,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:00,249 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 32 times [2025-03-04 16:40:00,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:00,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319514318] [2025-03-04 16:40:00,249 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:40:00,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:00,256 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:00,257 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:00,257 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:00,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:00,258 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:00,260 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:00,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:00,260 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:00,260 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:00,265 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:00,266 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:00,266 INFO L85 PathProgramCache]: Analyzing trace with hash -1638870503, now seen corresponding path program 1 times [2025-03-04 16:40:00,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:00,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75869289] [2025-03-04 16:40:00,266 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:00,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:00,305 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:40:00,694 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:40:00,694 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:00,694 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:01,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:01,241 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:01,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75869289] [2025-03-04 16:40:01,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75869289] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:01,241 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:01,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:40:01,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364214351] [2025-03-04 16:40:01,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:01,241 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:01,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:01,241 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:40:01,241 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:40:01,241 INFO L87 Difference]: Start difference. First operand 478 states and 642 transitions. cyclomatic complexity: 168 Second operand has 13 states, 13 states have (on average 11.692307692307692) internal successors, (152), 13 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:02,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:02,013 INFO L93 Difference]: Finished difference Result 545 states and 736 transitions. [2025-03-04 16:40:02,013 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 545 states and 736 transitions. [2025-03-04 16:40:02,014 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 536 [2025-03-04 16:40:02,015 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 545 states to 545 states and 736 transitions. [2025-03-04 16:40:02,015 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2025-03-04 16:40:02,015 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2025-03-04 16:40:02,015 INFO L73 IsDeterministic]: Start isDeterministic. Operand 545 states and 736 transitions. [2025-03-04 16:40:02,016 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:02,016 INFO L218 hiAutomatonCegarLoop]: Abstraction has 545 states and 736 transitions. [2025-03-04 16:40:02,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states and 736 transitions. [2025-03-04 16:40:02,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 479. [2025-03-04 16:40:02,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 479 states, 472 states have (on average 1.3389830508474576) internal successors, (632), 471 states have internal predecessors, (632), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:02,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 644 transitions. [2025-03-04 16:40:02,019 INFO L240 hiAutomatonCegarLoop]: Abstraction has 479 states and 644 transitions. [2025-03-04 16:40:02,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:40:02,020 INFO L432 stractBuchiCegarLoop]: Abstraction has 479 states and 644 transitions. [2025-03-04 16:40:02,020 INFO L338 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2025-03-04 16:40:02,020 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 479 states and 644 transitions. [2025-03-04 16:40:02,021 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 470 [2025-03-04 16:40:02,021 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:02,021 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:02,022 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:02,022 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:02,022 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:02,022 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:02,023 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:02,023 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 33 times [2025-03-04 16:40:02,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:02,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544699334] [2025-03-04 16:40:02,023 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:40:02,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:02,030 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:02,030 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:02,030 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:40:02,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:02,030 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:02,032 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:02,033 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:02,033 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:02,033 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:02,038 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:02,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:02,038 INFO L85 PathProgramCache]: Analyzing trace with hash -1771429140, now seen corresponding path program 1 times [2025-03-04 16:40:02,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:02,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947727554] [2025-03-04 16:40:02,039 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:02,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:02,079 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:40:02,099 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:40:02,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:02,100 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:02,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:02,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:02,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947727554] [2025-03-04 16:40:02,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947727554] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:02,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:02,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:02,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219553906] [2025-03-04 16:40:02,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:02,328 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:02,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:02,329 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:02,329 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:02,329 INFO L87 Difference]: Start difference. First operand 479 states and 644 transitions. cyclomatic complexity: 169 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:02,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:02,675 INFO L93 Difference]: Finished difference Result 489 states and 656 transitions. [2025-03-04 16:40:02,675 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 489 states and 656 transitions. [2025-03-04 16:40:02,676 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 480 [2025-03-04 16:40:02,677 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 489 states to 489 states and 656 transitions. [2025-03-04 16:40:02,677 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 489 [2025-03-04 16:40:02,677 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 489 [2025-03-04 16:40:02,677 INFO L73 IsDeterministic]: Start isDeterministic. Operand 489 states and 656 transitions. [2025-03-04 16:40:02,678 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:02,678 INFO L218 hiAutomatonCegarLoop]: Abstraction has 489 states and 656 transitions. [2025-03-04 16:40:02,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states and 656 transitions. [2025-03-04 16:40:02,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 482. [2025-03-04 16:40:02,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 475 states have (on average 1.3389473684210527) internal successors, (636), 474 states have internal predecessors, (636), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:02,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 648 transitions. [2025-03-04 16:40:02,681 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 648 transitions. [2025-03-04 16:40:02,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:40:02,682 INFO L432 stractBuchiCegarLoop]: Abstraction has 482 states and 648 transitions. [2025-03-04 16:40:02,682 INFO L338 stractBuchiCegarLoop]: ======== Iteration 34 ============ [2025-03-04 16:40:02,682 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 648 transitions. [2025-03-04 16:40:02,683 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 473 [2025-03-04 16:40:02,683 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:02,683 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:02,683 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:02,683 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:02,683 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:02,683 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:02,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:02,684 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 34 times [2025-03-04 16:40:02,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:02,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477104924] [2025-03-04 16:40:02,684 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:40:02,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:02,691 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:40:02,691 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:02,691 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:40:02,691 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:02,691 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:02,693 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:02,693 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:02,693 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:02,693 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:02,698 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:02,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:02,698 INFO L85 PathProgramCache]: Analyzing trace with hash 2137352512, now seen corresponding path program 1 times [2025-03-04 16:40:02,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:02,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889279055] [2025-03-04 16:40:02,698 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:02,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:02,735 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:40:02,933 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:40:02,933 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:02,933 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:03,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:03,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:03,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889279055] [2025-03-04 16:40:03,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1889279055] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:03,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:03,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:40:03,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315820964] [2025-03-04 16:40:03,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:03,330 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:03,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:03,330 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:40:03,331 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:40:03,331 INFO L87 Difference]: Start difference. First operand 482 states and 648 transitions. cyclomatic complexity: 170 Second operand has 11 states, 11 states have (on average 13.818181818181818) internal successors, (152), 11 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:04,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:04,023 INFO L93 Difference]: Finished difference Result 507 states and 684 transitions. [2025-03-04 16:40:04,023 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 507 states and 684 transitions. [2025-03-04 16:40:04,024 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 498 [2025-03-04 16:40:04,025 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 507 states to 507 states and 684 transitions. [2025-03-04 16:40:04,025 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 507 [2025-03-04 16:40:04,026 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 507 [2025-03-04 16:40:04,026 INFO L73 IsDeterministic]: Start isDeterministic. Operand 507 states and 684 transitions. [2025-03-04 16:40:04,026 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:04,026 INFO L218 hiAutomatonCegarLoop]: Abstraction has 507 states and 684 transitions. [2025-03-04 16:40:04,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 507 states and 684 transitions. [2025-03-04 16:40:04,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 507 to 485. [2025-03-04 16:40:04,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 485 states, 478 states have (on average 1.3389121338912133) internal successors, (640), 477 states have internal predecessors, (640), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:04,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 652 transitions. [2025-03-04 16:40:04,030 INFO L240 hiAutomatonCegarLoop]: Abstraction has 485 states and 652 transitions. [2025-03-04 16:40:04,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:40:04,030 INFO L432 stractBuchiCegarLoop]: Abstraction has 485 states and 652 transitions. [2025-03-04 16:40:04,031 INFO L338 stractBuchiCegarLoop]: ======== Iteration 35 ============ [2025-03-04 16:40:04,031 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 485 states and 652 transitions. [2025-03-04 16:40:04,031 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 476 [2025-03-04 16:40:04,031 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:04,031 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:04,032 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:04,032 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:04,032 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:04,032 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:04,033 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:04,033 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 35 times [2025-03-04 16:40:04,033 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:04,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462993267] [2025-03-04 16:40:04,033 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:40:04,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:04,040 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:04,041 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:04,041 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:04,041 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:04,041 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:04,043 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:04,044 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:04,044 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:04,044 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:04,049 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:04,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:04,049 INFO L85 PathProgramCache]: Analyzing trace with hash 42114354, now seen corresponding path program 1 times [2025-03-04 16:40:04,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:04,049 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446736879] [2025-03-04 16:40:04,049 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:04,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:04,087 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:40:04,433 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:40:04,433 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:04,433 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:04,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:04,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:04,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446736879] [2025-03-04 16:40:04,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446736879] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:04,972 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:04,972 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:04,972 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793832601] [2025-03-04 16:40:04,972 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:04,972 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:04,973 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:04,973 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:04,973 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:04,974 INFO L87 Difference]: Start difference. First operand 485 states and 652 transitions. cyclomatic complexity: 171 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:05,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:05,306 INFO L93 Difference]: Finished difference Result 477 states and 640 transitions. [2025-03-04 16:40:05,306 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 477 states and 640 transitions. [2025-03-04 16:40:05,307 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 468 [2025-03-04 16:40:05,308 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 477 states to 477 states and 640 transitions. [2025-03-04 16:40:05,309 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 477 [2025-03-04 16:40:05,309 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 477 [2025-03-04 16:40:05,309 INFO L73 IsDeterministic]: Start isDeterministic. Operand 477 states and 640 transitions. [2025-03-04 16:40:05,309 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:05,309 INFO L218 hiAutomatonCegarLoop]: Abstraction has 477 states and 640 transitions. [2025-03-04 16:40:05,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states and 640 transitions. [2025-03-04 16:40:05,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 475. [2025-03-04 16:40:05,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 468 states have (on average 1.3354700854700854) internal successors, (625), 467 states have internal predecessors, (625), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:05,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 637 transitions. [2025-03-04 16:40:05,312 INFO L240 hiAutomatonCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:40:05,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:40:05,313 INFO L432 stractBuchiCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:40:05,313 INFO L338 stractBuchiCegarLoop]: ======== Iteration 36 ============ [2025-03-04 16:40:05,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 475 states and 637 transitions. [2025-03-04 16:40:05,314 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2025-03-04 16:40:05,314 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:05,314 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:05,314 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:05,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:05,314 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:05,315 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:05,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:05,315 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 36 times [2025-03-04 16:40:05,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:05,315 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106619266] [2025-03-04 16:40:05,315 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:40:05,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:05,322 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:05,322 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:05,322 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:40:05,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:05,322 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:05,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:05,324 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:05,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:05,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:05,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:05,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:05,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1923346184, now seen corresponding path program 1 times [2025-03-04 16:40:05,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:05,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380431516] [2025-03-04 16:40:05,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:05,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:05,370 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:40:05,477 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:40:05,477 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:05,477 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:05,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:05,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:05,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1380431516] [2025-03-04 16:40:05,698 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1380431516] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:05,698 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:05,698 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:05,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427528553] [2025-03-04 16:40:05,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:05,698 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:05,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:05,698 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:05,698 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:05,699 INFO L87 Difference]: Start difference. First operand 475 states and 637 transitions. cyclomatic complexity: 166 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:06,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:06,149 INFO L93 Difference]: Finished difference Result 485 states and 649 transitions. [2025-03-04 16:40:06,149 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 485 states and 649 transitions. [2025-03-04 16:40:06,150 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 476 [2025-03-04 16:40:06,151 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 485 states to 485 states and 649 transitions. [2025-03-04 16:40:06,151 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 485 [2025-03-04 16:40:06,151 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 485 [2025-03-04 16:40:06,151 INFO L73 IsDeterministic]: Start isDeterministic. Operand 485 states and 649 transitions. [2025-03-04 16:40:06,151 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:06,151 INFO L218 hiAutomatonCegarLoop]: Abstraction has 485 states and 649 transitions. [2025-03-04 16:40:06,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 485 states and 649 transitions. [2025-03-04 16:40:06,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 485 to 475. [2025-03-04 16:40:06,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 468 states have (on average 1.3354700854700854) internal successors, (625), 467 states have internal predecessors, (625), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:06,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 637 transitions. [2025-03-04 16:40:06,155 INFO L240 hiAutomatonCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:40:06,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:06,155 INFO L432 stractBuchiCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:40:06,155 INFO L338 stractBuchiCegarLoop]: ======== Iteration 37 ============ [2025-03-04 16:40:06,155 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 475 states and 637 transitions. [2025-03-04 16:40:06,156 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2025-03-04 16:40:06,156 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:06,156 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:06,157 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:06,157 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:06,157 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:06,157 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:06,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:06,157 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 37 times [2025-03-04 16:40:06,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:06,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308441369] [2025-03-04 16:40:06,157 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:40:06,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:06,164 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:06,164 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:06,164 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:06,164 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:06,164 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:06,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:06,166 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:06,166 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:06,166 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:06,171 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:06,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:06,171 INFO L85 PathProgramCache]: Analyzing trace with hash -2064273695, now seen corresponding path program 1 times [2025-03-04 16:40:06,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:06,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910753562] [2025-03-04 16:40:06,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:06,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:06,206 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:06,544 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:06,544 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:06,544 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:07,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:07,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:07,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910753562] [2025-03-04 16:40:07,023 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1910753562] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:07,023 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:07,023 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:40:07,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410425829] [2025-03-04 16:40:07,024 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:07,024 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:07,024 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:07,024 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:40:07,024 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:40:07,024 INFO L87 Difference]: Start difference. First operand 475 states and 637 transitions. cyclomatic complexity: 166 Second operand has 13 states, 13 states have (on average 11.76923076923077) internal successors, (153), 13 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:07,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:07,616 INFO L93 Difference]: Finished difference Result 504 states and 679 transitions. [2025-03-04 16:40:07,616 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 504 states and 679 transitions. [2025-03-04 16:40:07,617 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 495 [2025-03-04 16:40:07,618 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 504 states to 504 states and 679 transitions. [2025-03-04 16:40:07,618 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 504 [2025-03-04 16:40:07,618 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 504 [2025-03-04 16:40:07,618 INFO L73 IsDeterministic]: Start isDeterministic. Operand 504 states and 679 transitions. [2025-03-04 16:40:07,619 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:07,619 INFO L218 hiAutomatonCegarLoop]: Abstraction has 504 states and 679 transitions. [2025-03-04 16:40:07,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states and 679 transitions. [2025-03-04 16:40:07,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 483. [2025-03-04 16:40:07,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 483 states, 476 states have (on average 1.3361344537815125) internal successors, (636), 475 states have internal predecessors, (636), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:07,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 483 states to 483 states and 648 transitions. [2025-03-04 16:40:07,623 INFO L240 hiAutomatonCegarLoop]: Abstraction has 483 states and 648 transitions. [2025-03-04 16:40:07,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:40:07,624 INFO L432 stractBuchiCegarLoop]: Abstraction has 483 states and 648 transitions. [2025-03-04 16:40:07,624 INFO L338 stractBuchiCegarLoop]: ======== Iteration 38 ============ [2025-03-04 16:40:07,624 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 483 states and 648 transitions. [2025-03-04 16:40:07,625 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 474 [2025-03-04 16:40:07,625 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:07,625 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:07,626 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:07,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:07,626 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:07,626 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:07,627 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:07,627 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 38 times [2025-03-04 16:40:07,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:07,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518609951] [2025-03-04 16:40:07,627 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:40:07,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:07,634 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:07,635 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:07,635 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:07,635 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:07,635 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:07,637 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:07,637 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:07,637 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:07,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:07,642 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:07,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:07,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1489808029, now seen corresponding path program 1 times [2025-03-04 16:40:07,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:07,643 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996031718] [2025-03-04 16:40:07,643 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:07,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:07,682 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:07,930 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:07,930 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:07,930 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:08,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:08,537 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:08,537 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996031718] [2025-03-04 16:40:08,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996031718] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:08,537 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:08,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:08,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1595565807] [2025-03-04 16:40:08,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:08,538 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:08,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:08,538 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:08,538 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:08,538 INFO L87 Difference]: Start difference. First operand 483 states and 648 transitions. cyclomatic complexity: 169 Second operand has 9 states, 9 states have (on average 17.0) internal successors, (153), 9 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:09,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:09,065 INFO L93 Difference]: Finished difference Result 490 states and 655 transitions. [2025-03-04 16:40:09,065 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 490 states and 655 transitions. [2025-03-04 16:40:09,066 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 481 [2025-03-04 16:40:09,067 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 490 states to 490 states and 655 transitions. [2025-03-04 16:40:09,068 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 490 [2025-03-04 16:40:09,068 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 490 [2025-03-04 16:40:09,068 INFO L73 IsDeterministic]: Start isDeterministic. Operand 490 states and 655 transitions. [2025-03-04 16:40:09,068 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:09,068 INFO L218 hiAutomatonCegarLoop]: Abstraction has 490 states and 655 transitions. [2025-03-04 16:40:09,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states and 655 transitions. [2025-03-04 16:40:09,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 486. [2025-03-04 16:40:09,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 486 states, 479 states have (on average 1.3340292275574113) internal successors, (639), 478 states have internal predecessors, (639), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:09,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 486 states to 486 states and 651 transitions. [2025-03-04 16:40:09,073 INFO L240 hiAutomatonCegarLoop]: Abstraction has 486 states and 651 transitions. [2025-03-04 16:40:09,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:09,076 INFO L432 stractBuchiCegarLoop]: Abstraction has 486 states and 651 transitions. [2025-03-04 16:40:09,076 INFO L338 stractBuchiCegarLoop]: ======== Iteration 39 ============ [2025-03-04 16:40:09,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 486 states and 651 transitions. [2025-03-04 16:40:09,077 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 477 [2025-03-04 16:40:09,077 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:09,077 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:09,078 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:09,078 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:09,079 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:09,079 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:09,079 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:09,079 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 39 times [2025-03-04 16:40:09,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:09,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314372567] [2025-03-04 16:40:09,080 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:40:09,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:09,087 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:09,087 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:09,087 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:40:09,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:09,087 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:09,089 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:09,090 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:09,090 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:09,090 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:09,096 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:09,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:09,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1195205368, now seen corresponding path program 1 times [2025-03-04 16:40:09,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:09,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131831806] [2025-03-04 16:40:09,096 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:09,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:09,134 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:09,155 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:09,155 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:09,155 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:09,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:09,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:09,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131831806] [2025-03-04 16:40:09,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131831806] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:09,426 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:09,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:40:09,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587377798] [2025-03-04 16:40:09,426 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:09,426 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:09,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:09,430 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:40:09,430 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:40:09,430 INFO L87 Difference]: Start difference. First operand 486 states and 651 transitions. cyclomatic complexity: 169 Second operand has 10 states, 10 states have (on average 15.3) internal successors, (153), 10 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:09,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:09,809 INFO L93 Difference]: Finished difference Result 502 states and 672 transitions. [2025-03-04 16:40:09,809 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 502 states and 672 transitions. [2025-03-04 16:40:09,810 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 493 [2025-03-04 16:40:09,811 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 502 states to 502 states and 672 transitions. [2025-03-04 16:40:09,812 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 502 [2025-03-04 16:40:09,812 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 502 [2025-03-04 16:40:09,812 INFO L73 IsDeterministic]: Start isDeterministic. Operand 502 states and 672 transitions. [2025-03-04 16:40:09,812 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:09,812 INFO L218 hiAutomatonCegarLoop]: Abstraction has 502 states and 672 transitions. [2025-03-04 16:40:09,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states and 672 transitions. [2025-03-04 16:40:09,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 496. [2025-03-04 16:40:09,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.3312883435582823) internal successors, (651), 488 states have internal predecessors, (651), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:09,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 663 transitions. [2025-03-04 16:40:09,816 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:40:09,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:09,817 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:40:09,817 INFO L338 stractBuchiCegarLoop]: ======== Iteration 40 ============ [2025-03-04 16:40:09,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 663 transitions. [2025-03-04 16:40:09,817 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:40:09,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:09,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:09,818 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:09,818 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:09,818 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:09,818 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:09,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:09,818 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 40 times [2025-03-04 16:40:09,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:09,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847476501] [2025-03-04 16:40:09,818 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:40:09,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:09,825 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:40:09,825 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:09,826 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:40:09,826 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:09,826 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:09,827 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:09,827 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:09,827 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:09,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:09,832 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:09,833 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:09,833 INFO L85 PathProgramCache]: Analyzing trace with hash -1258037442, now seen corresponding path program 1 times [2025-03-04 16:40:09,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:09,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063704619] [2025-03-04 16:40:09,833 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:09,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:09,898 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:09,978 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:09,978 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:09,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:10,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:10,214 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:10,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063704619] [2025-03-04 16:40:10,214 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2063704619] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:10,214 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:10,214 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:40:10,214 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283899740] [2025-03-04 16:40:10,214 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:10,215 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:10,215 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:10,215 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:40:10,215 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:40:10,215 INFO L87 Difference]: Start difference. First operand 496 states and 663 transitions. cyclomatic complexity: 171 Second operand has 10 states, 10 states have (on average 15.3) internal successors, (153), 10 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:10,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:10,668 INFO L93 Difference]: Finished difference Result 509 states and 681 transitions. [2025-03-04 16:40:10,668 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 509 states and 681 transitions. [2025-03-04 16:40:10,669 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 500 [2025-03-04 16:40:10,671 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 509 states to 509 states and 681 transitions. [2025-03-04 16:40:10,671 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 509 [2025-03-04 16:40:10,671 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 509 [2025-03-04 16:40:10,671 INFO L73 IsDeterministic]: Start isDeterministic. Operand 509 states and 681 transitions. [2025-03-04 16:40:10,672 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:10,672 INFO L218 hiAutomatonCegarLoop]: Abstraction has 509 states and 681 transitions. [2025-03-04 16:40:10,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509 states and 681 transitions. [2025-03-04 16:40:10,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 496. [2025-03-04 16:40:10,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.3312883435582823) internal successors, (651), 488 states have internal predecessors, (651), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:10,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 663 transitions. [2025-03-04 16:40:10,675 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:40:10,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:10,676 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:40:10,676 INFO L338 stractBuchiCegarLoop]: ======== Iteration 41 ============ [2025-03-04 16:40:10,676 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 663 transitions. [2025-03-04 16:40:10,677 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:40:10,677 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:10,677 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:10,677 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:10,677 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:10,677 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:10,678 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:10,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:10,678 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 41 times [2025-03-04 16:40:10,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:10,678 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072767046] [2025-03-04 16:40:10,678 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:40:10,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:10,685 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:10,685 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:10,685 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:10,685 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:10,685 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:10,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:10,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:10,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:10,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:10,692 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:10,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:10,692 INFO L85 PathProgramCache]: Analyzing trace with hash -1231853300, now seen corresponding path program 1 times [2025-03-04 16:40:10,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:10,692 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540830047] [2025-03-04 16:40:10,692 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:10,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:10,726 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:11,035 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:11,035 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:11,035 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:11,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:11,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:11,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540830047] [2025-03-04 16:40:11,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [540830047] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:11,264 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:11,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:40:11,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448165502] [2025-03-04 16:40:11,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:11,264 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:11,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:11,264 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:40:11,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:40:11,264 INFO L87 Difference]: Start difference. First operand 496 states and 663 transitions. cyclomatic complexity: 171 Second operand has 7 states, 7 states have (on average 21.857142857142858) internal successors, (153), 7 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:11,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:11,553 INFO L93 Difference]: Finished difference Result 501 states and 667 transitions. [2025-03-04 16:40:11,553 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 501 states and 667 transitions. [2025-03-04 16:40:11,554 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 492 [2025-03-04 16:40:11,555 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 501 states to 501 states and 667 transitions. [2025-03-04 16:40:11,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 501 [2025-03-04 16:40:11,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 501 [2025-03-04 16:40:11,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 501 states and 667 transitions. [2025-03-04 16:40:11,556 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:11,556 INFO L218 hiAutomatonCegarLoop]: Abstraction has 501 states and 667 transitions. [2025-03-04 16:40:11,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states and 667 transitions. [2025-03-04 16:40:11,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 496. [2025-03-04 16:40:11,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.329243353783231) internal successors, (650), 488 states have internal predecessors, (650), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:11,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 662 transitions. [2025-03-04 16:40:11,560 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 662 transitions. [2025-03-04 16:40:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:40:11,560 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 662 transitions. [2025-03-04 16:40:11,560 INFO L338 stractBuchiCegarLoop]: ======== Iteration 42 ============ [2025-03-04 16:40:11,560 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 662 transitions. [2025-03-04 16:40:11,561 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:40:11,561 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:11,561 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:11,561 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:11,561 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:11,561 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:11,562 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:11,562 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:11,562 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 42 times [2025-03-04 16:40:11,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:11,562 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537145696] [2025-03-04 16:40:11,562 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:40:11,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:11,569 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:11,569 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:11,569 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:40:11,569 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:11,569 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:11,571 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:11,571 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:11,571 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:11,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:11,576 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:11,576 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:11,576 INFO L85 PathProgramCache]: Analyzing trace with hash 50795810, now seen corresponding path program 1 times [2025-03-04 16:40:11,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:11,576 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330466771] [2025-03-04 16:40:11,576 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:11,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:11,610 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:40:11,745 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:40:11,745 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:11,745 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:11,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:11,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:11,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330466771] [2025-03-04 16:40:11,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [330466771] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:11,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:11,954 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:40:11,954 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184325478] [2025-03-04 16:40:11,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:11,954 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:11,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:11,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:40:11,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:40:11,954 INFO L87 Difference]: Start difference. First operand 496 states and 662 transitions. cyclomatic complexity: 170 Second operand has 7 states, 7 states have (on average 21.857142857142858) internal successors, (153), 7 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:12,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:12,286 INFO L93 Difference]: Finished difference Result 499 states and 665 transitions. [2025-03-04 16:40:12,286 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 499 states and 665 transitions. [2025-03-04 16:40:12,287 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 490 [2025-03-04 16:40:12,288 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 499 states to 499 states and 665 transitions. [2025-03-04 16:40:12,288 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 499 [2025-03-04 16:40:12,288 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 499 [2025-03-04 16:40:12,288 INFO L73 IsDeterministic]: Start isDeterministic. Operand 499 states and 665 transitions. [2025-03-04 16:40:12,289 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:12,289 INFO L218 hiAutomatonCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:40:12,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states and 665 transitions. [2025-03-04 16:40:12,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2025-03-04 16:40:12,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 499 states, 492 states have (on average 1.3272357723577235) internal successors, (653), 491 states have internal predecessors, (653), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:12,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 665 transitions. [2025-03-04 16:40:12,293 INFO L240 hiAutomatonCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:40:12,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:40:12,297 INFO L432 stractBuchiCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:40:12,297 INFO L338 stractBuchiCegarLoop]: ======== Iteration 43 ============ [2025-03-04 16:40:12,297 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 499 states and 665 transitions. [2025-03-04 16:40:12,298 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 490 [2025-03-04 16:40:12,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:12,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:12,299 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:12,299 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:12,299 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:12,299 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:12,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:12,300 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 43 times [2025-03-04 16:40:12,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:12,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661162364] [2025-03-04 16:40:12,300 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:40:12,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:12,307 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:12,308 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:12,308 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:12,308 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:12,308 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:12,310 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:12,311 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:12,311 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:12,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:12,316 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:12,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:12,316 INFO L85 PathProgramCache]: Analyzing trace with hash -773052335, now seen corresponding path program 1 times [2025-03-04 16:40:12,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:12,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13179821] [2025-03-04 16:40:12,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:12,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:12,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:12,524 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:12,524 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:12,524 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:12,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:12,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:12,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13179821] [2025-03-04 16:40:12,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [13179821] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:12,762 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:12,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:40:12,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [50715518] [2025-03-04 16:40:12,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:12,763 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:12,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:12,763 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:40:12,763 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:40:12,763 INFO L87 Difference]: Start difference. First operand 499 states and 665 transitions. cyclomatic complexity: 170 Second operand has 11 states, 11 states have (on average 14.0) internal successors, (154), 11 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:13,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:13,213 INFO L93 Difference]: Finished difference Result 514 states and 684 transitions. [2025-03-04 16:40:13,213 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 514 states and 684 transitions. [2025-03-04 16:40:13,214 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:40:13,215 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 514 states to 514 states and 684 transitions. [2025-03-04 16:40:13,215 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 514 [2025-03-04 16:40:13,215 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 514 [2025-03-04 16:40:13,215 INFO L73 IsDeterministic]: Start isDeterministic. Operand 514 states and 684 transitions. [2025-03-04 16:40:13,215 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:13,215 INFO L218 hiAutomatonCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:40:13,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states and 684 transitions. [2025-03-04 16:40:13,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 502. [2025-03-04 16:40:13,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 502 states, 495 states have (on average 1.3252525252525253) internal successors, (656), 494 states have internal predecessors, (656), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:13,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 668 transitions. [2025-03-04 16:40:13,220 INFO L240 hiAutomatonCegarLoop]: Abstraction has 502 states and 668 transitions. [2025-03-04 16:40:13,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:13,220 INFO L432 stractBuchiCegarLoop]: Abstraction has 502 states and 668 transitions. [2025-03-04 16:40:13,220 INFO L338 stractBuchiCegarLoop]: ======== Iteration 44 ============ [2025-03-04 16:40:13,220 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 502 states and 668 transitions. [2025-03-04 16:40:13,221 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 493 [2025-03-04 16:40:13,221 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:13,221 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:13,222 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:13,222 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:13,222 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:13,222 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:13,222 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:13,222 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 44 times [2025-03-04 16:40:13,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:13,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598814175] [2025-03-04 16:40:13,222 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:40:13,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:13,230 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:13,230 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:13,230 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:13,230 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:13,230 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:13,232 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:13,232 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:13,232 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:13,232 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:13,237 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:13,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:13,238 INFO L85 PathProgramCache]: Analyzing trace with hash 1845190494, now seen corresponding path program 1 times [2025-03-04 16:40:13,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:13,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363193390] [2025-03-04 16:40:13,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:13,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:13,273 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:13,672 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:13,672 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:13,672 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:14,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:14,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:14,059 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363193390] [2025-03-04 16:40:14,059 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1363193390] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:14,059 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:14,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:40:14,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361140065] [2025-03-04 16:40:14,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:14,060 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:14,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:14,060 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:40:14,060 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:40:14,060 INFO L87 Difference]: Start difference. First operand 502 states and 668 transitions. cyclomatic complexity: 170 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:14,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:14,784 INFO L93 Difference]: Finished difference Result 514 states and 685 transitions. [2025-03-04 16:40:14,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 514 states and 685 transitions. [2025-03-04 16:40:14,785 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:40:14,786 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 514 states to 514 states and 685 transitions. [2025-03-04 16:40:14,786 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 514 [2025-03-04 16:40:14,786 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 514 [2025-03-04 16:40:14,786 INFO L73 IsDeterministic]: Start isDeterministic. Operand 514 states and 685 transitions. [2025-03-04 16:40:14,786 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:14,786 INFO L218 hiAutomatonCegarLoop]: Abstraction has 514 states and 685 transitions. [2025-03-04 16:40:14,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states and 685 transitions. [2025-03-04 16:40:14,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 506. [2025-03-04 16:40:14,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 506 states, 499 states have (on average 1.3246492985971945) internal successors, (661), 498 states have internal predecessors, (661), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:14,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 673 transitions. [2025-03-04 16:40:14,790 INFO L240 hiAutomatonCegarLoop]: Abstraction has 506 states and 673 transitions. [2025-03-04 16:40:14,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:14,791 INFO L432 stractBuchiCegarLoop]: Abstraction has 506 states and 673 transitions. [2025-03-04 16:40:14,791 INFO L338 stractBuchiCegarLoop]: ======== Iteration 45 ============ [2025-03-04 16:40:14,791 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 673 transitions. [2025-03-04 16:40:14,792 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 497 [2025-03-04 16:40:14,792 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:14,792 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:14,792 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:14,792 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:14,792 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:14,793 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:14,793 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:14,793 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 45 times [2025-03-04 16:40:14,793 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:14,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787726845] [2025-03-04 16:40:14,793 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:40:14,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:14,801 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:14,801 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:14,802 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:40:14,802 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:14,802 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:14,803 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:14,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:14,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:14,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:14,809 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:14,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:14,809 INFO L85 PathProgramCache]: Analyzing trace with hash 1225703036, now seen corresponding path program 1 times [2025-03-04 16:40:14,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:14,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161598058] [2025-03-04 16:40:14,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:14,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:14,848 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:15,156 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:15,157 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:15,157 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:15,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:15,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:15,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161598058] [2025-03-04 16:40:15,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161598058] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:15,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:15,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:40:15,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786048980] [2025-03-04 16:40:15,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:15,572 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:15,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:15,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:40:15,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:40:15,572 INFO L87 Difference]: Start difference. First operand 506 states and 673 transitions. cyclomatic complexity: 171 Second operand has 13 states, 13 states have (on average 11.846153846153847) internal successors, (154), 13 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:16,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:16,015 INFO L93 Difference]: Finished difference Result 516 states and 686 transitions. [2025-03-04 16:40:16,015 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 516 states and 686 transitions. [2025-03-04 16:40:16,016 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 507 [2025-03-04 16:40:16,017 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 516 states to 516 states and 686 transitions. [2025-03-04 16:40:16,017 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 516 [2025-03-04 16:40:16,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 516 [2025-03-04 16:40:16,017 INFO L73 IsDeterministic]: Start isDeterministic. Operand 516 states and 686 transitions. [2025-03-04 16:40:16,018 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:16,018 INFO L218 hiAutomatonCegarLoop]: Abstraction has 516 states and 686 transitions. [2025-03-04 16:40:16,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states and 686 transitions. [2025-03-04 16:40:16,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 511. [2025-03-04 16:40:16,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 511 states, 504 states have (on average 1.3253968253968254) internal successors, (668), 503 states have internal predecessors, (668), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:16,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 511 states to 511 states and 680 transitions. [2025-03-04 16:40:16,023 INFO L240 hiAutomatonCegarLoop]: Abstraction has 511 states and 680 transitions. [2025-03-04 16:40:16,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:40:16,023 INFO L432 stractBuchiCegarLoop]: Abstraction has 511 states and 680 transitions. [2025-03-04 16:40:16,023 INFO L338 stractBuchiCegarLoop]: ======== Iteration 46 ============ [2025-03-04 16:40:16,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 511 states and 680 transitions. [2025-03-04 16:40:16,024 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 502 [2025-03-04 16:40:16,024 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:16,024 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:16,025 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:16,025 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:16,025 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:16,025 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:16,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:16,025 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 46 times [2025-03-04 16:40:16,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:16,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388502525] [2025-03-04 16:40:16,026 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:40:16,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:16,034 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:40:16,034 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:16,034 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:40:16,034 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:16,034 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:16,036 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:16,036 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:16,036 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:16,037 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:16,042 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:16,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:16,043 INFO L85 PathProgramCache]: Analyzing trace with hash 321058143, now seen corresponding path program 1 times [2025-03-04 16:40:16,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:16,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308683241] [2025-03-04 16:40:16,043 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:16,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:16,078 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:16,215 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:16,215 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:16,215 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:16,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:16,407 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:16,407 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308683241] [2025-03-04 16:40:16,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1308683241] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:16,407 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:16,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:16,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123120277] [2025-03-04 16:40:16,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:16,407 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:16,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:16,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:16,408 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:16,408 INFO L87 Difference]: Start difference. First operand 511 states and 680 transitions. cyclomatic complexity: 173 Second operand has 9 states, 9 states have (on average 17.11111111111111) internal successors, (154), 9 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:17,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:17,147 INFO L93 Difference]: Finished difference Result 525 states and 698 transitions. [2025-03-04 16:40:17,147 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 525 states and 698 transitions. [2025-03-04 16:40:17,148 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 516 [2025-03-04 16:40:17,149 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 525 states to 525 states and 698 transitions. [2025-03-04 16:40:17,149 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 525 [2025-03-04 16:40:17,149 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 525 [2025-03-04 16:40:17,149 INFO L73 IsDeterministic]: Start isDeterministic. Operand 525 states and 698 transitions. [2025-03-04 16:40:17,149 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:17,149 INFO L218 hiAutomatonCegarLoop]: Abstraction has 525 states and 698 transitions. [2025-03-04 16:40:17,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states and 698 transitions. [2025-03-04 16:40:17,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 514. [2025-03-04 16:40:17,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 514 states, 507 states have (on average 1.3254437869822486) internal successors, (672), 506 states have internal predecessors, (672), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:17,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 514 states to 514 states and 684 transitions. [2025-03-04 16:40:17,153 INFO L240 hiAutomatonCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:40:17,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:17,153 INFO L432 stractBuchiCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:40:17,153 INFO L338 stractBuchiCegarLoop]: ======== Iteration 47 ============ [2025-03-04 16:40:17,153 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 514 states and 684 transitions. [2025-03-04 16:40:17,154 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:40:17,154 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:17,154 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:17,154 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:17,154 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:17,155 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:17,155 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:17,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:17,155 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 47 times [2025-03-04 16:40:17,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:17,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010914461] [2025-03-04 16:40:17,156 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:40:17,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:17,164 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:17,164 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:17,164 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:17,164 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:17,164 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:17,165 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:17,166 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:17,166 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:17,166 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:17,171 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:17,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:17,171 INFO L85 PathProgramCache]: Analyzing trace with hash 706958755, now seen corresponding path program 1 times [2025-03-04 16:40:17,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:17,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381957816] [2025-03-04 16:40:17,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:17,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:17,208 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:17,543 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:17,544 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:17,544 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:17,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:17,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:17,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381957816] [2025-03-04 16:40:17,786 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [381957816] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:17,786 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:17,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-04 16:40:17,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936127185] [2025-03-04 16:40:17,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:17,787 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:17,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:17,787 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-04 16:40:17,787 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-03-04 16:40:17,787 INFO L87 Difference]: Start difference. First operand 514 states and 684 transitions. cyclomatic complexity: 174 Second operand has 8 states, 8 states have (on average 19.25) internal successors, (154), 8 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:29,921 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:40:30,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:30,039 INFO L93 Difference]: Finished difference Result 586 states and 784 transitions. [2025-03-04 16:40:30,039 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 586 states and 784 transitions. [2025-03-04 16:40:30,040 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 577 [2025-03-04 16:40:30,042 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 586 states to 586 states and 784 transitions. [2025-03-04 16:40:30,042 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 586 [2025-03-04 16:40:30,042 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 586 [2025-03-04 16:40:30,042 INFO L73 IsDeterministic]: Start isDeterministic. Operand 586 states and 784 transitions. [2025-03-04 16:40:30,042 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:30,042 INFO L218 hiAutomatonCegarLoop]: Abstraction has 586 states and 784 transitions. [2025-03-04 16:40:30,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states and 784 transitions. [2025-03-04 16:40:30,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 518. [2025-03-04 16:40:30,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 518 states, 511 states have (on average 1.3268101761252447) internal successors, (678), 510 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:30,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 518 states to 518 states and 690 transitions. [2025-03-04 16:40:30,047 INFO L240 hiAutomatonCegarLoop]: Abstraction has 518 states and 690 transitions. [2025-03-04 16:40:30,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:40:30,047 INFO L432 stractBuchiCegarLoop]: Abstraction has 518 states and 690 transitions. [2025-03-04 16:40:30,047 INFO L338 stractBuchiCegarLoop]: ======== Iteration 48 ============ [2025-03-04 16:40:30,047 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 518 states and 690 transitions. [2025-03-04 16:40:30,048 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 509 [2025-03-04 16:40:30,048 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:30,048 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:30,049 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:30,049 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:30,049 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:30,049 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:30,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:30,049 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 48 times [2025-03-04 16:40:30,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:30,050 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711614978] [2025-03-04 16:40:30,050 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:40:30,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:30,058 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:30,058 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:30,058 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:40:30,058 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:30,058 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:30,059 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:30,060 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:30,060 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:30,060 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:30,064 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:30,065 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:30,065 INFO L85 PathProgramCache]: Analyzing trace with hash -1190892584, now seen corresponding path program 1 times [2025-03-04 16:40:30,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:30,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123502102] [2025-03-04 16:40:30,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:30,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:30,104 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:30,287 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:30,287 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:30,287 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:30,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:30,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:30,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1123502102] [2025-03-04 16:40:30,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1123502102] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:30,662 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:30,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:40:30,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057391090] [2025-03-04 16:40:30,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:30,662 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:30,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:30,662 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:40:30,662 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:40:30,663 INFO L87 Difference]: Start difference. First operand 518 states and 690 transitions. cyclomatic complexity: 176 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:32,753 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.48s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:40:33,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:33,300 INFO L93 Difference]: Finished difference Result 531 states and 706 transitions. [2025-03-04 16:40:33,300 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 531 states and 706 transitions. [2025-03-04 16:40:33,301 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 522 [2025-03-04 16:40:33,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 531 states to 531 states and 706 transitions. [2025-03-04 16:40:33,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 531 [2025-03-04 16:40:33,302 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 531 [2025-03-04 16:40:33,302 INFO L73 IsDeterministic]: Start isDeterministic. Operand 531 states and 706 transitions. [2025-03-04 16:40:33,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:33,303 INFO L218 hiAutomatonCegarLoop]: Abstraction has 531 states and 706 transitions. [2025-03-04 16:40:33,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states and 706 transitions. [2025-03-04 16:40:33,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 519. [2025-03-04 16:40:33,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 512 states have (on average 1.326171875) internal successors, (679), 511 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:33,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 691 transitions. [2025-03-04 16:40:33,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 519 states and 691 transitions. [2025-03-04 16:40:33,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:33,311 INFO L432 stractBuchiCegarLoop]: Abstraction has 519 states and 691 transitions. [2025-03-04 16:40:33,311 INFO L338 stractBuchiCegarLoop]: ======== Iteration 49 ============ [2025-03-04 16:40:33,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 519 states and 691 transitions. [2025-03-04 16:40:33,312 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 510 [2025-03-04 16:40:33,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:33,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:33,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:33,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:33,312 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:33,313 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:33,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:33,313 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 49 times [2025-03-04 16:40:33,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:33,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004981834] [2025-03-04 16:40:33,313 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:40:33,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:33,321 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:33,322 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:33,322 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:33,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:33,322 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:33,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:33,324 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:33,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:33,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:33,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:33,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:33,329 INFO L85 PathProgramCache]: Analyzing trace with hash 1898141674, now seen corresponding path program 1 times [2025-03-04 16:40:33,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:33,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317416630] [2025-03-04 16:40:33,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:33,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:33,369 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:33,627 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:33,627 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:33,627 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:34,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:34,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:34,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317416630] [2025-03-04 16:40:34,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317416630] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:34,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:34,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:40:34,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048793847] [2025-03-04 16:40:34,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:34,019 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:34,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:34,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:40:34,020 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:40:34,020 INFO L87 Difference]: Start difference. First operand 519 states and 691 transitions. cyclomatic complexity: 176 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:35,505 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.17s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:40:35,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:35,863 INFO L93 Difference]: Finished difference Result 524 states and 696 transitions. [2025-03-04 16:40:35,863 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 524 states and 696 transitions. [2025-03-04 16:40:35,864 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 515 [2025-03-04 16:40:35,865 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 524 states to 524 states and 696 transitions. [2025-03-04 16:40:35,865 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 524 [2025-03-04 16:40:35,865 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 524 [2025-03-04 16:40:35,865 INFO L73 IsDeterministic]: Start isDeterministic. Operand 524 states and 696 transitions. [2025-03-04 16:40:35,865 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:35,865 INFO L218 hiAutomatonCegarLoop]: Abstraction has 524 states and 696 transitions. [2025-03-04 16:40:35,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states and 696 transitions. [2025-03-04 16:40:35,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 520. [2025-03-04 16:40:35,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 520 states, 513 states have (on average 1.3255360623781676) internal successors, (680), 512 states have internal predecessors, (680), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:35,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 520 states to 520 states and 692 transitions. [2025-03-04 16:40:35,869 INFO L240 hiAutomatonCegarLoop]: Abstraction has 520 states and 692 transitions. [2025-03-04 16:40:35,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:35,869 INFO L432 stractBuchiCegarLoop]: Abstraction has 520 states and 692 transitions. [2025-03-04 16:40:35,869 INFO L338 stractBuchiCegarLoop]: ======== Iteration 50 ============ [2025-03-04 16:40:35,869 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 520 states and 692 transitions. [2025-03-04 16:40:35,870 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 511 [2025-03-04 16:40:35,870 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:35,870 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:35,871 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:35,871 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:35,871 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:35,871 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:35,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:35,871 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 50 times [2025-03-04 16:40:35,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:35,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136596361] [2025-03-04 16:40:35,871 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:40:35,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:35,879 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:35,879 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:35,879 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:40:35,879 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:35,879 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:35,881 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:35,881 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:35,881 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:35,881 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:35,886 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:35,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:35,886 INFO L85 PathProgramCache]: Analyzing trace with hash 330280827, now seen corresponding path program 1 times [2025-03-04 16:40:35,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:35,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589465091] [2025-03-04 16:40:35,887 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:35,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:35,921 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:36,075 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:36,075 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:36,075 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:36,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:36,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:36,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589465091] [2025-03-04 16:40:36,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [589465091] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:36,285 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:36,285 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:40:36,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875010001] [2025-03-04 16:40:36,285 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:36,285 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:36,285 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:36,286 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:40:36,286 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:40:36,286 INFO L87 Difference]: Start difference. First operand 520 states and 692 transitions. cyclomatic complexity: 176 Second operand has 9 states, 9 states have (on average 17.11111111111111) internal successors, (154), 9 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:36,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:36,793 INFO L93 Difference]: Finished difference Result 525 states and 698 transitions. [2025-03-04 16:40:36,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 525 states and 698 transitions. [2025-03-04 16:40:36,794 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 516 [2025-03-04 16:40:36,795 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 525 states to 525 states and 698 transitions. [2025-03-04 16:40:36,795 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 525 [2025-03-04 16:40:36,795 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 525 [2025-03-04 16:40:36,795 INFO L73 IsDeterministic]: Start isDeterministic. Operand 525 states and 698 transitions. [2025-03-04 16:40:36,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:36,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 525 states and 698 transitions. [2025-03-04 16:40:36,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states and 698 transitions. [2025-03-04 16:40:36,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 523. [2025-03-04 16:40:36,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 523 states, 516 states have (on average 1.3255813953488371) internal successors, (684), 515 states have internal predecessors, (684), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:36,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 523 states to 523 states and 696 transitions. [2025-03-04 16:40:36,799 INFO L240 hiAutomatonCegarLoop]: Abstraction has 523 states and 696 transitions. [2025-03-04 16:40:36,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:40:36,800 INFO L432 stractBuchiCegarLoop]: Abstraction has 523 states and 696 transitions. [2025-03-04 16:40:36,800 INFO L338 stractBuchiCegarLoop]: ======== Iteration 51 ============ [2025-03-04 16:40:36,800 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 523 states and 696 transitions. [2025-03-04 16:40:36,800 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 514 [2025-03-04 16:40:36,800 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:36,800 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:36,801 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:36,801 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:36,801 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:36,801 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:36,801 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:36,801 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 51 times [2025-03-04 16:40:36,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:36,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204614840] [2025-03-04 16:40:36,801 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:40:36,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:36,809 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:36,809 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:36,809 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:40:36,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:36,809 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:36,810 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:36,811 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:36,811 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:36,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:36,816 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:36,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:36,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1388279403, now seen corresponding path program 1 times [2025-03-04 16:40:36,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:36,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782133104] [2025-03-04 16:40:36,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:36,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:36,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:37,218 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:37,219 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:37,219 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:40:37,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:40:37,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:40:37,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782133104] [2025-03-04 16:40:37,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [782133104] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:40:37,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:40:37,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2025-03-04 16:40:37,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355479430] [2025-03-04 16:40:37,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:40:37,968 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:40:37,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:40:37,968 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-04 16:40:37,968 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2025-03-04 16:40:37,968 INFO L87 Difference]: Start difference. First operand 523 states and 696 transitions. cyclomatic complexity: 177 Second operand has 17 states, 17 states have (on average 9.058823529411764) internal successors, (154), 17 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:40:38,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:40:38,954 INFO L93 Difference]: Finished difference Result 543 states and 724 transitions. [2025-03-04 16:40:38,954 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 543 states and 724 transitions. [2025-03-04 16:40:38,955 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 534 [2025-03-04 16:40:38,956 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 543 states to 543 states and 724 transitions. [2025-03-04 16:40:38,956 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 543 [2025-03-04 16:40:38,956 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 543 [2025-03-04 16:40:38,956 INFO L73 IsDeterministic]: Start isDeterministic. Operand 543 states and 724 transitions. [2025-03-04 16:40:38,957 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:40:38,957 INFO L218 hiAutomatonCegarLoop]: Abstraction has 543 states and 724 transitions. [2025-03-04 16:40:38,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states and 724 transitions. [2025-03-04 16:40:38,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 530. [2025-03-04 16:40:38,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 530 states, 523 states have (on average 1.3250478011472275) internal successors, (693), 522 states have internal predecessors, (693), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:40:38,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 705 transitions. [2025-03-04 16:40:38,960 INFO L240 hiAutomatonCegarLoop]: Abstraction has 530 states and 705 transitions. [2025-03-04 16:40:38,961 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-04 16:40:38,961 INFO L432 stractBuchiCegarLoop]: Abstraction has 530 states and 705 transitions. [2025-03-04 16:40:38,961 INFO L338 stractBuchiCegarLoop]: ======== Iteration 52 ============ [2025-03-04 16:40:38,961 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 530 states and 705 transitions. [2025-03-04 16:40:38,962 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 521 [2025-03-04 16:40:38,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:40:38,962 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:40:38,962 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:40:38,962 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:40:38,962 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:40:38,963 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:40:38,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:38,963 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 52 times [2025-03-04 16:40:38,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:38,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308964157] [2025-03-04 16:40:38,963 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:40:38,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:38,972 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:40:38,973 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:38,973 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:40:38,973 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:38,973 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:40:38,974 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:40:38,974 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:40:38,974 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:38,974 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:40:38,981 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:40:38,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:40:38,981 INFO L85 PathProgramCache]: Analyzing trace with hash -148576327, now seen corresponding path program 1 times [2025-03-04 16:40:38,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:40:38,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781785848] [2025-03-04 16:40:38,981 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:40:38,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:40:39,017 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:40:39,354 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:40:39,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:40:39,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat