./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 14:45:39,976 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 14:45:40,030 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-03 14:45:40,036 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 14:45:40,036 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 14:45:40,051 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 14:45:40,055 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 14:45:40,055 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 14:45:40,055 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 14:45:40,056 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 14:45:40,056 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 14:45:40,056 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 14:45:40,056 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 14:45:40,057 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 14:45:40,057 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 14:45:40,058 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:45:40,058 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 14:45:40,058 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 [2025-03-03 14:45:40,302 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 14:45:40,308 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 14:45:40,310 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 14:45:40,310 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 14:45:40,311 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 14:45:40,312 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-03 14:45:41,414 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b961e84a/f3ab011bd2924375b630a738f95bc690/FLAG925338fa6 [2025-03-03 14:45:41,664 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 14:45:41,665 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-03 14:45:41,673 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b961e84a/f3ab011bd2924375b630a738f95bc690/FLAG925338fa6 [2025-03-03 14:45:41,685 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b961e84a/f3ab011bd2924375b630a738f95bc690 [2025-03-03 14:45:41,688 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 14:45:41,689 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 14:45:41,690 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 14:45:41,690 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 14:45:41,693 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 14:45:41,693 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:41,694 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1dc21d2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41, skipping insertion in model container [2025-03-03 14:45:41,694 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:41,718 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 14:45:41,901 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2025-03-03 14:45:41,904 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:45:41,910 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 14:45:41,967 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2025-03-03 14:45:41,968 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:45:41,981 INFO L204 MainTranslator]: Completed translation [2025-03-03 14:45:41,982 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41 WrapperNode [2025-03-03 14:45:41,982 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 14:45:41,983 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 14:45:41,983 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 14:45:41,983 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 14:45:41,988 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:41,997 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,019 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 507 [2025-03-03 14:45:42,019 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 14:45:42,020 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 14:45:42,020 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 14:45:42,020 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 14:45:42,026 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,026 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,029 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,045 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 14:45:42,045 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,045 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,060 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,066 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,067 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,068 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,074 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 14:45:42,075 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 14:45:42,078 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 14:45:42,078 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 14:45:42,079 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (1/1) ... [2025-03-03 14:45:42,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:45:42,092 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 14:45:42,106 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 14:45:42,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 14:45:42,126 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-03-03 14:45:42,126 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-03-03 14:45:42,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 14:45:42,126 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 14:45:42,127 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-03-03 14:45:42,127 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-03-03 14:45:42,208 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 14:45:42,209 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 14:45:42,727 INFO L? ?]: Removed 114 outVars from TransFormulas that were not future-live. [2025-03-03 14:45:42,728 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 14:45:42,743 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 14:45:42,744 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 14:45:42,744 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:45:42 BoogieIcfgContainer [2025-03-03 14:45:42,744 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 14:45:42,747 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 14:45:42,747 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 14:45:42,751 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 14:45:42,751 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 02:45:41" (1/3) ... [2025-03-03 14:45:42,751 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3158abc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:45:42, skipping insertion in model container [2025-03-03 14:45:42,752 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:45:41" (2/3) ... [2025-03-03 14:45:42,752 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3158abc5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:45:42, skipping insertion in model container [2025-03-03 14:45:42,752 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:45:42" (3/3) ... [2025-03-03 14:45:42,753 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-03 14:45:42,763 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 14:45:42,765 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c that has 8 procedures, 180 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-03 14:45:42,837 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 14:45:42,844 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@222e6f43, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 14:45:42,844 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 14:45:42,847 INFO L276 IsEmpty]: Start isEmpty. Operand has 180 states, 140 states have (on average 1.55) internal successors, (217), 141 states have internal predecessors, (217), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-03 14:45:42,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-03-03 14:45:42,853 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:42,853 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:42,854 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:42,857 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:42,858 INFO L85 PathProgramCache]: Analyzing trace with hash -26371481, now seen corresponding path program 1 times [2025-03-03 14:45:42,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:42,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469150639] [2025-03-03 14:45:42,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:42,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:42,932 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-03 14:45:42,971 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-03 14:45:42,972 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:42,972 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:43,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:43,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:43,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469150639] [2025-03-03 14:45:43,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1469150639] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:43,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:43,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-03 14:45:43,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143164654] [2025-03-03 14:45:43,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:43,076 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-03-03 14:45:43,077 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:43,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-03 14:45:43,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-03 14:45:43,090 INFO L87 Difference]: Start difference. First operand has 180 states, 140 states have (on average 1.55) internal successors, (217), 141 states have internal predecessors, (217), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:43,122 INFO L93 Difference]: Finished difference Result 344 states and 558 transitions. [2025-03-03 14:45:43,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-03 14:45:43,123 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-03-03 14:45:43,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:43,128 INFO L225 Difference]: With dead ends: 344 [2025-03-03 14:45:43,128 INFO L226 Difference]: Without dead ends: 177 [2025-03-03 14:45:43,130 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-03 14:45:43,132 INFO L435 NwaCegarLoop]: 277 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 277 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:43,132 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 277 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:43,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2025-03-03 14:45:43,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2025-03-03 14:45:43,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 138 states have (on average 1.536231884057971) internal successors, (212), 138 states have internal predecessors, (212), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-03 14:45:43,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 274 transitions. [2025-03-03 14:45:43,169 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 274 transitions. Word has length 28 [2025-03-03 14:45:43,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:43,169 INFO L471 AbstractCegarLoop]: Abstraction has 177 states and 274 transitions. [2025-03-03 14:45:43,169 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,169 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 274 transitions. [2025-03-03 14:45:43,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-03-03 14:45:43,171 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:43,171 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:43,171 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-03 14:45:43,171 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:43,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:43,171 INFO L85 PathProgramCache]: Analyzing trace with hash -2064427770, now seen corresponding path program 1 times [2025-03-03 14:45:43,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:43,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297782013] [2025-03-03 14:45:43,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:43,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:43,185 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-03 14:45:43,210 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-03 14:45:43,210 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:43,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:43,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:43,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:43,370 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297782013] [2025-03-03 14:45:43,370 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1297782013] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:43,370 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:43,370 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 14:45:43,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483373192] [2025-03-03 14:45:43,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:43,372 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 14:45:43,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:43,372 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 14:45:43,373 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 14:45:43,373 INFO L87 Difference]: Start difference. First operand 177 states and 274 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:43,460 INFO L93 Difference]: Finished difference Result 453 states and 709 transitions. [2025-03-03 14:45:43,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 14:45:43,460 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-03-03 14:45:43,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:43,463 INFO L225 Difference]: With dead ends: 453 [2025-03-03 14:45:43,463 INFO L226 Difference]: Without dead ends: 290 [2025-03-03 14:45:43,467 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 14:45:43,467 INFO L435 NwaCegarLoop]: 268 mSDtfsCounter, 134 mSDsluCounter, 1049 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 1317 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:43,468 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 1317 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:43,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2025-03-03 14:45:43,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 177. [2025-03-03 14:45:43,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 138 states have (on average 1.4492753623188406) internal successors, (200), 138 states have internal predecessors, (200), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-03 14:45:43,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 262 transitions. [2025-03-03 14:45:43,483 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 262 transitions. Word has length 28 [2025-03-03 14:45:43,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:43,483 INFO L471 AbstractCegarLoop]: Abstraction has 177 states and 262 transitions. [2025-03-03 14:45:43,483 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,483 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 262 transitions. [2025-03-03 14:45:43,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2025-03-03 14:45:43,484 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:43,484 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:43,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-03 14:45:43,484 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:43,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:43,485 INFO L85 PathProgramCache]: Analyzing trace with hash 138857161, now seen corresponding path program 1 times [2025-03-03 14:45:43,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:43,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720461098] [2025-03-03 14:45:43,485 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:43,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:43,513 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-03 14:45:43,540 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-03 14:45:43,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:43,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:43,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:43,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:43,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720461098] [2025-03-03 14:45:43,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720461098] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:43,678 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:43,678 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:43,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110190397] [2025-03-03 14:45:43,678 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:43,678 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:43,678 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:43,679 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:43,679 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:43,680 INFO L87 Difference]: Start difference. First operand 177 states and 262 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:43,733 INFO L93 Difference]: Finished difference Result 341 states and 514 transitions. [2025-03-03 14:45:43,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:43,734 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2025-03-03 14:45:43,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:43,735 INFO L225 Difference]: With dead ends: 341 [2025-03-03 14:45:43,737 INFO L226 Difference]: Without dead ends: 181 [2025-03-03 14:45:43,738 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:43,738 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 3 mSDsluCounter, 502 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 758 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:43,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 758 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:43,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2025-03-03 14:45:43,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 181. [2025-03-03 14:45:43,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 141 states have (on average 1.4397163120567376) internal successors, (203), 141 states have internal predecessors, (203), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-03 14:45:43,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 265 transitions. [2025-03-03 14:45:43,752 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 265 transitions. Word has length 39 [2025-03-03 14:45:43,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:43,752 INFO L471 AbstractCegarLoop]: Abstraction has 181 states and 265 transitions. [2025-03-03 14:45:43,752 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-03 14:45:43,752 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 265 transitions. [2025-03-03 14:45:43,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-03-03 14:45:43,753 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:43,754 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:43,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-03 14:45:43,754 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:43,754 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:43,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1785982721, now seen corresponding path program 1 times [2025-03-03 14:45:43,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:43,754 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421806074] [2025-03-03 14:45:43,754 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:43,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:43,768 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-03-03 14:45:43,784 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-03-03 14:45:43,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:43,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:43,865 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:43,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:43,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [421806074] [2025-03-03 14:45:43,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [421806074] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:43,866 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:43,866 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:43,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490080143] [2025-03-03 14:45:43,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:43,866 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:43,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:43,867 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:43,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:43,867 INFO L87 Difference]: Start difference. First operand 181 states and 265 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:43,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:43,906 INFO L93 Difference]: Finished difference Result 497 states and 738 transitions. [2025-03-03 14:45:43,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:43,907 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2025-03-03 14:45:43,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:43,909 INFO L225 Difference]: With dead ends: 497 [2025-03-03 14:45:43,909 INFO L226 Difference]: Without dead ends: 333 [2025-03-03 14:45:43,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:43,910 INFO L435 NwaCegarLoop]: 272 mSDtfsCounter, 213 mSDsluCounter, 253 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 213 SdHoareTripleChecker+Valid, 525 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:43,910 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [213 Valid, 525 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:43,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2025-03-03 14:45:43,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 327. [2025-03-03 14:45:43,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 327 states, 250 states have (on average 1.46) internal successors, (365), 251 states have internal predecessors, (365), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-03-03 14:45:43,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 485 transitions. [2025-03-03 14:45:43,931 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 485 transitions. Word has length 55 [2025-03-03 14:45:43,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:43,932 INFO L471 AbstractCegarLoop]: Abstraction has 327 states and 485 transitions. [2025-03-03 14:45:43,932 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:43,932 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 485 transitions. [2025-03-03 14:45:43,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-03-03 14:45:43,934 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:43,934 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:43,934 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-03 14:45:43,934 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:43,935 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:43,935 INFO L85 PathProgramCache]: Analyzing trace with hash 1777935203, now seen corresponding path program 1 times [2025-03-03 14:45:43,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:43,935 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031692554] [2025-03-03 14:45:43,935 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:43,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:43,952 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-03-03 14:45:43,963 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-03-03 14:45:43,965 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:43,966 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:44,011 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:44,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:44,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031692554] [2025-03-03 14:45:44,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031692554] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:44,012 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:44,012 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:44,012 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685546643] [2025-03-03 14:45:44,012 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:44,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:44,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:44,012 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:44,013 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:44,013 INFO L87 Difference]: Start difference. First operand 327 states and 485 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:44,063 INFO L93 Difference]: Finished difference Result 920 states and 1376 transitions. [2025-03-03 14:45:44,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:44,064 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-03-03 14:45:44,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:44,070 INFO L225 Difference]: With dead ends: 920 [2025-03-03 14:45:44,070 INFO L226 Difference]: Without dead ends: 610 [2025-03-03 14:45:44,071 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:44,072 INFO L435 NwaCegarLoop]: 292 mSDtfsCounter, 215 mSDsluCounter, 255 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 547 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:44,072 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [215 Valid, 547 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:44,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2025-03-03 14:45:44,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 604. [2025-03-03 14:45:44,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 604 states, 455 states have (on average 1.4703296703296704) internal successors, (669), 458 states have internal predecessors, (669), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-03-03 14:45:44,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 604 states to 604 states and 903 transitions. [2025-03-03 14:45:44,119 INFO L78 Accepts]: Start accepts. Automaton has 604 states and 903 transitions. Word has length 56 [2025-03-03 14:45:44,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:44,120 INFO L471 AbstractCegarLoop]: Abstraction has 604 states and 903 transitions. [2025-03-03 14:45:44,120 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,120 INFO L276 IsEmpty]: Start isEmpty. Operand 604 states and 903 transitions. [2025-03-03 14:45:44,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-03-03 14:45:44,124 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:44,125 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:44,125 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-03 14:45:44,125 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:44,125 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:44,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1009480284, now seen corresponding path program 1 times [2025-03-03 14:45:44,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:44,125 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089003993] [2025-03-03 14:45:44,126 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:44,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:44,155 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-03-03 14:45:44,186 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-03-03 14:45:44,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:44,186 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:44,289 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:44,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:44,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089003993] [2025-03-03 14:45:44,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089003993] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:44,291 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:44,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 14:45:44,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282061328] [2025-03-03 14:45:44,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:44,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 14:45:44,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:44,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 14:45:44,293 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:44,293 INFO L87 Difference]: Start difference. First operand 604 states and 903 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:44,466 INFO L93 Difference]: Finished difference Result 1295 states and 1932 transitions. [2025-03-03 14:45:44,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:44,466 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-03-03 14:45:44,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:44,473 INFO L225 Difference]: With dead ends: 1295 [2025-03-03 14:45:44,474 INFO L226 Difference]: Without dead ends: 708 [2025-03-03 14:45:44,476 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:44,476 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 369 mSDsluCounter, 444 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 369 SdHoareTripleChecker+Valid, 672 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:44,477 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [369 Valid, 672 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:44,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 708 states. [2025-03-03 14:45:44,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 708 to 692. [2025-03-03 14:45:44,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 692 states, 530 states have (on average 1.4547169811320755) internal successors, (771), 533 states have internal predecessors, (771), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:44,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 692 states to 692 states and 1019 transitions. [2025-03-03 14:45:44,537 INFO L78 Accepts]: Start accepts. Automaton has 692 states and 1019 transitions. Word has length 56 [2025-03-03 14:45:44,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:44,538 INFO L471 AbstractCegarLoop]: Abstraction has 692 states and 1019 transitions. [2025-03-03 14:45:44,538 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,538 INFO L276 IsEmpty]: Start isEmpty. Operand 692 states and 1019 transitions. [2025-03-03 14:45:44,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2025-03-03 14:45:44,540 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:44,541 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:44,541 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-03 14:45:44,541 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:44,541 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:44,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1359635410, now seen corresponding path program 1 times [2025-03-03 14:45:44,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:44,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034767794] [2025-03-03 14:45:44,541 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:44,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:44,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 57 statements into 1 equivalence classes. [2025-03-03 14:45:44,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 57 of 57 statements. [2025-03-03 14:45:44,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:44,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:44,694 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:44,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:44,694 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034767794] [2025-03-03 14:45:44,694 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034767794] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:44,694 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:44,695 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 14:45:44,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393461726] [2025-03-03 14:45:44,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:44,695 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 14:45:44,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:44,696 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 14:45:44,696 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:44,696 INFO L87 Difference]: Start difference. First operand 692 states and 1019 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:44,849 INFO L93 Difference]: Finished difference Result 1299 states and 1932 transitions. [2025-03-03 14:45:44,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:44,850 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2025-03-03 14:45:44,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:44,854 INFO L225 Difference]: With dead ends: 1299 [2025-03-03 14:45:44,854 INFO L226 Difference]: Without dead ends: 712 [2025-03-03 14:45:44,856 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:44,856 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 369 mSDsluCounter, 444 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 369 SdHoareTripleChecker+Valid, 672 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:44,857 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [369 Valid, 672 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:44,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 712 states. [2025-03-03 14:45:44,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 712 to 700. [2025-03-03 14:45:44,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 538 states have (on average 1.4479553903345725) internal successors, (779), 541 states have internal predecessors, (779), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:44,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1027 transitions. [2025-03-03 14:45:44,903 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1027 transitions. Word has length 57 [2025-03-03 14:45:44,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:44,904 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1027 transitions. [2025-03-03 14:45:44,904 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:44,904 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1027 transitions. [2025-03-03 14:45:44,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2025-03-03 14:45:44,905 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:44,905 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:44,905 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-03 14:45:44,905 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:44,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:44,906 INFO L85 PathProgramCache]: Analyzing trace with hash 167945063, now seen corresponding path program 1 times [2025-03-03 14:45:44,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:44,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418581860] [2025-03-03 14:45:44,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:44,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:44,918 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-03-03 14:45:44,935 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-03-03 14:45:44,938 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:44,939 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:45,031 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:45,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:45,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [418581860] [2025-03-03 14:45:45,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [418581860] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:45,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:45,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:45,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135712256] [2025-03-03 14:45:45,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:45,033 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:45,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:45,033 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:45,033 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:45,034 INFO L87 Difference]: Start difference. First operand 700 states and 1027 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:45,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:45,176 INFO L93 Difference]: Finished difference Result 1287 states and 1912 transitions. [2025-03-03 14:45:45,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:45,176 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 59 [2025-03-03 14:45:45,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:45,180 INFO L225 Difference]: With dead ends: 1287 [2025-03-03 14:45:45,180 INFO L226 Difference]: Without dead ends: 700 [2025-03-03 14:45:45,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:45,182 INFO L435 NwaCegarLoop]: 229 mSDtfsCounter, 61 mSDsluCounter, 437 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 666 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:45,182 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 666 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:45,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2025-03-03 14:45:45,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2025-03-03 14:45:45,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 538 states have (on average 1.4405204460966543) internal successors, (775), 541 states have internal predecessors, (775), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:45,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1023 transitions. [2025-03-03 14:45:45,217 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1023 transitions. Word has length 59 [2025-03-03 14:45:45,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:45,217 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1023 transitions. [2025-03-03 14:45:45,218 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-03 14:45:45,218 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1023 transitions. [2025-03-03 14:45:45,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2025-03-03 14:45:45,219 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:45,219 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:45,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-03 14:45:45,219 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:45,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:45,219 INFO L85 PathProgramCache]: Analyzing trace with hash 706798107, now seen corresponding path program 1 times [2025-03-03 14:45:45,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:45,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930256240] [2025-03-03 14:45:45,220 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:45,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:45,231 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 60 statements into 1 equivalence classes. [2025-03-03 14:45:45,247 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 60 of 60 statements. [2025-03-03 14:45:45,248 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:45,248 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:45,378 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:45,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:45,380 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930256240] [2025-03-03 14:45:45,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930256240] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:45,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:45,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:45,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17633582] [2025-03-03 14:45:45,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:45,381 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:45,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:45,381 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:45,382 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:45,382 INFO L87 Difference]: Start difference. First operand 700 states and 1023 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-03 14:45:45,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:45,439 INFO L93 Difference]: Finished difference Result 1307 states and 1936 transitions. [2025-03-03 14:45:45,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:45,440 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 60 [2025-03-03 14:45:45,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:45,444 INFO L225 Difference]: With dead ends: 1307 [2025-03-03 14:45:45,444 INFO L226 Difference]: Without dead ends: 720 [2025-03-03 14:45:45,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:45,446 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 4 mSDsluCounter, 512 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 770 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:45,446 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 770 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:45,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 720 states. [2025-03-03 14:45:45,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 720 to 720. [2025-03-03 14:45:45,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 720 states, 554 states have (on average 1.4277978339350181) internal successors, (791), 557 states have internal predecessors, (791), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:45,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 720 states to 720 states and 1039 transitions. [2025-03-03 14:45:45,481 INFO L78 Accepts]: Start accepts. Automaton has 720 states and 1039 transitions. Word has length 60 [2025-03-03 14:45:45,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:45,481 INFO L471 AbstractCegarLoop]: Abstraction has 720 states and 1039 transitions. [2025-03-03 14:45:45,481 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-03 14:45:45,481 INFO L276 IsEmpty]: Start isEmpty. Operand 720 states and 1039 transitions. [2025-03-03 14:45:45,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2025-03-03 14:45:45,482 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:45,482 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:45,482 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-03 14:45:45,482 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:45,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:45,483 INFO L85 PathProgramCache]: Analyzing trace with hash -784941251, now seen corresponding path program 1 times [2025-03-03 14:45:45,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:45,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266032544] [2025-03-03 14:45:45,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:45,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:45,493 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 68 statements into 1 equivalence classes. [2025-03-03 14:45:45,504 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 68 of 68 statements. [2025-03-03 14:45:45,504 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:45,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:45,624 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:45,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:45,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266032544] [2025-03-03 14:45:45,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266032544] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:45,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:45,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:45,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944885088] [2025-03-03 14:45:45,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:45,625 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:45,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:45,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:45,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:45,626 INFO L87 Difference]: Start difference. First operand 720 states and 1039 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-03 14:45:45,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:45,689 INFO L93 Difference]: Finished difference Result 1347 states and 1980 transitions. [2025-03-03 14:45:45,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:45,690 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 68 [2025-03-03 14:45:45,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:45,694 INFO L225 Difference]: With dead ends: 1347 [2025-03-03 14:45:45,694 INFO L226 Difference]: Without dead ends: 740 [2025-03-03 14:45:45,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:45,697 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 4 mSDsluCounter, 501 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 756 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:45,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 756 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:45,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 740 states. [2025-03-03 14:45:45,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 740 to 740. [2025-03-03 14:45:45,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 740 states, 570 states have (on average 1.4157894736842105) internal successors, (807), 573 states have internal predecessors, (807), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:45,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 740 states to 740 states and 1055 transitions. [2025-03-03 14:45:45,737 INFO L78 Accepts]: Start accepts. Automaton has 740 states and 1055 transitions. Word has length 68 [2025-03-03 14:45:45,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:45,737 INFO L471 AbstractCegarLoop]: Abstraction has 740 states and 1055 transitions. [2025-03-03 14:45:45,737 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-03 14:45:45,738 INFO L276 IsEmpty]: Start isEmpty. Operand 740 states and 1055 transitions. [2025-03-03 14:45:45,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-03-03 14:45:45,739 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:45,740 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:45,740 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-03 14:45:45,740 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:45,741 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:45,741 INFO L85 PathProgramCache]: Analyzing trace with hash -590672733, now seen corresponding path program 1 times [2025-03-03 14:45:45,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:45,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734203685] [2025-03-03 14:45:45,741 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:45,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:45,752 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-03-03 14:45:45,766 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-03-03 14:45:45,766 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:45,766 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:45,861 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:45,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:45,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734203685] [2025-03-03 14:45:45,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1734203685] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:45,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:45,862 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:45,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [342120388] [2025-03-03 14:45:45,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:45,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:45,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:45,862 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:45,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:45,863 INFO L87 Difference]: Start difference. First operand 740 states and 1055 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-03 14:45:45,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:45,917 INFO L93 Difference]: Finished difference Result 1383 states and 1996 transitions. [2025-03-03 14:45:45,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:45,917 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-03-03 14:45:45,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:45,921 INFO L225 Difference]: With dead ends: 1383 [2025-03-03 14:45:45,922 INFO L226 Difference]: Without dead ends: 756 [2025-03-03 14:45:45,923 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:45,924 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 3 mSDsluCounter, 506 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 766 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:45,925 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 766 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:45,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 756 states. [2025-03-03 14:45:45,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 756 to 756. [2025-03-03 14:45:45,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 756 states, 582 states have (on average 1.407216494845361) internal successors, (819), 585 states have internal predecessors, (819), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:45,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 756 states to 756 states and 1067 transitions. [2025-03-03 14:45:45,961 INFO L78 Accepts]: Start accepts. Automaton has 756 states and 1067 transitions. Word has length 76 [2025-03-03 14:45:45,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:45,961 INFO L471 AbstractCegarLoop]: Abstraction has 756 states and 1067 transitions. [2025-03-03 14:45:45,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-03 14:45:45,961 INFO L276 IsEmpty]: Start isEmpty. Operand 756 states and 1067 transitions. [2025-03-03 14:45:45,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-03-03 14:45:45,965 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:45,966 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:45,966 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-03 14:45:45,966 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:45,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:45,966 INFO L85 PathProgramCache]: Analyzing trace with hash -1222600996, now seen corresponding path program 1 times [2025-03-03 14:45:45,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:45,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278176641] [2025-03-03 14:45:45,967 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:45,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:45,977 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-03-03 14:45:45,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-03-03 14:45:45,991 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:45,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:46,107 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-03 14:45:46,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:46,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278176641] [2025-03-03 14:45:46,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1278176641] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:46,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:46,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:46,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934239760] [2025-03-03 14:45:46,108 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:46,108 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:46,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:46,108 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:46,108 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:46,109 INFO L87 Difference]: Start difference. First operand 756 states and 1067 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-03 14:45:46,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:46,182 INFO L93 Difference]: Finished difference Result 1419 states and 2036 transitions. [2025-03-03 14:45:46,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:46,183 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-03-03 14:45:46,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:46,188 INFO L225 Difference]: With dead ends: 1419 [2025-03-03 14:45:46,188 INFO L226 Difference]: Without dead ends: 776 [2025-03-03 14:45:46,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:46,190 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 4 mSDsluCounter, 501 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 756 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:46,190 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 756 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:46,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 776 states. [2025-03-03 14:45:46,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 776 to 776. [2025-03-03 14:45:46,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 776 states, 598 states have (on average 1.3963210702341138) internal successors, (835), 601 states have internal predecessors, (835), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:46,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1083 transitions. [2025-03-03 14:45:46,229 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1083 transitions. Word has length 76 [2025-03-03 14:45:46,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:46,229 INFO L471 AbstractCegarLoop]: Abstraction has 776 states and 1083 transitions. [2025-03-03 14:45:46,229 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-03 14:45:46,229 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1083 transitions. [2025-03-03 14:45:46,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-03 14:45:46,231 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:46,231 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:46,231 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-03 14:45:46,231 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:46,232 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:46,232 INFO L85 PathProgramCache]: Analyzing trace with hash -551241446, now seen corresponding path program 1 times [2025-03-03 14:45:46,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:46,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087282568] [2025-03-03 14:45:46,232 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:46,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:46,243 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-03 14:45:46,255 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-03 14:45:46,255 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:46,255 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:46,388 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-03 14:45:46,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:46,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087282568] [2025-03-03 14:45:46,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087282568] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:46,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:46,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:46,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109896274] [2025-03-03 14:45:46,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:46,389 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:46,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:46,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:46,390 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:46,390 INFO L87 Difference]: Start difference. First operand 776 states and 1083 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-03 14:45:46,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:46,451 INFO L93 Difference]: Finished difference Result 1463 states and 2064 transitions. [2025-03-03 14:45:46,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:46,451 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 84 [2025-03-03 14:45:46,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:46,456 INFO L225 Difference]: With dead ends: 1463 [2025-03-03 14:45:46,456 INFO L226 Difference]: Without dead ends: 800 [2025-03-03 14:45:46,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:46,459 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 5 mSDsluCounter, 509 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 768 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:46,459 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 768 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:46,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 800 states. [2025-03-03 14:45:46,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 800 to 800. [2025-03-03 14:45:46,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 800 states, 618 states have (on average 1.383495145631068) internal successors, (855), 621 states have internal predecessors, (855), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-03 14:45:46,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 800 states to 800 states and 1103 transitions. [2025-03-03 14:45:46,497 INFO L78 Accepts]: Start accepts. Automaton has 800 states and 1103 transitions. Word has length 84 [2025-03-03 14:45:46,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:46,498 INFO L471 AbstractCegarLoop]: Abstraction has 800 states and 1103 transitions. [2025-03-03 14:45:46,498 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-03 14:45:46,498 INFO L276 IsEmpty]: Start isEmpty. Operand 800 states and 1103 transitions. [2025-03-03 14:45:46,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2025-03-03 14:45:46,499 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:46,500 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:46,500 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-03 14:45:46,500 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:46,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:46,500 INFO L85 PathProgramCache]: Analyzing trace with hash 292903096, now seen corresponding path program 1 times [2025-03-03 14:45:46,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:46,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69773753] [2025-03-03 14:45:46,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:46,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:46,513 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 87 statements into 1 equivalence classes. [2025-03-03 14:45:46,576 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 87 of 87 statements. [2025-03-03 14:45:46,577 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:46,577 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:46,934 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-03 14:45:46,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:46,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69773753] [2025-03-03 14:45:46,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [69773753] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:46,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:46,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 14:45:46,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835164289] [2025-03-03 14:45:46,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:46,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 14:45:46,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:46,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 14:45:46,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:46,936 INFO L87 Difference]: Start difference. First operand 800 states and 1103 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-03 14:45:47,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:47,204 INFO L93 Difference]: Finished difference Result 2059 states and 2829 transitions. [2025-03-03 14:45:47,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 14:45:47,204 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 87 [2025-03-03 14:45:47,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:47,212 INFO L225 Difference]: With dead ends: 2059 [2025-03-03 14:45:47,212 INFO L226 Difference]: Without dead ends: 1372 [2025-03-03 14:45:47,214 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-03 14:45:47,215 INFO L435 NwaCegarLoop]: 264 mSDtfsCounter, 197 mSDsluCounter, 1218 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 1482 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:47,215 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 1482 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:47,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1372 states. [2025-03-03 14:45:47,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1372 to 1084. [2025-03-03 14:45:47,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1084 states, 829 states have (on average 1.3715319662243668) internal successors, (1137), 834 states have internal predecessors, (1137), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-03 14:45:47,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1084 states to 1084 states and 1481 transitions. [2025-03-03 14:45:47,295 INFO L78 Accepts]: Start accepts. Automaton has 1084 states and 1481 transitions. Word has length 87 [2025-03-03 14:45:47,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:47,295 INFO L471 AbstractCegarLoop]: Abstraction has 1084 states and 1481 transitions. [2025-03-03 14:45:47,295 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-03 14:45:47,296 INFO L276 IsEmpty]: Start isEmpty. Operand 1084 states and 1481 transitions. [2025-03-03 14:45:47,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2025-03-03 14:45:47,297 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:47,297 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:47,297 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-03 14:45:47,298 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:47,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:47,298 INFO L85 PathProgramCache]: Analyzing trace with hash -136512296, now seen corresponding path program 1 times [2025-03-03 14:45:47,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:47,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437688618] [2025-03-03 14:45:47,298 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:47,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:47,311 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 91 statements into 1 equivalence classes. [2025-03-03 14:45:47,324 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 91 of 91 statements. [2025-03-03 14:45:47,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:47,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-03 14:45:47,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:47,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [437688618] [2025-03-03 14:45:47,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [437688618] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:47,422 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:47,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:47,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156094239] [2025-03-03 14:45:47,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:47,423 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:47,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:47,423 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:47,423 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:47,423 INFO L87 Difference]: Start difference. First operand 1084 states and 1481 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-03 14:45:47,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:47,494 INFO L93 Difference]: Finished difference Result 2011 states and 2772 transitions. [2025-03-03 14:45:47,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:45:47,495 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 91 [2025-03-03 14:45:47,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:47,501 INFO L225 Difference]: With dead ends: 2011 [2025-03-03 14:45:47,501 INFO L226 Difference]: Without dead ends: 1108 [2025-03-03 14:45:47,503 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:47,503 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 3 mSDsluCounter, 506 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 766 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:47,503 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 766 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:47,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2025-03-03 14:45:47,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1108. [2025-03-03 14:45:47,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1108 states, 847 states have (on average 1.3636363636363635) internal successors, (1155), 852 states have internal predecessors, (1155), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-03 14:45:47,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1499 transitions. [2025-03-03 14:45:47,564 INFO L78 Accepts]: Start accepts. Automaton has 1108 states and 1499 transitions. Word has length 91 [2025-03-03 14:45:47,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:47,565 INFO L471 AbstractCegarLoop]: Abstraction has 1108 states and 1499 transitions. [2025-03-03 14:45:47,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-03 14:45:47,565 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1499 transitions. [2025-03-03 14:45:47,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2025-03-03 14:45:47,566 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:47,566 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:47,566 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-03 14:45:47,567 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:47,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:47,567 INFO L85 PathProgramCache]: Analyzing trace with hash -2110599230, now seen corresponding path program 1 times [2025-03-03 14:45:47,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:47,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095313412] [2025-03-03 14:45:47,567 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:47,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:47,579 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-03-03 14:45:47,589 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-03-03 14:45:47,589 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:47,589 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:47,812 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-03 14:45:47,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:47,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095313412] [2025-03-03 14:45:47,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095313412] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-03 14:45:47,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [84122793] [2025-03-03 14:45:47,813 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:47,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 14:45:47,813 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 14:45:47,815 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-03 14:45:47,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-03 14:45:47,897 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-03-03 14:45:47,947 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-03-03 14:45:47,947 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:47,947 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:47,951 INFO L256 TraceCheckSpWp]: Trace formula consists of 478 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-03-03 14:45:47,956 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-03 14:45:48,044 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-03 14:45:48,045 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-03 14:45:48,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [84122793] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:48,045 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-03 14:45:48,045 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-03-03 14:45:48,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278713719] [2025-03-03 14:45:48,045 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:48,046 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-03 14:45:48,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:48,046 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-03 14:45:48,046 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-03-03 14:45:48,046 INFO L87 Difference]: Start difference. First operand 1108 states and 1499 transitions. Second operand has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-03 14:45:48,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:48,236 INFO L93 Difference]: Finished difference Result 2377 states and 3341 transitions. [2025-03-03 14:45:48,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-03 14:45:48,237 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 90 [2025-03-03 14:45:48,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:48,245 INFO L225 Difference]: With dead ends: 2377 [2025-03-03 14:45:48,245 INFO L226 Difference]: Without dead ends: 1538 [2025-03-03 14:45:48,248 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-03-03 14:45:48,248 INFO L435 NwaCegarLoop]: 440 mSDtfsCounter, 140 mSDsluCounter, 2439 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 2879 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:48,249 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 2879 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:48,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1538 states. [2025-03-03 14:45:48,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1538 to 1116. [2025-03-03 14:45:48,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1116 states, 851 states have (on average 1.354876615746181) internal successors, (1153), 858 states have internal predecessors, (1153), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-03-03 14:45:48,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 1501 transitions. [2025-03-03 14:45:48,319 INFO L78 Accepts]: Start accepts. Automaton has 1116 states and 1501 transitions. Word has length 90 [2025-03-03 14:45:48,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:48,320 INFO L471 AbstractCegarLoop]: Abstraction has 1116 states and 1501 transitions. [2025-03-03 14:45:48,320 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-03 14:45:48,320 INFO L276 IsEmpty]: Start isEmpty. Operand 1116 states and 1501 transitions. [2025-03-03 14:45:48,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-03-03 14:45:48,321 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:48,321 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:48,328 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-03-03 14:45:48,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-03-03 14:45:48,522 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:48,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:48,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1809193859, now seen corresponding path program 1 times [2025-03-03 14:45:48,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:48,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17269010] [2025-03-03 14:45:48,523 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:48,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:48,534 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-03-03 14:45:48,545 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-03-03 14:45:48,546 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:48,546 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:48,657 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:48,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:48,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17269010] [2025-03-03 14:45:48,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [17269010] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:48,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:48,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 14:45:48,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246345995] [2025-03-03 14:45:48,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:48,658 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 14:45:48,658 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:48,659 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 14:45:48,659 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:48,659 INFO L87 Difference]: Start difference. First operand 1116 states and 1501 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-03 14:45:48,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:48,826 INFO L93 Difference]: Finished difference Result 2016 states and 2722 transitions. [2025-03-03 14:45:48,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 14:45:48,826 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 93 [2025-03-03 14:45:48,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:48,832 INFO L225 Difference]: With dead ends: 2016 [2025-03-03 14:45:48,832 INFO L226 Difference]: Without dead ends: 1163 [2025-03-03 14:45:48,834 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-03 14:45:48,835 INFO L435 NwaCegarLoop]: 260 mSDtfsCounter, 256 mSDsluCounter, 1231 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 257 SdHoareTripleChecker+Valid, 1491 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:48,835 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [257 Valid, 1491 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:48,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1163 states. [2025-03-03 14:45:48,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1163 to 1121. [2025-03-03 14:45:48,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1121 states, 867 states have (on average 1.3471741637831602) internal successors, (1168), 879 states have internal predecessors, (1168), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-03-03 14:45:48,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1121 states to 1121 states and 1492 transitions. [2025-03-03 14:45:48,897 INFO L78 Accepts]: Start accepts. Automaton has 1121 states and 1492 transitions. Word has length 93 [2025-03-03 14:45:48,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:48,897 INFO L471 AbstractCegarLoop]: Abstraction has 1121 states and 1492 transitions. [2025-03-03 14:45:48,898 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-03 14:45:48,898 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 1492 transitions. [2025-03-03 14:45:48,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-03-03 14:45:48,899 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:48,899 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:48,899 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-03 14:45:48,899 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:48,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:48,901 INFO L85 PathProgramCache]: Analyzing trace with hash 958566529, now seen corresponding path program 1 times [2025-03-03 14:45:48,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:48,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363627463] [2025-03-03 14:45:48,901 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:48,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:48,911 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-03-03 14:45:48,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-03-03 14:45:48,944 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:48,944 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:49,292 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-03 14:45:49,292 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:49,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363627463] [2025-03-03 14:45:49,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1363627463] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:49,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:49,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 14:45:49,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [900913245] [2025-03-03 14:45:49,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:49,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 14:45:49,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:49,293 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 14:45:49,293 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:49,293 INFO L87 Difference]: Start difference. First operand 1121 states and 1492 transitions. Second operand has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-03 14:45:49,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:49,476 INFO L93 Difference]: Finished difference Result 1997 states and 2669 transitions. [2025-03-03 14:45:49,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 14:45:49,476 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 95 [2025-03-03 14:45:49,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:49,482 INFO L225 Difference]: With dead ends: 1997 [2025-03-03 14:45:49,482 INFO L226 Difference]: Without dead ends: 1119 [2025-03-03 14:45:49,484 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-03 14:45:49,484 INFO L435 NwaCegarLoop]: 289 mSDtfsCounter, 151 mSDsluCounter, 1318 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 1607 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:49,484 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 1607 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:49,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1119 states. [2025-03-03 14:45:49,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1119 to 1011. [2025-03-03 14:45:49,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 784 states have (on average 1.3494897959183674) internal successors, (1058), 794 states have internal predecessors, (1058), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-03-03 14:45:49,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1348 transitions. [2025-03-03 14:45:49,533 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1348 transitions. Word has length 95 [2025-03-03 14:45:49,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:49,534 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1348 transitions. [2025-03-03 14:45:49,534 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-03 14:45:49,534 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1348 transitions. [2025-03-03 14:45:49,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2025-03-03 14:45:49,535 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:49,535 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:49,535 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-03 14:45:49,535 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:49,535 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:49,535 INFO L85 PathProgramCache]: Analyzing trace with hash 635989907, now seen corresponding path program 1 times [2025-03-03 14:45:49,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:49,535 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748144279] [2025-03-03 14:45:49,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:49,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:49,547 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 96 statements into 1 equivalence classes. [2025-03-03 14:45:49,564 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 96 of 96 statements. [2025-03-03 14:45:49,564 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:49,564 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:49,950 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-03 14:45:49,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:49,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748144279] [2025-03-03 14:45:49,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748144279] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:49,951 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:49,951 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 14:45:49,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768254541] [2025-03-03 14:45:49,951 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:49,951 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 14:45:49,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:49,952 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 14:45:49,952 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:49,952 INFO L87 Difference]: Start difference. First operand 1011 states and 1348 transitions. Second operand has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:50,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:50,296 INFO L93 Difference]: Finished difference Result 1941 states and 2585 transitions. [2025-03-03 14:45:50,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 14:45:50,296 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 96 [2025-03-03 14:45:50,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:50,302 INFO L225 Difference]: With dead ends: 1941 [2025-03-03 14:45:50,302 INFO L226 Difference]: Without dead ends: 1103 [2025-03-03 14:45:50,304 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-03-03 14:45:50,305 INFO L435 NwaCegarLoop]: 323 mSDtfsCounter, 420 mSDsluCounter, 1158 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 426 SdHoareTripleChecker+Valid, 1481 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:50,305 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [426 Valid, 1481 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 14:45:50,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1103 states. [2025-03-03 14:45:50,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1103 to 1049. [2025-03-03 14:45:50,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1049 states, 807 states have (on average 1.3283767038413878) internal successors, (1072), 818 states have internal predecessors, (1072), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2025-03-03 14:45:50,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1049 states to 1049 states and 1380 transitions. [2025-03-03 14:45:50,373 INFO L78 Accepts]: Start accepts. Automaton has 1049 states and 1380 transitions. Word has length 96 [2025-03-03 14:45:50,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:50,373 INFO L471 AbstractCegarLoop]: Abstraction has 1049 states and 1380 transitions. [2025-03-03 14:45:50,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:50,374 INFO L276 IsEmpty]: Start isEmpty. Operand 1049 states and 1380 transitions. [2025-03-03 14:45:50,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2025-03-03 14:45:50,375 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:50,375 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:50,375 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-03 14:45:50,375 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:50,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:50,375 INFO L85 PathProgramCache]: Analyzing trace with hash -347487727, now seen corresponding path program 1 times [2025-03-03 14:45:50,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:50,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145427834] [2025-03-03 14:45:50,376 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:50,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:50,386 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 98 statements into 1 equivalence classes. [2025-03-03 14:45:50,403 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 98 of 98 statements. [2025-03-03 14:45:50,403 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:50,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:50,760 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-03 14:45:50,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:50,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145427834] [2025-03-03 14:45:50,760 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1145427834] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:50,760 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:50,760 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 14:45:50,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [815508139] [2025-03-03 14:45:50,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:50,761 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 14:45:50,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:50,761 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 14:45:50,761 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:50,762 INFO L87 Difference]: Start difference. First operand 1049 states and 1380 transitions. Second operand has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-03 14:45:51,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:51,150 INFO L93 Difference]: Finished difference Result 2028 states and 2653 transitions. [2025-03-03 14:45:51,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 14:45:51,151 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 98 [2025-03-03 14:45:51,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:51,158 INFO L225 Difference]: With dead ends: 2028 [2025-03-03 14:45:51,159 INFO L226 Difference]: Without dead ends: 1165 [2025-03-03 14:45:51,161 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-03-03 14:45:51,162 INFO L435 NwaCegarLoop]: 283 mSDtfsCounter, 409 mSDsluCounter, 988 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 1271 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:51,162 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 1271 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 14:45:51,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1165 states. [2025-03-03 14:45:51,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1165 to 1071. [2025-03-03 14:45:51,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1071 states, 821 states have (on average 1.313032886723508) internal successors, (1078), 833 states have internal predecessors, (1078), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2025-03-03 14:45:51,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1071 states to 1071 states and 1392 transitions. [2025-03-03 14:45:51,246 INFO L78 Accepts]: Start accepts. Automaton has 1071 states and 1392 transitions. Word has length 98 [2025-03-03 14:45:51,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:51,247 INFO L471 AbstractCegarLoop]: Abstraction has 1071 states and 1392 transitions. [2025-03-03 14:45:51,247 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.714285714285714) internal successors, (75), 6 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-03 14:45:51,247 INFO L276 IsEmpty]: Start isEmpty. Operand 1071 states and 1392 transitions. [2025-03-03 14:45:51,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2025-03-03 14:45:51,248 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:51,248 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:51,248 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-03 14:45:51,248 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:51,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:51,249 INFO L85 PathProgramCache]: Analyzing trace with hash 1879289154, now seen corresponding path program 1 times [2025-03-03 14:45:51,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:51,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477787552] [2025-03-03 14:45:51,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:51,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:51,261 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-03-03 14:45:51,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-03-03 14:45:51,270 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:51,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:51,320 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-03 14:45:51,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:51,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477787552] [2025-03-03 14:45:51,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477787552] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:51,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:51,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:51,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1382286092] [2025-03-03 14:45:51,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:51,321 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:51,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:51,322 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:51,322 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:51,322 INFO L87 Difference]: Start difference. First operand 1071 states and 1392 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:51,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:51,500 INFO L93 Difference]: Finished difference Result 2787 states and 3650 transitions. [2025-03-03 14:45:51,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:51,500 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2025-03-03 14:45:51,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:51,510 INFO L225 Difference]: With dead ends: 2787 [2025-03-03 14:45:51,510 INFO L226 Difference]: Without dead ends: 1980 [2025-03-03 14:45:51,513 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:51,514 INFO L435 NwaCegarLoop]: 470 mSDtfsCounter, 200 mSDsluCounter, 702 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1172 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:51,514 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1172 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:51,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1980 states. [2025-03-03 14:45:51,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1980 to 1797. [2025-03-03 14:45:51,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1797 states, 1359 states have (on average 1.3142016188373804) internal successors, (1786), 1379 states have internal predecessors, (1786), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2025-03-03 14:45:51,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1797 states to 1797 states and 2346 transitions. [2025-03-03 14:45:51,656 INFO L78 Accepts]: Start accepts. Automaton has 1797 states and 2346 transitions. Word has length 99 [2025-03-03 14:45:51,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:51,656 INFO L471 AbstractCegarLoop]: Abstraction has 1797 states and 2346 transitions. [2025-03-03 14:45:51,656 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:51,656 INFO L276 IsEmpty]: Start isEmpty. Operand 1797 states and 2346 transitions. [2025-03-03 14:45:51,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2025-03-03 14:45:51,658 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:51,658 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:51,658 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-03 14:45:51,658 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:51,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:51,659 INFO L85 PathProgramCache]: Analyzing trace with hash 1487507205, now seen corresponding path program 1 times [2025-03-03 14:45:51,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:51,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251005880] [2025-03-03 14:45:51,659 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:51,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:51,673 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-03-03 14:45:51,681 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-03-03 14:45:51,682 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:51,682 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:51,738 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-03 14:45:51,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:51,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251005880] [2025-03-03 14:45:51,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251005880] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:51,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:51,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:51,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634575142] [2025-03-03 14:45:51,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:51,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:51,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:51,740 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:51,740 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:51,740 INFO L87 Difference]: Start difference. First operand 1797 states and 2346 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:51,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:51,982 INFO L93 Difference]: Finished difference Result 4168 states and 5466 transitions. [2025-03-03 14:45:51,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:51,982 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2025-03-03 14:45:51,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:51,994 INFO L225 Difference]: With dead ends: 4168 [2025-03-03 14:45:51,994 INFO L226 Difference]: Without dead ends: 2706 [2025-03-03 14:45:51,998 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:52,000 INFO L435 NwaCegarLoop]: 488 mSDtfsCounter, 201 mSDsluCounter, 718 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 1206 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:52,001 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 1206 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:52,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2706 states. [2025-03-03 14:45:52,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2706 to 2521. [2025-03-03 14:45:52,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2521 states, 1895 states have (on average 1.312928759894459) internal successors, (2488), 1923 states have internal predecessors, (2488), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2025-03-03 14:45:52,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2521 states to 2521 states and 3294 transitions. [2025-03-03 14:45:52,235 INFO L78 Accepts]: Start accepts. Automaton has 2521 states and 3294 transitions. Word has length 101 [2025-03-03 14:45:52,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:52,235 INFO L471 AbstractCegarLoop]: Abstraction has 2521 states and 3294 transitions. [2025-03-03 14:45:52,236 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-03 14:45:52,236 INFO L276 IsEmpty]: Start isEmpty. Operand 2521 states and 3294 transitions. [2025-03-03 14:45:52,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2025-03-03 14:45:52,237 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:52,237 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:52,237 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-03 14:45:52,237 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:52,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:52,238 INFO L85 PathProgramCache]: Analyzing trace with hash 612632039, now seen corresponding path program 1 times [2025-03-03 14:45:52,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:52,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552934403] [2025-03-03 14:45:52,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:52,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:52,249 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-03-03 14:45:52,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-03-03 14:45:52,321 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:52,321 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:52,321 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-03 14:45:52,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-03-03 14:45:52,395 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-03-03 14:45:52,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:52,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:52,442 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-03 14:45:52,442 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-03 14:45:52,443 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-03 14:45:52,444 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-03 14:45:52,447 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:52,555 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-03 14:45:52,557 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.03 02:45:52 BoogieIcfgContainer [2025-03-03 14:45:52,557 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-03 14:45:52,558 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-03 14:45:52,558 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-03 14:45:52,558 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-03 14:45:52,559 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:45:42" (3/4) ... [2025-03-03 14:45:52,560 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-03 14:45:52,692 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 82. [2025-03-03 14:45:52,779 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-03 14:45:52,783 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-03 14:45:52,783 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-03 14:45:52,784 INFO L158 Benchmark]: Toolchain (without parser) took 11094.39ms. Allocated memory was 142.6MB in the beginning and 587.2MB in the end (delta: 444.6MB). Free memory was 106.2MB in the beginning and 217.9MB in the end (delta: -111.7MB). Peak memory consumption was 332.9MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 116.3MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: CACSL2BoogieTranslator took 292.40ms. Allocated memory is still 142.6MB. Free memory was 106.2MB in the beginning and 88.0MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: Boogie Procedure Inliner took 36.52ms. Allocated memory is still 142.6MB. Free memory was 88.0MB in the beginning and 84.6MB in the end (delta: 3.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: Boogie Preprocessor took 54.41ms. Allocated memory is still 142.6MB. Free memory was 84.6MB in the beginning and 81.5MB in the end (delta: 3.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: IcfgBuilder took 669.66ms. Allocated memory is still 142.6MB. Free memory was 81.5MB in the beginning and 39.6MB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,784 INFO L158 Benchmark]: TraceAbstraction took 9810.60ms. Allocated memory was 142.6MB in the beginning and 587.2MB in the end (delta: 444.6MB). Free memory was 39.0MB in the beginning and 247.3MB in the end (delta: -208.3MB). Peak memory consumption was 232.2MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,785 INFO L158 Benchmark]: Witness Printer took 224.86ms. Allocated memory is still 587.2MB. Free memory was 247.3MB in the beginning and 217.9MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-03-03 14:45:52,785 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 116.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 292.40ms. Allocated memory is still 142.6MB. Free memory was 106.2MB in the beginning and 88.0MB in the end (delta: 18.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 36.52ms. Allocated memory is still 142.6MB. Free memory was 88.0MB in the beginning and 84.6MB in the end (delta: 3.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 54.41ms. Allocated memory is still 142.6MB. Free memory was 84.6MB in the beginning and 81.5MB in the end (delta: 3.1MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 669.66ms. Allocated memory is still 142.6MB. Free memory was 81.5MB in the beginning and 39.6MB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 9810.60ms. Allocated memory was 142.6MB in the beginning and 587.2MB in the end (delta: 444.6MB). Free memory was 39.0MB in the beginning and 247.3MB in the end (delta: -208.3MB). Peak memory consumption was 232.2MB. Max. memory is 16.1GB. * Witness Printer took 224.86ms. Allocated memory is still 587.2MB. Free memory was 247.3MB in the beginning and 217.9MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE i2 < 10 [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L462] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L464] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L617] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L619] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 180 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.6s, OverallIterations: 23, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3432 SdHoareTripleChecker+Valid, 1.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3361 mSDsluCounter, 22605 SdHoareTripleChecker+Invalid, 1.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 16191 mSDsCounter, 99 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1318 IncrementalHoareTripleChecker+Invalid, 1417 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 99 mSolverCounterUnsat, 6414 mSDtfsCounter, 1318 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 256 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2521occurred in iteration=22, InterpolantAutomatonStates: 119, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.3s AutomataMinimizationTime, 22 MinimizatonAttempts, 1529 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 3.5s InterpolantComputationTime, 1783 NumberOfCodeBlocks, 1783 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1659 ConstructedInterpolants, 0 QuantifiedInterpolants, 3711 SizeOfPredicates, 1 NumberOfNonLiveVariables, 478 ConjunctsInSsa, 13 ConjunctsInUnsatCore, 23 InterpolantComputations, 22 PerfectInterpolantSequences, 169/172 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-03 14:45:52,811 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE