./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/toy1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/toy1.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c40ed6d21fe4d61cae011269f1fdb95d05149cea0f3470f42c6e8f2fc8fb0d6a --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 14:44:54,553 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 14:44:54,615 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-03 14:44:54,621 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 14:44:54,622 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 14:44:54,643 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 14:44:54,644 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 14:44:54,644 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 14:44:54,645 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 14:44:54,645 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 14:44:54,646 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 14:44:54,646 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 14:44:54,646 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 14:44:54,646 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 14:44:54,646 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 14:44:54,647 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 14:44:54,647 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 14:44:54,647 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:44:54,648 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 14:44:54,648 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c40ed6d21fe4d61cae011269f1fdb95d05149cea0f3470f42c6e8f2fc8fb0d6a [2025-03-03 14:44:54,894 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 14:44:54,902 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 14:44:54,904 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 14:44:54,905 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 14:44:54,905 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 14:44:54,906 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy1.cil.c [2025-03-03 14:44:56,162 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6cc5a7a29/772b60025c0b4973992cd943981a1532/FLAG814779492 [2025-03-03 14:44:56,451 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 14:44:56,451 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy1.cil.c [2025-03-03 14:44:56,477 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6cc5a7a29/772b60025c0b4973992cd943981a1532/FLAG814779492 [2025-03-03 14:44:56,494 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6cc5a7a29/772b60025c0b4973992cd943981a1532 [2025-03-03 14:44:56,496 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 14:44:56,497 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 14:44:56,500 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 14:44:56,500 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 14:44:56,503 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 14:44:56,504 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,505 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1b96a6dc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56, skipping insertion in model container [2025-03-03 14:44:56,505 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,528 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 14:44:56,637 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy1.cil.c[698,711] [2025-03-03 14:44:56,698 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:44:56,708 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 14:44:56,717 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy1.cil.c[698,711] [2025-03-03 14:44:56,749 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:44:56,761 INFO L204 MainTranslator]: Completed translation [2025-03-03 14:44:56,762 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56 WrapperNode [2025-03-03 14:44:56,762 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 14:44:56,763 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 14:44:56,763 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 14:44:56,763 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 14:44:56,768 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,773 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,790 INFO L138 Inliner]: procedures = 20, calls = 16, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 346 [2025-03-03 14:44:56,790 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 14:44:56,791 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 14:44:56,791 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 14:44:56,791 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 14:44:56,797 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,797 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,805 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,816 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 14:44:56,816 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,816 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,824 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,825 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,826 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,827 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,828 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 14:44:56,829 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 14:44:56,829 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 14:44:56,829 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 14:44:56,830 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:44:56,845 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 14:44:56,860 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 14:44:56,863 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 14:44:56,881 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 14:44:56,881 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-03 14:44:56,881 INFO L130 BoogieDeclarations]: Found specification of procedure error [2025-03-03 14:44:56,881 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2025-03-03 14:44:56,881 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 14:44:56,881 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 14:44:56,926 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 14:44:56,928 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 14:44:57,254 INFO L? ?]: Removed 20 outVars from TransFormulas that were not future-live. [2025-03-03 14:44:57,255 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 14:44:57,269 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 14:44:57,269 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 14:44:57,269 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57 BoogieIcfgContainer [2025-03-03 14:44:57,269 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 14:44:57,271 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 14:44:57,271 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 14:44:57,274 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 14:44:57,274 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 02:44:56" (1/3) ... [2025-03-03 14:44:57,274 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@402266bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:44:57, skipping insertion in model container [2025-03-03 14:44:57,274 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56" (2/3) ... [2025-03-03 14:44:57,275 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@402266bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:44:57, skipping insertion in model container [2025-03-03 14:44:57,275 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57" (3/3) ... [2025-03-03 14:44:57,276 INFO L128 eAbstractionObserver]: Analyzing ICFG toy1.cil.c [2025-03-03 14:44:57,287 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 14:44:57,289 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG toy1.cil.c that has 2 procedures, 140 locations, 1 initial locations, 6 loop locations, and 1 error locations. [2025-03-03 14:44:57,337 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 14:44:57,347 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@32327662, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 14:44:57,348 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 14:44:57,353 INFO L276 IsEmpty]: Start isEmpty. Operand has 140 states, 135 states have (on average 1.7703703703703704) internal successors, (239), 138 states have internal predecessors, (239), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-03 14:44:57,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:57,358 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:57,359 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:57,359 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:57,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:57,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1209328665, now seen corresponding path program 1 times [2025-03-03 14:44:57,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:57,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105660501] [2025-03-03 14:44:57,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:57,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:57,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:57,440 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:57,441 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:57,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:57,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:57,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:57,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105660501] [2025-03-03 14:44:57,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105660501] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:57,627 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:57,627 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:57,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765751348] [2025-03-03 14:44:57,629 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:57,632 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:57,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:57,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:57,646 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:57,649 INFO L87 Difference]: Start difference. First operand has 140 states, 135 states have (on average 1.7703703703703704) internal successors, (239), 138 states have internal predecessors, (239), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:57,690 INFO L93 Difference]: Finished difference Result 272 states and 476 transitions. [2025-03-03 14:44:57,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:57,694 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:57,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:57,710 INFO L225 Difference]: With dead ends: 272 [2025-03-03 14:44:57,710 INFO L226 Difference]: Without dead ends: 134 [2025-03-03 14:44:57,713 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:57,715 INFO L435 NwaCegarLoop]: 231 mSDtfsCounter, 229 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 231 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:57,715 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [229 Valid, 231 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:57,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2025-03-03 14:44:57,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2025-03-03 14:44:57,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 131 states have (on average 1.7251908396946565) internal successors, (226), 132 states have internal predecessors, (226), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 228 transitions. [2025-03-03 14:44:57,744 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 228 transitions. Word has length 37 [2025-03-03 14:44:57,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:57,744 INFO L471 AbstractCegarLoop]: Abstraction has 134 states and 228 transitions. [2025-03-03 14:44:57,744 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,745 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 228 transitions. [2025-03-03 14:44:57,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:57,746 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:57,746 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:57,746 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-03 14:44:57,746 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:57,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:57,747 INFO L85 PathProgramCache]: Analyzing trace with hash 183836666, now seen corresponding path program 1 times [2025-03-03 14:44:57,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:57,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167179479] [2025-03-03 14:44:57,747 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:57,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:57,758 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:57,762 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:57,762 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:57,762 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:57,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:57,830 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:57,830 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167179479] [2025-03-03 14:44:57,830 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167179479] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:57,830 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:57,830 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:57,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437573559] [2025-03-03 14:44:57,830 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:57,831 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:57,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:57,832 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:57,832 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:57,832 INFO L87 Difference]: Start difference. First operand 134 states and 228 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:57,895 INFO L93 Difference]: Finished difference Result 364 states and 616 transitions. [2025-03-03 14:44:57,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:57,899 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:57,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:57,901 INFO L225 Difference]: With dead ends: 364 [2025-03-03 14:44:57,901 INFO L226 Difference]: Without dead ends: 233 [2025-03-03 14:44:57,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:57,902 INFO L435 NwaCegarLoop]: 220 mSDtfsCounter, 594 mSDsluCounter, 164 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 594 SdHoareTripleChecker+Valid, 384 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:57,902 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [594 Valid, 384 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:57,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2025-03-03 14:44:57,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2025-03-03 14:44:57,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 225 states have (on average 1.7022222222222223) internal successors, (383), 226 states have internal predecessors, (383), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 385 transitions. [2025-03-03 14:44:57,921 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 385 transitions. Word has length 37 [2025-03-03 14:44:57,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:57,921 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 385 transitions. [2025-03-03 14:44:57,921 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,921 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 385 transitions. [2025-03-03 14:44:57,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:57,922 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:57,922 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:57,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-03 14:44:57,922 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:57,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:57,923 INFO L85 PathProgramCache]: Analyzing trace with hash 195152793, now seen corresponding path program 1 times [2025-03-03 14:44:57,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:57,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712258551] [2025-03-03 14:44:57,923 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:57,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:57,930 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:57,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:57,941 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:57,941 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712258551] [2025-03-03 14:44:58,004 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1712258551] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:58,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513737799] [2025-03-03 14:44:58,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,005 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:58,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,005 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:58,005 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,006 INFO L87 Difference]: Start difference. First operand 228 states and 385 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,037 INFO L93 Difference]: Finished difference Result 447 states and 757 transitions. [2025-03-03 14:44:58,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:58,037 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,038 INFO L225 Difference]: With dead ends: 447 [2025-03-03 14:44:58,038 INFO L226 Difference]: Without dead ends: 228 [2025-03-03 14:44:58,039 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,039 INFO L435 NwaCegarLoop]: 207 mSDtfsCounter, 197 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 197 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,040 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [197 Valid, 211 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2025-03-03 14:44:58,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 228. [2025-03-03 14:44:58,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 225 states have (on average 1.6488888888888888) internal successors, (371), 226 states have internal predecessors, (371), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 373 transitions. [2025-03-03 14:44:58,057 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 373 transitions. Word has length 37 [2025-03-03 14:44:58,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,057 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 373 transitions. [2025-03-03 14:44:58,057 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,057 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 373 transitions. [2025-03-03 14:44:58,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,058 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,058 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,058 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-03 14:44:58,058 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,058 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,059 INFO L85 PathProgramCache]: Analyzing trace with hash -2053403109, now seen corresponding path program 1 times [2025-03-03 14:44:58,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062022740] [2025-03-03 14:44:58,059 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,064 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,067 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,067 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,103 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,103 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062022740] [2025-03-03 14:44:58,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1062022740] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,104 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,104 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1842631598] [2025-03-03 14:44:58,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,104 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,104 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,105 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,105 INFO L87 Difference]: Start difference. First operand 228 states and 373 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,193 INFO L93 Difference]: Finished difference Result 625 states and 1022 transitions. [2025-03-03 14:44:58,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,194 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,196 INFO L225 Difference]: With dead ends: 625 [2025-03-03 14:44:58,196 INFO L226 Difference]: Without dead ends: 407 [2025-03-03 14:44:58,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,200 INFO L435 NwaCegarLoop]: 336 mSDtfsCounter, 383 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 383 SdHoareTripleChecker+Valid, 480 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,200 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [383 Valid, 480 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:44:58,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2025-03-03 14:44:58,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 228. [2025-03-03 14:44:58,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 225 states have (on average 1.6355555555555557) internal successors, (368), 226 states have internal predecessors, (368), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 370 transitions. [2025-03-03 14:44:58,222 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 370 transitions. Word has length 37 [2025-03-03 14:44:58,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,222 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 370 transitions. [2025-03-03 14:44:58,222 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,222 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 370 transitions. [2025-03-03 14:44:58,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,223 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,223 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,223 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-03 14:44:58,223 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1986827642, now seen corresponding path program 1 times [2025-03-03 14:44:58,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144162236] [2025-03-03 14:44:58,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,232 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,236 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,239 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,239 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,304 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144162236] [2025-03-03 14:44:58,304 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144162236] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,304 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,304 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525653412] [2025-03-03 14:44:58,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,305 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,305 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,305 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,305 INFO L87 Difference]: Start difference. First operand 228 states and 370 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,376 INFO L93 Difference]: Finished difference Result 626 states and 1016 transitions. [2025-03-03 14:44:58,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,378 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,379 INFO L225 Difference]: With dead ends: 626 [2025-03-03 14:44:58,379 INFO L226 Difference]: Without dead ends: 409 [2025-03-03 14:44:58,380 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,382 INFO L435 NwaCegarLoop]: 338 mSDtfsCounter, 381 mSDsluCounter, 149 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 381 SdHoareTripleChecker+Valid, 487 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,382 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [381 Valid, 487 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 409 states. [2025-03-03 14:44:58,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 409 to 228. [2025-03-03 14:44:58,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 225 states have (on average 1.6222222222222222) internal successors, (365), 226 states have internal predecessors, (365), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 367 transitions. [2025-03-03 14:44:58,398 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 367 transitions. Word has length 37 [2025-03-03 14:44:58,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,398 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 367 transitions. [2025-03-03 14:44:58,399 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,399 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 367 transitions. [2025-03-03 14:44:58,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,401 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,401 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,402 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-03 14:44:58,402 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,402 INFO L85 PathProgramCache]: Analyzing trace with hash -1346525637, now seen corresponding path program 1 times [2025-03-03 14:44:58,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730767718] [2025-03-03 14:44:58,402 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,413 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,422 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,423 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730767718] [2025-03-03 14:44:58,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [730767718] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875312389] [2025-03-03 14:44:58,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,482 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,482 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,482 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,482 INFO L87 Difference]: Start difference. First operand 228 states and 367 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,578 INFO L93 Difference]: Finished difference Result 783 states and 1256 transitions. [2025-03-03 14:44:58,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,578 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,581 INFO L225 Difference]: With dead ends: 783 [2025-03-03 14:44:58,581 INFO L226 Difference]: Without dead ends: 568 [2025-03-03 14:44:58,582 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,582 INFO L435 NwaCegarLoop]: 337 mSDtfsCounter, 385 mSDsluCounter, 263 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 385 SdHoareTripleChecker+Valid, 600 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,583 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [385 Valid, 600 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:44:58,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2025-03-03 14:44:58,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 375. [2025-03-03 14:44:58,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 372 states have (on average 1.6048387096774193) internal successors, (597), 373 states have internal predecessors, (597), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 599 transitions. [2025-03-03 14:44:58,603 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 599 transitions. Word has length 37 [2025-03-03 14:44:58,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,605 INFO L471 AbstractCegarLoop]: Abstraction has 375 states and 599 transitions. [2025-03-03 14:44:58,605 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,605 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 599 transitions. [2025-03-03 14:44:58,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,606 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,607 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,607 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-03 14:44:58,607 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,607 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,607 INFO L85 PathProgramCache]: Analyzing trace with hash 871232316, now seen corresponding path program 1 times [2025-03-03 14:44:58,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164213666] [2025-03-03 14:44:58,608 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,617 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,619 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,619 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,620 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,663 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164213666] [2025-03-03 14:44:58,663 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164213666] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,663 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633990260] [2025-03-03 14:44:58,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,664 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,664 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,665 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,665 INFO L87 Difference]: Start difference. First operand 375 states and 599 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,776 INFO L93 Difference]: Finished difference Result 1138 states and 1820 transitions. [2025-03-03 14:44:58,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:58,776 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,779 INFO L225 Difference]: With dead ends: 1138 [2025-03-03 14:44:58,779 INFO L226 Difference]: Without dead ends: 777 [2025-03-03 14:44:58,780 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,780 INFO L435 NwaCegarLoop]: 193 mSDtfsCounter, 511 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 511 SdHoareTripleChecker+Valid, 589 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,781 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [511 Valid, 589 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:44:58,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2025-03-03 14:44:58,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 650. [2025-03-03 14:44:58,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 650 states, 647 states have (on average 1.58887171561051) internal successors, (1028), 648 states have internal predecessors, (1028), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 650 states to 650 states and 1030 transitions. [2025-03-03 14:44:58,810 INFO L78 Accepts]: Start accepts. Automaton has 650 states and 1030 transitions. Word has length 37 [2025-03-03 14:44:58,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,811 INFO L471 AbstractCegarLoop]: Abstraction has 650 states and 1030 transitions. [2025-03-03 14:44:58,811 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,811 INFO L276 IsEmpty]: Start isEmpty. Operand 650 states and 1030 transitions. [2025-03-03 14:44:58,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,812 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,812 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,812 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-03 14:44:58,813 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,813 INFO L85 PathProgramCache]: Analyzing trace with hash -317122143, now seen corresponding path program 1 times [2025-03-03 14:44:58,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,813 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962113851] [2025-03-03 14:44:58,813 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,818 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,823 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,824 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,824 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962113851] [2025-03-03 14:44:58,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1962113851] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:58,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214390572] [2025-03-03 14:44:58,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,861 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:58,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,861 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:58,862 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,862 INFO L87 Difference]: Start difference. First operand 650 states and 1030 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,909 INFO L93 Difference]: Finished difference Result 1607 states and 2549 transitions. [2025-03-03 14:44:58,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:58,909 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:58,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,913 INFO L225 Difference]: With dead ends: 1607 [2025-03-03 14:44:58,913 INFO L226 Difference]: Without dead ends: 969 [2025-03-03 14:44:58,915 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,915 INFO L435 NwaCegarLoop]: 199 mSDtfsCounter, 182 mSDsluCounter, 157 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 356 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,915 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 356 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2025-03-03 14:44:58,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 965. [2025-03-03 14:44:58,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 965 states, 962 states have (on average 1.5706860706860706) internal successors, (1511), 963 states have internal predecessors, (1511), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 965 states to 965 states and 1513 transitions. [2025-03-03 14:44:58,949 INFO L78 Accepts]: Start accepts. Automaton has 965 states and 1513 transitions. Word has length 37 [2025-03-03 14:44:58,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,949 INFO L471 AbstractCegarLoop]: Abstraction has 965 states and 1513 transitions. [2025-03-03 14:44:58,949 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,950 INFO L276 IsEmpty]: Start isEmpty. Operand 965 states and 1513 transitions. [2025-03-03 14:44:58,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:58,950 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,950 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,950 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-03 14:44:58,950 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,951 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,951 INFO L85 PathProgramCache]: Analyzing trace with hash 345957795, now seen corresponding path program 1 times [2025-03-03 14:44:58,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834812491] [2025-03-03 14:44:58,951 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,955 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:58,957 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:58,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834812491] [2025-03-03 14:44:58,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834812491] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352164108] [2025-03-03 14:44:58,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,005 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,006 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,006 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,006 INFO L87 Difference]: Start difference. First operand 965 states and 1513 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,095 INFO L93 Difference]: Finished difference Result 2502 states and 3922 transitions. [2025-03-03 14:44:59,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,096 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:59,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,101 INFO L225 Difference]: With dead ends: 2502 [2025-03-03 14:44:59,102 INFO L226 Difference]: Without dead ends: 1553 [2025-03-03 14:44:59,105 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,106 INFO L435 NwaCegarLoop]: 190 mSDtfsCounter, 497 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 497 SdHoareTripleChecker+Valid, 342 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,106 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [497 Valid, 342 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1553 states. [2025-03-03 14:44:59,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1553 to 965. [2025-03-03 14:44:59,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 965 states, 962 states have (on average 1.5592515592515592) internal successors, (1500), 963 states have internal predecessors, (1500), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 965 states to 965 states and 1502 transitions. [2025-03-03 14:44:59,152 INFO L78 Accepts]: Start accepts. Automaton has 965 states and 1502 transitions. Word has length 37 [2025-03-03 14:44:59,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,153 INFO L471 AbstractCegarLoop]: Abstraction has 965 states and 1502 transitions. [2025-03-03 14:44:59,153 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,153 INFO L276 IsEmpty]: Start isEmpty. Operand 965 states and 1502 transitions. [2025-03-03 14:44:59,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:59,154 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,154 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-03 14:44:59,155 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,156 INFO L85 PathProgramCache]: Analyzing trace with hash -651114558, now seen corresponding path program 1 times [2025-03-03 14:44:59,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354236282] [2025-03-03 14:44:59,156 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,162 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:59,168 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:59,169 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,169 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,207 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,207 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354236282] [2025-03-03 14:44:59,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [354236282] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,207 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:59,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673609846] [2025-03-03 14:44:59,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,208 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,208 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,208 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,209 INFO L87 Difference]: Start difference. First operand 965 states and 1502 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,326 INFO L93 Difference]: Finished difference Result 2506 states and 3883 transitions. [2025-03-03 14:44:59,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,327 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:59,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,333 INFO L225 Difference]: With dead ends: 2506 [2025-03-03 14:44:59,333 INFO L226 Difference]: Without dead ends: 1563 [2025-03-03 14:44:59,335 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,335 INFO L435 NwaCegarLoop]: 187 mSDtfsCounter, 481 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 481 SdHoareTripleChecker+Valid, 331 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,336 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [481 Valid, 331 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1563 states. [2025-03-03 14:44:59,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1563 to 965. [2025-03-03 14:44:59,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 965 states, 962 states have (on average 1.5446985446985446) internal successors, (1486), 963 states have internal predecessors, (1486), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 965 states to 965 states and 1488 transitions. [2025-03-03 14:44:59,382 INFO L78 Accepts]: Start accepts. Automaton has 965 states and 1488 transitions. Word has length 37 [2025-03-03 14:44:59,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,383 INFO L471 AbstractCegarLoop]: Abstraction has 965 states and 1488 transitions. [2025-03-03 14:44:59,383 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,383 INFO L276 IsEmpty]: Start isEmpty. Operand 965 states and 1488 transitions. [2025-03-03 14:44:59,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:59,383 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,383 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,383 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-03 14:44:59,383 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1161648735, now seen corresponding path program 1 times [2025-03-03 14:44:59,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62943133] [2025-03-03 14:44:59,385 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,391 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:59,397 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:59,397 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62943133] [2025-03-03 14:44:59,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [62943133] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,438 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:59,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642600593] [2025-03-03 14:44:59,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,439 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,439 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,439 INFO L87 Difference]: Start difference. First operand 965 states and 1488 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,532 INFO L93 Difference]: Finished difference Result 2182 states and 3352 transitions. [2025-03-03 14:44:59,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,533 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:59,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,537 INFO L225 Difference]: With dead ends: 2182 [2025-03-03 14:44:59,537 INFO L226 Difference]: Without dead ends: 1245 [2025-03-03 14:44:59,539 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,540 INFO L435 NwaCegarLoop]: 185 mSDtfsCounter, 483 mSDsluCounter, 180 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 365 SdHoareTripleChecker+Invalid, 52 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,540 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 365 Invalid, 52 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1245 states. [2025-03-03 14:44:59,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1245 to 1052. [2025-03-03 14:44:59,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1052 states, 1049 states have (on average 1.5195424213536701) internal successors, (1594), 1050 states have internal predecessors, (1594), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1052 states to 1052 states and 1596 transitions. [2025-03-03 14:44:59,588 INFO L78 Accepts]: Start accepts. Automaton has 1052 states and 1596 transitions. Word has length 37 [2025-03-03 14:44:59,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,589 INFO L471 AbstractCegarLoop]: Abstraction has 1052 states and 1596 transitions. [2025-03-03 14:44:59,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,589 INFO L276 IsEmpty]: Start isEmpty. Operand 1052 states and 1596 transitions. [2025-03-03 14:44:59,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2025-03-03 14:44:59,589 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,589 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,589 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-03 14:44:59,589 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,590 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1667207360, now seen corresponding path program 1 times [2025-03-03 14:44:59,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894885283] [2025-03-03 14:44:59,590 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,596 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-03 14:44:59,599 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-03 14:44:59,599 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,599 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894885283] [2025-03-03 14:44:59,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894885283] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,619 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,620 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104022793] [2025-03-03 14:44:59,620 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,620 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,620 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,621 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,621 INFO L87 Difference]: Start difference. First operand 1052 states and 1596 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,686 INFO L93 Difference]: Finished difference Result 2325 states and 3527 transitions. [2025-03-03 14:44:59,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:59,687 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2025-03-03 14:44:59,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,691 INFO L225 Difference]: With dead ends: 2325 [2025-03-03 14:44:59,691 INFO L226 Difference]: Without dead ends: 1288 [2025-03-03 14:44:59,693 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,694 INFO L435 NwaCegarLoop]: 185 mSDtfsCounter, 121 mSDsluCounter, 143 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 328 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,694 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 328 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1288 states. [2025-03-03 14:44:59,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1288 to 1285. [2025-03-03 14:44:59,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1285 states, 1282 states have (on average 1.5093603744149766) internal successors, (1935), 1283 states have internal predecessors, (1935), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1285 states to 1285 states and 1937 transitions. [2025-03-03 14:44:59,747 INFO L78 Accepts]: Start accepts. Automaton has 1285 states and 1937 transitions. Word has length 37 [2025-03-03 14:44:59,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,747 INFO L471 AbstractCegarLoop]: Abstraction has 1285 states and 1937 transitions. [2025-03-03 14:44:59,747 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,747 INFO L276 IsEmpty]: Start isEmpty. Operand 1285 states and 1937 transitions. [2025-03-03 14:44:59,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-03 14:44:59,748 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,748 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,748 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-03 14:44:59,748 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,748 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,748 INFO L85 PathProgramCache]: Analyzing trace with hash 572244616, now seen corresponding path program 1 times [2025-03-03 14:44:59,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578842070] [2025-03-03 14:44:59,749 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,754 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-03 14:44:59,757 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-03 14:44:59,757 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,757 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,772 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578842070] [2025-03-03 14:44:59,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578842070] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,773 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [541127614] [2025-03-03 14:44:59,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,773 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,774 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,774 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,774 INFO L87 Difference]: Start difference. First operand 1285 states and 1937 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,862 INFO L93 Difference]: Finished difference Result 3209 states and 4877 transitions. [2025-03-03 14:44:59,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:59,863 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-03-03 14:44:59,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,870 INFO L225 Difference]: With dead ends: 3209 [2025-03-03 14:44:59,870 INFO L226 Difference]: Without dead ends: 1951 [2025-03-03 14:44:59,871 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,872 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 88 mSDsluCounter, 176 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 438 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,872 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 438 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1951 states. [2025-03-03 14:44:59,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1951 to 1947. [2025-03-03 14:44:59,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1947 states, 1944 states have (on average 1.5113168724279835) internal successors, (2938), 1945 states have internal predecessors, (2938), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1947 states to 1947 states and 2940 transitions. [2025-03-03 14:44:59,942 INFO L78 Accepts]: Start accepts. Automaton has 1947 states and 2940 transitions. Word has length 48 [2025-03-03 14:44:59,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,942 INFO L471 AbstractCegarLoop]: Abstraction has 1947 states and 2940 transitions. [2025-03-03 14:44:59,942 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,942 INFO L276 IsEmpty]: Start isEmpty. Operand 1947 states and 2940 transitions. [2025-03-03 14:44:59,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-03 14:44:59,943 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,943 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-03 14:44:59,943 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,944 INFO L85 PathProgramCache]: Analyzing trace with hash -452449305, now seen corresponding path program 1 times [2025-03-03 14:44:59,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968548857] [2025-03-03 14:44:59,944 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,950 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-03 14:44:59,952 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-03 14:44:59,952 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,979 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:44:59,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968548857] [2025-03-03 14:44:59,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [968548857] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307157604] [2025-03-03 14:44:59,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,980 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,981 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,981 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,981 INFO L87 Difference]: Start difference. First operand 1947 states and 2940 transitions. Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,041 INFO L93 Difference]: Finished difference Result 3845 states and 5820 transitions. [2025-03-03 14:45:00,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,042 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-03-03 14:45:00,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,048 INFO L225 Difference]: With dead ends: 3845 [2025-03-03 14:45:00,048 INFO L226 Difference]: Without dead ends: 1925 [2025-03-03 14:45:00,051 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,051 INFO L435 NwaCegarLoop]: 190 mSDtfsCounter, 187 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,052 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 190 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1925 states. [2025-03-03 14:45:00,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1925 to 1925. [2025-03-03 14:45:00,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1925 states, 1922 states have (on average 1.514047866805411) internal successors, (2910), 1923 states have internal predecessors, (2910), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1925 states to 1925 states and 2912 transitions. [2025-03-03 14:45:00,113 INFO L78 Accepts]: Start accepts. Automaton has 1925 states and 2912 transitions. Word has length 48 [2025-03-03 14:45:00,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,113 INFO L471 AbstractCegarLoop]: Abstraction has 1925 states and 2912 transitions. [2025-03-03 14:45:00,114 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,114 INFO L276 IsEmpty]: Start isEmpty. Operand 1925 states and 2912 transitions. [2025-03-03 14:45:00,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-03 14:45:00,114 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,115 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,115 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-03 14:45:00,115 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1551490774, now seen corresponding path program 1 times [2025-03-03 14:45:00,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647540997] [2025-03-03 14:45:00,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,120 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-03 14:45:00,122 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-03 14:45:00,122 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,122 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,137 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:00,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,137 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647540997] [2025-03-03 14:45:00,137 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1647540997] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,137 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,137 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515451239] [2025-03-03 14:45:00,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,138 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,138 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,138 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,138 INFO L87 Difference]: Start difference. First operand 1925 states and 2912 transitions. Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,252 INFO L93 Difference]: Finished difference Result 4962 states and 7561 transitions. [2025-03-03 14:45:00,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,252 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2025-03-03 14:45:00,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,262 INFO L225 Difference]: With dead ends: 4962 [2025-03-03 14:45:00,263 INFO L226 Difference]: Without dead ends: 3064 [2025-03-03 14:45:00,267 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,267 INFO L435 NwaCegarLoop]: 245 mSDtfsCounter, 87 mSDsluCounter, 174 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 419 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,268 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 419 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3064 states. [2025-03-03 14:45:00,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3064 to 3060. [2025-03-03 14:45:00,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3060 states, 3057 states have (on average 1.5148838730781813) internal successors, (4631), 3058 states have internal predecessors, (4631), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3060 states to 3060 states and 4633 transitions. [2025-03-03 14:45:00,362 INFO L78 Accepts]: Start accepts. Automaton has 3060 states and 4633 transitions. Word has length 49 [2025-03-03 14:45:00,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,363 INFO L471 AbstractCegarLoop]: Abstraction has 3060 states and 4633 transitions. [2025-03-03 14:45:00,363 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,363 INFO L276 IsEmpty]: Start isEmpty. Operand 3060 states and 4633 transitions. [2025-03-03 14:45:00,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-03 14:45:00,364 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,364 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,364 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-03 14:45:00,365 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,365 INFO L85 PathProgramCache]: Analyzing trace with hash 526796853, now seen corresponding path program 1 times [2025-03-03 14:45:00,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013887822] [2025-03-03 14:45:00,365 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,369 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-03 14:45:00,371 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-03 14:45:00,371 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,371 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,388 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:45:00,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013887822] [2025-03-03 14:45:00,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013887822] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472726835] [2025-03-03 14:45:00,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,389 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,390 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,390 INFO L87 Difference]: Start difference. First operand 3060 states and 4633 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,478 INFO L93 Difference]: Finished difference Result 6070 states and 9207 transitions. [2025-03-03 14:45:00,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,479 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2025-03-03 14:45:00,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,488 INFO L225 Difference]: With dead ends: 6070 [2025-03-03 14:45:00,488 INFO L226 Difference]: Without dead ends: 3039 [2025-03-03 14:45:00,492 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,493 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 185 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,493 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 189 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3039 states. [2025-03-03 14:45:00,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3039 to 3039. [2025-03-03 14:45:00,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3039 states, 3036 states have (on average 1.516798418972332) internal successors, (4605), 3037 states have internal predecessors, (4605), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3039 states to 3039 states and 4607 transitions. [2025-03-03 14:45:00,583 INFO L78 Accepts]: Start accepts. Automaton has 3039 states and 4607 transitions. Word has length 49 [2025-03-03 14:45:00,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,583 INFO L471 AbstractCegarLoop]: Abstraction has 3039 states and 4607 transitions. [2025-03-03 14:45:00,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,583 INFO L276 IsEmpty]: Start isEmpty. Operand 3039 states and 4607 transitions. [2025-03-03 14:45:00,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2025-03-03 14:45:00,584 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,584 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,584 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-03 14:45:00,584 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,585 INFO L85 PathProgramCache]: Analyzing trace with hash 2029980434, now seen corresponding path program 1 times [2025-03-03 14:45:00,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055259319] [2025-03-03 14:45:00,585 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,589 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-03 14:45:00,591 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-03 14:45:00,591 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:00,608 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055259319] [2025-03-03 14:45:00,608 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055259319] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,608 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,608 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132867255] [2025-03-03 14:45:00,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,608 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,609 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,609 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,609 INFO L87 Difference]: Start difference. First operand 3039 states and 4607 transitions. Second operand has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 3 states have internal predecessors, (49), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,795 INFO L93 Difference]: Finished difference Result 8166 states and 12524 transitions. [2025-03-03 14:45:00,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,796 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 3 states have internal predecessors, (49), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 50 [2025-03-03 14:45:00,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,813 INFO L225 Difference]: With dead ends: 8166 [2025-03-03 14:45:00,814 INFO L226 Difference]: Without dead ends: 5156 [2025-03-03 14:45:00,819 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,819 INFO L435 NwaCegarLoop]: 234 mSDtfsCounter, 92 mSDsluCounter, 171 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 405 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,819 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [92 Valid, 405 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5156 states. [2025-03-03 14:45:00,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5156 to 5152. [2025-03-03 14:45:00,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5152 states, 5149 states have (on average 1.5284521266265294) internal successors, (7870), 5150 states have internal predecessors, (7870), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5152 states to 5152 states and 7872 transitions. [2025-03-03 14:45:01,009 INFO L78 Accepts]: Start accepts. Automaton has 5152 states and 7872 transitions. Word has length 50 [2025-03-03 14:45:01,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:01,010 INFO L471 AbstractCegarLoop]: Abstraction has 5152 states and 7872 transitions. [2025-03-03 14:45:01,010 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.333333333333332) internal successors, (49), 3 states have internal predecessors, (49), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,010 INFO L276 IsEmpty]: Start isEmpty. Operand 5152 states and 7872 transitions. [2025-03-03 14:45:01,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2025-03-03 14:45:01,011 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:01,011 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:01,011 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-03 14:45:01,011 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:01,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:01,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1005286513, now seen corresponding path program 1 times [2025-03-03 14:45:01,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:01,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807508738] [2025-03-03 14:45:01,012 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:01,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:01,016 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-03 14:45:01,017 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-03 14:45:01,017 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:01,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:01,029 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:45:01,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:01,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807508738] [2025-03-03 14:45:01,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1807508738] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:01,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:01,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:01,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56326566] [2025-03-03 14:45:01,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:01,030 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:01,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:01,031 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:01,031 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:01,031 INFO L87 Difference]: Start difference. First operand 5152 states and 7872 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:01,171 INFO L93 Difference]: Finished difference Result 10253 states and 15686 transitions. [2025-03-03 14:45:01,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:01,172 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 50 [2025-03-03 14:45:01,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:01,188 INFO L225 Difference]: With dead ends: 10253 [2025-03-03 14:45:01,188 INFO L226 Difference]: Without dead ends: 5130 [2025-03-03 14:45:01,195 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:01,196 INFO L435 NwaCegarLoop]: 188 mSDtfsCounter, 183 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:01,196 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 188 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:01,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5130 states. [2025-03-03 14:45:01,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5130 to 5130. [2025-03-03 14:45:01,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5130 states, 5127 states have (on average 1.529939535790911) internal successors, (7844), 5128 states have internal predecessors, (7844), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5130 states to 5130 states and 7846 transitions. [2025-03-03 14:45:01,351 INFO L78 Accepts]: Start accepts. Automaton has 5130 states and 7846 transitions. Word has length 50 [2025-03-03 14:45:01,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:01,351 INFO L471 AbstractCegarLoop]: Abstraction has 5130 states and 7846 transitions. [2025-03-03 14:45:01,351 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,352 INFO L276 IsEmpty]: Start isEmpty. Operand 5130 states and 7846 transitions. [2025-03-03 14:45:01,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2025-03-03 14:45:01,353 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:01,353 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:01,353 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-03 14:45:01,353 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:01,353 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:01,354 INFO L85 PathProgramCache]: Analyzing trace with hash 520595020, now seen corresponding path program 1 times [2025-03-03 14:45:01,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:01,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589323574] [2025-03-03 14:45:01,354 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:01,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:01,358 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 51 statements into 1 equivalence classes. [2025-03-03 14:45:01,364 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 51 of 51 statements. [2025-03-03 14:45:01,365 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:01,365 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:01,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:01,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:01,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589323574] [2025-03-03 14:45:01,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589323574] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:01,440 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:01,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:01,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778064307] [2025-03-03 14:45:01,440 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:01,440 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:01,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:01,441 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:01,441 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:01,441 INFO L87 Difference]: Start difference. First operand 5130 states and 7846 transitions. Second operand has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:01,647 INFO L93 Difference]: Finished difference Result 12536 states and 19152 transitions. [2025-03-03 14:45:01,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:01,648 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2025-03-03 14:45:01,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:01,663 INFO L225 Difference]: With dead ends: 12536 [2025-03-03 14:45:01,663 INFO L226 Difference]: Without dead ends: 6637 [2025-03-03 14:45:01,672 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:01,673 INFO L435 NwaCegarLoop]: 184 mSDtfsCounter, 388 mSDsluCounter, 110 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 388 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:01,673 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [388 Valid, 294 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:01,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6637 states. [2025-03-03 14:45:01,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6637 to 6637. [2025-03-03 14:45:01,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6637 states, 6634 states have (on average 1.4989448296653602) internal successors, (9944), 6635 states have internal predecessors, (9944), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6637 states to 6637 states and 9946 transitions. [2025-03-03 14:45:01,906 INFO L78 Accepts]: Start accepts. Automaton has 6637 states and 9946 transitions. Word has length 51 [2025-03-03 14:45:01,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:01,906 INFO L471 AbstractCegarLoop]: Abstraction has 6637 states and 9946 transitions. [2025-03-03 14:45:01,906 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,906 INFO L276 IsEmpty]: Start isEmpty. Operand 6637 states and 9946 transitions. [2025-03-03 14:45:01,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2025-03-03 14:45:01,908 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:01,908 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:01,908 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-03 14:45:01,908 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:01,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:01,909 INFO L85 PathProgramCache]: Analyzing trace with hash -781627630, now seen corresponding path program 1 times [2025-03-03 14:45:01,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:01,909 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470919315] [2025-03-03 14:45:01,909 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:01,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:01,913 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 57 statements into 1 equivalence classes. [2025-03-03 14:45:01,915 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 57 of 57 statements. [2025-03-03 14:45:01,915 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:01,915 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:01,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:01,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:01,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470919315] [2025-03-03 14:45:01,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1470919315] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:01,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:01,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 14:45:01,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454093128] [2025-03-03 14:45:01,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:01,958 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 14:45:01,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:01,958 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 14:45:01,958 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:01,959 INFO L87 Difference]: Start difference. First operand 6637 states and 9946 transitions. Second operand has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:02,395 INFO L93 Difference]: Finished difference Result 16425 states and 24495 transitions. [2025-03-03 14:45:02,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 14:45:02,395 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2025-03-03 14:45:02,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:02,416 INFO L225 Difference]: With dead ends: 16425 [2025-03-03 14:45:02,416 INFO L226 Difference]: Without dead ends: 9806 [2025-03-03 14:45:02,427 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:02,427 INFO L435 NwaCegarLoop]: 180 mSDtfsCounter, 716 mSDsluCounter, 362 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 716 SdHoareTripleChecker+Valid, 542 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:02,427 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [716 Valid, 542 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:02,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9806 states. [2025-03-03 14:45:02,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9806 to 7256. [2025-03-03 14:45:02,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7256 states, 7253 states have (on average 1.4690472907762304) internal successors, (10655), 7254 states have internal predecessors, (10655), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7256 states to 7256 states and 10657 transitions. [2025-03-03 14:45:02,758 INFO L78 Accepts]: Start accepts. Automaton has 7256 states and 10657 transitions. Word has length 57 [2025-03-03 14:45:02,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:02,758 INFO L471 AbstractCegarLoop]: Abstraction has 7256 states and 10657 transitions. [2025-03-03 14:45:02,758 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 5 states have internal predecessors, (56), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,758 INFO L276 IsEmpty]: Start isEmpty. Operand 7256 states and 10657 transitions. [2025-03-03 14:45:02,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-03 14:45:02,761 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:02,761 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:02,762 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-03 14:45:02,762 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:02,762 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:02,762 INFO L85 PathProgramCache]: Analyzing trace with hash 1460947874, now seen corresponding path program 1 times [2025-03-03 14:45:02,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:02,762 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493779706] [2025-03-03 14:45:02,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:02,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:02,766 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-03 14:45:02,769 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-03 14:45:02,769 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:02,769 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:02,787 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:02,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:02,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493779706] [2025-03-03 14:45:02,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1493779706] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:02,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:02,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:02,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285262661] [2025-03-03 14:45:02,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:02,788 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:02,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:02,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:02,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:02,788 INFO L87 Difference]: Start difference. First operand 7256 states and 10657 transitions. Second operand has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:03,017 INFO L93 Difference]: Finished difference Result 14779 states and 21724 transitions. [2025-03-03 14:45:03,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:03,017 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2025-03-03 14:45:03,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:03,033 INFO L225 Difference]: With dead ends: 14779 [2025-03-03 14:45:03,034 INFO L226 Difference]: Without dead ends: 7552 [2025-03-03 14:45:03,045 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,046 INFO L435 NwaCegarLoop]: 248 mSDtfsCounter, 133 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 324 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:03,046 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [133 Valid, 324 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:03,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7552 states. [2025-03-03 14:45:03,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7552 to 7520. [2025-03-03 14:45:03,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7520 states, 7517 states have (on average 1.4331515232140482) internal successors, (10773), 7518 states have internal predecessors, (10773), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7520 states to 7520 states and 10775 transitions. [2025-03-03 14:45:03,282 INFO L78 Accepts]: Start accepts. Automaton has 7520 states and 10775 transitions. Word has length 94 [2025-03-03 14:45:03,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:03,282 INFO L471 AbstractCegarLoop]: Abstraction has 7520 states and 10775 transitions. [2025-03-03 14:45:03,282 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,283 INFO L276 IsEmpty]: Start isEmpty. Operand 7520 states and 10775 transitions. [2025-03-03 14:45:03,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-03-03 14:45:03,286 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:03,286 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:03,286 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-03 14:45:03,287 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:03,287 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:03,287 INFO L85 PathProgramCache]: Analyzing trace with hash 284481813, now seen corresponding path program 1 times [2025-03-03 14:45:03,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:03,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482675321] [2025-03-03 14:45:03,287 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:03,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:03,321 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-03-03 14:45:03,325 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-03-03 14:45:03,326 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:03,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:03,347 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:03,348 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:03,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482675321] [2025-03-03 14:45:03,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1482675321] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:03,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:03,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:03,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698031015] [2025-03-03 14:45:03,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:03,348 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:03,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:03,348 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:03,348 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,349 INFO L87 Difference]: Start difference. First operand 7520 states and 10775 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:03,541 INFO L93 Difference]: Finished difference Result 15477 states and 22184 transitions. [2025-03-03 14:45:03,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:03,542 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2025-03-03 14:45:03,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:03,559 INFO L225 Difference]: With dead ends: 15477 [2025-03-03 14:45:03,559 INFO L226 Difference]: Without dead ends: 7998 [2025-03-03 14:45:03,571 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,572 INFO L435 NwaCegarLoop]: 245 mSDtfsCounter, 133 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 323 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:03,572 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [133 Valid, 323 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:03,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7998 states. [2025-03-03 14:45:03,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7998 to 7950. [2025-03-03 14:45:03,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7950 states, 7947 states have (on average 1.3963759909399773) internal successors, (11097), 7948 states have internal predecessors, (11097), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7950 states to 7950 states and 11099 transitions. [2025-03-03 14:45:03,850 INFO L78 Accepts]: Start accepts. Automaton has 7950 states and 11099 transitions. Word has length 95 [2025-03-03 14:45:03,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:03,850 INFO L471 AbstractCegarLoop]: Abstraction has 7950 states and 11099 transitions. [2025-03-03 14:45:03,850 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,850 INFO L276 IsEmpty]: Start isEmpty. Operand 7950 states and 11099 transitions. [2025-03-03 14:45:03,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2025-03-03 14:45:03,854 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:03,855 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:03,855 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-03 14:45:03,856 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:03,856 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:03,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1551415328, now seen corresponding path program 1 times [2025-03-03 14:45:03,857 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:03,857 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410891279] [2025-03-03 14:45:03,857 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:03,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:03,862 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 96 statements into 1 equivalence classes. [2025-03-03 14:45:03,866 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 96 of 96 statements. [2025-03-03 14:45:03,866 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:03,866 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:03,895 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:03,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:03,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410891279] [2025-03-03 14:45:03,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410891279] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:03,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:03,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:03,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [711101529] [2025-03-03 14:45:03,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:03,896 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:03,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:03,896 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:03,896 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,896 INFO L87 Difference]: Start difference. First operand 7950 states and 11099 transitions. Second operand has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:04,099 INFO L93 Difference]: Finished difference Result 16106 states and 22548 transitions. [2025-03-03 14:45:04,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:04,099 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 96 [2025-03-03 14:45:04,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:04,115 INFO L225 Difference]: With dead ends: 16106 [2025-03-03 14:45:04,116 INFO L226 Difference]: Without dead ends: 8217 [2025-03-03 14:45:04,125 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,126 INFO L435 NwaCegarLoop]: 242 mSDtfsCounter, 130 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 320 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:04,126 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 320 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:04,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8217 states. [2025-03-03 14:45:04,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8217 to 7492. [2025-03-03 14:45:04,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7492 states, 7489 states have (on average 1.3418346908799572) internal successors, (10049), 7490 states have internal predecessors, (10049), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7492 states to 7492 states and 10051 transitions. [2025-03-03 14:45:04,461 INFO L78 Accepts]: Start accepts. Automaton has 7492 states and 10051 transitions. Word has length 96 [2025-03-03 14:45:04,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:04,461 INFO L471 AbstractCegarLoop]: Abstraction has 7492 states and 10051 transitions. [2025-03-03 14:45:04,462 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,462 INFO L276 IsEmpty]: Start isEmpty. Operand 7492 states and 10051 transitions. [2025-03-03 14:45:04,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2025-03-03 14:45:04,467 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:04,467 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:04,468 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-03 14:45:04,469 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:04,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:04,469 INFO L85 PathProgramCache]: Analyzing trace with hash 11612375, now seen corresponding path program 1 times [2025-03-03 14:45:04,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:04,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38001881] [2025-03-03 14:45:04,469 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:04,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:04,477 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 97 statements into 1 equivalence classes. [2025-03-03 14:45:04,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 97 of 97 statements. [2025-03-03 14:45:04,485 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:04,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:04,507 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-03 14:45:04,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:04,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38001881] [2025-03-03 14:45:04,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [38001881] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:04,507 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:04,507 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:04,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318103789] [2025-03-03 14:45:04,508 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:04,508 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:04,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:04,508 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:04,508 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,509 INFO L87 Difference]: Start difference. First operand 7492 states and 10051 transitions. Second operand has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:04,832 INFO L93 Difference]: Finished difference Result 13556 states and 18240 transitions. [2025-03-03 14:45:04,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:04,832 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2025-03-03 14:45:04,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:04,846 INFO L225 Difference]: With dead ends: 13556 [2025-03-03 14:45:04,846 INFO L226 Difference]: Without dead ends: 7492 [2025-03-03 14:45:04,853 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,854 INFO L435 NwaCegarLoop]: 182 mSDtfsCounter, 6 mSDsluCounter, 172 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 354 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:04,854 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 354 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:04,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7492 states. [2025-03-03 14:45:05,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7492 to 7492. [2025-03-03 14:45:05,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7492 states, 7489 states have (on average 1.3400988115903325) internal successors, (10036), 7490 states have internal predecessors, (10036), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7492 states to 7492 states and 10038 transitions. [2025-03-03 14:45:05,091 INFO L78 Accepts]: Start accepts. Automaton has 7492 states and 10038 transitions. Word has length 97 [2025-03-03 14:45:05,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:05,091 INFO L471 AbstractCegarLoop]: Abstraction has 7492 states and 10038 transitions. [2025-03-03 14:45:05,091 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.666666666666668) internal successors, (95), 3 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,091 INFO L276 IsEmpty]: Start isEmpty. Operand 7492 states and 10038 transitions. [2025-03-03 14:45:05,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2025-03-03 14:45:05,095 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:05,095 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:05,096 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-03 14:45:05,096 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:05,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:05,096 INFO L85 PathProgramCache]: Analyzing trace with hash -1495939434, now seen corresponding path program 1 times [2025-03-03 14:45:05,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:05,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712332097] [2025-03-03 14:45:05,096 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:05,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:05,101 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 97 statements into 1 equivalence classes. [2025-03-03 14:45:05,104 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 97 of 97 statements. [2025-03-03 14:45:05,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:05,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:05,157 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-03 14:45:05,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:05,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712332097] [2025-03-03 14:45:05,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1712332097] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:05,157 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:05,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:05,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321130866] [2025-03-03 14:45:05,157 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:05,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:05,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:05,158 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:05,158 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:05,158 INFO L87 Difference]: Start difference. First operand 7492 states and 10038 transitions. Second operand has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:05,475 INFO L93 Difference]: Finished difference Result 14058 states and 18757 transitions. [2025-03-03 14:45:05,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:05,476 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 97 [2025-03-03 14:45:05,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:05,497 INFO L225 Difference]: With dead ends: 14058 [2025-03-03 14:45:05,497 INFO L226 Difference]: Without dead ends: 5813 [2025-03-03 14:45:05,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:05,506 INFO L435 NwaCegarLoop]: 166 mSDtfsCounter, 448 mSDsluCounter, 243 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 448 SdHoareTripleChecker+Valid, 409 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:05,507 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [448 Valid, 409 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:05,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5813 states. [2025-03-03 14:45:05,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5813 to 5697. [2025-03-03 14:45:05,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5697 states, 5694 states have (on average 1.298208640674394) internal successors, (7392), 5695 states have internal predecessors, (7392), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5697 states to 5697 states and 7394 transitions. [2025-03-03 14:45:05,681 INFO L78 Accepts]: Start accepts. Automaton has 5697 states and 7394 transitions. Word has length 97 [2025-03-03 14:45:05,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:05,681 INFO L471 AbstractCegarLoop]: Abstraction has 5697 states and 7394 transitions. [2025-03-03 14:45:05,682 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.75) internal successors, (95), 4 states have internal predecessors, (95), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,682 INFO L276 IsEmpty]: Start isEmpty. Operand 5697 states and 7394 transitions. [2025-03-03 14:45:05,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2025-03-03 14:45:05,690 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:05,690 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:05,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-03 14:45:05,690 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:05,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:05,691 INFO L85 PathProgramCache]: Analyzing trace with hash -1787065712, now seen corresponding path program 1 times [2025-03-03 14:45:05,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:05,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070875603] [2025-03-03 14:45:05,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:05,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:05,697 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 126 statements into 1 equivalence classes. [2025-03-03 14:45:05,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 126 of 126 statements. [2025-03-03 14:45:05,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:05,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:05,723 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:05,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:05,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070875603] [2025-03-03 14:45:05,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1070875603] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:05,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:05,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:05,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010209581] [2025-03-03 14:45:05,724 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:05,724 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:05,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:05,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:05,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:05,724 INFO L87 Difference]: Start difference. First operand 5697 states and 7394 transitions. Second operand has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:05,867 INFO L93 Difference]: Finished difference Result 10916 states and 14152 transitions. [2025-03-03 14:45:05,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:05,867 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 126 [2025-03-03 14:45:05,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:05,877 INFO L225 Difference]: With dead ends: 10916 [2025-03-03 14:45:05,878 INFO L226 Difference]: Without dead ends: 5643 [2025-03-03 14:45:05,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:05,883 INFO L435 NwaCegarLoop]: 175 mSDtfsCounter, 35 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 316 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:05,883 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 316 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:05,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5643 states. [2025-03-03 14:45:06,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5643 to 5643. [2025-03-03 14:45:06,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5643 states, 5640 states have (on average 1.2918439716312056) internal successors, (7286), 5641 states have internal predecessors, (7286), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5643 states to 5643 states and 7288 transitions. [2025-03-03 14:45:06,074 INFO L78 Accepts]: Start accepts. Automaton has 5643 states and 7288 transitions. Word has length 126 [2025-03-03 14:45:06,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,074 INFO L471 AbstractCegarLoop]: Abstraction has 5643 states and 7288 transitions. [2025-03-03 14:45:06,074 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,074 INFO L276 IsEmpty]: Start isEmpty. Operand 5643 states and 7288 transitions. [2025-03-03 14:45:06,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2025-03-03 14:45:06,083 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,083 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,083 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-03 14:45:06,083 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,084 INFO L85 PathProgramCache]: Analyzing trace with hash 2119483660, now seen corresponding path program 1 times [2025-03-03 14:45:06,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1884630139] [2025-03-03 14:45:06,084 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,090 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 140 statements into 1 equivalence classes. [2025-03-03 14:45:06,092 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 140 of 140 statements. [2025-03-03 14:45:06,092 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,092 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:06,155 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:06,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:06,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1884630139] [2025-03-03 14:45:06,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1884630139] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:06,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:06,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:06,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662570937] [2025-03-03 14:45:06,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:06,155 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:06,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:06,156 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:06,156 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:06,156 INFO L87 Difference]: Start difference. First operand 5643 states and 7288 transitions. Second operand has 4 states, 4 states have (on average 33.25) internal successors, (133), 4 states have internal predecessors, (133), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:06,344 INFO L93 Difference]: Finished difference Result 10109 states and 13080 transitions. [2025-03-03 14:45:06,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:06,344 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.25) internal successors, (133), 4 states have internal predecessors, (133), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2025-03-03 14:45:06,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:06,356 INFO L225 Difference]: With dead ends: 10109 [2025-03-03 14:45:06,357 INFO L226 Difference]: Without dead ends: 5553 [2025-03-03 14:45:06,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:06,363 INFO L435 NwaCegarLoop]: 214 mSDtfsCounter, 323 mSDsluCounter, 115 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 323 SdHoareTripleChecker+Valid, 329 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:06,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [323 Valid, 329 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:06,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5553 states. [2025-03-03 14:45:06,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5553 to 5549. [2025-03-03 14:45:06,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5549 states, 5546 states have (on average 1.2702848900108186) internal successors, (7045), 5547 states have internal predecessors, (7045), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5549 states to 5549 states and 7047 transitions. [2025-03-03 14:45:06,519 INFO L78 Accepts]: Start accepts. Automaton has 5549 states and 7047 transitions. Word has length 140 [2025-03-03 14:45:06,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,519 INFO L471 AbstractCegarLoop]: Abstraction has 5549 states and 7047 transitions. [2025-03-03 14:45:06,520 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 33.25) internal successors, (133), 4 states have internal predecessors, (133), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,520 INFO L276 IsEmpty]: Start isEmpty. Operand 5549 states and 7047 transitions. [2025-03-03 14:45:06,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2025-03-03 14:45:06,527 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,527 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,528 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-03 14:45:06,528 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,528 INFO L85 PathProgramCache]: Analyzing trace with hash 1823213513, now seen corresponding path program 1 times [2025-03-03 14:45:06,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319617972] [2025-03-03 14:45:06,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,534 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-03 14:45:06,537 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-03 14:45:06,538 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:06,563 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-03-03 14:45:06,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:06,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319617972] [2025-03-03 14:45:06,563 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319617972] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:06,563 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:06,563 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:06,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410005575] [2025-03-03 14:45:06,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:06,564 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:06,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:06,564 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:06,564 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:06,565 INFO L87 Difference]: Start difference. First operand 5549 states and 7047 transitions. Second operand has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:06,743 INFO L93 Difference]: Finished difference Result 10673 states and 13544 transitions. [2025-03-03 14:45:06,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:06,743 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2025-03-03 14:45:06,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:06,753 INFO L225 Difference]: With dead ends: 10673 [2025-03-03 14:45:06,754 INFO L226 Difference]: Without dead ends: 5548 [2025-03-03 14:45:06,756 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:06,757 INFO L435 NwaCegarLoop]: 173 mSDtfsCounter, 23 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 315 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:06,757 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 315 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:06,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5548 states. [2025-03-03 14:45:06,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5548 to 5508. [2025-03-03 14:45:06,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5508 states, 5505 states have (on average 1.2646684831970936) internal successors, (6962), 5506 states have internal predecessors, (6962), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5508 states to 5508 states and 6964 transitions. [2025-03-03 14:45:06,908 INFO L78 Accepts]: Start accepts. Automaton has 5508 states and 6964 transitions. Word has length 145 [2025-03-03 14:45:06,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,908 INFO L471 AbstractCegarLoop]: Abstraction has 5508 states and 6964 transitions. [2025-03-03 14:45:06,908 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 45.0) internal successors, (135), 3 states have internal predecessors, (135), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,908 INFO L276 IsEmpty]: Start isEmpty. Operand 5508 states and 6964 transitions. [2025-03-03 14:45:06,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2025-03-03 14:45:06,916 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,916 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,916 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-03 14:45:06,917 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,917 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,917 INFO L85 PathProgramCache]: Analyzing trace with hash -1802854723, now seen corresponding path program 1 times [2025-03-03 14:45:06,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660776390] [2025-03-03 14:45:06,917 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,923 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-03 14:45:06,926 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-03 14:45:06,926 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,926 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:06,950 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2025-03-03 14:45:06,950 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:06,950 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660776390] [2025-03-03 14:45:06,950 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1660776390] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:06,950 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:06,950 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:06,950 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862964142] [2025-03-03 14:45:06,950 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:06,951 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:06,951 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:06,951 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:06,951 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:06,952 INFO L87 Difference]: Start difference. First operand 5508 states and 6964 transitions. Second operand has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:07,095 INFO L93 Difference]: Finished difference Result 10612 states and 13405 transitions. [2025-03-03 14:45:07,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:07,095 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2025-03-03 14:45:07,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:07,107 INFO L225 Difference]: With dead ends: 10612 [2025-03-03 14:45:07,107 INFO L226 Difference]: Without dead ends: 5518 [2025-03-03 14:45:07,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:07,113 INFO L435 NwaCegarLoop]: 170 mSDtfsCounter, 23 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 311 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:07,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 311 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:07,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5518 states. [2025-03-03 14:45:07,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5518 to 5478. [2025-03-03 14:45:07,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5478 states, 5475 states have (on average 1.2586301369863013) internal successors, (6891), 5476 states have internal predecessors, (6891), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5478 states to 5478 states and 6893 transitions. [2025-03-03 14:45:07,271 INFO L78 Accepts]: Start accepts. Automaton has 5478 states and 6893 transitions. Word has length 145 [2025-03-03 14:45:07,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:07,272 INFO L471 AbstractCegarLoop]: Abstraction has 5478 states and 6893 transitions. [2025-03-03 14:45:07,272 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,272 INFO L276 IsEmpty]: Start isEmpty. Operand 5478 states and 6893 transitions. [2025-03-03 14:45:07,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2025-03-03 14:45:07,280 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:07,280 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:07,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-03 14:45:07,281 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:07,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:07,282 INFO L85 PathProgramCache]: Analyzing trace with hash -1306742196, now seen corresponding path program 1 times [2025-03-03 14:45:07,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:07,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467633477] [2025-03-03 14:45:07,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:07,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:07,291 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-03 14:45:07,295 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-03 14:45:07,295 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:07,295 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:07,357 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-03-03 14:45:07,357 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:07,357 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467633477] [2025-03-03 14:45:07,357 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467633477] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:07,357 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:07,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:07,358 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1087144822] [2025-03-03 14:45:07,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:07,358 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:07,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:07,359 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:07,359 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:07,359 INFO L87 Difference]: Start difference. First operand 5478 states and 6893 transitions. Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:07,586 INFO L93 Difference]: Finished difference Result 8816 states and 11145 transitions. [2025-03-03 14:45:07,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:07,586 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2025-03-03 14:45:07,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:07,598 INFO L225 Difference]: With dead ends: 8816 [2025-03-03 14:45:07,598 INFO L226 Difference]: Without dead ends: 3768 [2025-03-03 14:45:07,603 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:07,604 INFO L435 NwaCegarLoop]: 208 mSDtfsCounter, 296 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 296 SdHoareTripleChecker+Valid, 306 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:07,606 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [296 Valid, 306 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:07,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3768 states. [2025-03-03 14:45:07,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3768 to 3764. [2025-03-03 14:45:07,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3764 states, 3761 states have (on average 1.2289284764690243) internal successors, (4622), 3762 states have internal predecessors, (4622), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3764 states to 3764 states and 4624 transitions. [2025-03-03 14:45:07,812 INFO L78 Accepts]: Start accepts. Automaton has 3764 states and 4624 transitions. Word has length 150 [2025-03-03 14:45:07,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:07,812 INFO L471 AbstractCegarLoop]: Abstraction has 3764 states and 4624 transitions. [2025-03-03 14:45:07,812 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,813 INFO L276 IsEmpty]: Start isEmpty. Operand 3764 states and 4624 transitions. [2025-03-03 14:45:07,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2025-03-03 14:45:07,818 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:07,818 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:07,818 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-03 14:45:07,818 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:07,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:07,820 INFO L85 PathProgramCache]: Analyzing trace with hash 83467834, now seen corresponding path program 1 times [2025-03-03 14:45:07,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:07,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945161669] [2025-03-03 14:45:07,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:07,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:07,832 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-03 14:45:07,835 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-03 14:45:07,835 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:07,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:07,921 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 49 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-03 14:45:07,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:07,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945161669] [2025-03-03 14:45:07,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1945161669] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:07,921 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:07,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:07,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [358619012] [2025-03-03 14:45:07,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:07,922 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:07,922 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:07,922 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:07,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:07,922 INFO L87 Difference]: Start difference. First operand 3764 states and 4624 transitions. Second operand has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,073 INFO L93 Difference]: Finished difference Result 5986 states and 7362 transitions. [2025-03-03 14:45:08,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:08,074 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2025-03-03 14:45:08,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,082 INFO L225 Difference]: With dead ends: 5986 [2025-03-03 14:45:08,083 INFO L226 Difference]: Without dead ends: 2319 [2025-03-03 14:45:08,086 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:08,087 INFO L435 NwaCegarLoop]: 201 mSDtfsCounter, 296 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 296 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,087 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [296 Valid, 299 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2319 states. [2025-03-03 14:45:08,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2319 to 2315. [2025-03-03 14:45:08,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2315 states, 2312 states have (on average 1.1985294117647058) internal successors, (2771), 2313 states have internal predecessors, (2771), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2315 states to 2315 states and 2773 transitions. [2025-03-03 14:45:08,215 INFO L78 Accepts]: Start accepts. Automaton has 2315 states and 2773 transitions. Word has length 150 [2025-03-03 14:45:08,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,215 INFO L471 AbstractCegarLoop]: Abstraction has 2315 states and 2773 transitions. [2025-03-03 14:45:08,215 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,215 INFO L276 IsEmpty]: Start isEmpty. Operand 2315 states and 2773 transitions. [2025-03-03 14:45:08,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2025-03-03 14:45:08,217 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,217 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,217 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-03 14:45:08,217 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,218 INFO L85 PathProgramCache]: Analyzing trace with hash 934449719, now seen corresponding path program 1 times [2025-03-03 14:45:08,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1829370817] [2025-03-03 14:45:08,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,227 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 189 statements into 1 equivalence classes. [2025-03-03 14:45:08,231 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 189 of 189 statements. [2025-03-03 14:45:08,231 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,231 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,263 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 80 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2025-03-03 14:45:08,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1829370817] [2025-03-03 14:45:08,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1829370817] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,263 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:08,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092143610] [2025-03-03 14:45:08,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,264 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:08,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,264 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:08,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,264 INFO L87 Difference]: Start difference. First operand 2315 states and 2773 transitions. Second operand has 3 states, 3 states have (on average 58.0) internal successors, (174), 3 states have internal predecessors, (174), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,393 INFO L93 Difference]: Finished difference Result 4167 states and 5030 transitions. [2025-03-03 14:45:08,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:08,394 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 58.0) internal successors, (174), 3 states have internal predecessors, (174), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 189 [2025-03-03 14:45:08,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,403 INFO L225 Difference]: With dead ends: 4167 [2025-03-03 14:45:08,404 INFO L226 Difference]: Without dead ends: 2253 [2025-03-03 14:45:08,407 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,407 INFO L435 NwaCegarLoop]: 164 mSDtfsCounter, 1 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 316 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,408 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 316 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2253 states. [2025-03-03 14:45:08,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2253 to 2165. [2025-03-03 14:45:08,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2165 states, 2162 states have (on average 1.1808510638297873) internal successors, (2553), 2163 states have internal predecessors, (2553), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2165 states to 2165 states and 2555 transitions. [2025-03-03 14:45:08,499 INFO L78 Accepts]: Start accepts. Automaton has 2165 states and 2555 transitions. Word has length 189 [2025-03-03 14:45:08,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,499 INFO L471 AbstractCegarLoop]: Abstraction has 2165 states and 2555 transitions. [2025-03-03 14:45:08,499 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 58.0) internal successors, (174), 3 states have internal predecessors, (174), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,499 INFO L276 IsEmpty]: Start isEmpty. Operand 2165 states and 2555 transitions. [2025-03-03 14:45:08,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2025-03-03 14:45:08,501 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,503 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,503 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-03 14:45:08,503 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,504 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1899478067, now seen corresponding path program 1 times [2025-03-03 14:45:08,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153169656] [2025-03-03 14:45:08,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,511 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 196 statements into 1 equivalence classes. [2025-03-03 14:45:08,514 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 196 of 196 statements. [2025-03-03 14:45:08,514 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,514 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,544 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-03-03 14:45:08,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,544 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153169656] [2025-03-03 14:45:08,544 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [153169656] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,544 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:08,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544880989] [2025-03-03 14:45:08,544 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,545 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:08,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,545 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:08,545 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,545 INFO L87 Difference]: Start difference. First operand 2165 states and 2555 transitions. Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,628 INFO L93 Difference]: Finished difference Result 4634 states and 5508 transitions. [2025-03-03 14:45:08,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:08,629 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 196 [2025-03-03 14:45:08,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,636 INFO L225 Difference]: With dead ends: 4634 [2025-03-03 14:45:08,637 INFO L226 Difference]: Without dead ends: 2864 [2025-03-03 14:45:08,639 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,639 INFO L435 NwaCegarLoop]: 205 mSDtfsCounter, 140 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 316 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,639 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [140 Valid, 316 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2864 states. [2025-03-03 14:45:08,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2864 to 2459. [2025-03-03 14:45:08,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2459 states, 2456 states have (on average 1.166530944625407) internal successors, (2865), 2457 states have internal predecessors, (2865), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2459 states to 2459 states and 2867 transitions. [2025-03-03 14:45:08,717 INFO L78 Accepts]: Start accepts. Automaton has 2459 states and 2867 transitions. Word has length 196 [2025-03-03 14:45:08,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,717 INFO L471 AbstractCegarLoop]: Abstraction has 2459 states and 2867 transitions. [2025-03-03 14:45:08,717 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,717 INFO L276 IsEmpty]: Start isEmpty. Operand 2459 states and 2867 transitions. [2025-03-03 14:45:08,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2025-03-03 14:45:08,719 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,719 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,719 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-03 14:45:08,719 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,719 INFO L85 PathProgramCache]: Analyzing trace with hash -814671289, now seen corresponding path program 1 times [2025-03-03 14:45:08,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213855754] [2025-03-03 14:45:08,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,727 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 199 statements into 1 equivalence classes. [2025-03-03 14:45:08,734 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 199 of 199 statements. [2025-03-03 14:45:08,734 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,734 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,757 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2025-03-03 14:45:08,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,757 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213855754] [2025-03-03 14:45:08,757 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213855754] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,757 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,757 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:08,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239366610] [2025-03-03 14:45:08,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,758 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:08,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:08,758 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,758 INFO L87 Difference]: Start difference. First operand 2459 states and 2867 transitions. Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,827 INFO L93 Difference]: Finished difference Result 4158 states and 4885 transitions. [2025-03-03 14:45:08,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:08,827 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 199 [2025-03-03 14:45:08,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,833 INFO L225 Difference]: With dead ends: 4158 [2025-03-03 14:45:08,834 INFO L226 Difference]: Without dead ends: 2092 [2025-03-03 14:45:08,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,836 INFO L435 NwaCegarLoop]: 162 mSDtfsCounter, 3 mSDsluCounter, 149 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 311 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,836 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 311 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2092 states. [2025-03-03 14:45:08,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2092 to 2011. [2025-03-03 14:45:08,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2011 states, 2008 states have (on average 1.1508964143426295) internal successors, (2311), 2009 states have internal predecessors, (2311), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2011 states to 2011 states and 2313 transitions. [2025-03-03 14:45:08,899 INFO L78 Accepts]: Start accepts. Automaton has 2011 states and 2313 transitions. Word has length 199 [2025-03-03 14:45:08,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,899 INFO L471 AbstractCegarLoop]: Abstraction has 2011 states and 2313 transitions. [2025-03-03 14:45:08,899 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,899 INFO L276 IsEmpty]: Start isEmpty. Operand 2011 states and 2313 transitions. [2025-03-03 14:45:08,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2025-03-03 14:45:08,900 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,901 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,901 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-03-03 14:45:08,901 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,902 INFO L85 PathProgramCache]: Analyzing trace with hash 155619718, now seen corresponding path program 1 times [2025-03-03 14:45:08,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037018256] [2025-03-03 14:45:08,902 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,911 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 199 statements into 1 equivalence classes. [2025-03-03 14:45:08,916 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 199 of 199 statements. [2025-03-03 14:45:08,916 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,916 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,944 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2025-03-03 14:45:08,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037018256] [2025-03-03 14:45:08,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1037018256] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,944 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:08,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655245182] [2025-03-03 14:45:08,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,944 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:08,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,945 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:08,945 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,945 INFO L87 Difference]: Start difference. First operand 2011 states and 2313 transitions. Second operand has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:09,028 INFO L93 Difference]: Finished difference Result 2018 states and 2323 transitions. [2025-03-03 14:45:09,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:09,028 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 199 [2025-03-03 14:45:09,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:09,033 INFO L225 Difference]: With dead ends: 2018 [2025-03-03 14:45:09,033 INFO L226 Difference]: Without dead ends: 2015 [2025-03-03 14:45:09,034 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,034 INFO L435 NwaCegarLoop]: 163 mSDtfsCounter, 0 mSDsluCounter, 150 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 313 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:09,034 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 313 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:09,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2015 states. [2025-03-03 14:45:09,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2015 to 2015. [2025-03-03 14:45:09,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2015 states, 2012 states have (on average 1.150596421471173) internal successors, (2315), 2013 states have internal predecessors, (2315), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2015 states to 2015 states and 2317 transitions. [2025-03-03 14:45:09,096 INFO L78 Accepts]: Start accepts. Automaton has 2015 states and 2317 transitions. Word has length 199 [2025-03-03 14:45:09,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:09,098 INFO L471 AbstractCegarLoop]: Abstraction has 2015 states and 2317 transitions. [2025-03-03 14:45:09,098 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,098 INFO L276 IsEmpty]: Start isEmpty. Operand 2015 states and 2317 transitions. [2025-03-03 14:45:09,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2025-03-03 14:45:09,099 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:09,099 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,099 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-03 14:45:09,099 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:09,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:09,100 INFO L85 PathProgramCache]: Analyzing trace with hash 155652454, now seen corresponding path program 1 times [2025-03-03 14:45:09,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:09,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236317137] [2025-03-03 14:45:09,100 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:09,107 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 199 statements into 1 equivalence classes. [2025-03-03 14:45:09,113 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 199 of 199 statements. [2025-03-03 14:45:09,114 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,114 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:09,463 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:09,463 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:09,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236317137] [2025-03-03 14:45:09,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1236317137] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-03 14:45:09,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1029081515] [2025-03-03 14:45:09,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 14:45:09,463 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 14:45:09,466 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-03 14:45:09,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-03 14:45:09,519 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 199 statements into 1 equivalence classes. [2025-03-03 14:45:09,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 199 of 199 statements. [2025-03-03 14:45:09,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:09,569 INFO L256 TraceCheckSpWp]: Trace formula consists of 514 conjuncts, 20 conjuncts are in the unsatisfiable core [2025-03-03 14:45:09,576 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-03 14:45:09,858 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 85 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:09,858 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-03 14:45:10,371 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 85 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:10,372 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1029081515] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-03 14:45:10,372 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-03 14:45:10,372 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11] total 27 [2025-03-03 14:45:10,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405600840] [2025-03-03 14:45:10,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-03 14:45:10,373 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2025-03-03 14:45:10,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:10,373 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-03-03 14:45:10,374 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=623, Unknown=0, NotChecked=0, Total=702 [2025-03-03 14:45:10,374 INFO L87 Difference]: Start difference. First operand 2015 states and 2317 transitions. Second operand has 27 states, 27 states have (on average 17.814814814814813) internal successors, (481), 27 states have internal predecessors, (481), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:11,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:11,995 INFO L93 Difference]: Finished difference Result 7214 states and 8315 transitions. [2025-03-03 14:45:11,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2025-03-03 14:45:11,996 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 17.814814814814813) internal successors, (481), 27 states have internal predecessors, (481), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 199 [2025-03-03 14:45:11,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:12,007 INFO L225 Difference]: With dead ends: 7214 [2025-03-03 14:45:12,008 INFO L226 Difference]: Without dead ends: 5515 [2025-03-03 14:45:12,012 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 400 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1139 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=621, Invalid=4781, Unknown=0, NotChecked=0, Total=5402 [2025-03-03 14:45:12,013 INFO L435 NwaCegarLoop]: 552 mSDtfsCounter, 2983 mSDsluCounter, 8139 mSDsCounter, 0 mSdLazyCounter, 994 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2983 SdHoareTripleChecker+Valid, 8691 SdHoareTripleChecker+Invalid, 1069 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 994 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:12,013 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2983 Valid, 8691 Invalid, 1069 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 994 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 14:45:12,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5515 states. [2025-03-03 14:45:12,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5515 to 3005. [2025-03-03 14:45:12,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3005 states, 3002 states have (on average 1.1515656229180546) internal successors, (3457), 3003 states have internal predecessors, (3457), 2 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:12,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3005 states to 3005 states and 3459 transitions. [2025-03-03 14:45:12,151 INFO L78 Accepts]: Start accepts. Automaton has 3005 states and 3459 transitions. Word has length 199 [2025-03-03 14:45:12,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:12,151 INFO L471 AbstractCegarLoop]: Abstraction has 3005 states and 3459 transitions. [2025-03-03 14:45:12,151 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 17.814814814814813) internal successors, (481), 27 states have internal predecessors, (481), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:12,151 INFO L276 IsEmpty]: Start isEmpty. Operand 3005 states and 3459 transitions. [2025-03-03 14:45:12,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2025-03-03 14:45:12,153 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:12,153 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:12,160 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-03-03 14:45:12,353 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2025-03-03 14:45:12,354 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:12,354 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:12,354 INFO L85 PathProgramCache]: Analyzing trace with hash 530115917, now seen corresponding path program 1 times [2025-03-03 14:45:12,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:12,355 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025528003] [2025-03-03 14:45:12,355 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:12,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:12,364 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 200 statements into 1 equivalence classes. [2025-03-03 14:45:12,374 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 200 of 200 statements. [2025-03-03 14:45:12,374 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:12,374 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:12,374 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-03 14:45:12,381 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 200 statements into 1 equivalence classes. [2025-03-03 14:45:12,390 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 200 of 200 statements. [2025-03-03 14:45:12,390 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:12,390 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:12,450 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-03 14:45:12,451 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-03 14:45:12,452 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location errorErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-03 14:45:12,454 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-03-03 14:45:12,460 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:12,594 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-03 14:45:12,597 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.03 02:45:12 BoogieIcfgContainer [2025-03-03 14:45:12,597 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-03 14:45:12,597 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-03 14:45:12,597 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-03 14:45:12,597 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-03 14:45:12,598 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57" (3/4) ... [2025-03-03 14:45:12,598 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-03 14:45:12,760 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 188. [2025-03-03 14:45:12,867 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-03 14:45:12,869 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-03 14:45:12,871 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-03 14:45:12,872 INFO L158 Benchmark]: Toolchain (without parser) took 16374.37ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 106.5MB in the beginning and 954.4MB in the end (delta: -847.9MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2025-03-03 14:45:12,872 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 201.3MB. Free memory is still 126.6MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:12,872 INFO L158 Benchmark]: CACSL2BoogieTranslator took 262.77ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 91.5MB in the end (delta: 14.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-03 14:45:12,872 INFO L158 Benchmark]: Boogie Procedure Inliner took 27.30ms. Allocated memory is still 142.6MB. Free memory was 91.5MB in the beginning and 89.5MB in the end (delta: 2.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:12,872 INFO L158 Benchmark]: Boogie Preprocessor took 38.00ms. Allocated memory is still 142.6MB. Free memory was 89.5MB in the beginning and 87.4MB in the end (delta: 2.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:12,873 INFO L158 Benchmark]: IcfgBuilder took 440.18ms. Allocated memory is still 142.6MB. Free memory was 87.4MB in the beginning and 62.3MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-03-03 14:45:12,873 INFO L158 Benchmark]: TraceAbstraction took 15325.87ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 61.2MB in the beginning and 992.1MB in the end (delta: -930.9MB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2025-03-03 14:45:12,873 INFO L158 Benchmark]: Witness Printer took 274.00ms. Allocated memory is still 2.1GB. Free memory was 992.1MB in the beginning and 954.4MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-03 14:45:12,874 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 201.3MB. Free memory is still 126.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 262.77ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 91.5MB in the end (delta: 14.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 27.30ms. Allocated memory is still 142.6MB. Free memory was 91.5MB in the beginning and 89.5MB in the end (delta: 2.1MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 38.00ms. Allocated memory is still 142.6MB. Free memory was 89.5MB in the beginning and 87.4MB in the end (delta: 2.1MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 440.18ms. Allocated memory is still 142.6MB. Free memory was 87.4MB in the beginning and 62.3MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * TraceAbstraction took 15325.87ms. Allocated memory was 142.6MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 61.2MB in the beginning and 992.1MB in the end (delta: -930.9MB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. * Witness Printer took 274.00ms. Allocated memory is still 2.1GB. Free memory was 992.1MB in the beginning and 954.4MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 23]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; VAL [c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L701] int __retres1 ; [L705] e_wl = 2 [L706] e_c = e_wl [L707] e_g = e_c [L708] e_f = e_g [L709] e_e = e_f [L710] wl_pc = 0 [L711] c1_pc = 0 [L712] c2_pc = 0 [L713] wb_pc = 0 [L714] wb_i = 1 [L715] c2_i = wb_i [L716] c1_i = c2_i [L717] wl_i = c1_i [L718] r_i = 0 [L719] c_req_up = 0 [L720] d = 0 [L721] c = 0 [L722] CALL start_simulation() [L412] int kernel_st ; [L415] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L416] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L427] COND TRUE (int )wl_i == 1 [L428] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L432] COND TRUE (int )c1_i == 1 [L433] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L437] COND TRUE (int )c2_i == 1 [L438] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L442] COND TRUE (int )wb_i == 1 [L443] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L447] COND FALSE !((int )r_i == 1) [L450] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L452] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L457] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L462] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L467] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L472] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L477] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L485] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L495] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L504] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L513] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L522] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L527] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L532] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L537] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L542] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L547] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L553] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L556] kernel_st = 1 [L557] CALL eval() [L298] int tmp ; [L299] int tmp___0 ; [L300] int tmp___1 ; [L301] int tmp___2 ; [L302] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L308] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L329] COND TRUE (int )wl_st == 0 [L331] tmp = __VERIFIER_nondet_int() [L333] COND TRUE \read(tmp) [L335] wl_st = 1 [L336] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L66] COND TRUE (int )wl_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L80] wl_st = 2 [L81] wl_pc = 1 [L82] e_wl = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L336] RET write_loop() [L344] COND TRUE (int )c1_st == 0 [L346] tmp___0 = __VERIFIER_nondet_int() [L348] COND TRUE \read(tmp___0) [L350] c1_st = 1 [L351] CALL compute1() [L149] COND TRUE (int )c1_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L160] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L162] c1_st = 2 [L163] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L351] RET compute1() [L359] COND TRUE (int )c2_st == 0 [L361] tmp___1 = __VERIFIER_nondet_int() [L363] COND TRUE \read(tmp___1) [L365] c2_st = 1 [L366] CALL compute2() [L194] COND TRUE (int )c2_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L205] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L207] c2_st = 2 [L208] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L366] RET compute2() [L374] COND TRUE (int )wb_st == 0 [L376] tmp___2 = __VERIFIER_nondet_int() [L378] COND TRUE \read(tmp___2) [L380] wb_st = 1 [L381] CALL write_back() [L239] COND TRUE (int )wb_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L250] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L252] wb_st = 2 [L253] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L381] RET write_back() [L389] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L308] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L311] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L314] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L317] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L320] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L557] RET eval() [L559] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L560] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L571] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L572] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L577] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L582] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L587] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L592] COND TRUE (int )e_wl == 0 [L593] e_wl = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L597] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L598] COND TRUE (int )e_wl == 1 [L599] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L615] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L616] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L624] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L625] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L633] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L634] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L642] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L647] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L652] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L657] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L662] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L667] COND TRUE (int )e_wl == 1 [L668] e_wl = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L672] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L553] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L556] kernel_st = 1 [L557] CALL eval() [L298] int tmp ; [L299] int tmp___0 ; [L300] int tmp___1 ; [L301] int tmp___2 ; [L302] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L308] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L329] COND TRUE (int )wl_st == 0 [L331] tmp = __VERIFIER_nondet_int() [L333] COND TRUE \read(tmp) [L335] wl_st = 1 [L336] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L69] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L72] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L87] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L89] t = d [L90] data = d [L91] processed = 0 [L92] e_f = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )e_f == 1 [L95] c1_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L102] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] COND TRUE (int )e_f == 1 [L104] c2_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L111] e_f = 2 [L112] wl_st = 2 [L113] wl_pc = 2 [L114] t_b = t VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L336] RET write_loop() [L344] COND TRUE (int )c1_st == 0 [L346] tmp___0 = __VERIFIER_nondet_int() [L348] COND TRUE \read(tmp___0) [L350] c1_st = 1 [L351] CALL compute1() [L149] COND FALSE !((int )c1_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L152] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L167] COND TRUE ! processed [L168] data += 1 [L169] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L170] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L171] COND TRUE (int )e_g == 1 [L172] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L179] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L160] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L162] c1_st = 2 [L163] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L351] RET compute1() [L359] COND TRUE (int )c2_st == 0 [L361] tmp___1 = __VERIFIER_nondet_int() [L363] COND TRUE \read(tmp___1) [L365] c2_st = 1 [L366] CALL compute2() [L194] COND FALSE !((int )c2_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L197] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L212] COND TRUE ! processed [L213] data += 1 [L214] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L215] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L216] COND TRUE (int )e_g == 1 [L217] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L224] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L205] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L207] c2_st = 2 [L208] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L366] RET compute2() [L374] COND TRUE (int )wb_st == 0 [L376] tmp___2 = __VERIFIER_nondet_int() [L378] COND TRUE \read(tmp___2) [L380] wb_st = 1 [L381] CALL write_back() [L239] COND FALSE !((int )wb_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L242] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L257] c_t = data [L258] c_req_up = 1 [L259] processed = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L250] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L252] wb_st = 2 [L253] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L381] RET write_back() [L389] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L311] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L314] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L317] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L320] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L557] RET eval() [L559] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L560] COND TRUE (int )c_req_up == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L561] COND TRUE c != c_t [L562] c = c_t [L563] e_c = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L567] c_req_up = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L571] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L572] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L577] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L582] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L587] COND TRUE (int )e_c == 0 [L588] e_c = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L592] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L597] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L605] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L606] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L615] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L616] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L624] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L625] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L633] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L634] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L642] COND TRUE (int )e_c == 1 [L643] r_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L647] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L652] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L657] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L662] COND TRUE (int )e_c == 1 [L663] e_c = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L667] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L672] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L675] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L678] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L681] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L684] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L553] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L556] kernel_st = 1 [L557] CALL eval() [L298] int tmp ; [L299] int tmp___0 ; [L300] int tmp___1 ; [L301] int tmp___2 ; [L302] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L311] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L314] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L317] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L320] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L329] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L344] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L359] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L374] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L389] COND TRUE (int )r_st == 0 [L391] tmp___3 = __VERIFIER_nondet_int() [L393] COND TRUE \read(tmp___3) [L395] r_st = 1 [L396] CALL read() [L271] d = c [L272] e_e = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L273] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L281] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L282] COND TRUE (int )e_e == 1 [L283] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L291] e_e = 2 [L292] r_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L396] RET read() [L306] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L308] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L329] COND TRUE (int )wl_st == 0 [L331] tmp = __VERIFIER_nondet_int() [L333] COND TRUE \read(tmp) [L335] wl_st = 1 [L336] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L69] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L118] t = t_b VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L119] COND FALSE !(d == t + 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L122] COND TRUE d == t + 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L130] COND FALSE !(d == t + 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L134] CALL error() VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L23] reach_error() VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 140 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 15.1s, OverallIterations: 37, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 7.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 11343 SdHoareTripleChecker+Valid, 1.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 11343 mSDsluCounter, 20922 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 12972 mSDsCounter, 330 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1717 IncrementalHoareTripleChecker+Invalid, 2047 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 330 mSolverCounterUnsat, 7950 mSDtfsCounter, 1717 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 622 GetRequests, 485 SyntacticMatches, 0 SemanticMatches, 137 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1140 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7950occurred in iteration=22, InterpolantAutomatonStates: 183, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.2s AutomataMinimizationTime, 36 MinimizatonAttempts, 8730 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 3562 NumberOfCodeBlocks, 3562 NumberOfCodeBlocksAsserted, 38 NumberOfCheckSat, 3523 ConstructedInterpolants, 0 QuantifiedInterpolants, 7345 SizeOfPredicates, 5 NumberOfNonLiveVariables, 514 ConjunctsInSsa, 20 ConjunctsInUnsatCore, 38 InterpolantComputations, 35 PerfectInterpolantSequences, 1054/1184 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-03 14:45:12,895 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE