./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/toy2.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/toy2.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 14:44:54,741 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 14:44:54,788 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-03 14:44:54,791 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 14:44:54,793 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 14:44:54,809 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 14:44:54,810 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 14:44:54,810 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 14:44:54,811 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 14:44:54,811 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 14:44:54,811 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 14:44:54,811 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-03 14:44:54,811 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 14:44:54,812 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:44:54,812 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 14:44:54,812 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 14:44:54,813 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 [2025-03-03 14:44:55,091 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 14:44:55,097 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 14:44:55,098 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 14:44:55,099 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 14:44:55,099 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 14:44:55,100 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy2.cil.c [2025-03-03 14:44:56,267 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29b73dcd3/b5270e91e5b9448ebbd1d06f96f385ec/FLAGdc7579759 [2025-03-03 14:44:56,589 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 14:44:56,589 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c [2025-03-03 14:44:56,598 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29b73dcd3/b5270e91e5b9448ebbd1d06f96f385ec/FLAGdc7579759 [2025-03-03 14:44:56,838 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/29b73dcd3/b5270e91e5b9448ebbd1d06f96f385ec [2025-03-03 14:44:56,840 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 14:44:56,841 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 14:44:56,842 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 14:44:56,842 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 14:44:56,846 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 14:44:56,846 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,847 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b9eafae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:56, skipping insertion in model container [2025-03-03 14:44:56,847 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 02:44:56" (1/1) ... [2025-03-03 14:44:56,869 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 14:44:56,964 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-03-03 14:44:57,010 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:44:57,017 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 14:44:57,024 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-03-03 14:44:57,052 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 14:44:57,063 INFO L204 MainTranslator]: Completed translation [2025-03-03 14:44:57,064 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57 WrapperNode [2025-03-03 14:44:57,064 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 14:44:57,065 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 14:44:57,065 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 14:44:57,065 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 14:44:57,070 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,076 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,097 INFO L138 Inliner]: procedures = 20, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 347 [2025-03-03 14:44:57,097 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 14:44:57,098 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 14:44:57,098 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 14:44:57,098 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 14:44:57,104 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,104 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,110 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,128 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 14:44:57,128 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,128 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,136 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,137 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,138 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,142 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,143 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 14:44:57,144 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 14:44:57,144 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 14:44:57,144 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 14:44:57,145 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (1/1) ... [2025-03-03 14:44:57,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 14:44:57,164 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 14:44:57,177 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 14:44:57,180 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 14:44:57,199 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 14:44:57,199 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-03 14:44:57,199 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 14:44:57,200 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 14:44:57,264 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 14:44:57,265 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 14:44:57,648 INFO L? ?]: Removed 20 outVars from TransFormulas that were not future-live. [2025-03-03 14:44:57,649 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 14:44:57,658 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 14:44:57,658 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 14:44:57,658 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57 BoogieIcfgContainer [2025-03-03 14:44:57,659 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 14:44:57,660 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 14:44:57,660 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 14:44:57,664 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 14:44:57,664 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 02:44:56" (1/3) ... [2025-03-03 14:44:57,664 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c2e7e64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:44:57, skipping insertion in model container [2025-03-03 14:44:57,664 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 02:44:57" (2/3) ... [2025-03-03 14:44:57,665 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c2e7e64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 02:44:57, skipping insertion in model container [2025-03-03 14:44:57,665 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57" (3/3) ... [2025-03-03 14:44:57,666 INFO L128 eAbstractionObserver]: Analyzing ICFG toy2.cil.c [2025-03-03 14:44:57,676 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 14:44:57,677 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG toy2.cil.c that has 1 procedures, 135 locations, 1 initial locations, 6 loop locations, and 1 error locations. [2025-03-03 14:44:57,712 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 14:44:57,721 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@630bf233, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 14:44:57,721 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 14:44:57,726 INFO L276 IsEmpty]: Start isEmpty. Operand has 135 states, 133 states have (on average 1.7669172932330828) internal successors, (235), 134 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:57,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:57,730 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:57,731 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:57,731 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:57,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:57,735 INFO L85 PathProgramCache]: Analyzing trace with hash 121120735, now seen corresponding path program 1 times [2025-03-03 14:44:57,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:57,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256640317] [2025-03-03 14:44:57,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:57,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:57,799 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:57,826 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:57,827 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:57,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:57,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:57,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:57,977 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [256640317] [2025-03-03 14:44:57,977 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [256640317] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:57,977 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:57,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:57,978 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876089787] [2025-03-03 14:44:57,979 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:57,981 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:57,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:57,993 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:57,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:57,995 INFO L87 Difference]: Start difference. First operand has 135 states, 133 states have (on average 1.7669172932330828) internal successors, (235), 134 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,079 INFO L93 Difference]: Finished difference Result 365 states and 634 transitions. [2025-03-03 14:44:58,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:58,081 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,088 INFO L225 Difference]: With dead ends: 365 [2025-03-03 14:44:58,088 INFO L226 Difference]: Without dead ends: 225 [2025-03-03 14:44:58,090 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,092 INFO L435 NwaCegarLoop]: 219 mSDtfsCounter, 594 mSDsluCounter, 164 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 594 SdHoareTripleChecker+Valid, 383 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,092 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [594 Valid, 383 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2025-03-03 14:44:58,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 222. [2025-03-03 14:44:58,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.7013574660633484) internal successors, (376), 221 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 376 transitions. [2025-03-03 14:44:58,124 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 376 transitions. Word has length 35 [2025-03-03 14:44:58,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,124 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 376 transitions. [2025-03-03 14:44:58,124 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,124 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 376 transitions. [2025-03-03 14:44:58,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:58,125 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,125 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,125 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-03 14:44:58,126 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,126 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,126 INFO L85 PathProgramCache]: Analyzing trace with hash -133615810, now seen corresponding path program 1 times [2025-03-03 14:44:58,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832182651] [2025-03-03 14:44:58,126 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,134 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:58,143 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:58,143 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,144 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,262 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832182651] [2025-03-03 14:44:58,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832182651] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,262 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:58,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062812076] [2025-03-03 14:44:58,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,263 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:58,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,263 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:58,263 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,263 INFO L87 Difference]: Start difference. First operand 222 states and 376 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,307 INFO L93 Difference]: Finished difference Result 435 states and 738 transitions. [2025-03-03 14:44:58,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:58,311 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,312 INFO L225 Difference]: With dead ends: 435 [2025-03-03 14:44:58,312 INFO L226 Difference]: Without dead ends: 222 [2025-03-03 14:44:58,313 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:58,313 INFO L435 NwaCegarLoop]: 202 mSDtfsCounter, 192 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 206 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,313 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 206 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2025-03-03 14:44:58,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 222. [2025-03-03 14:44:58,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.6470588235294117) internal successors, (364), 221 states have internal predecessors, (364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 364 transitions. [2025-03-03 14:44:58,326 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 364 transitions. Word has length 35 [2025-03-03 14:44:58,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,326 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 364 transitions. [2025-03-03 14:44:58,326 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,326 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 364 transitions. [2025-03-03 14:44:58,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:58,327 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,327 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,327 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-03 14:44:58,327 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,328 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,328 INFO L85 PathProgramCache]: Analyzing trace with hash -1959417280, now seen corresponding path program 1 times [2025-03-03 14:44:58,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150726566] [2025-03-03 14:44:58,328 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:58,342 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:58,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150726566] [2025-03-03 14:44:58,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1150726566] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,401 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820505217] [2025-03-03 14:44:58,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,401 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,401 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,402 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,402 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,402 INFO L87 Difference]: Start difference. First operand 222 states and 364 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,487 INFO L93 Difference]: Finished difference Result 607 states and 993 transitions. [2025-03-03 14:44:58,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,488 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,490 INFO L225 Difference]: With dead ends: 607 [2025-03-03 14:44:58,490 INFO L226 Difference]: Without dead ends: 395 [2025-03-03 14:44:58,491 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,491 INFO L435 NwaCegarLoop]: 325 mSDtfsCounter, 375 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 375 SdHoareTripleChecker+Valid, 465 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,491 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [375 Valid, 465 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:44:58,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2025-03-03 14:44:58,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 222. [2025-03-03 14:44:58,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.6334841628959276) internal successors, (361), 221 states have internal predecessors, (361), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 361 transitions. [2025-03-03 14:44:58,517 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 361 transitions. Word has length 35 [2025-03-03 14:44:58,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,518 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 361 transitions. [2025-03-03 14:44:58,518 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,518 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 361 transitions. [2025-03-03 14:44:58,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:58,518 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,518 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,519 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-03 14:44:58,519 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,519 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1928397473, now seen corresponding path program 1 times [2025-03-03 14:44:58,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219064145] [2025-03-03 14:44:58,521 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,529 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:58,536 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:58,536 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,536 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219064145] [2025-03-03 14:44:58,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219064145] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833469515] [2025-03-03 14:44:58,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,590 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,590 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,590 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,590 INFO L87 Difference]: Start difference. First operand 222 states and 361 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,652 INFO L93 Difference]: Finished difference Result 622 states and 1008 transitions. [2025-03-03 14:44:58,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,652 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,654 INFO L225 Difference]: With dead ends: 622 [2025-03-03 14:44:58,654 INFO L226 Difference]: Without dead ends: 412 [2025-03-03 14:44:58,655 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,655 INFO L435 NwaCegarLoop]: 336 mSDtfsCounter, 383 mSDsluCounter, 151 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 383 SdHoareTripleChecker+Valid, 487 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,655 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [383 Valid, 487 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 412 states. [2025-03-03 14:44:58,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 412 to 228. [2025-03-03 14:44:58,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 227 states have (on average 1.6123348017621146) internal successors, (366), 227 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 366 transitions. [2025-03-03 14:44:58,664 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 366 transitions. Word has length 35 [2025-03-03 14:44:58,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,665 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 366 transitions. [2025-03-03 14:44:58,665 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,665 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 366 transitions. [2025-03-03 14:44:58,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:58,665 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,665 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,665 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-03 14:44:58,665 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1995404226, now seen corresponding path program 1 times [2025-03-03 14:44:58,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240594789] [2025-03-03 14:44:58,666 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,685 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:58,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:58,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240594789] [2025-03-03 14:44:58,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [240594789] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,733 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,733 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157248085] [2025-03-03 14:44:58,733 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,734 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,734 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,734 INFO L87 Difference]: Start difference. First operand 228 states and 366 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,807 INFO L93 Difference]: Finished difference Result 783 states and 1249 transitions. [2025-03-03 14:44:58,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:44:58,808 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,810 INFO L225 Difference]: With dead ends: 783 [2025-03-03 14:44:58,810 INFO L226 Difference]: Without dead ends: 568 [2025-03-03 14:44:58,811 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,813 INFO L435 NwaCegarLoop]: 328 mSDtfsCounter, 379 mSDsluCounter, 255 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 583 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,813 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 583 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:58,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2025-03-03 14:44:58,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 377. [2025-03-03 14:44:58,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 376 states have (on average 1.5904255319148937) internal successors, (598), 376 states have internal predecessors, (598), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 598 transitions. [2025-03-03 14:44:58,833 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 598 transitions. Word has length 35 [2025-03-03 14:44:58,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:58,833 INFO L471 AbstractCegarLoop]: Abstraction has 377 states and 598 transitions. [2025-03-03 14:44:58,833 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,834 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 598 transitions. [2025-03-03 14:44:58,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:58,836 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:58,836 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:58,836 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-03 14:44:58,837 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:58,837 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:58,837 INFO L85 PathProgramCache]: Analyzing trace with hash -750639745, now seen corresponding path program 1 times [2025-03-03 14:44:58,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:58,837 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825101963] [2025-03-03 14:44:58,837 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:58,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:58,843 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:58,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:58,847 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:58,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:58,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:58,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:58,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825101963] [2025-03-03 14:44:58,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825101963] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:58,891 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:58,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:58,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86851979] [2025-03-03 14:44:58,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:58,892 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:58,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:58,892 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:58,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:58,893 INFO L87 Difference]: Start difference. First operand 377 states and 598 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:58,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:58,989 INFO L93 Difference]: Finished difference Result 1150 states and 1827 transitions. [2025-03-03 14:44:58,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:58,990 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:58,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:58,993 INFO L225 Difference]: With dead ends: 1150 [2025-03-03 14:44:58,993 INFO L226 Difference]: Without dead ends: 787 [2025-03-03 14:44:58,994 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:58,995 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 500 mSDsluCounter, 384 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 500 SdHoareTripleChecker+Valid, 573 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:58,996 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [500 Valid, 573 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:44:58,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2025-03-03 14:44:59,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 664. [2025-03-03 14:44:59,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 664 states, 663 states have (on average 1.5761689291101055) internal successors, (1045), 663 states have internal predecessors, (1045), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 664 states to 664 states and 1045 transitions. [2025-03-03 14:44:59,021 INFO L78 Accepts]: Start accepts. Automaton has 664 states and 1045 transitions. Word has length 35 [2025-03-03 14:44:59,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,022 INFO L471 AbstractCegarLoop]: Abstraction has 664 states and 1045 transitions. [2025-03-03 14:44:59,022 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,022 INFO L276 IsEmpty]: Start isEmpty. Operand 664 states and 1045 transitions. [2025-03-03 14:44:59,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:59,022 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,024 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,024 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-03 14:44:59,025 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1520590556, now seen corresponding path program 1 times [2025-03-03 14:44:59,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477515297] [2025-03-03 14:44:59,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:59,049 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:59,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,053 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477515297] [2025-03-03 14:44:59,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1477515297] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031265349] [2025-03-03 14:44:59,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,090 INFO L87 Difference]: Start difference. First operand 664 states and 1045 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,135 INFO L93 Difference]: Finished difference Result 1618 states and 2550 transitions. [2025-03-03 14:44:59,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:59,136 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:59,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,139 INFO L225 Difference]: With dead ends: 1618 [2025-03-03 14:44:59,140 INFO L226 Difference]: Without dead ends: 977 [2025-03-03 14:44:59,141 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,141 INFO L435 NwaCegarLoop]: 196 mSDtfsCounter, 179 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 348 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,142 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 348 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 977 states. [2025-03-03 14:44:59,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 977 to 975. [2025-03-03 14:44:59,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 975 states, 974 states have (on average 1.5698151950718686) internal successors, (1529), 974 states have internal predecessors, (1529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 975 states and 1529 transitions. [2025-03-03 14:44:59,183 INFO L78 Accepts]: Start accepts. Automaton has 975 states and 1529 transitions. Word has length 35 [2025-03-03 14:44:59,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,183 INFO L471 AbstractCegarLoop]: Abstraction has 975 states and 1529 transitions. [2025-03-03 14:44:59,183 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,183 INFO L276 IsEmpty]: Start isEmpty. Operand 975 states and 1529 transitions. [2025-03-03 14:44:59,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:59,184 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,184 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,184 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-03 14:44:59,184 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,184 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,185 INFO L85 PathProgramCache]: Analyzing trace with hash -460683866, now seen corresponding path program 1 times [2025-03-03 14:44:59,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,185 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49406943] [2025-03-03 14:44:59,185 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,193 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:59,198 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:59,198 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,198 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,230 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,230 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49406943] [2025-03-03 14:44:59,230 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [49406943] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,230 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,230 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:59,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870598827] [2025-03-03 14:44:59,230 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,230 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,231 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,231 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,231 INFO L87 Difference]: Start difference. First operand 975 states and 1529 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,340 INFO L93 Difference]: Finished difference Result 2631 states and 4132 transitions. [2025-03-03 14:44:59,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,340 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:59,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,345 INFO L225 Difference]: With dead ends: 2631 [2025-03-03 14:44:59,346 INFO L226 Difference]: Without dead ends: 1672 [2025-03-03 14:44:59,347 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,347 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 483 mSDsluCounter, 233 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 461 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 461 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1672 states. [2025-03-03 14:44:59,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1672 to 1082. [2025-03-03 14:44:59,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 1081 states have (on average 1.5624421831637372) internal successors, (1689), 1081 states have internal predecessors, (1689), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1689 transitions. [2025-03-03 14:44:59,385 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1689 transitions. Word has length 35 [2025-03-03 14:44:59,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,385 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1689 transitions. [2025-03-03 14:44:59,386 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,386 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1689 transitions. [2025-03-03 14:44:59,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:59,389 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,389 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,390 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-03 14:44:59,390 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,390 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,390 INFO L85 PathProgramCache]: Analyzing trace with hash -971218043, now seen corresponding path program 1 times [2025-03-03 14:44:59,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610036139] [2025-03-03 14:44:59,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,397 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:59,399 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:59,399 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,399 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,425 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610036139] [2025-03-03 14:44:59,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610036139] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:59,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509345069] [2025-03-03 14:44:59,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,426 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,426 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,426 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,426 INFO L87 Difference]: Start difference. First operand 1082 states and 1689 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,510 INFO L93 Difference]: Finished difference Result 2779 states and 4322 transitions. [2025-03-03 14:44:59,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,510 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:59,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,516 INFO L225 Difference]: With dead ends: 2779 [2025-03-03 14:44:59,516 INFO L226 Difference]: Without dead ends: 1730 [2025-03-03 14:44:59,518 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,518 INFO L435 NwaCegarLoop]: 188 mSDtfsCounter, 484 mSDsluCounter, 143 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 484 SdHoareTripleChecker+Valid, 331 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,518 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [484 Valid, 331 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1730 states. [2025-03-03 14:44:59,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1730 to 1082. [2025-03-03 14:44:59,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 1081 states have (on average 1.5430157261794635) internal successors, (1668), 1081 states have internal predecessors, (1668), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1668 transitions. [2025-03-03 14:44:59,569 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1668 transitions. Word has length 35 [2025-03-03 14:44:59,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,569 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1668 transitions. [2025-03-03 14:44:59,570 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,570 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1668 transitions. [2025-03-03 14:44:59,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:59,570 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,570 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,570 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-03 14:44:59,570 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,571 INFO L85 PathProgramCache]: Analyzing trace with hash -1476776668, now seen corresponding path program 1 times [2025-03-03 14:44:59,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658105077] [2025-03-03 14:44:59,571 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,575 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:59,578 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:59,578 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,578 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658105077] [2025-03-03 14:44:59,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658105077] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,603 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,603 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:44:59,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548978815] [2025-03-03 14:44:59,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,603 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:44:59,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,604 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:44:59,604 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:44:59,604 INFO L87 Difference]: Start difference. First operand 1082 states and 1668 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,687 INFO L93 Difference]: Finished difference Result 2486 states and 3822 transitions. [2025-03-03 14:44:59,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 14:44:59,687 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:59,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,692 INFO L225 Difference]: With dead ends: 2486 [2025-03-03 14:44:59,692 INFO L226 Difference]: Without dead ends: 1445 [2025-03-03 14:44:59,693 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:44:59,694 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 486 mSDsluCounter, 183 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 486 SdHoareTripleChecker+Valid, 369 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,694 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [486 Valid, 369 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1445 states. [2025-03-03 14:44:59,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1445 to 1232. [2025-03-03 14:44:59,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1232 states, 1231 states have (on average 1.5223395613322501) internal successors, (1874), 1231 states have internal predecessors, (1874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1232 states to 1232 states and 1874 transitions. [2025-03-03 14:44:59,742 INFO L78 Accepts]: Start accepts. Automaton has 1232 states and 1874 transitions. Word has length 35 [2025-03-03 14:44:59,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,742 INFO L471 AbstractCegarLoop]: Abstraction has 1232 states and 1874 transitions. [2025-03-03 14:44:59,742 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,742 INFO L276 IsEmpty]: Start isEmpty. Operand 1232 states and 1874 transitions. [2025-03-03 14:44:59,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-03-03 14:44:59,742 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,742 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-03 14:44:59,743 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1347693949, now seen corresponding path program 1 times [2025-03-03 14:44:59,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438043402] [2025-03-03 14:44:59,743 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-03 14:44:59,753 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-03 14:44:59,753 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,753 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438043402] [2025-03-03 14:44:59,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [438043402] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,789 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,790 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393938872] [2025-03-03 14:44:59,790 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,790 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,790 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,790 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,790 INFO L87 Difference]: Start difference. First operand 1232 states and 1874 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:44:59,858 INFO L93 Difference]: Finished difference Result 2723 states and 4138 transitions. [2025-03-03 14:44:59,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:44:59,859 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-03-03 14:44:59,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:44:59,864 INFO L225 Difference]: With dead ends: 2723 [2025-03-03 14:44:59,864 INFO L226 Difference]: Without dead ends: 1510 [2025-03-03 14:44:59,865 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,866 INFO L435 NwaCegarLoop]: 185 mSDtfsCounter, 126 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 325 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:44:59,866 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 325 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:44:59,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1510 states. [2025-03-03 14:44:59,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1510 to 1507. [2025-03-03 14:44:59,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1507 states, 1506 states have (on average 1.5092961487383798) internal successors, (2273), 1506 states have internal predecessors, (2273), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1507 states to 1507 states and 2273 transitions. [2025-03-03 14:44:59,922 INFO L78 Accepts]: Start accepts. Automaton has 1507 states and 2273 transitions. Word has length 35 [2025-03-03 14:44:59,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:44:59,922 INFO L471 AbstractCegarLoop]: Abstraction has 1507 states and 2273 transitions. [2025-03-03 14:44:59,922 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:44:59,922 INFO L276 IsEmpty]: Start isEmpty. Operand 1507 states and 2273 transitions. [2025-03-03 14:44:59,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-03 14:44:59,923 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:44:59,923 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:44:59,923 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-03 14:44:59,923 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:44:59,924 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:44:59,924 INFO L85 PathProgramCache]: Analyzing trace with hash -131311477, now seen corresponding path program 1 times [2025-03-03 14:44:59,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:44:59,924 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624328714] [2025-03-03 14:44:59,924 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:44:59,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:44:59,929 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-03 14:44:59,932 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-03 14:44:59,932 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:44:59,932 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:44:59,953 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:44:59,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:44:59,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624328714] [2025-03-03 14:44:59,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624328714] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:44:59,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:44:59,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:44:59,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951098573] [2025-03-03 14:44:59,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:44:59,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:44:59,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:44:59,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:44:59,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:44:59,954 INFO L87 Difference]: Start difference. First operand 1507 states and 2273 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,038 INFO L93 Difference]: Finished difference Result 3639 states and 5522 transitions. [2025-03-03 14:45:00,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,038 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2025-03-03 14:45:00,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,045 INFO L225 Difference]: With dead ends: 3639 [2025-03-03 14:45:00,045 INFO L226 Difference]: Without dead ends: 2171 [2025-03-03 14:45:00,047 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,048 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 85 mSDsluCounter, 175 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85 SdHoareTripleChecker+Valid, 431 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,048 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [85 Valid, 431 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2171 states. [2025-03-03 14:45:00,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2171 to 2169. [2025-03-03 14:45:00,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2169 states, 2168 states have (on average 1.507841328413284) internal successors, (3269), 2168 states have internal predecessors, (3269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2169 states to 2169 states and 3269 transitions. [2025-03-03 14:45:00,136 INFO L78 Accepts]: Start accepts. Automaton has 2169 states and 3269 transitions. Word has length 46 [2025-03-03 14:45:00,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,136 INFO L471 AbstractCegarLoop]: Abstraction has 2169 states and 3269 transitions. [2025-03-03 14:45:00,136 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,137 INFO L276 IsEmpty]: Start isEmpty. Operand 2169 states and 3269 transitions. [2025-03-03 14:45:00,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-03 14:45:00,137 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,137 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,138 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-03 14:45:00,138 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,138 INFO L85 PathProgramCache]: Analyzing trace with hash -7238230, now seen corresponding path program 1 times [2025-03-03 14:45:00,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219519399] [2025-03-03 14:45:00,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,143 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-03 14:45:00,147 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-03 14:45:00,148 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,187 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:45:00,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,187 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219519399] [2025-03-03 14:45:00,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219519399] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,187 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,188 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735227126] [2025-03-03 14:45:00,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,188 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,188 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,188 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,188 INFO L87 Difference]: Start difference. First operand 2169 states and 3269 transitions. Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,245 INFO L93 Difference]: Finished difference Result 4265 states and 6443 transitions. [2025-03-03 14:45:00,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,245 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2025-03-03 14:45:00,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,253 INFO L225 Difference]: With dead ends: 4265 [2025-03-03 14:45:00,253 INFO L226 Difference]: Without dead ends: 2135 [2025-03-03 14:45:00,256 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,257 INFO L435 NwaCegarLoop]: 190 mSDtfsCounter, 187 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,257 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 190 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2135 states. [2025-03-03 14:45:00,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2135 to 2135. [2025-03-03 14:45:00,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2135 states, 2134 states have (on average 1.5107778819119024) internal successors, (3224), 2134 states have internal predecessors, (3224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2135 states to 2135 states and 3224 transitions. [2025-03-03 14:45:00,329 INFO L78 Accepts]: Start accepts. Automaton has 2135 states and 3224 transitions. Word has length 46 [2025-03-03 14:45:00,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,329 INFO L471 AbstractCegarLoop]: Abstraction has 2135 states and 3224 transitions. [2025-03-03 14:45:00,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,329 INFO L276 IsEmpty]: Start isEmpty. Operand 2135 states and 3224 transitions. [2025-03-03 14:45:00,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2025-03-03 14:45:00,330 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,331 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-03 14:45:00,331 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,331 INFO L85 PathProgramCache]: Analyzing trace with hash 891533401, now seen corresponding path program 1 times [2025-03-03 14:45:00,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039463959] [2025-03-03 14:45:00,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,336 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-03-03 14:45:00,341 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-03-03 14:45:00,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:00,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1039463959] [2025-03-03 14:45:00,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1039463959] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753079138] [2025-03-03 14:45:00,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,366 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,367 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,367 INFO L87 Difference]: Start difference. First operand 2135 states and 3224 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,465 INFO L93 Difference]: Finished difference Result 5356 states and 8134 transitions. [2025-03-03 14:45:00,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,465 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2025-03-03 14:45:00,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,476 INFO L225 Difference]: With dead ends: 5356 [2025-03-03 14:45:00,476 INFO L226 Difference]: Without dead ends: 3260 [2025-03-03 14:45:00,478 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,479 INFO L435 NwaCegarLoop]: 239 mSDtfsCounter, 84 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 412 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,479 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 412 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3260 states. [2025-03-03 14:45:00,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3260 to 3258. [2025-03-03 14:45:00,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3258 states, 3257 states have (on average 1.5087503837887626) internal successors, (4914), 3257 states have internal predecessors, (4914), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3258 states to 3258 states and 4914 transitions. [2025-03-03 14:45:00,580 INFO L78 Accepts]: Start accepts. Automaton has 3258 states and 4914 transitions. Word has length 47 [2025-03-03 14:45:00,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,581 INFO L471 AbstractCegarLoop]: Abstraction has 3258 states and 4914 transitions. [2025-03-03 14:45:00,581 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,581 INFO L276 IsEmpty]: Start isEmpty. Operand 3258 states and 4914 transitions. [2025-03-03 14:45:00,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2025-03-03 14:45:00,584 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,585 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,585 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-03 14:45:00,585 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1015606648, now seen corresponding path program 1 times [2025-03-03 14:45:00,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069860152] [2025-03-03 14:45:00,585 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,590 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-03-03 14:45:00,592 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-03-03 14:45:00,592 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,592 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,614 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:45:00,614 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1069860152] [2025-03-03 14:45:00,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1069860152] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,615 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,615 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [127212961] [2025-03-03 14:45:00,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,615 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,616 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,616 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,616 INFO L87 Difference]: Start difference. First operand 3258 states and 4914 transitions. Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:00,699 INFO L93 Difference]: Finished difference Result 6442 states and 9734 transitions. [2025-03-03 14:45:00,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:00,700 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2025-03-03 14:45:00,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:00,710 INFO L225 Difference]: With dead ends: 6442 [2025-03-03 14:45:00,710 INFO L226 Difference]: Without dead ends: 3225 [2025-03-03 14:45:00,716 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,718 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 185 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:00,718 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 189 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:00,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3225 states. [2025-03-03 14:45:00,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3225 to 3225. [2025-03-03 14:45:00,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3225 states, 3224 states have (on average 1.5108560794044665) internal successors, (4871), 3224 states have internal predecessors, (4871), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3225 states to 3225 states and 4871 transitions. [2025-03-03 14:45:00,829 INFO L78 Accepts]: Start accepts. Automaton has 3225 states and 4871 transitions. Word has length 47 [2025-03-03 14:45:00,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:00,830 INFO L471 AbstractCegarLoop]: Abstraction has 3225 states and 4871 transitions. [2025-03-03 14:45:00,830 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:00,830 INFO L276 IsEmpty]: Start isEmpty. Operand 3225 states and 4871 transitions. [2025-03-03 14:45:00,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-03 14:45:00,831 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:00,831 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:00,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-03 14:45:00,831 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:00,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:00,831 INFO L85 PathProgramCache]: Analyzing trace with hash -70435947, now seen corresponding path program 1 times [2025-03-03 14:45:00,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:00,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307412605] [2025-03-03 14:45:00,832 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:00,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:00,837 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-03 14:45:00,841 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-03 14:45:00,841 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:00,841 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:00,862 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:00,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:00,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307412605] [2025-03-03 14:45:00,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1307412605] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:00,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:00,863 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:00,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53563264] [2025-03-03 14:45:00,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:00,863 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:00,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:00,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:00,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:00,863 INFO L87 Difference]: Start difference. First operand 3225 states and 4871 transitions. Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:01,007 INFO L93 Difference]: Finished difference Result 8488 states and 12953 transitions. [2025-03-03 14:45:01,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:01,008 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-03-03 14:45:01,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:01,023 INFO L225 Difference]: With dead ends: 8488 [2025-03-03 14:45:01,024 INFO L226 Difference]: Without dead ends: 5304 [2025-03-03 14:45:01,027 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:01,027 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 89 mSDsluCounter, 170 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 398 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:01,027 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 398 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:01,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5304 states. [2025-03-03 14:45:01,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5304 to 5302. [2025-03-03 14:45:01,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5302 states, 5301 states have (on average 1.5199019053008866) internal successors, (8057), 5301 states have internal predecessors, (8057), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5302 states to 5302 states and 8057 transitions. [2025-03-03 14:45:01,248 INFO L78 Accepts]: Start accepts. Automaton has 5302 states and 8057 transitions. Word has length 48 [2025-03-03 14:45:01,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:01,249 INFO L471 AbstractCegarLoop]: Abstraction has 5302 states and 8057 transitions. [2025-03-03 14:45:01,249 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,249 INFO L276 IsEmpty]: Start isEmpty. Operand 5302 states and 8057 transitions. [2025-03-03 14:45:01,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-03 14:45:01,250 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:01,250 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:01,251 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-03 14:45:01,251 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:01,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:01,251 INFO L85 PathProgramCache]: Analyzing trace with hash 53637300, now seen corresponding path program 1 times [2025-03-03 14:45:01,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:01,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704754059] [2025-03-03 14:45:01,251 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:01,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:01,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-03 14:45:01,257 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-03 14:45:01,257 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:01,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:01,272 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-03 14:45:01,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:01,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704754059] [2025-03-03 14:45:01,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704754059] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:01,272 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:01,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:01,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316086401] [2025-03-03 14:45:01,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:01,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:01,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:01,273 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:01,273 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:01,273 INFO L87 Difference]: Start difference. First operand 5302 states and 8057 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:01,430 INFO L93 Difference]: Finished difference Result 10529 states and 16021 transitions. [2025-03-03 14:45:01,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:01,430 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-03-03 14:45:01,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:01,453 INFO L225 Difference]: With dead ends: 10529 [2025-03-03 14:45:01,453 INFO L226 Difference]: Without dead ends: 5268 [2025-03-03 14:45:01,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:01,459 INFO L435 NwaCegarLoop]: 188 mSDtfsCounter, 183 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:01,459 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 188 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:01,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5268 states. [2025-03-03 14:45:01,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5268 to 5268. [2025-03-03 14:45:01,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5268 states, 5267 states have (on average 1.5215492690336054) internal successors, (8014), 5267 states have internal predecessors, (8014), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5268 states to 5268 states and 8014 transitions. [2025-03-03 14:45:01,627 INFO L78 Accepts]: Start accepts. Automaton has 5268 states and 8014 transitions. Word has length 48 [2025-03-03 14:45:01,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:01,627 INFO L471 AbstractCegarLoop]: Abstraction has 5268 states and 8014 transitions. [2025-03-03 14:45:01,628 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,628 INFO L276 IsEmpty]: Start isEmpty. Operand 5268 states and 8014 transitions. [2025-03-03 14:45:01,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-03 14:45:01,629 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:01,629 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:01,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-03 14:45:01,629 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:01,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:01,630 INFO L85 PathProgramCache]: Analyzing trace with hash 504882511, now seen corresponding path program 1 times [2025-03-03 14:45:01,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:01,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12356481] [2025-03-03 14:45:01,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:01,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:01,634 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-03 14:45:01,637 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-03 14:45:01,637 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:01,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:01,671 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:01,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:01,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12356481] [2025-03-03 14:45:01,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [12356481] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:01,671 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:01,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:01,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006809960] [2025-03-03 14:45:01,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:01,672 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:01,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:01,672 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:01,672 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:01,672 INFO L87 Difference]: Start difference. First operand 5268 states and 8014 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:01,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:01,914 INFO L93 Difference]: Finished difference Result 12918 states and 19630 transitions. [2025-03-03 14:45:01,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:01,915 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2025-03-03 14:45:01,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:01,932 INFO L225 Difference]: With dead ends: 12918 [2025-03-03 14:45:01,932 INFO L226 Difference]: Without dead ends: 6813 [2025-03-03 14:45:01,940 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:01,941 INFO L435 NwaCegarLoop]: 208 mSDtfsCounter, 417 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 417 SdHoareTripleChecker+Valid, 321 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:01,941 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [417 Valid, 321 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:01,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6813 states. [2025-03-03 14:45:02,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6813 to 6813. [2025-03-03 14:45:02,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6813 states, 6812 states have (on average 1.4925132119788609) internal successors, (10167), 6812 states have internal predecessors, (10167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6813 states to 6813 states and 10167 transitions. [2025-03-03 14:45:02,175 INFO L78 Accepts]: Start accepts. Automaton has 6813 states and 10167 transitions. Word has length 49 [2025-03-03 14:45:02,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:02,176 INFO L471 AbstractCegarLoop]: Abstraction has 6813 states and 10167 transitions. [2025-03-03 14:45:02,176 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,176 INFO L276 IsEmpty]: Start isEmpty. Operand 6813 states and 10167 transitions. [2025-03-03 14:45:02,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-03-03 14:45:02,177 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:02,178 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:02,178 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-03 14:45:02,178 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:02,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:02,178 INFO L85 PathProgramCache]: Analyzing trace with hash 455477141, now seen corresponding path program 1 times [2025-03-03 14:45:02,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:02,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24695378] [2025-03-03 14:45:02,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:02,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:02,185 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-03-03 14:45:02,190 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-03-03 14:45:02,193 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:02,193 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:02,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:02,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:02,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24695378] [2025-03-03 14:45:02,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [24695378] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:02,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:02,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 14:45:02,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806803988] [2025-03-03 14:45:02,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:02,248 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 14:45:02,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:02,249 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 14:45:02,249 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:02,249 INFO L87 Difference]: Start difference. First operand 6813 states and 10167 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:02,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:02,676 INFO L93 Difference]: Finished difference Result 18969 states and 28290 transitions. [2025-03-03 14:45:02,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 14:45:02,677 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2025-03-03 14:45:02,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:02,703 INFO L225 Difference]: With dead ends: 18969 [2025-03-03 14:45:02,703 INFO L226 Difference]: Without dead ends: 12185 [2025-03-03 14:45:02,713 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 14:45:02,714 INFO L435 NwaCegarLoop]: 179 mSDtfsCounter, 715 mSDsluCounter, 353 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 715 SdHoareTripleChecker+Valid, 532 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:02,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [715 Valid, 532 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:02,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12185 states. [2025-03-03 14:45:03,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12185 to 8087. [2025-03-03 14:45:03,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8087 states, 8086 states have (on average 1.4710610932475885) internal successors, (11895), 8086 states have internal predecessors, (11895), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8087 states to 8087 states and 11895 transitions. [2025-03-03 14:45:03,112 INFO L78 Accepts]: Start accepts. Automaton has 8087 states and 11895 transitions. Word has length 55 [2025-03-03 14:45:03,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:03,112 INFO L471 AbstractCegarLoop]: Abstraction has 8087 states and 11895 transitions. [2025-03-03 14:45:03,113 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,113 INFO L276 IsEmpty]: Start isEmpty. Operand 8087 states and 11895 transitions. [2025-03-03 14:45:03,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-03 14:45:03,116 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:03,116 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:03,116 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-03 14:45:03,116 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:03,117 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:03,117 INFO L85 PathProgramCache]: Analyzing trace with hash -77541371, now seen corresponding path program 1 times [2025-03-03 14:45:03,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:03,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499248807] [2025-03-03 14:45:03,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:03,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:03,122 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-03 14:45:03,125 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-03 14:45:03,125 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:03,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:03,159 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-03 14:45:03,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:03,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499248807] [2025-03-03 14:45:03,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499248807] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:03,159 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:03,159 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:03,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128375188] [2025-03-03 14:45:03,160 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:03,160 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:03,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:03,160 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:03,160 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:03,160 INFO L87 Difference]: Start difference. First operand 8087 states and 11895 transitions. Second operand has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:03,452 INFO L93 Difference]: Finished difference Result 19176 states and 28067 transitions. [2025-03-03 14:45:03,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:03,452 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 92 [2025-03-03 14:45:03,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:03,473 INFO L225 Difference]: With dead ends: 19176 [2025-03-03 14:45:03,474 INFO L226 Difference]: Without dead ends: 11112 [2025-03-03 14:45:03,487 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:03,487 INFO L435 NwaCegarLoop]: 168 mSDtfsCounter, 370 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:03,487 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 304 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:03,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11112 states. [2025-03-03 14:45:03,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11112 to 7166. [2025-03-03 14:45:03,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7166 states, 7165 states have (on average 1.4591765526866713) internal successors, (10455), 7165 states have internal predecessors, (10455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7166 states to 7166 states and 10455 transitions. [2025-03-03 14:45:03,761 INFO L78 Accepts]: Start accepts. Automaton has 7166 states and 10455 transitions. Word has length 92 [2025-03-03 14:45:03,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:03,761 INFO L471 AbstractCegarLoop]: Abstraction has 7166 states and 10455 transitions. [2025-03-03 14:45:03,761 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,761 INFO L276 IsEmpty]: Start isEmpty. Operand 7166 states and 10455 transitions. [2025-03-03 14:45:03,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-03 14:45:03,764 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:03,764 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:03,764 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-03 14:45:03,765 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:03,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:03,765 INFO L85 PathProgramCache]: Analyzing trace with hash 1306788133, now seen corresponding path program 1 times [2025-03-03 14:45:03,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:03,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017520038] [2025-03-03 14:45:03,765 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:03,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:03,771 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-03 14:45:03,774 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-03 14:45:03,774 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:03,774 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:03,792 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:03,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:03,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017520038] [2025-03-03 14:45:03,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017520038] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:03,792 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:03,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:03,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313610442] [2025-03-03 14:45:03,792 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:03,793 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:03,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:03,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:03,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,793 INFO L87 Difference]: Start difference. First operand 7166 states and 10455 transitions. Second operand has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:03,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:03,972 INFO L93 Difference]: Finished difference Result 14599 states and 21320 transitions. [2025-03-03 14:45:03,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:03,972 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 92 [2025-03-03 14:45:03,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:03,987 INFO L225 Difference]: With dead ends: 14599 [2025-03-03 14:45:03,987 INFO L226 Difference]: Without dead ends: 7462 [2025-03-03 14:45:03,996 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:03,997 INFO L435 NwaCegarLoop]: 242 mSDtfsCounter, 127 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 318 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:03,997 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 318 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:04,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7462 states. [2025-03-03 14:45:04,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7462 to 7430. [2025-03-03 14:45:04,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7430 states, 7429 states have (on average 1.423206353479607) internal successors, (10573), 7429 states have internal predecessors, (10573), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7430 states to 7430 states and 10573 transitions. [2025-03-03 14:45:04,235 INFO L78 Accepts]: Start accepts. Automaton has 7430 states and 10573 transitions. Word has length 92 [2025-03-03 14:45:04,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:04,235 INFO L471 AbstractCegarLoop]: Abstraction has 7430 states and 10573 transitions. [2025-03-03 14:45:04,235 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,235 INFO L276 IsEmpty]: Start isEmpty. Operand 7430 states and 10573 transitions. [2025-03-03 14:45:04,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-03-03 14:45:04,239 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:04,239 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:04,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-03 14:45:04,239 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:04,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:04,239 INFO L85 PathProgramCache]: Analyzing trace with hash -256959016, now seen corresponding path program 1 times [2025-03-03 14:45:04,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:04,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656138205] [2025-03-03 14:45:04,240 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:04,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:04,245 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-03-03 14:45:04,248 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-03-03 14:45:04,248 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:04,248 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:04,266 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:04,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:04,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656138205] [2025-03-03 14:45:04,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656138205] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:04,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:04,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:04,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378088997] [2025-03-03 14:45:04,266 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:04,267 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:04,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:04,267 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:04,267 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,267 INFO L87 Difference]: Start difference. First operand 7430 states and 10573 transitions. Second operand has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:04,497 INFO L93 Difference]: Finished difference Result 15297 states and 21780 transitions. [2025-03-03 14:45:04,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:04,498 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 93 [2025-03-03 14:45:04,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:04,515 INFO L225 Difference]: With dead ends: 15297 [2025-03-03 14:45:04,516 INFO L226 Difference]: Without dead ends: 7908 [2025-03-03 14:45:04,522 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,525 INFO L435 NwaCegarLoop]: 239 mSDtfsCounter, 127 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 317 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:04,526 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 317 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:04,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7908 states. [2025-03-03 14:45:04,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7908 to 7860. [2025-03-03 14:45:04,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7860 states, 7859 states have (on average 1.3865631759765873) internal successors, (10897), 7859 states have internal predecessors, (10897), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7860 states to 7860 states and 10897 transitions. [2025-03-03 14:45:04,923 INFO L78 Accepts]: Start accepts. Automaton has 7860 states and 10897 transitions. Word has length 93 [2025-03-03 14:45:04,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:04,923 INFO L471 AbstractCegarLoop]: Abstraction has 7860 states and 10897 transitions. [2025-03-03 14:45:04,923 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:04,923 INFO L276 IsEmpty]: Start isEmpty. Operand 7860 states and 10897 transitions. [2025-03-03 14:45:04,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-03 14:45:04,928 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:04,928 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:04,928 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-03 14:45:04,928 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:04,928 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:04,929 INFO L85 PathProgramCache]: Analyzing trace with hash 952026339, now seen corresponding path program 1 times [2025-03-03 14:45:04,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:04,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025438082] [2025-03-03 14:45:04,929 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:04,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:04,935 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-03 14:45:04,938 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-03 14:45:04,938 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:04,939 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:04,961 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 14:45:04,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:04,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025438082] [2025-03-03 14:45:04,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2025438082] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:04,961 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:04,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:04,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953049558] [2025-03-03 14:45:04,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:04,962 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:04,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:04,962 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:04,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:04,963 INFO L87 Difference]: Start difference. First operand 7860 states and 10897 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:05,247 INFO L93 Difference]: Finished difference Result 15926 states and 22144 transitions. [2025-03-03 14:45:05,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:05,247 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2025-03-03 14:45:05,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:05,262 INFO L225 Difference]: With dead ends: 15926 [2025-03-03 14:45:05,263 INFO L226 Difference]: Without dead ends: 8127 [2025-03-03 14:45:05,271 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:05,272 INFO L435 NwaCegarLoop]: 236 mSDtfsCounter, 124 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 314 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:05,272 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 314 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:05,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8127 states. [2025-03-03 14:45:05,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8127 to 7410. [2025-03-03 14:45:05,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7410 states, 7409 states have (on average 1.3314887299230664) internal successors, (9865), 7409 states have internal predecessors, (9865), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7410 states to 7410 states and 9865 transitions. [2025-03-03 14:45:05,562 INFO L78 Accepts]: Start accepts. Automaton has 7410 states and 9865 transitions. Word has length 94 [2025-03-03 14:45:05,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:05,562 INFO L471 AbstractCegarLoop]: Abstraction has 7410 states and 9865 transitions. [2025-03-03 14:45:05,562 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,562 INFO L276 IsEmpty]: Start isEmpty. Operand 7410 states and 9865 transitions. [2025-03-03 14:45:05,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-03-03 14:45:05,567 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:05,568 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:05,568 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-03 14:45:05,568 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:05,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:05,568 INFO L85 PathProgramCache]: Analyzing trace with hash -1392333286, now seen corresponding path program 1 times [2025-03-03 14:45:05,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:05,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373319301] [2025-03-03 14:45:05,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:05,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:05,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-03-03 14:45:05,578 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-03-03 14:45:05,579 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:05,579 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:05,601 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-03 14:45:05,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:05,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373319301] [2025-03-03 14:45:05,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373319301] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:05,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:05,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:05,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712126196] [2025-03-03 14:45:05,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:05,603 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:05,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:05,603 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:05,603 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:05,603 INFO L87 Difference]: Start difference. First operand 7410 states and 9865 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:05,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:05,784 INFO L93 Difference]: Finished difference Result 13392 states and 17868 transitions. [2025-03-03 14:45:05,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:05,784 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2025-03-03 14:45:05,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:05,797 INFO L225 Difference]: With dead ends: 13392 [2025-03-03 14:45:05,797 INFO L226 Difference]: Without dead ends: 7410 [2025-03-03 14:45:05,802 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:05,803 INFO L435 NwaCegarLoop]: 176 mSDtfsCounter, 6 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 342 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:05,804 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 342 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:05,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7410 states. [2025-03-03 14:45:05,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7410 to 7410. [2025-03-03 14:45:05,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7410 states, 7409 states have (on average 1.329734107166959) internal successors, (9852), 7409 states have internal predecessors, (9852), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7410 states to 7410 states and 9852 transitions. [2025-03-03 14:45:06,006 INFO L78 Accepts]: Start accepts. Automaton has 7410 states and 9852 transitions. Word has length 95 [2025-03-03 14:45:06,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,006 INFO L471 AbstractCegarLoop]: Abstraction has 7410 states and 9852 transitions. [2025-03-03 14:45:06,006 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,006 INFO L276 IsEmpty]: Start isEmpty. Operand 7410 states and 9852 transitions. [2025-03-03 14:45:06,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-03-03 14:45:06,010 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,010 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,010 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-03 14:45:06,010 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,011 INFO L85 PathProgramCache]: Analyzing trace with hash -1098930279, now seen corresponding path program 1 times [2025-03-03 14:45:06,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690588103] [2025-03-03 14:45:06,011 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,017 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-03-03 14:45:06,021 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-03-03 14:45:06,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,021 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:06,100 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-03 14:45:06,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:06,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690588103] [2025-03-03 14:45:06,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [690588103] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:06,101 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:06,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:06,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047962341] [2025-03-03 14:45:06,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:06,101 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:06,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:06,101 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:06,102 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:06,102 INFO L87 Difference]: Start difference. First operand 7410 states and 9852 transitions. Second operand has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:06,370 INFO L93 Difference]: Finished difference Result 13970 states and 18533 transitions. [2025-03-03 14:45:06,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:06,371 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2025-03-03 14:45:06,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:06,383 INFO L225 Difference]: With dead ends: 13970 [2025-03-03 14:45:06,383 INFO L226 Difference]: Without dead ends: 5789 [2025-03-03 14:45:06,389 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:06,390 INFO L435 NwaCegarLoop]: 160 mSDtfsCounter, 442 mSDsluCounter, 231 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 442 SdHoareTripleChecker+Valid, 391 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:06,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [442 Valid, 391 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 14:45:06,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5789 states. [2025-03-03 14:45:06,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5789 to 5675. [2025-03-03 14:45:06,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5675 states, 5674 states have (on average 1.2936200211491011) internal successors, (7340), 5674 states have internal predecessors, (7340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5675 states to 5675 states and 7340 transitions. [2025-03-03 14:45:06,557 INFO L78 Accepts]: Start accepts. Automaton has 5675 states and 7340 transitions. Word has length 95 [2025-03-03 14:45:06,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,557 INFO L471 AbstractCegarLoop]: Abstraction has 5675 states and 7340 transitions. [2025-03-03 14:45:06,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,557 INFO L276 IsEmpty]: Start isEmpty. Operand 5675 states and 7340 transitions. [2025-03-03 14:45:06,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2025-03-03 14:45:06,564 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,564 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,564 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-03 14:45:06,564 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,565 INFO L85 PathProgramCache]: Analyzing trace with hash 366123217, now seen corresponding path program 1 times [2025-03-03 14:45:06,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813389959] [2025-03-03 14:45:06,565 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,571 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 124 statements into 1 equivalence classes. [2025-03-03 14:45:06,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 124 of 124 statements. [2025-03-03 14:45:06,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:06,597 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:06,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:06,597 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813389959] [2025-03-03 14:45:06,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1813389959] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:06,597 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:06,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:06,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005876661] [2025-03-03 14:45:06,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:06,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:06,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:06,598 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:06,599 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:06,599 INFO L87 Difference]: Start difference. First operand 5675 states and 7340 transitions. Second operand has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:06,765 INFO L93 Difference]: Finished difference Result 10872 states and 14044 transitions. [2025-03-03 14:45:06,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:06,765 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 124 [2025-03-03 14:45:06,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:06,775 INFO L225 Difference]: With dead ends: 10872 [2025-03-03 14:45:06,775 INFO L226 Difference]: Without dead ends: 5621 [2025-03-03 14:45:06,778 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:06,778 INFO L435 NwaCegarLoop]: 169 mSDtfsCounter, 35 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:06,778 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 304 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:06,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5621 states. [2025-03-03 14:45:06,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5621 to 5621. [2025-03-03 14:45:06,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5621 states, 5620 states have (on average 1.287188612099644) internal successors, (7234), 5620 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5621 states to 5621 states and 7234 transitions. [2025-03-03 14:45:06,936 INFO L78 Accepts]: Start accepts. Automaton has 5621 states and 7234 transitions. Word has length 124 [2025-03-03 14:45:06,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:06,937 INFO L471 AbstractCegarLoop]: Abstraction has 5621 states and 7234 transitions. [2025-03-03 14:45:06,937 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:06,937 INFO L276 IsEmpty]: Start isEmpty. Operand 5621 states and 7234 transitions. [2025-03-03 14:45:06,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2025-03-03 14:45:06,943 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:06,943 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:06,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-03 14:45:06,944 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:06,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:06,944 INFO L85 PathProgramCache]: Analyzing trace with hash -901210675, now seen corresponding path program 1 times [2025-03-03 14:45:06,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:06,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759949211] [2025-03-03 14:45:06,944 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:06,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:06,950 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 138 statements into 1 equivalence classes. [2025-03-03 14:45:06,952 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 138 of 138 statements. [2025-03-03 14:45:06,952 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:06,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:07,002 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-03 14:45:07,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:07,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759949211] [2025-03-03 14:45:07,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1759949211] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:07,003 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:07,003 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:07,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91647738] [2025-03-03 14:45:07,003 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:07,003 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:07,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:07,004 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:07,004 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:07,004 INFO L87 Difference]: Start difference. First operand 5621 states and 7234 transitions. Second operand has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:07,172 INFO L93 Difference]: Finished difference Result 10063 states and 12970 transitions. [2025-03-03 14:45:07,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:07,173 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 138 [2025-03-03 14:45:07,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:07,182 INFO L225 Difference]: With dead ends: 10063 [2025-03-03 14:45:07,182 INFO L226 Difference]: Without dead ends: 5529 [2025-03-03 14:45:07,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:07,186 INFO L435 NwaCegarLoop]: 208 mSDtfsCounter, 309 mSDsluCounter, 109 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 309 SdHoareTripleChecker+Valid, 317 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:07,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [309 Valid, 317 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:07,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5529 states. [2025-03-03 14:45:07,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5529 to 5527. [2025-03-03 14:45:07,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5527 states, 5526 states have (on average 1.265472312703583) internal successors, (6993), 5526 states have internal predecessors, (6993), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5527 states to 5527 states and 6993 transitions. [2025-03-03 14:45:07,358 INFO L78 Accepts]: Start accepts. Automaton has 5527 states and 6993 transitions. Word has length 138 [2025-03-03 14:45:07,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:07,358 INFO L471 AbstractCegarLoop]: Abstraction has 5527 states and 6993 transitions. [2025-03-03 14:45:07,359 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,359 INFO L276 IsEmpty]: Start isEmpty. Operand 5527 states and 6993 transitions. [2025-03-03 14:45:07,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2025-03-03 14:45:07,388 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:07,388 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:07,388 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-03 14:45:07,388 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:07,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:07,389 INFO L85 PathProgramCache]: Analyzing trace with hash 535034058, now seen corresponding path program 1 times [2025-03-03 14:45:07,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:07,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963375723] [2025-03-03 14:45:07,389 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:07,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:07,397 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-03 14:45:07,401 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-03 14:45:07,401 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:07,401 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:07,430 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-03-03 14:45:07,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:07,431 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963375723] [2025-03-03 14:45:07,431 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963375723] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:07,431 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:07,431 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:07,431 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088346253] [2025-03-03 14:45:07,431 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:07,432 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:07,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:07,432 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:07,432 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:07,432 INFO L87 Difference]: Start difference. First operand 5527 states and 6993 transitions. Second operand has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:07,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:07,718 INFO L93 Difference]: Finished difference Result 10629 states and 13436 transitions. [2025-03-03 14:45:07,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:07,718 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2025-03-03 14:45:07,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:07,729 INFO L225 Difference]: With dead ends: 10629 [2025-03-03 14:45:07,729 INFO L226 Difference]: Without dead ends: 5526 [2025-03-03 14:45:07,733 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:07,734 INFO L435 NwaCegarLoop]: 167 mSDtfsCounter, 23 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 303 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:07,734 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 303 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:07,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5526 states. [2025-03-03 14:45:08,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5526 to 5486. [2025-03-03 14:45:08,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5486 states, 5485 states have (on average 1.259799453053783) internal successors, (6910), 5485 states have internal predecessors, (6910), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5486 states to 5486 states and 6910 transitions. [2025-03-03 14:45:08,032 INFO L78 Accepts]: Start accepts. Automaton has 5486 states and 6910 transitions. Word has length 143 [2025-03-03 14:45:08,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,033 INFO L471 AbstractCegarLoop]: Abstraction has 5486 states and 6910 transitions. [2025-03-03 14:45:08,033 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,033 INFO L276 IsEmpty]: Start isEmpty. Operand 5486 states and 6910 transitions. [2025-03-03 14:45:08,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2025-03-03 14:45:08,040 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,040 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,041 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-03 14:45:08,041 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1166052546, now seen corresponding path program 1 times [2025-03-03 14:45:08,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,041 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332883818] [2025-03-03 14:45:08,041 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,049 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-03 14:45:08,051 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-03 14:45:08,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,087 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2025-03-03 14:45:08,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332883818] [2025-03-03 14:45:08,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332883818] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:08,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772680432] [2025-03-03 14:45:08,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:08,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:08,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,089 INFO L87 Difference]: Start difference. First operand 5486 states and 6910 transitions. Second operand has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,374 INFO L93 Difference]: Finished difference Result 10568 states and 13297 transitions. [2025-03-03 14:45:08,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:08,374 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2025-03-03 14:45:08,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,385 INFO L225 Difference]: With dead ends: 10568 [2025-03-03 14:45:08,386 INFO L226 Difference]: Without dead ends: 5496 [2025-03-03 14:45:08,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:08,391 INFO L435 NwaCegarLoop]: 164 mSDtfsCounter, 23 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,391 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 299 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5496 states. [2025-03-03 14:45:08,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5496 to 5456. [2025-03-03 14:45:08,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5456 states, 5455 states have (on average 1.253712190650779) internal successors, (6839), 5455 states have internal predecessors, (6839), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5456 states to 5456 states and 6839 transitions. [2025-03-03 14:45:08,558 INFO L78 Accepts]: Start accepts. Automaton has 5456 states and 6839 transitions. Word has length 143 [2025-03-03 14:45:08,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,558 INFO L471 AbstractCegarLoop]: Abstraction has 5456 states and 6839 transitions. [2025-03-03 14:45:08,558 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,559 INFO L276 IsEmpty]: Start isEmpty. Operand 5456 states and 6839 transitions. [2025-03-03 14:45:08,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2025-03-03 14:45:08,564 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,564 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,565 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-03 14:45:08,565 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,565 INFO L85 PathProgramCache]: Analyzing trace with hash -884744179, now seen corresponding path program 1 times [2025-03-03 14:45:08,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512346949] [2025-03-03 14:45:08,565 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,571 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-03 14:45:08,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-03 14:45:08,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,624 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-03-03 14:45:08,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512346949] [2025-03-03 14:45:08,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [512346949] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:08,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431236596] [2025-03-03 14:45:08,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,626 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:08,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:08,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:08,626 INFO L87 Difference]: Start difference. First operand 5456 states and 6839 transitions. Second operand has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:08,755 INFO L93 Difference]: Finished difference Result 8770 states and 11035 transitions. [2025-03-03 14:45:08,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:08,755 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2025-03-03 14:45:08,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:08,763 INFO L225 Difference]: With dead ends: 8770 [2025-03-03 14:45:08,764 INFO L226 Difference]: Without dead ends: 3744 [2025-03-03 14:45:08,768 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:08,768 INFO L435 NwaCegarLoop]: 202 mSDtfsCounter, 282 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 282 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:08,768 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [282 Valid, 294 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:08,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2025-03-03 14:45:08,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3742. [2025-03-03 14:45:08,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3742 states, 3741 states have (on average 1.2215985030740444) internal successors, (4570), 3741 states have internal predecessors, (4570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3742 states to 3742 states and 4570 transitions. [2025-03-03 14:45:08,916 INFO L78 Accepts]: Start accepts. Automaton has 3742 states and 4570 transitions. Word has length 148 [2025-03-03 14:45:08,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:08,916 INFO L471 AbstractCegarLoop]: Abstraction has 3742 states and 4570 transitions. [2025-03-03 14:45:08,916 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:08,917 INFO L276 IsEmpty]: Start isEmpty. Operand 3742 states and 4570 transitions. [2025-03-03 14:45:08,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2025-03-03 14:45:08,920 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:08,920 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:08,920 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-03 14:45:08,920 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:08,921 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:08,921 INFO L85 PathProgramCache]: Analyzing trace with hash 1426230907, now seen corresponding path program 1 times [2025-03-03 14:45:08,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:08,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025071622] [2025-03-03 14:45:08,921 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:08,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:08,930 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-03 14:45:08,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-03 14:45:08,937 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:08,937 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:08,994 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 49 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-03 14:45:08,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:08,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025071622] [2025-03-03 14:45:08,995 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2025071622] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:08,995 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:08,995 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 14:45:08,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86826579] [2025-03-03 14:45:08,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:08,996 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 14:45:08,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:08,997 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 14:45:08,997 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 14:45:08,997 INFO L87 Difference]: Start difference. First operand 3742 states and 4570 transitions. Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:09,091 INFO L93 Difference]: Finished difference Result 5944 states and 7260 transitions. [2025-03-03 14:45:09,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 14:45:09,091 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2025-03-03 14:45:09,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:09,097 INFO L225 Difference]: With dead ends: 5944 [2025-03-03 14:45:09,097 INFO L226 Difference]: Without dead ends: 2299 [2025-03-03 14:45:09,100 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 14:45:09,101 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 290 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 290 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:09,101 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [290 Valid, 278 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:09,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2299 states. [2025-03-03 14:45:09,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2299 to 2297. [2025-03-03 14:45:09,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2297 states, 2296 states have (on average 1.1877177700348431) internal successors, (2727), 2296 states have internal predecessors, (2727), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2297 states to 2297 states and 2727 transitions. [2025-03-03 14:45:09,173 INFO L78 Accepts]: Start accepts. Automaton has 2297 states and 2727 transitions. Word has length 148 [2025-03-03 14:45:09,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:09,173 INFO L471 AbstractCegarLoop]: Abstraction has 2297 states and 2727 transitions. [2025-03-03 14:45:09,173 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,173 INFO L276 IsEmpty]: Start isEmpty. Operand 2297 states and 2727 transitions. [2025-03-03 14:45:09,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2025-03-03 14:45:09,175 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:09,175 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,175 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-03 14:45:09,175 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:09,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:09,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1259274182, now seen corresponding path program 1 times [2025-03-03 14:45:09,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:09,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359479549] [2025-03-03 14:45:09,175 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:09,182 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 187 statements into 1 equivalence classes. [2025-03-03 14:45:09,185 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 187 of 187 statements. [2025-03-03 14:45:09,185 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,185 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:09,203 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 80 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2025-03-03 14:45:09,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:09,204 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359479549] [2025-03-03 14:45:09,204 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [359479549] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:09,204 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:09,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:09,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178656661] [2025-03-03 14:45:09,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:09,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:09,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:09,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:09,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,205 INFO L87 Difference]: Start difference. First operand 2297 states and 2727 transitions. Second operand has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:09,277 INFO L93 Difference]: Finished difference Result 4131 states and 4938 transitions. [2025-03-03 14:45:09,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:09,278 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 187 [2025-03-03 14:45:09,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:09,284 INFO L225 Difference]: With dead ends: 4131 [2025-03-03 14:45:09,284 INFO L226 Difference]: Without dead ends: 2235 [2025-03-03 14:45:09,285 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,286 INFO L435 NwaCegarLoop]: 158 mSDtfsCounter, 1 mSDsluCounter, 146 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:09,286 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 304 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:09,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2025-03-03 14:45:09,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 2167. [2025-03-03 14:45:09,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2167 states, 2166 states have (on average 1.1768236380424746) internal successors, (2549), 2166 states have internal predecessors, (2549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 2167 states and 2549 transitions. [2025-03-03 14:45:09,361 INFO L78 Accepts]: Start accepts. Automaton has 2167 states and 2549 transitions. Word has length 187 [2025-03-03 14:45:09,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:09,362 INFO L471 AbstractCegarLoop]: Abstraction has 2167 states and 2549 transitions. [2025-03-03 14:45:09,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,362 INFO L276 IsEmpty]: Start isEmpty. Operand 2167 states and 2549 transitions. [2025-03-03 14:45:09,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2025-03-03 14:45:09,363 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:09,363 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,363 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-03 14:45:09,363 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:09,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:09,364 INFO L85 PathProgramCache]: Analyzing trace with hash 228354068, now seen corresponding path program 1 times [2025-03-03 14:45:09,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:09,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784516868] [2025-03-03 14:45:09,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:09,370 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 194 statements into 1 equivalence classes. [2025-03-03 14:45:09,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 194 of 194 statements. [2025-03-03 14:45:09,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:09,397 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-03-03 14:45:09,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:09,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784516868] [2025-03-03 14:45:09,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [784516868] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:09,397 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:09,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:09,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502353736] [2025-03-03 14:45:09,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:09,398 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:09,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:09,398 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:09,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,399 INFO L87 Difference]: Start difference. First operand 2167 states and 2549 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:09,487 INFO L93 Difference]: Finished difference Result 4644 states and 5498 transitions. [2025-03-03 14:45:09,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:09,487 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 194 [2025-03-03 14:45:09,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:09,495 INFO L225 Difference]: With dead ends: 4644 [2025-03-03 14:45:09,496 INFO L226 Difference]: Without dead ends: 2872 [2025-03-03 14:45:09,497 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,498 INFO L435 NwaCegarLoop]: 193 mSDtfsCounter, 134 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 134 SdHoareTripleChecker+Valid, 298 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:09,498 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [134 Valid, 298 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:09,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2872 states. [2025-03-03 14:45:09,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2872 to 2461. [2025-03-03 14:45:09,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2461 states, 2460 states have (on average 1.1630081300813009) internal successors, (2861), 2460 states have internal predecessors, (2861), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2461 states to 2461 states and 2861 transitions. [2025-03-03 14:45:09,581 INFO L78 Accepts]: Start accepts. Automaton has 2461 states and 2861 transitions. Word has length 194 [2025-03-03 14:45:09,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:09,582 INFO L471 AbstractCegarLoop]: Abstraction has 2461 states and 2861 transitions. [2025-03-03 14:45:09,582 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,582 INFO L276 IsEmpty]: Start isEmpty. Operand 2461 states and 2861 transitions. [2025-03-03 14:45:09,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2025-03-03 14:45:09,583 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:09,583 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,583 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-03 14:45:09,583 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:09,584 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:09,584 INFO L85 PathProgramCache]: Analyzing trace with hash -1531152694, now seen corresponding path program 1 times [2025-03-03 14:45:09,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:09,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901511091] [2025-03-03 14:45:09,584 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:09,593 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-03-03 14:45:09,596 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-03-03 14:45:09,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 14:45:09,618 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2025-03-03 14:45:09,618 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 14:45:09,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901511091] [2025-03-03 14:45:09,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901511091] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 14:45:09,618 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 14:45:09,618 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-03 14:45:09,619 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245863166] [2025-03-03 14:45:09,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 14:45:09,619 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-03 14:45:09,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 14:45:09,619 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-03 14:45:09,619 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,619 INFO L87 Difference]: Start difference. First operand 2461 states and 2861 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 14:45:09,689 INFO L93 Difference]: Finished difference Result 4162 states and 4873 transitions. [2025-03-03 14:45:09,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-03 14:45:09,690 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 197 [2025-03-03 14:45:09,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 14:45:09,696 INFO L225 Difference]: With dead ends: 4162 [2025-03-03 14:45:09,697 INFO L226 Difference]: Without dead ends: 2094 [2025-03-03 14:45:09,699 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-03 14:45:09,699 INFO L435 NwaCegarLoop]: 156 mSDtfsCounter, 3 mSDsluCounter, 143 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-03 14:45:09,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 299 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-03 14:45:09,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2025-03-03 14:45:09,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 2013. [2025-03-03 14:45:09,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2013 states, 2012 states have (on average 1.14662027833002) internal successors, (2307), 2012 states have internal predecessors, (2307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2013 states to 2013 states and 2307 transitions. [2025-03-03 14:45:09,767 INFO L78 Accepts]: Start accepts. Automaton has 2013 states and 2307 transitions. Word has length 197 [2025-03-03 14:45:09,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 14:45:09,767 INFO L471 AbstractCegarLoop]: Abstraction has 2013 states and 2307 transitions. [2025-03-03 14:45:09,767 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 14:45:09,767 INFO L276 IsEmpty]: Start isEmpty. Operand 2013 states and 2307 transitions. [2025-03-03 14:45:09,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2025-03-03 14:45:09,768 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 14:45:09,768 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,768 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-03-03 14:45:09,769 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 14:45:09,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 14:45:09,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1145785911, now seen corresponding path program 1 times [2025-03-03 14:45:09,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 14:45:09,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508186961] [2025-03-03 14:45:09,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 14:45:09,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 14:45:09,776 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-03-03 14:45:09,783 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-03-03 14:45:09,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:09,784 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-03 14:45:09,788 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-03-03 14:45:09,794 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-03-03 14:45:09,794 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 14:45:09,794 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 14:45:09,847 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-03 14:45:09,847 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-03 14:45:09,848 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-03 14:45:09,849 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-03 14:45:09,852 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 14:45:09,979 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-03 14:45:09,982 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.03 02:45:09 BoogieIcfgContainer [2025-03-03 14:45:09,982 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-03 14:45:09,983 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-03 14:45:09,983 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-03 14:45:09,983 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-03 14:45:09,984 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 02:44:57" (3/4) ... [2025-03-03 14:45:09,984 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-03 14:45:10,106 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 186. [2025-03-03 14:45:10,189 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-03 14:45:10,189 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-03 14:45:10,189 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-03 14:45:10,190 INFO L158 Benchmark]: Toolchain (without parser) took 13349.15ms. Allocated memory was 142.6MB in the beginning and 2.2GB in the end (delta: 2.0GB). Free memory was 105.7MB in the beginning and 887.3MB in the end (delta: -781.5MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2025-03-03 14:45:10,190 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 125.9MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:10,190 INFO L158 Benchmark]: CACSL2BoogieTranslator took 222.92ms. Allocated memory is still 142.6MB. Free memory was 104.8MB in the beginning and 90.2MB in the end (delta: 14.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-03 14:45:10,190 INFO L158 Benchmark]: Boogie Procedure Inliner took 32.22ms. Allocated memory is still 142.6MB. Free memory was 90.2MB in the beginning and 88.3MB in the end (delta: 1.8MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:10,191 INFO L158 Benchmark]: Boogie Preprocessor took 45.68ms. Allocated memory is still 142.6MB. Free memory was 88.3MB in the beginning and 86.5MB in the end (delta: 1.9MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 14:45:10,191 INFO L158 Benchmark]: IcfgBuilder took 514.45ms. Allocated memory is still 142.6MB. Free memory was 86.5MB in the beginning and 61.4MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-03-03 14:45:10,191 INFO L158 Benchmark]: TraceAbstraction took 12322.10ms. Allocated memory was 142.6MB in the beginning and 2.2GB in the end (delta: 2.0GB). Free memory was 60.5MB in the beginning and 925.0MB in the end (delta: -864.5MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2025-03-03 14:45:10,191 INFO L158 Benchmark]: Witness Printer took 206.50ms. Allocated memory is still 2.2GB. Free memory was 925.0MB in the beginning and 887.3MB in the end (delta: 37.7MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-03-03 14:45:10,194 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 125.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 222.92ms. Allocated memory is still 142.6MB. Free memory was 104.8MB in the beginning and 90.2MB in the end (delta: 14.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 32.22ms. Allocated memory is still 142.6MB. Free memory was 90.2MB in the beginning and 88.3MB in the end (delta: 1.8MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 45.68ms. Allocated memory is still 142.6MB. Free memory was 88.3MB in the beginning and 86.5MB in the end (delta: 1.9MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 514.45ms. Allocated memory is still 142.6MB. Free memory was 86.5MB in the beginning and 61.4MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * TraceAbstraction took 12322.10ms. Allocated memory was 142.6MB in the beginning and 2.2GB in the end (delta: 2.0GB). Free memory was 60.5MB in the beginning and 925.0MB in the end (delta: -864.5MB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 206.50ms. Allocated memory is still 2.2GB. Free memory was 925.0MB in the beginning and 887.3MB in the end (delta: 37.7MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 23]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; VAL [c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L689] int __retres1 ; [L693] e_wl = 2 [L694] e_c = e_wl [L695] e_g = e_c [L696] e_f = e_g [L697] e_e = e_f [L698] wl_pc = 0 [L699] c1_pc = 0 [L700] c2_pc = 0 [L701] wb_pc = 0 [L702] wb_i = 1 [L703] c2_i = wb_i [L704] c1_i = c2_i [L705] wl_i = c1_i [L706] r_i = 0 [L707] c_req_up = 0 [L708] d = 0 [L709] c = 0 [L710] CALL start_simulation() [L400] int kernel_st ; [L403] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L404] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )wl_i == 1 [L416] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )c1_i == 1 [L421] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND TRUE (int )c2_i == 1 [L426] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND TRUE (int )wb_i == 1 [L431] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )r_i == 1) [L438] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L460] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L465] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L483] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L492] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L501] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L530] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L535] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L66] COND TRUE (int )wl_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L80] wl_st = 2 [L81] wl_pc = 1 [L82] e_wl = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND TRUE (int )c1_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L148] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND TRUE (int )c2_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L193] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND TRUE (int )wb_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L238] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L548] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L575] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L580] COND TRUE (int )e_wl == 0 [L581] e_wl = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L585] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L586] COND TRUE (int )e_wl == 1 [L587] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L630] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L650] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L655] COND TRUE (int )e_wl == 1 [L656] e_wl = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L660] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L69] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L72] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L87] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L89] t = d [L90] data = d [L91] processed = 0 [L92] e_f = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )e_f == 1 [L95] c1_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L102] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] COND TRUE (int )e_f == 1 [L104] c2_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L111] e_f = 2 [L112] wl_st = 2 [L113] wl_pc = 2 [L114] t_b = t VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND FALSE !((int )c1_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L140] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L155] COND TRUE ! processed [L156] data += 1 [L157] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L158] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L159] COND TRUE (int )e_g == 1 [L160] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L167] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L148] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND FALSE !((int )c2_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L185] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L200] COND TRUE ! processed [L201] data += 1 [L202] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L203] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L204] COND TRUE (int )e_g == 1 [L205] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L212] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L193] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND FALSE !((int )wb_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L230] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L245] c_t = data [L246] c_req_up = 1 [L247] processed = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L238] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L548] COND TRUE (int )c_req_up == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] COND TRUE c != c_t [L550] c = c_t [L551] e_c = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L555] c_req_up = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L575] COND TRUE (int )e_c == 0 [L576] e_c = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L580] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L585] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L593] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L594] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L630] COND TRUE (int )e_c == 1 [L631] r_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L650] COND TRUE (int )e_c == 1 [L651] e_c = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L655] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L660] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L663] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L666] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L669] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L672] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L317] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L332] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L347] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L362] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L377] COND TRUE (int )r_st == 0 [L379] tmp___3 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp___3) [L383] r_st = 1 [L384] CALL read() [L259] d = c [L260] e_e = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L261] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L269] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L270] COND TRUE (int )e_e == 1 [L271] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L279] e_e = 2 [L280] r_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L384] RET read() [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L69] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L118] t = t_b VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L119] COND FALSE !(d == t + 1) [L123] CALL error() [L23] reach_error() VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 135 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 12.2s, OverallIterations: 35, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 5.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8422 SdHoareTripleChecker+Valid, 0.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8422 mSDsluCounter, 11874 SdHoareTripleChecker+Invalid, 0.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 4791 mSDsCounter, 218 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 747 IncrementalHoareTripleChecker+Invalid, 965 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 218 mSolverCounterUnsat, 7083 mSDtfsCounter, 747 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 149 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8087occurred in iteration=19, InterpolantAutomatonStates: 129, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.5s AutomataMinimizationTime, 34 MinimizatonAttempts, 11737 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 2951 NumberOfCodeBlocks, 2951 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2720 ConstructedInterpolants, 0 QuantifiedInterpolants, 4589 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 751/751 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-03 14:45:10,217 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE