./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array13_alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array13_alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 19:58:16,042 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 19:58:16,102 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-03-17 19:58:16,107 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 19:58:16,108 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 19:58:16,108 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 19:58:16,126 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 19:58:16,127 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 19:58:16,128 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 19:58:16,128 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 19:58:16,128 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 19:58:16,129 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 19:58:16,129 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 19:58:16,129 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 19:58:16,129 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 19:58:16,129 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 19:58:16,130 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 19:58:16,130 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 19:58:16,131 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 19:58:16,131 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 19:58:16,131 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 19:58:16,132 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 19:58:16,132 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff [2025-03-17 19:58:16,355 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 19:58:16,361 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 19:58:16,367 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 19:58:16,367 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 19:58:16,368 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 19:58:16,369 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array13_alloca.i [2025-03-17 19:58:17,514 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adfc395dd/77dc1c1499384921b6681b90d9f8195a/FLAG6c5e0f217 [2025-03-17 19:58:17,737 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 19:58:17,738 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array13_alloca.i [2025-03-17 19:58:17,748 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adfc395dd/77dc1c1499384921b6681b90d9f8195a/FLAG6c5e0f217 [2025-03-17 19:58:17,760 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adfc395dd/77dc1c1499384921b6681b90d9f8195a [2025-03-17 19:58:17,762 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 19:58:17,763 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 19:58:17,763 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 19:58:17,763 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 19:58:17,766 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 19:58:17,767 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 07:58:17" (1/1) ... [2025-03-17 19:58:17,769 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79fd4485 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:17, skipping insertion in model container [2025-03-17 19:58:17,769 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 07:58:17" (1/1) ... [2025-03-17 19:58:17,790 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 19:58:17,958 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 19:58:17,965 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 19:58:17,998 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 19:58:18,019 INFO L204 MainTranslator]: Completed translation [2025-03-17 19:58:18,019 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18 WrapperNode [2025-03-17 19:58:18,020 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 19:58:18,020 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 19:58:18,020 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 19:58:18,021 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 19:58:18,025 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,035 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,049 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2025-03-17 19:58:18,050 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 19:58:18,050 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 19:58:18,051 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 19:58:18,051 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 19:58:18,056 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,056 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,058 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,067 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-03-17 19:58:18,068 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,068 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,075 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,078 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,078 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,079 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,082 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 19:58:18,083 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 19:58:18,083 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 19:58:18,083 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 19:58:18,084 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (1/1) ... [2025-03-17 19:58:18,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:18,097 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:18,109 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:18,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 19:58:18,128 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 19:58:18,128 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 19:58:18,128 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-17 19:58:18,129 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 19:58:18,129 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 19:58:18,129 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 19:58:18,173 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 19:58:18,175 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 19:58:18,269 INFO L1322 $ProcedureCfgBuilder]: dead code at ProgramPoint L368: call ULTIMATE.dealloc(main_#t~malloc206#1.base, main_#t~malloc206#1.offset);havoc main_#t~malloc206#1.base, main_#t~malloc206#1.offset; [2025-03-17 19:58:18,273 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2025-03-17 19:58:18,274 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 19:58:18,278 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 19:58:18,279 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 19:58:18,279 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 07:58:18 BoogieIcfgContainer [2025-03-17 19:58:18,279 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 19:58:18,280 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 19:58:18,280 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 19:58:18,283 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 19:58:18,284 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:58:18,284 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 07:58:17" (1/3) ... [2025-03-17 19:58:18,285 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@606300e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 07:58:18, skipping insertion in model container [2025-03-17 19:58:18,285 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:58:18,285 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:58:18" (2/3) ... [2025-03-17 19:58:18,285 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@606300e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 07:58:18, skipping insertion in model container [2025-03-17 19:58:18,285 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:58:18,285 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 07:58:18" (3/3) ... [2025-03-17 19:58:18,286 INFO L363 chiAutomizerObserver]: Analyzing ICFG array13_alloca.i [2025-03-17 19:58:18,320 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 19:58:18,321 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 19:58:18,321 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 19:58:18,321 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 19:58:18,321 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 19:58:18,321 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 19:58:18,321 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 19:58:18,321 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 19:58:18,324 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:18,338 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-03-17 19:58:18,339 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:18,339 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:18,342 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-17 19:58:18,342 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-03-17 19:58:18,342 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 19:58:18,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:18,343 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-03-17 19:58:18,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:18,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:18,344 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-17 19:58:18,344 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-03-17 19:58:18,348 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" [2025-03-17 19:58:18,349 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" [2025-03-17 19:58:18,353 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:18,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1538143, now seen corresponding path program 1 times [2025-03-17 19:58:18,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:18,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190637284] [2025-03-17 19:58:18,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:18,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:18,407 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:58:18,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:58:18,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,426 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:18,431 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:58:18,438 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:58:18,439 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,439 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,452 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:18,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:18,455 INFO L85 PathProgramCache]: Analyzing trace with hash 40649, now seen corresponding path program 1 times [2025-03-17 19:58:18,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:18,455 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989483033] [2025-03-17 19:58:18,455 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:18,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:18,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 19:58:18,471 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 19:58:18,472 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,472 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:18,475 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 19:58:18,481 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 19:58:18,481 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,481 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:18,487 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:18,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1421811285, now seen corresponding path program 1 times [2025-03-17 19:58:18,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:18,487 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579255191] [2025-03-17 19:58:18,488 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:18,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:18,497 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-17 19:58:18,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-17 19:58:18,521 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,522 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:18,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-17 19:58:18,537 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-17 19:58:18,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:18,537 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:18,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:18,811 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 19:58:18,811 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 19:58:18,811 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 19:58:18,813 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 19:58:18,813 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-17 19:58:18,813 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:18,814 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 19:58:18,814 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 19:58:18,814 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration1_Lasso [2025-03-17 19:58:18,814 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 19:58:18,814 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 19:58:18,824 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,832 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,956 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,958 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,961 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,963 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,966 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,967 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,970 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,972 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:18,974 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:19,152 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 19:58:19,154 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-17 19:58:19,156 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:19,156 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:19,158 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:19,160 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-17 19:58:19,161 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:19,171 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:19,171 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:19,172 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:19,172 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:19,172 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:19,175 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:19,175 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:19,177 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:19,183 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-03-17 19:58:19,184 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:19,184 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:19,186 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:19,187 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-17 19:58:19,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:19,197 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:19,197 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:19,197 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:19,197 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:19,200 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:19,200 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:19,203 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:19,209 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-17 19:58:19,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:19,210 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:19,211 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:19,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-17 19:58:19,214 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:19,224 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:19,224 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:19,224 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:19,224 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:19,230 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:19,230 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:19,240 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-17 19:58:19,258 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-03-17 19:58:19,260 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 12 variables to zero. [2025-03-17 19:58:19,263 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:19,264 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:19,266 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:19,268 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-17 19:58:19,269 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-17 19:58:19,280 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-17 19:58:19,281 INFO L474 LassoAnalysis]: Proved termination. [2025-03-17 19:58:19,281 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-17 19:58:19,287 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:19,298 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-03-17 19:58:19,307 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-17 19:58:19,308 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-17 19:58:19,308 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2025-03-17 19:58:19,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,334 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:58:19,337 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:58:19,337 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,337 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:19,339 INFO L256 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-17 19:58:19,339 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:19,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 19:58:19,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 19:58:19,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:19,358 INFO L256 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-17 19:58:19,359 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:19,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:19,412 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-03-17 19:58:19,414 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:19,446 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 19 states and 27 transitions. Complement of second has 5 states. [2025-03-17 19:58:19,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-17 19:58:19,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:19,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2025-03-17 19:58:19,456 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 4 letters. Loop has 3 letters. [2025-03-17 19:58:19,458 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:19,458 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 7 letters. Loop has 3 letters. [2025-03-17 19:58:19,458 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:19,458 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 4 letters. Loop has 6 letters. [2025-03-17 19:58:19,458 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:19,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 27 transitions. [2025-03-17 19:58:19,460 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:19,463 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 11 states and 16 transitions. [2025-03-17 19:58:19,464 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 19:58:19,464 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-03-17 19:58:19,464 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 16 transitions. [2025-03-17 19:58:19,464 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:19,464 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-03-17 19:58:19,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 16 transitions. [2025-03-17 19:58:19,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2025-03-17 19:58:19,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 9 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:19,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 15 transitions. [2025-03-17 19:58:19,482 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 15 transitions. [2025-03-17 19:58:19,482 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 15 transitions. [2025-03-17 19:58:19,482 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 19:58:19,482 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 15 transitions. [2025-03-17 19:58:19,483 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:19,483 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:19,483 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:19,484 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-03-17 19:58:19,484 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:19,484 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-17 19:58:19,484 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:19,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,484 INFO L85 PathProgramCache]: Analyzing trace with hash 47682440, now seen corresponding path program 1 times [2025-03-17 19:58:19,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:19,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534609508] [2025-03-17 19:58:19,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:19,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:19,491 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-17 19:58:19,495 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-17 19:58:19,496 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:19,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:19,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:19,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534609508] [2025-03-17 19:58:19,561 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534609508] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 19:58:19,561 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 19:58:19,561 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 19:58:19,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735905508] [2025-03-17 19:58:19,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 19:58:19,563 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:19,563 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,564 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 1 times [2025-03-17 19:58:19,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:19,564 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069750209] [2025-03-17 19:58:19,564 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:19,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:19,566 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:19,570 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:19,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,573 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,573 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:19,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:19,577 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:19,577 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,577 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,578 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:19,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:19,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 19:58:19,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-03-17 19:58:19,624 INFO L87 Difference]: Start difference. First operand 10 states and 15 transitions. cyclomatic complexity: 7 Second operand has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:19,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:19,646 INFO L93 Difference]: Finished difference Result 12 states and 17 transitions. [2025-03-17 19:58:19,646 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 17 transitions. [2025-03-17 19:58:19,647 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:19,648 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 12 states and 17 transitions. [2025-03-17 19:58:19,648 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 19:58:19,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 19:58:19,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2025-03-17 19:58:19,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:19,648 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2025-03-17 19:58:19,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2025-03-17 19:58:19,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 10. [2025-03-17 19:58:19,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:19,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2025-03-17 19:58:19,650 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2025-03-17 19:58:19,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 19:58:19,651 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2025-03-17 19:58:19,652 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 19:58:19,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2025-03-17 19:58:19,652 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:19,653 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:19,653 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:19,653 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:19,653 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:19,654 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-17 19:58:19,654 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:19,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,654 INFO L85 PathProgramCache]: Analyzing trace with hash -1126475907, now seen corresponding path program 1 times [2025-03-17 19:58:19,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:19,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068096705] [2025-03-17 19:58:19,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:19,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:19,660 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-17 19:58:19,670 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-17 19:58:19,670 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,670 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:19,672 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-17 19:58:19,677 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-17 19:58:19,677 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,677 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,679 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:19,679 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 2 times [2025-03-17 19:58:19,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:19,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195616294] [2025-03-17 19:58:19,679 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:19,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:19,682 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:19,683 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:19,683 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:58:19,683 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,683 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:19,684 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:19,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:19,686 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:19,687 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:19,687 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:19,687 INFO L85 PathProgramCache]: Analyzing trace with hash -211587845, now seen corresponding path program 1 times [2025-03-17 19:58:19,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:19,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [979943869] [2025-03-17 19:58:19,687 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:19,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:19,691 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-03-17 19:58:19,697 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-03-17 19:58:19,698 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:19,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:19,836 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:19,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:19,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:19,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [979943869] [2025-03-17 19:58:19,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [979943869] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:19,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [53170435] [2025-03-17 19:58:19,969 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:19,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:19,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:19,971 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:19,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-17 19:58:20,001 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-03-17 19:58:20,011 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-03-17 19:58:20,011 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,011 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:20,012 INFO L256 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-03-17 19:58:20,013 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:20,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:20,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:20,107 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,108 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:20,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2025-03-17 19:58:20,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-03-17 19:58:20,171 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [53170435] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:20,171 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:20,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2025-03-17 19:58:20,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952762194] [2025-03-17 19:58:20,171 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:20,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:20,210 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-03-17 19:58:20,210 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2025-03-17 19:58:20,210 INFO L87 Difference]: Start difference. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:20,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:20,296 INFO L93 Difference]: Finished difference Result 19 states and 27 transitions. [2025-03-17 19:58:20,296 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 27 transitions. [2025-03-17 19:58:20,297 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:58:20,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 27 transitions. [2025-03-17 19:58:20,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-17 19:58:20,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-17 19:58:20,298 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 27 transitions. [2025-03-17 19:58:20,298 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:20,298 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2025-03-17 19:58:20,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 27 transitions. [2025-03-17 19:58:20,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 16. [2025-03-17 19:58:20,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.4375) internal successors, (23), 15 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:20,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 23 transitions. [2025-03-17 19:58:20,299 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 23 transitions. [2025-03-17 19:58:20,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 19:58:20,301 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 23 transitions. [2025-03-17 19:58:20,301 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 19:58:20,301 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 23 transitions. [2025-03-17 19:58:20,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:20,301 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:20,301 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:20,301 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:20,301 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:20,302 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:20,302 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:20,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,302 INFO L85 PathProgramCache]: Analyzing trace with hash -211587844, now seen corresponding path program 1 times [2025-03-17 19:58:20,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548674469] [2025-03-17 19:58:20,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,306 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-03-17 19:58:20,310 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-03-17 19:58:20,310 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,310 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:20,312 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-03-17 19:58:20,315 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-03-17 19:58:20,315 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,315 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,318 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:20,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,320 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 3 times [2025-03-17 19:58:20,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697642109] [2025-03-17 19:58:20,320 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:20,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,322 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:20,323 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:20,323 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 19:58:20,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,324 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:20,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:20,325 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:20,325 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,325 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,326 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:20,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,327 INFO L85 PathProgramCache]: Analyzing trace with hash -1472454982, now seen corresponding path program 1 times [2025-03-17 19:58:20,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505731106] [2025-03-17 19:58:20,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,333 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-17 19:58:20,338 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 19:58:20,339 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:20,404 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:20,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505731106] [2025-03-17 19:58:20,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505731106] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:20,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2071377468] [2025-03-17 19:58:20,405 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:20,405 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:20,407 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:20,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-17 19:58:20,437 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-17 19:58:20,446 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 19:58:20,446 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,446 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:20,447 INFO L256 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-17 19:58:20,448 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:20,485 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,485 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:20,518 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2071377468] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:20,518 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:20,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2025-03-17 19:58:20,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619906080] [2025-03-17 19:58:20,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:20,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:20,566 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 19:58:20,566 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-17 19:58:20,566 INFO L87 Difference]: Start difference. First operand 16 states and 23 transitions. cyclomatic complexity: 10 Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:20,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:20,609 INFO L93 Difference]: Finished difference Result 24 states and 32 transitions. [2025-03-17 19:58:20,609 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 32 transitions. [2025-03-17 19:58:20,610 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:20,612 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 21 states and 29 transitions. [2025-03-17 19:58:20,612 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-17 19:58:20,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-17 19:58:20,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 29 transitions. [2025-03-17 19:58:20,613 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:20,613 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 29 transitions. [2025-03-17 19:58:20,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 29 transitions. [2025-03-17 19:58:20,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 18. [2025-03-17 19:58:20,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3888888888888888) internal successors, (25), 17 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:20,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 25 transitions. [2025-03-17 19:58:20,614 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 25 transitions. [2025-03-17 19:58:20,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 19:58:20,615 INFO L432 stractBuchiCegarLoop]: Abstraction has 18 states and 25 transitions. [2025-03-17 19:58:20,615 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 19:58:20,615 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 25 transitions. [2025-03-17 19:58:20,616 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:20,616 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:20,616 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:20,616 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:20,616 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:20,616 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-17 19:58:20,616 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:20,617 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,617 INFO L85 PathProgramCache]: Analyzing trace with hash 2030833575, now seen corresponding path program 1 times [2025-03-17 19:58:20,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345297052] [2025-03-17 19:58:20,617 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,621 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-17 19:58:20,638 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-17 19:58:20,641 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,642 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,642 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:20,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-17 19:58:20,651 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-17 19:58:20,654 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,655 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:20,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 4 times [2025-03-17 19:58:20,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461662507] [2025-03-17 19:58:20,658 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:20,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,662 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-17 19:58:20,663 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:20,663 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:58:20,663 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,663 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:20,664 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:20,665 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:20,665 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:20,666 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:20,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:20,666 INFO L85 PathProgramCache]: Analyzing trace with hash 1715913381, now seen corresponding path program 1 times [2025-03-17 19:58:20,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:20,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944620986] [2025-03-17 19:58:20,667 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:20,674 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-17 19:58:20,681 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-17 19:58:20,681 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,681 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:20,940 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:20,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:20,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1944620986] [2025-03-17 19:58:20,941 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1944620986] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:20,941 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1950421339] [2025-03-17 19:58:20,941 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:20,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:20,941 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:20,943 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:20,945 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-17 19:58:20,973 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-17 19:58:20,981 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-17 19:58:20,982 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:20,982 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:20,984 INFO L256 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-03-17 19:58:20,986 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:20,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:21,051 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-03-17 19:58:21,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-03-17 19:58:21,065 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-03-17 19:58:21,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-03-17 19:58:21,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:21,101 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:21,101 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:21,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2025-03-17 19:58:21,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2025-03-17 19:58:21,313 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:21,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1950421339] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:21,314 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:21,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 20 [2025-03-17 19:58:21,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643969432] [2025-03-17 19:58:21,314 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:21,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:21,349 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-03-17 19:58:21,349 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2025-03-17 19:58:21,349 INFO L87 Difference]: Start difference. First operand 18 states and 25 transitions. cyclomatic complexity: 10 Second operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:21,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:21,445 INFO L93 Difference]: Finished difference Result 20 states and 27 transitions. [2025-03-17 19:58:21,445 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 27 transitions. [2025-03-17 19:58:21,446 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:21,446 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 27 transitions. [2025-03-17 19:58:21,446 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-17 19:58:21,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-17 19:58:21,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 27 transitions. [2025-03-17 19:58:21,447 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:21,447 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 27 transitions. [2025-03-17 19:58:21,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 27 transitions. [2025-03-17 19:58:21,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 15. [2025-03-17 19:58:21,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 14 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:21,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 20 transitions. [2025-03-17 19:58:21,448 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 20 transitions. [2025-03-17 19:58:21,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 19:58:21,448 INFO L432 stractBuchiCegarLoop]: Abstraction has 15 states and 20 transitions. [2025-03-17 19:58:21,448 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 19:58:21,449 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 20 transitions. [2025-03-17 19:58:21,449 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:21,449 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:21,449 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:21,449 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:21,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:21,449 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:21,450 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:21,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:21,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1716836903, now seen corresponding path program 2 times [2025-03-17 19:58:21,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:21,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563124148] [2025-03-17 19:58:21,450 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:21,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:21,454 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 13 statements into 2 equivalence classes. [2025-03-17 19:58:21,461 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 13 of 13 statements. [2025-03-17 19:58:21,462 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:21,462 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:21,462 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:21,465 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-17 19:58:21,469 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-17 19:58:21,470 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:21,470 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:21,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:21,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:21,472 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 5 times [2025-03-17 19:58:21,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:21,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088708645] [2025-03-17 19:58:21,473 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:58:21,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:21,475 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:21,476 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:21,476 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:58:21,476 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:21,476 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:21,477 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:21,477 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:21,477 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:21,477 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:21,478 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:21,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:21,479 INFO L85 PathProgramCache]: Analyzing trace with hash 612822309, now seen corresponding path program 2 times [2025-03-17 19:58:21,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:21,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258402214] [2025-03-17 19:58:21,479 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:21,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:21,483 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-17 19:58:21,489 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 19:58:21,489 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:21,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:21,626 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:21,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:21,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1258402214] [2025-03-17 19:58:21,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1258402214] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:21,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1006121309] [2025-03-17 19:58:21,627 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:21,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:21,627 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:21,629 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:21,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-17 19:58:21,658 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-17 19:58:21,666 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 19:58:21,667 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:21,667 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:21,667 INFO L256 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-03-17 19:58:21,669 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:21,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:21,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:21,816 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:21,816 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:21,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-17 19:58:21,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-17 19:58:21,908 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:21,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1006121309] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:21,908 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:21,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 21 [2025-03-17 19:58:21,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694516115] [2025-03-17 19:58:21,908 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:21,942 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:21,942 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-17 19:58:21,942 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2025-03-17 19:58:21,943 INFO L87 Difference]: Start difference. First operand 15 states and 20 transitions. cyclomatic complexity: 7 Second operand has 22 states, 21 states have (on average 1.6666666666666667) internal successors, (35), 22 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:22,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:22,193 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2025-03-17 19:58:22,193 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 43 transitions. [2025-03-17 19:58:22,194 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:58:22,194 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 43 transitions. [2025-03-17 19:58:22,194 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2025-03-17 19:58:22,194 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2025-03-17 19:58:22,194 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 43 transitions. [2025-03-17 19:58:22,194 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:22,194 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 43 transitions. [2025-03-17 19:58:22,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 43 transitions. [2025-03-17 19:58:22,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 21. [2025-03-17 19:58:22,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.380952380952381) internal successors, (29), 20 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:22,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 29 transitions. [2025-03-17 19:58:22,195 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 29 transitions. [2025-03-17 19:58:22,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-03-17 19:58:22,196 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 29 transitions. [2025-03-17 19:58:22,197 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 19:58:22,197 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 29 transitions. [2025-03-17 19:58:22,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:22,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:22,197 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:22,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2025-03-17 19:58:22,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:22,198 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:22,198 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:22,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,198 INFO L85 PathProgramCache]: Analyzing trace with hash 612822310, now seen corresponding path program 3 times [2025-03-17 19:58:22,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408096059] [2025-03-17 19:58:22,198 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:22,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,202 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 15 statements into 3 equivalence classes. [2025-03-17 19:58:22,208 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 19:58:22,208 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-17 19:58:22,208 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,208 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:22,210 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 15 statements into 1 equivalence classes. [2025-03-17 19:58:22,214 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 19:58:22,215 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,215 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,217 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:22,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 6 times [2025-03-17 19:58:22,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783115092] [2025-03-17 19:58:22,219 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 19:58:22,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,221 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:22,225 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:22,226 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 19:58:22,226 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,226 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:22,227 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:22,227 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:22,227 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,227 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,228 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:22,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,229 INFO L85 PathProgramCache]: Analyzing trace with hash 511720548, now seen corresponding path program 3 times [2025-03-17 19:58:22,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897981410] [2025-03-17 19:58:22,229 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:22,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,234 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 3 equivalence classes. [2025-03-17 19:58:22,240 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 17 of 17 statements. [2025-03-17 19:58:22,240 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-17 19:58:22,240 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:22,316 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:22,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:22,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897981410] [2025-03-17 19:58:22,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [897981410] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:22,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [346703015] [2025-03-17 19:58:22,317 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:22,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:22,317 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:22,321 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:22,322 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-17 19:58:22,350 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 3 equivalence classes. [2025-03-17 19:58:22,361 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 17 of 17 statements. [2025-03-17 19:58:22,361 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-03-17 19:58:22,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:22,362 INFO L256 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-03-17 19:58:22,362 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:22,416 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:22,417 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:22,462 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:22,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [346703015] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:22,463 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:22,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2025-03-17 19:58:22,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1166671507] [2025-03-17 19:58:22,463 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:22,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:22,503 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 19:58:22,503 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2025-03-17 19:58:22,503 INFO L87 Difference]: Start difference. First operand 21 states and 29 transitions. cyclomatic complexity: 11 Second operand has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 13 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:22,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:22,565 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2025-03-17 19:58:22,565 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 40 transitions. [2025-03-17 19:58:22,566 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:22,566 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 26 states and 35 transitions. [2025-03-17 19:58:22,566 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-03-17 19:58:22,566 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-03-17 19:58:22,566 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 35 transitions. [2025-03-17 19:58:22,566 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:22,566 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 35 transitions. [2025-03-17 19:58:22,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 35 transitions. [2025-03-17 19:58:22,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 23. [2025-03-17 19:58:22,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:22,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 31 transitions. [2025-03-17 19:58:22,567 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 31 transitions. [2025-03-17 19:58:22,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-17 19:58:22,570 INFO L432 stractBuchiCegarLoop]: Abstraction has 23 states and 31 transitions. [2025-03-17 19:58:22,570 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-17 19:58:22,570 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 31 transitions. [2025-03-17 19:58:22,571 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:22,571 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:22,571 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:22,571 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:22,571 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:22,571 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:22,571 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:22,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,572 INFO L85 PathProgramCache]: Analyzing trace with hash 1934999963, now seen corresponding path program 1 times [2025-03-17 19:58:22,572 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,572 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62920185] [2025-03-17 19:58:22,572 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:22,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,578 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-03-17 19:58:22,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-03-17 19:58:22,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,584 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:22,587 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-03-17 19:58:22,591 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-03-17 19:58:22,591 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,593 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:22,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 7 times [2025-03-17 19:58:22,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,594 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016962060] [2025-03-17 19:58:22,594 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 19:58:22,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,596 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:22,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:22,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,597 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,597 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:22,598 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:22,598 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:22,598 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,598 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:22,599 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:22,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:22,600 INFO L85 PathProgramCache]: Analyzing trace with hash -185874535, now seen corresponding path program 1 times [2025-03-17 19:58:22,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:22,600 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889595011] [2025-03-17 19:58:22,600 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:22,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:22,605 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-03-17 19:58:22,609 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-03-17 19:58:22,610 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,610 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:22,828 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:22,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:22,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [889595011] [2025-03-17 19:58:22,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [889595011] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:22,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1156491126] [2025-03-17 19:58:22,829 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:22,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:22,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:22,832 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:22,833 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-17 19:58:22,870 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-03-17 19:58:22,884 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-03-17 19:58:22,884 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:22,884 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:22,885 INFO L256 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 19 conjuncts are in the unsatisfiable core [2025-03-17 19:58:22,887 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:22,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-17 19:58:22,943 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-17 19:58:22,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-17 19:58:22,957 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-17 19:58:22,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-17 19:58:22,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-17 19:58:22,987 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:22,987 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:23,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-17 19:58:23,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-17 19:58:23,097 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:23,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1156491126] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:23,098 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:23,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2025-03-17 19:58:23,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798777952] [2025-03-17 19:58:23,098 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:23,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:23,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-17 19:58:23,135 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2025-03-17 19:58:23,135 INFO L87 Difference]: Start difference. First operand 23 states and 31 transitions. cyclomatic complexity: 11 Second operand has 17 states, 16 states have (on average 1.9375) internal successors, (31), 17 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:23,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:23,234 INFO L93 Difference]: Finished difference Result 27 states and 35 transitions. [2025-03-17 19:58:23,234 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 35 transitions. [2025-03-17 19:58:23,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:23,235 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 35 transitions. [2025-03-17 19:58:23,235 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2025-03-17 19:58:23,235 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2025-03-17 19:58:23,235 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 35 transitions. [2025-03-17 19:58:23,235 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:23,235 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 35 transitions. [2025-03-17 19:58:23,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 35 transitions. [2025-03-17 19:58:23,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 20. [2025-03-17 19:58:23,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.3) internal successors, (26), 19 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:23,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 26 transitions. [2025-03-17 19:58:23,237 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 26 transitions. [2025-03-17 19:58:23,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-17 19:58:23,238 INFO L432 stractBuchiCegarLoop]: Abstraction has 20 states and 26 transitions. [2025-03-17 19:58:23,238 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-17 19:58:23,238 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 26 transitions. [2025-03-17 19:58:23,238 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:23,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:23,238 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:23,238 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1] [2025-03-17 19:58:23,239 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:23,239 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:23,239 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:23,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,239 INFO L85 PathProgramCache]: Analyzing trace with hash 701629147, now seen corresponding path program 4 times [2025-03-17 19:58:23,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515451239] [2025-03-17 19:58:23,239 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:23,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,244 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 18 statements into 2 equivalence classes. [2025-03-17 19:58:23,250 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 18 of 18 statements. [2025-03-17 19:58:23,250 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:58:23,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,250 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:23,252 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-03-17 19:58:23,256 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-03-17 19:58:23,257 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:23,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:23,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 8 times [2025-03-17 19:58:23,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061577969] [2025-03-17 19:58:23,260 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:23,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,261 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:23,262 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:23,262 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:58:23,262 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,262 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:23,263 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:23,264 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:23,264 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:23,264 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,264 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:23,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,265 INFO L85 PathProgramCache]: Analyzing trace with hash -44255015, now seen corresponding path program 4 times [2025-03-17 19:58:23,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676140369] [2025-03-17 19:58:23,265 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:23,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,270 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 20 statements into 2 equivalence classes. [2025-03-17 19:58:23,274 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 19 of 20 statements. [2025-03-17 19:58:23,274 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-17 19:58:23,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:23,452 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:23,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:23,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676140369] [2025-03-17 19:58:23,454 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676140369] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:23,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [493053176] [2025-03-17 19:58:23,454 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:23,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:23,454 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:23,457 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:23,458 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-17 19:58:23,495 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 20 statements into 2 equivalence classes. [2025-03-17 19:58:23,504 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 19 of 20 statements. [2025-03-17 19:58:23,504 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-17 19:58:23,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:23,505 INFO L256 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-03-17 19:58:23,506 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:23,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-17 19:58:23,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-17 19:58:23,577 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:23,577 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:23,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-17 19:58:23,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-17 19:58:23,649 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:23,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [493053176] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:23,649 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:23,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2025-03-17 19:58:23,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296094067] [2025-03-17 19:58:23,649 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:23,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:23,680 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-17 19:58:23,680 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2025-03-17 19:58:23,681 INFO L87 Difference]: Start difference. First operand 20 states and 26 transitions. cyclomatic complexity: 8 Second operand has 17 states, 16 states have (on average 2.0) internal successors, (32), 17 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:23,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:23,798 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2025-03-17 19:58:23,798 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 43 transitions. [2025-03-17 19:58:23,799 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:58:23,801 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 33 states and 43 transitions. [2025-03-17 19:58:23,802 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-03-17 19:58:23,805 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-03-17 19:58:23,806 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 43 transitions. [2025-03-17 19:58:23,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:23,806 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 43 transitions. [2025-03-17 19:58:23,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 43 transitions. [2025-03-17 19:58:23,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 26. [2025-03-17 19:58:23,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 25 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:23,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2025-03-17 19:58:23,807 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 35 transitions. [2025-03-17 19:58:23,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-17 19:58:23,808 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2025-03-17 19:58:23,808 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-17 19:58:23,808 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 35 transitions. [2025-03-17 19:58:23,808 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:23,808 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:23,809 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:23,809 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1] [2025-03-17 19:58:23,809 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:23,809 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:23,809 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:23,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,809 INFO L85 PathProgramCache]: Analyzing trace with hash -44255014, now seen corresponding path program 5 times [2025-03-17 19:58:23,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400878363] [2025-03-17 19:58:23,809 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:58:23,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,813 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 20 statements into 4 equivalence classes. [2025-03-17 19:58:23,822 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 20 of 20 statements. [2025-03-17 19:58:23,822 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-17 19:58:23,822 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,822 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:23,824 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-03-17 19:58:23,830 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-03-17 19:58:23,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:23,834 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,836 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:23,836 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 9 times [2025-03-17 19:58:23,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544295376] [2025-03-17 19:58:23,836 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:23,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,838 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:23,838 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:23,839 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 19:58:23,839 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,839 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:23,839 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:23,840 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:23,840 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:23,840 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:23,841 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:23,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:23,841 INFO L85 PathProgramCache]: Analyzing trace with hash 420604696, now seen corresponding path program 5 times [2025-03-17 19:58:23,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:23,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825343523] [2025-03-17 19:58:23,841 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:58:23,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:23,846 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 22 statements into 4 equivalence classes. [2025-03-17 19:58:23,850 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 22 of 22 statements. [2025-03-17 19:58:23,851 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-17 19:58:23,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:23,929 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:23,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:23,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825343523] [2025-03-17 19:58:23,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825343523] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:23,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2061331774] [2025-03-17 19:58:23,930 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:58:23,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:23,930 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:23,932 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:23,934 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-17 19:58:23,966 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 22 statements into 4 equivalence classes. [2025-03-17 19:58:23,982 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 22 of 22 statements. [2025-03-17 19:58:23,982 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-03-17 19:58:23,982 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:23,983 INFO L256 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-03-17 19:58:23,984 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:24,062 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:24,062 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:24,111 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:24,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2061331774] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:24,111 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:24,111 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 15 [2025-03-17 19:58:24,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1032838806] [2025-03-17 19:58:24,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:24,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:24,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-03-17 19:58:24,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2025-03-17 19:58:24,146 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. cyclomatic complexity: 12 Second operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 15 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:24,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:24,235 INFO L93 Difference]: Finished difference Result 65 states and 85 transitions. [2025-03-17 19:58:24,235 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 85 transitions. [2025-03-17 19:58:24,235 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-03-17 19:58:24,236 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 58 states and 76 transitions. [2025-03-17 19:58:24,236 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2025-03-17 19:58:24,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-03-17 19:58:24,236 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 76 transitions. [2025-03-17 19:58:24,236 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:24,236 INFO L218 hiAutomatonCegarLoop]: Abstraction has 58 states and 76 transitions. [2025-03-17 19:58:24,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 76 transitions. [2025-03-17 19:58:24,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 54. [2025-03-17 19:58:24,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.3148148148148149) internal successors, (71), 53 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:24,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 71 transitions. [2025-03-17 19:58:24,238 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 71 transitions. [2025-03-17 19:58:24,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-17 19:58:24,241 INFO L432 stractBuchiCegarLoop]: Abstraction has 54 states and 71 transitions. [2025-03-17 19:58:24,241 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-17 19:58:24,241 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 71 transitions. [2025-03-17 19:58:24,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2025-03-17 19:58:24,242 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:24,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:24,242 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:24,242 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1] [2025-03-17 19:58:24,242 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume main_~length~0#1 < 1;main_~length~0#1 := 1;" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:24,242 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:24,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:24,243 INFO L85 PathProgramCache]: Analyzing trace with hash 167576422, now seen corresponding path program 1 times [2025-03-17 19:58:24,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:24,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749396100] [2025-03-17 19:58:24,243 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:24,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:24,248 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-03-17 19:58:24,251 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-03-17 19:58:24,251 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,252 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:24,286 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2025-03-17 19:58:24,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:24,286 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [749396100] [2025-03-17 19:58:24,286 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [749396100] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:24,286 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1254471581] [2025-03-17 19:58:24,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:24,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:24,287 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:24,290 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:24,292 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-17 19:58:24,327 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-03-17 19:58:24,338 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-03-17 19:58:24,338 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:24,340 INFO L256 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-17 19:58:24,340 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:24,365 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 19:58:24,366 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 19:58:24,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1254471581] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 19:58:24,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 19:58:24,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2025-03-17 19:58:24,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068261606] [2025-03-17 19:58:24,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 19:58:24,366 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:24,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:24,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1106302, now seen corresponding path program 1 times [2025-03-17 19:58:24,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:24,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479692753] [2025-03-17 19:58:24,366 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:24,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:24,369 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:58:24,370 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:58:24,371 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,371 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,371 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:24,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:58:24,372 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:58:24,372 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,372 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,373 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:24,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:24,432 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 19:58:24,433 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-17 19:58:24,433 INFO L87 Difference]: Start difference. First operand 54 states and 71 transitions. cyclomatic complexity: 23 Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:24,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:24,451 INFO L93 Difference]: Finished difference Result 34 states and 43 transitions. [2025-03-17 19:58:24,451 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 43 transitions. [2025-03-17 19:58:24,452 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:24,452 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 28 states and 36 transitions. [2025-03-17 19:58:24,453 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-03-17 19:58:24,453 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-03-17 19:58:24,453 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 36 transitions. [2025-03-17 19:58:24,453 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:24,454 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 36 transitions. [2025-03-17 19:58:24,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 36 transitions. [2025-03-17 19:58:24,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2025-03-17 19:58:24,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 27 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:24,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 36 transitions. [2025-03-17 19:58:24,455 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 36 transitions. [2025-03-17 19:58:24,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 19:58:24,457 INFO L432 stractBuchiCegarLoop]: Abstraction has 28 states and 36 transitions. [2025-03-17 19:58:24,457 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-17 19:58:24,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 36 transitions. [2025-03-17 19:58:24,457 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:24,457 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:24,457 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:24,458 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:24,458 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:24,458 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:24,458 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:24,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:24,459 INFO L85 PathProgramCache]: Analyzing trace with hash -241247803, now seen corresponding path program 2 times [2025-03-17 19:58:24,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:24,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849027466] [2025-03-17 19:58:24,459 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:24,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:24,464 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 21 statements into 2 equivalence classes. [2025-03-17 19:58:24,472 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 21 of 21 statements. [2025-03-17 19:58:24,472 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:24,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,472 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:24,474 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-03-17 19:58:24,495 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-03-17 19:58:24,496 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:24,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:24,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 10 times [2025-03-17 19:58:24,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:24,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016702138] [2025-03-17 19:58:24,498 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:24,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:24,500 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-17 19:58:24,501 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:24,501 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:58:24,501 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,501 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:24,501 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:24,502 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:24,502 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:24,502 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:24,502 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:24,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:24,503 INFO L85 PathProgramCache]: Analyzing trace with hash 89095491, now seen corresponding path program 2 times [2025-03-17 19:58:24,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:24,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181163186] [2025-03-17 19:58:24,503 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:24,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:24,511 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 23 statements into 2 equivalence classes. [2025-03-17 19:58:24,516 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 19:58:24,516 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:24,516 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:24,707 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:24,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:24,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [181163186] [2025-03-17 19:58:24,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [181163186] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:24,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1528047602] [2025-03-17 19:58:24,707 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:24,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:24,708 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:24,710 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:24,712 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-17 19:58:24,748 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 23 statements into 2 equivalence classes. [2025-03-17 19:58:24,760 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 19:58:24,761 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:24,761 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:24,761 INFO L256 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-03-17 19:58:24,763 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:24,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:24,890 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 19:58:24,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-17 19:58:24,900 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 19:58:24,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-17 19:58:24,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:25,000 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:25,000 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:25,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-17 19:58:25,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-17 19:58:25,136 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:25,136 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1528047602] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:25,136 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:25,136 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2025-03-17 19:58:25,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428033401] [2025-03-17 19:58:25,136 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:25,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:25,168 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-03-17 19:58:25,168 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2025-03-17 19:58:25,168 INFO L87 Difference]: Start difference. First operand 28 states and 36 transitions. cyclomatic complexity: 11 Second operand has 27 states, 26 states have (on average 1.8846153846153846) internal successors, (49), 27 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:25,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:25,333 INFO L93 Difference]: Finished difference Result 34 states and 42 transitions. [2025-03-17 19:58:25,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 42 transitions. [2025-03-17 19:58:25,333 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:25,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 42 transitions. [2025-03-17 19:58:25,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-03-17 19:58:25,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-03-17 19:58:25,334 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 42 transitions. [2025-03-17 19:58:25,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:25,334 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 42 transitions. [2025-03-17 19:58:25,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 42 transitions. [2025-03-17 19:58:25,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 25. [2025-03-17 19:58:25,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.24) internal successors, (31), 24 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:25,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 31 transitions. [2025-03-17 19:58:25,335 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 31 transitions. [2025-03-17 19:58:25,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-17 19:58:25,336 INFO L432 stractBuchiCegarLoop]: Abstraction has 25 states and 31 transitions. [2025-03-17 19:58:25,336 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-17 19:58:25,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 31 transitions. [2025-03-17 19:58:25,336 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:25,336 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:25,336 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:25,336 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1, 1] [2025-03-17 19:58:25,336 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:25,336 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:25,336 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:25,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:25,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1718358971, now seen corresponding path program 6 times [2025-03-17 19:58:25,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:25,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793745823] [2025-03-17 19:58:25,337 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 19:58:25,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:25,342 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 23 statements into 5 equivalence classes. [2025-03-17 19:58:25,350 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 19:58:25,350 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-17 19:58:25,350 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:25,350 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:25,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-17 19:58:25,356 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 19:58:25,357 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:25,357 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:25,359 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:25,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:25,359 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 11 times [2025-03-17 19:58:25,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:25,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550827965] [2025-03-17 19:58:25,359 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:58:25,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:25,361 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:25,361 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:25,361 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:58:25,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:25,362 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:25,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:25,362 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:25,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:25,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:25,363 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:25,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:25,363 INFO L85 PathProgramCache]: Analyzing trace with hash -2075529277, now seen corresponding path program 6 times [2025-03-17 19:58:25,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:25,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455727429] [2025-03-17 19:58:25,364 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 19:58:25,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:25,385 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 25 statements into 5 equivalence classes. [2025-03-17 19:58:25,396 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 25 of 25 statements. [2025-03-17 19:58:25,397 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-17 19:58:25,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:25,593 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:25,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:25,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1455727429] [2025-03-17 19:58:25,593 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1455727429] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:25,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [409978404] [2025-03-17 19:58:25,593 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 19:58:25,593 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:25,593 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:25,596 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:25,597 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-17 19:58:25,637 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 25 statements into 5 equivalence classes. [2025-03-17 19:58:25,650 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 25 of 25 statements. [2025-03-17 19:58:25,651 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-03-17 19:58:25,651 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:25,651 INFO L256 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-03-17 19:58:25,653 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:25,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:25,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:25,846 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:25,846 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:25,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-17 19:58:25,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-17 19:58:26,003 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:26,004 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [409978404] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:26,004 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:26,004 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 33 [2025-03-17 19:58:26,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021670127] [2025-03-17 19:58:26,004 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:26,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:26,034 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-03-17 19:58:26,034 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=984, Unknown=0, NotChecked=0, Total=1122 [2025-03-17 19:58:26,035 INFO L87 Difference]: Start difference. First operand 25 states and 31 transitions. cyclomatic complexity: 8 Second operand has 34 states, 33 states have (on average 1.9696969696969697) internal successors, (65), 34 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:26,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:26,572 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2025-03-17 19:58:26,572 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 54 states and 66 transitions. [2025-03-17 19:58:26,572 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2025-03-17 19:58:26,572 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 54 states to 54 states and 66 transitions. [2025-03-17 19:58:26,572 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2025-03-17 19:58:26,573 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2025-03-17 19:58:26,573 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 66 transitions. [2025-03-17 19:58:26,573 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:26,573 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 66 transitions. [2025-03-17 19:58:26,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 66 transitions. [2025-03-17 19:58:26,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 35. [2025-03-17 19:58:26,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.2857142857142858) internal successors, (45), 34 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:26,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 45 transitions. [2025-03-17 19:58:26,574 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 45 transitions. [2025-03-17 19:58:26,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-03-17 19:58:26,575 INFO L432 stractBuchiCegarLoop]: Abstraction has 35 states and 45 transitions. [2025-03-17 19:58:26,575 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-17 19:58:26,575 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 45 transitions. [2025-03-17 19:58:26,575 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:58:26,575 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:26,575 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:26,576 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 1, 1, 1, 1, 1] [2025-03-17 19:58:26,576 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:26,576 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-03-17 19:58:26,576 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-03-17 19:58:26,576 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:26,576 INFO L85 PathProgramCache]: Analyzing trace with hash -115791032, now seen corresponding path program 2 times [2025-03-17 19:58:26,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:26,576 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515414845] [2025-03-17 19:58:26,576 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:26,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:26,580 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 17 statements into 2 equivalence classes. [2025-03-17 19:58:26,587 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 17 of 17 statements. [2025-03-17 19:58:26,587 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:26,587 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,587 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:26,588 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-17 19:58:26,591 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-17 19:58:26,591 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:26,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,592 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:26,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:26,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1152, now seen corresponding path program 1 times [2025-03-17 19:58:26,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:26,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304235757] [2025-03-17 19:58:26,593 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:58:26,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:26,594 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:26,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:26,595 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:26,595 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,595 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:26,595 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:26,596 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:26,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:26,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,596 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:26,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:26,597 INFO L85 PathProgramCache]: Analyzing trace with hash 393968135, now seen corresponding path program 7 times [2025-03-17 19:58:26,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:26,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830958139] [2025-03-17 19:58:26,597 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 19:58:26,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:26,600 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-03-17 19:58:26,603 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-03-17 19:58:26,603 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:26,603 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,603 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:26,604 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-03-17 19:58:26,607 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-03-17 19:58:26,607 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:26,607 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:26,609 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:27,001 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 19:58:27,002 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 19:58:27,002 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 19:58:27,002 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 19:58:27,002 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-17 19:58:27,002 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,002 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 19:58:27,002 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 19:58:27,002 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration14_Lasso [2025-03-17 19:58:27,002 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 19:58:27,002 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 19:58:27,003 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,005 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,006 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,007 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,009 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,010 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,011 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,012 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,013 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,014 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,108 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:58:27,208 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 19:58:27,208 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-17 19:58:27,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,208 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,212 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,216 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2025-03-17 19:58:27,216 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,226 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,226 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,226 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,226 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,226 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,227 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,227 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,228 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,232 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2025-03-17 19:58:27,233 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,233 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,234 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,235 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2025-03-17 19:58:27,236 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,245 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,245 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,245 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,245 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,245 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,245 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,245 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,246 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,251 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2025-03-17 19:58:27,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,252 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,253 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2025-03-17 19:58:27,255 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,264 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,265 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,265 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,265 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,265 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,265 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,265 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,266 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,271 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2025-03-17 19:58:27,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,271 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,273 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,274 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2025-03-17 19:58:27,275 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,285 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,285 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,285 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,285 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,285 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,285 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,285 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,286 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,291 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2025-03-17 19:58:27,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,292 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,293 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,294 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2025-03-17 19:58:27,295 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,304 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,304 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,304 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,305 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,305 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,305 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,305 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,333 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,373 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2025-03-17 19:58:27,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,374 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,376 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,380 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2025-03-17 19:58:27,380 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,390 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,390 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,391 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,391 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,391 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,391 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,391 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,392 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,398 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2025-03-17 19:58:27,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,399 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,401 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2025-03-17 19:58:27,402 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,412 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,412 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,412 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,412 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,412 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,413 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,413 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,413 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,419 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2025-03-17 19:58:27,419 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,419 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,421 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,422 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2025-03-17 19:58:27,423 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,432 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,432 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,432 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,432 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,432 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,433 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,433 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,434 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,439 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2025-03-17 19:58:27,439 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,440 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,441 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,442 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2025-03-17 19:58:27,443 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,453 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,453 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:58:27,453 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,453 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,453 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,453 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:58:27,453 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:58:27,454 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,462 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2025-03-17 19:58:27,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,462 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,464 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2025-03-17 19:58:27,466 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,475 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,476 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,476 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,476 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,477 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:27,477 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:27,479 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,485 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2025-03-17 19:58:27,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,485 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,487 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,487 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2025-03-17 19:58:27,488 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,498 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,498 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,498 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,498 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,500 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:27,500 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:27,503 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,509 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2025-03-17 19:58:27,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,509 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,510 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,511 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2025-03-17 19:58:27,512 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,521 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,522 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,522 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,522 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,524 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:27,524 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:27,527 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:58:27,533 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:27,533 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,533 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,535 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,535 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2025-03-17 19:58:27,536 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:58:27,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:58:27,546 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:58:27,546 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:58:27,546 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:58:27,550 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:58:27,550 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:58:27,556 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-17 19:58:27,566 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-03-17 19:58:27,566 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2025-03-17 19:58:27,566 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:58:27,566 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:27,568 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:58:27,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2025-03-17 19:58:27,571 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-17 19:58:27,583 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-17 19:58:27,583 INFO L474 LassoAnalysis]: Proved termination. [2025-03-17 19:58:27,583 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2025-03-17 19:58:27,589 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:27,593 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-03-17 19:58:27,605 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:27,617 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-17 19:58:27,623 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-17 19:58:27,623 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:27,623 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:27,623 INFO L256 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-17 19:58:27,624 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:27,642 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:27,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:27,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:27,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:27,644 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-17 19:58:27,644 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:27,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:27,653 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-03-17 19:58:27,653 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 35 states and 45 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:27,663 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 35 states and 45 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 45 states and 58 transitions. Complement of second has 5 states. [2025-03-17 19:58:27,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-17 19:58:27,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:27,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 11 transitions. [2025-03-17 19:58:27,663 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 11 transitions. Stem has 17 letters. Loop has 2 letters. [2025-03-17 19:58:27,663 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:27,663 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 11 transitions. Stem has 19 letters. Loop has 2 letters. [2025-03-17 19:58:27,664 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:27,664 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 11 transitions. Stem has 17 letters. Loop has 4 letters. [2025-03-17 19:58:27,664 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:58:27,664 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 58 transitions. [2025-03-17 19:58:27,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:27,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 37 states and 47 transitions. [2025-03-17 19:58:27,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-17 19:58:27,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-17 19:58:27,664 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 47 transitions. [2025-03-17 19:58:27,664 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:58:27,664 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-03-17 19:58:27,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 47 transitions. [2025-03-17 19:58:27,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2025-03-17 19:58:27,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2777777777777777) internal successors, (46), 35 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:27,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 46 transitions. [2025-03-17 19:58:27,666 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-03-17 19:58:27,666 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-03-17 19:58:27,666 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-17 19:58:27,666 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 46 transitions. [2025-03-17 19:58:27,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:27,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:27,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:27,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:27,666 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:27,666 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:27,667 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:27,667 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:27,667 INFO L85 PathProgramCache]: Analyzing trace with hash 457995383, now seen corresponding path program 3 times [2025-03-17 19:58:27,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:27,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1066578656] [2025-03-17 19:58:27,667 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:27,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:27,671 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 28 statements into 6 equivalence classes. [2025-03-17 19:58:27,682 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 28 of 28 statements. [2025-03-17 19:58:27,686 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-17 19:58:27,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:27,736 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2025-03-17 19:58:28,128 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:28,128 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:28,128 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1066578656] [2025-03-17 19:58:28,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1066578656] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:28,128 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [321886817] [2025-03-17 19:58:28,129 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:28,129 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:28,129 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:28,130 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:28,132 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2025-03-17 19:58:28,174 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 28 statements into 6 equivalence classes. [2025-03-17 19:58:28,197 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 28 of 28 statements. [2025-03-17 19:58:28,197 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-17 19:58:28,197 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:28,198 INFO L256 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-03-17 19:58:28,201 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:28,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:58:28,330 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-03-17 19:58:28,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 15 [2025-03-17 19:58:28,362 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-03-17 19:58:28,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 19 [2025-03-17 19:58:28,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:58:28,471 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-17 19:58:28,471 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:28,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-17 19:58:28,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-17 19:58:28,711 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-03-17 19:58:28,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [321886817] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:28,711 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:28,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 13] total 37 [2025-03-17 19:58:28,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523531740] [2025-03-17 19:58:28,711 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:28,711 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:28,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:28,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 12 times [2025-03-17 19:58:28,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:28,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603397263] [2025-03-17 19:58:28,712 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 19:58:28,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:28,713 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:28,715 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:28,715 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 19:58:28,715 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:28,715 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:28,715 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:28,716 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:28,716 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:28,716 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:28,717 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:28,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:28,746 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2025-03-17 19:58:28,747 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=1228, Unknown=0, NotChecked=0, Total=1406 [2025-03-17 19:58:28,747 INFO L87 Difference]: Start difference. First operand 36 states and 46 transitions. cyclomatic complexity: 14 Second operand has 38 states, 37 states have (on average 1.945945945945946) internal successors, (72), 38 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:29,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:29,507 INFO L93 Difference]: Finished difference Result 66 states and 79 transitions. [2025-03-17 19:58:29,507 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 79 transitions. [2025-03-17 19:58:29,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:29,508 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 53 states and 65 transitions. [2025-03-17 19:58:29,508 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-17 19:58:29,508 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-17 19:58:29,508 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 65 transitions. [2025-03-17 19:58:29,508 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:58:29,508 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-03-17 19:58:29,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 65 transitions. [2025-03-17 19:58:29,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 35. [2025-03-17 19:58:29,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.2571428571428571) internal successors, (44), 34 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:29,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 44 transitions. [2025-03-17 19:58:29,509 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 44 transitions. [2025-03-17 19:58:29,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2025-03-17 19:58:29,510 INFO L432 stractBuchiCegarLoop]: Abstraction has 35 states and 44 transitions. [2025-03-17 19:58:29,511 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-17 19:58:29,511 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 44 transitions. [2025-03-17 19:58:29,511 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:29,511 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:29,511 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:29,512 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:29,512 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:29,512 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:29,512 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:29,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:29,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1753497015, now seen corresponding path program 7 times [2025-03-17 19:58:29,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:29,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577324971] [2025-03-17 19:58:29,512 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 19:58:29,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:29,517 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 19:58:29,521 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 19:58:29,521 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:29,521 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:29,708 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:29,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:29,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577324971] [2025-03-17 19:58:29,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1577324971] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:29,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [174706743] [2025-03-17 19:58:29,709 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 19:58:29,709 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:29,709 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:29,711 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:29,713 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2025-03-17 19:58:29,753 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 19:58:29,767 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 19:58:29,768 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:29,768 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:29,768 INFO L256 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-03-17 19:58:29,770 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:29,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-17 19:58:29,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-17 19:58:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:29,875 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:29,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-03-17 19:58:29,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-03-17 19:58:29,960 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:29,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [174706743] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:29,960 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:29,960 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 22 [2025-03-17 19:58:29,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276932676] [2025-03-17 19:58:29,960 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:29,960 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:29,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:29,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 13 times [2025-03-17 19:58:29,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:29,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430551352] [2025-03-17 19:58:29,960 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 19:58:29,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:29,962 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:29,962 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:29,962 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:29,963 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:29,963 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:29,963 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:29,963 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:29,963 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:29,963 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:29,964 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:29,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:29,997 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2025-03-17 19:58:29,997 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2025-03-17 19:58:29,998 INFO L87 Difference]: Start difference. First operand 35 states and 44 transitions. cyclomatic complexity: 12 Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 23 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:30,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:30,160 INFO L93 Difference]: Finished difference Result 55 states and 68 transitions. [2025-03-17 19:58:30,160 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 68 transitions. [2025-03-17 19:58:30,160 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:58:30,160 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 54 states and 67 transitions. [2025-03-17 19:58:30,160 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-03-17 19:58:30,160 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-03-17 19:58:30,161 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 67 transitions. [2025-03-17 19:58:30,161 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:58:30,161 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 67 transitions. [2025-03-17 19:58:30,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 67 transitions. [2025-03-17 19:58:30,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 41. [2025-03-17 19:58:30,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2682926829268293) internal successors, (52), 40 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:30,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 52 transitions. [2025-03-17 19:58:30,162 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-03-17 19:58:30,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-17 19:58:30,165 INFO L432 stractBuchiCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-03-17 19:58:30,165 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-17 19:58:30,166 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 52 transitions. [2025-03-17 19:58:30,166 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:30,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:30,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:30,166 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:30,166 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:30,166 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:30,166 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:30,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:30,168 INFO L85 PathProgramCache]: Analyzing trace with hash 1483452534, now seen corresponding path program 8 times [2025-03-17 19:58:30,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:30,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663531498] [2025-03-17 19:58:30,168 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:30,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:30,173 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 32 statements into 2 equivalence classes. [2025-03-17 19:58:30,177 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 32 of 32 statements. [2025-03-17 19:58:30,177 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:30,177 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:30,294 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:30,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:30,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663531498] [2025-03-17 19:58:30,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [663531498] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:30,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1708344666] [2025-03-17 19:58:30,294 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:30,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:30,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:30,296 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:30,299 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2025-03-17 19:58:30,340 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 32 statements into 2 equivalence classes. [2025-03-17 19:58:30,354 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 32 of 32 statements. [2025-03-17 19:58:30,354 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:58:30,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:30,355 INFO L256 TraceCheckSpWp]: Trace formula consists of 164 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-03-17 19:58:30,356 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:30,473 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:30,473 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:30,553 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:30,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1708344666] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:30,553 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:30,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2025-03-17 19:58:30,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038944221] [2025-03-17 19:58:30,554 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:30,554 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:30,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:30,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 14 times [2025-03-17 19:58:30,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:30,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122729135] [2025-03-17 19:58:30,554 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:58:30,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:30,556 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:30,557 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:30,557 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:58:30,557 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:30,557 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:30,557 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:30,558 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:30,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:30,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:30,559 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:30,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:30,589 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-17 19:58:30,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2025-03-17 19:58:30,590 INFO L87 Difference]: Start difference. First operand 41 states and 52 transitions. cyclomatic complexity: 15 Second operand has 22 states, 22 states have (on average 2.3181818181818183) internal successors, (51), 22 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:30,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:30,654 INFO L93 Difference]: Finished difference Result 57 states and 69 transitions. [2025-03-17 19:58:30,654 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 69 transitions. [2025-03-17 19:58:30,654 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:30,655 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 46 states and 58 transitions. [2025-03-17 19:58:30,655 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-17 19:58:30,655 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-17 19:58:30,655 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 58 transitions. [2025-03-17 19:58:30,655 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:58:30,655 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 58 transitions. [2025-03-17 19:58:30,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 58 transitions. [2025-03-17 19:58:30,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 41. [2025-03-17 19:58:30,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2682926829268293) internal successors, (52), 40 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:30,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 52 transitions. [2025-03-17 19:58:30,656 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-03-17 19:58:30,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-17 19:58:30,658 INFO L432 stractBuchiCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-03-17 19:58:30,658 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-17 19:58:30,658 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 52 transitions. [2025-03-17 19:58:30,658 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:30,658 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:30,658 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:30,659 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:30,659 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:30,659 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:30,659 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:30,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:30,659 INFO L85 PathProgramCache]: Analyzing trace with hash 1219191009, now seen corresponding path program 4 times [2025-03-17 19:58:30,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:30,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855973633] [2025-03-17 19:58:30,660 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:30,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:30,664 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 33 statements into 2 equivalence classes. [2025-03-17 19:58:30,669 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 32 of 33 statements. [2025-03-17 19:58:30,669 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-17 19:58:30,669 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:30,939 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:30,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:30,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855973633] [2025-03-17 19:58:30,939 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855973633] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:30,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [700621824] [2025-03-17 19:58:30,939 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:30,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:30,939 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:30,941 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:30,943 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2025-03-17 19:58:30,988 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 33 statements into 2 equivalence classes. [2025-03-17 19:58:31,002 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 32 of 33 statements. [2025-03-17 19:58:31,002 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-03-17 19:58:31,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:31,003 INFO L256 TraceCheckSpWp]: Trace formula consists of 159 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-03-17 19:58:31,004 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:31,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-17 19:58:31,064 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-17 19:58:31,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-17 19:58:31,076 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-03-17 19:58:31,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-03-17 19:58:31,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-03-17 19:58:31,161 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:31,161 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:31,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-03-17 19:58:31,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-03-17 19:58:31,307 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:31,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [700621824] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:31,307 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:31,307 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2025-03-17 19:58:31,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698031015] [2025-03-17 19:58:31,307 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:31,308 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:31,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:31,308 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 15 times [2025-03-17 19:58:31,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:31,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365254704] [2025-03-17 19:58:31,308 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:31,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:31,312 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:31,313 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:31,313 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 19:58:31,313 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:31,313 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:31,314 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:31,314 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:31,314 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:31,314 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:31,315 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:31,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:31,350 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2025-03-17 19:58:31,351 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2025-03-17 19:58:31,351 INFO L87 Difference]: Start difference. First operand 41 states and 52 transitions. cyclomatic complexity: 15 Second operand has 26 states, 25 states have (on average 2.08) internal successors, (52), 26 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:31,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:31,546 INFO L93 Difference]: Finished difference Result 51 states and 62 transitions. [2025-03-17 19:58:31,546 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 62 transitions. [2025-03-17 19:58:31,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:31,547 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 61 transitions. [2025-03-17 19:58:31,547 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-17 19:58:31,547 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-17 19:58:31,547 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 61 transitions. [2025-03-17 19:58:31,547 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:58:31,548 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 61 transitions. [2025-03-17 19:58:31,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 61 transitions. [2025-03-17 19:58:31,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 37. [2025-03-17 19:58:31,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2432432432432432) internal successors, (46), 36 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:31,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 46 transitions. [2025-03-17 19:58:31,549 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 46 transitions. [2025-03-17 19:58:31,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-17 19:58:31,550 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 46 transitions. [2025-03-17 19:58:31,550 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-17 19:58:31,550 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 46 transitions. [2025-03-17 19:58:31,550 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:58:31,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:58:31,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:58:31,551 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1] [2025-03-17 19:58:31,551 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:58:31,551 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:31,551 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-03-17 19:58:31,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:31,552 INFO L85 PathProgramCache]: Analyzing trace with hash 624040801, now seen corresponding path program 9 times [2025-03-17 19:58:31,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:31,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684506018] [2025-03-17 19:58:31,552 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:31,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:31,556 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 35 statements into 7 equivalence classes. [2025-03-17 19:58:31,563 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 35 of 35 statements. [2025-03-17 19:58:31,563 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-03-17 19:58:31,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:31,856 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 12 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:31,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:58:31,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684506018] [2025-03-17 19:58:31,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1684506018] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:58:31,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1634328048] [2025-03-17 19:58:31,856 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:58:31,857 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:58:31,857 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:58:31,859 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:58:31,860 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2025-03-17 19:58:31,909 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 35 statements into 7 equivalence classes. [2025-03-17 19:58:31,950 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 35 of 35 statements. [2025-03-17 19:58:31,950 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-03-17 19:58:31,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:58:31,954 INFO L256 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-03-17 19:58:31,955 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:58:31,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2025-03-17 19:58:32,262 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2025-03-17 19:58:32,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2025-03-17 19:58:32,265 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 25 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:32,265 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:58:32,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-03-17 19:58:32,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2025-03-17 19:58:32,591 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 20 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:58:32,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1634328048] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:58:32,591 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:58:32,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 34 [2025-03-17 19:58:32,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351345417] [2025-03-17 19:58:32,591 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:58:32,591 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:58:32,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:58:32,592 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 16 times [2025-03-17 19:58:32,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:58:32,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004065338] [2025-03-17 19:58:32,592 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:58:32,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:58:32,593 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-17 19:58:32,594 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:32,594 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:58:32,594 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:32,594 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:58:32,594 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:58:32,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:58:32,595 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:58:32,595 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:58:32,596 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:58:32,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:58:32,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-03-17 19:58:32,627 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=975, Unknown=0, NotChecked=0, Total=1190 [2025-03-17 19:58:32,627 INFO L87 Difference]: Start difference. First operand 37 states and 46 transitions. cyclomatic complexity: 12 Second operand has 35 states, 34 states have (on average 2.0) internal successors, (68), 35 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:58:33,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:58:33,242 INFO L93 Difference]: Finished difference Result 55 states and 65 transitions. [2025-03-17 19:58:33,242 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 65 transitions. [2025-03-17 19:58:33,243 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-03-17 19:58:33,243 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 0 states and 0 transitions. [2025-03-17 19:58:33,243 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2025-03-17 19:58:33,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2025-03-17 19:58:33,243 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2025-03-17 19:58:33,243 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 19:58:33,243 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-17 19:58:33,243 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-17 19:58:33,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2025-03-17 19:58:33,244 INFO L432 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-03-17 19:58:33,244 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-17 19:58:33,244 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2025-03-17 19:58:33,244 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-03-17 19:58:33,244 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-03-17 19:58:33,249 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 17.03 07:58:33 BoogieIcfgContainer [2025-03-17 19:58:33,249 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-17 19:58:33,249 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-17 19:58:33,249 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-17 19:58:33,250 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-17 19:58:33,250 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 07:58:18" (3/4) ... [2025-03-17 19:58:33,252 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-17 19:58:33,253 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-17 19:58:33,253 INFO L158 Benchmark]: Toolchain (without parser) took 15490.55ms. Allocated memory was 142.6MB in the beginning and 419.4MB in the end (delta: 276.8MB). Free memory was 105.8MB in the beginning and 358.1MB in the end (delta: -252.3MB). Peak memory consumption was 24.1MB. Max. memory is 16.1GB. [2025-03-17 19:58:33,253 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 125.3MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 19:58:33,253 INFO L158 Benchmark]: CACSL2BoogieTranslator took 256.38ms. Allocated memory is still 142.6MB. Free memory was 105.8MB in the beginning and 87.3MB in the end (delta: 18.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-17 19:58:33,253 INFO L158 Benchmark]: Boogie Procedure Inliner took 29.66ms. Allocated memory is still 142.6MB. Free memory was 87.3MB in the beginning and 86.1MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 19:58:33,253 INFO L158 Benchmark]: Boogie Preprocessor took 31.68ms. Allocated memory is still 142.6MB. Free memory was 86.1MB in the beginning and 85.0MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 19:58:33,254 INFO L158 Benchmark]: IcfgBuilder took 196.58ms. Allocated memory is still 142.6MB. Free memory was 85.0MB in the beginning and 72.8MB in the end (delta: 12.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-17 19:58:33,254 INFO L158 Benchmark]: BuchiAutomizer took 14969.25ms. Allocated memory was 142.6MB in the beginning and 419.4MB in the end (delta: 276.8MB). Free memory was 72.8MB in the beginning and 358.2MB in the end (delta: -285.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 19:58:33,254 INFO L158 Benchmark]: Witness Printer took 3.18ms. Allocated memory is still 419.4MB. Free memory was 358.2MB in the beginning and 358.1MB in the end (delta: 129.3kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 19:58:33,255 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 125.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 256.38ms. Allocated memory is still 142.6MB. Free memory was 105.8MB in the beginning and 87.3MB in the end (delta: 18.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 29.66ms. Allocated memory is still 142.6MB. Free memory was 87.3MB in the beginning and 86.1MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 31.68ms. Allocated memory is still 142.6MB. Free memory was 86.1MB in the beginning and 85.0MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 196.58ms. Allocated memory is still 142.6MB. Free memory was 85.0MB in the beginning and 72.8MB in the end (delta: 12.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 14969.25ms. Allocated memory was 142.6MB in the beginning and 419.4MB in the end (delta: 276.8MB). Free memory was 72.8MB in the beginning and 358.2MB in the end (delta: -285.4MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 3.18ms. Allocated memory is still 419.4MB. Free memory was 358.2MB in the beginning and 358.1MB in the end (delta: 129.3kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 19 terminating modules (17 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 3 locations. One deterministic module has affine ranking function (((long) -1 * j) + length) and consists of 3 locations. 17 modules have a trivial ranking function, the largest among these consists of 38 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 14.9s and 20 iterations. TraceHistogramMax:6. Analysis of lassos took 11.1s. Construction of modules took 1.6s. Büchi inclusion checks took 2.0s. Highest rank in rank-based complementation 3. Minimization of det autom 14. Minimization of nondet autom 5. Automata minimization 0.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 124 StatesRemovedByMinimization, 17 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 621 SdHoareTripleChecker+Valid, 1.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 619 mSDsluCounter, 750 SdHoareTripleChecker+Invalid, 1.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 617 mSDsCounter, 253 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3979 IncrementalHoareTripleChecker+Invalid, 4232 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 253 mSolverCounterUnsat, 133 mSDtfsCounter, 3979 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc10 concLT0 SILN0 SILU7 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital124 mio100 ax100 hnf100 lsp100 ukn74 mio100 lsp54 div137 bol100 ite100 ukn100 eq156 hnf92 smp86 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 19ms VariablesStem: 2 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-03-17 19:58:33,265 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2025-03-17 19:58:33,465 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:33,665 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:33,866 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:34,066 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:34,266 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:34,466 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:34,667 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-03-17 19:58:34,867 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-03-17 19:58:35,067 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:35,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:35,468 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-03-17 19:58:35,668 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-17 19:58:35,868 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:36,068 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:36,268 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-03-17 19:58:36,470 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE