./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-acceleration/array_4.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-acceleration/array_4.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 20:20:29,083 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 20:20:29,141 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-17 20:20:29,146 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 20:20:29,146 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 20:20:29,146 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 20:20:29,164 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 20:20:29,164 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 20:20:29,164 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 20:20:29,165 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 20:20:29,165 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 20:20:29,165 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 20:20:29,165 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 20:20:29,166 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 20:20:29,166 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 20:20:29,166 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 20:20:29,167 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 20:20:29,167 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 20:20:29,168 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 20:20:29,168 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 20:20:29,168 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 20:20:29,168 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 [2025-03-17 20:20:29,399 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 20:20:29,407 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 20:20:29,409 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 20:20:29,410 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 20:20:29,411 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 20:20:29,412 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-acceleration/array_4.i [2025-03-17 20:20:30,610 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1bf0c3ef9/b97d6ee6e8314836b483d94a166c7f74/FLAGdcee79bba [2025-03-17 20:20:30,861 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 20:20:30,864 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-acceleration/array_4.i [2025-03-17 20:20:30,872 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1bf0c3ef9/b97d6ee6e8314836b483d94a166c7f74/FLAGdcee79bba [2025-03-17 20:20:30,888 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1bf0c3ef9/b97d6ee6e8314836b483d94a166c7f74 [2025-03-17 20:20:30,891 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 20:20:30,893 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 20:20:30,895 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 20:20:30,895 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 20:20:30,898 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 20:20:30,899 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:20:30" (1/1) ... [2025-03-17 20:20:30,900 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@380b68a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:30, skipping insertion in model container [2025-03-17 20:20:30,900 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:20:30" (1/1) ... [2025-03-17 20:20:30,912 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 20:20:31,020 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:20:31,028 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 20:20:31,039 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:20:31,049 INFO L204 MainTranslator]: Completed translation [2025-03-17 20:20:31,049 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31 WrapperNode [2025-03-17 20:20:31,049 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 20:20:31,050 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 20:20:31,050 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 20:20:31,050 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 20:20:31,054 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,056 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,064 INFO L138 Inliner]: procedures = 16, calls = 13, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 40 [2025-03-17 20:20:31,064 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 20:20:31,065 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 20:20:31,065 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 20:20:31,065 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 20:20:31,070 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,070 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,071 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,078 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2025-03-17 20:20:31,078 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,078 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,080 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,081 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,081 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,081 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,082 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 20:20:31,083 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 20:20:31,083 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 20:20:31,083 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 20:20:31,083 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (1/1) ... [2025-03-17 20:20:31,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:31,096 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:31,107 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:31,108 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 20:20:31,125 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 20:20:31,126 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-17 20:20:31,126 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 20:20:31,171 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 20:20:31,172 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 20:20:31,249 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2025-03-17 20:20:31,249 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 20:20:31,256 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 20:20:31,256 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 20:20:31,256 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:20:31 BoogieIcfgContainer [2025-03-17 20:20:31,256 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 20:20:31,257 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 20:20:31,257 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 20:20:31,260 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 20:20:31,260 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:20:31,260 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 08:20:30" (1/3) ... [2025-03-17 20:20:31,261 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@260513c7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:20:31, skipping insertion in model container [2025-03-17 20:20:31,261 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:20:31,261 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:20:31" (2/3) ... [2025-03-17 20:20:31,261 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@260513c7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:20:31, skipping insertion in model container [2025-03-17 20:20:31,261 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:20:31,261 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:20:31" (3/3) ... [2025-03-17 20:20:31,262 INFO L363 chiAutomizerObserver]: Analyzing ICFG array_4.i [2025-03-17 20:20:31,294 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 20:20:31,294 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 20:20:31,295 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 20:20:31,295 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 20:20:31,295 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 20:20:31,295 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 20:20:31,295 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 20:20:31,295 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 20:20:31,299 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:31,309 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-17 20:20:31,309 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:31,309 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:31,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:20:31,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:20:31,312 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 20:20:31,312 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:31,312 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-17 20:20:31,313 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:31,313 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:31,313 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:20:31,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:20:31,317 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" [2025-03-17 20:20:31,317 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-03-17 20:20:31,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:31,321 INFO L85 PathProgramCache]: Analyzing trace with hash 46, now seen corresponding path program 1 times [2025-03-17 20:20:31,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:31,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263552585] [2025-03-17 20:20:31,326 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:31,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:31,372 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:31,384 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:31,385 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,385 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,385 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:31,391 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:31,396 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:31,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,412 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:31,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:31,414 INFO L85 PathProgramCache]: Analyzing trace with hash 45, now seen corresponding path program 1 times [2025-03-17 20:20:31,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:31,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887847327] [2025-03-17 20:20:31,415 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:31,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:31,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:31,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:31,422 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,422 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:31,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:31,427 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:31,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,430 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,431 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:31,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:31,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1440, now seen corresponding path program 1 times [2025-03-17 20:20:31,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:31,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653914079] [2025-03-17 20:20:31,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:31,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:31,441 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:31,455 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:31,455 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,455 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,455 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:31,457 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:31,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:31,466 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:31,466 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:31,469 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:31,737 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 20:20:31,738 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 20:20:31,738 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 20:20:31,738 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 20:20:31,738 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-17 20:20:31,738 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:31,739 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 20:20:31,739 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 20:20:31,739 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_4.i_Iteration1_Lasso [2025-03-17 20:20:31,740 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 20:20:31,740 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 20:20:31,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,754 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,766 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,768 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,770 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,900 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:31,903 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:20:32,076 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 20:20:32,078 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-17 20:20:32,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,081 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-17 20:20:32,084 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,095 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,096 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 20:20:32,096 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,096 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,098 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,106 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 20:20:32,106 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 20:20:32,108 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,114 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-17 20:20:32,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,114 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,116 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,117 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-17 20:20:32,119 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,131 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,131 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,131 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,131 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,135 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 20:20:32,135 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 20:20:32,139 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-17 20:20:32,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,146 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,147 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,150 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-17 20:20:32,151 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,162 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,162 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,162 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,162 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,165 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 20:20:32,165 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 20:20:32,167 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,173 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-17 20:20:32,173 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,174 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,175 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,176 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-17 20:20:32,177 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,187 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,187 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 20:20:32,187 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,187 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,187 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,188 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 20:20:32,188 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 20:20:32,192 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,198 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-17 20:20:32,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,198 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,199 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,201 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-17 20:20:32,201 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,211 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,212 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 20:20:32,212 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,212 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,212 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,212 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 20:20:32,212 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 20:20:32,213 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,219 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-03-17 20:20:32,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,221 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-17 20:20:32,224 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,235 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,235 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,235 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,235 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,239 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 20:20:32,239 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 20:20:32,245 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 20:20:32,251 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-03-17 20:20:32,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,252 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,254 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,256 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-17 20:20:32,256 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:20:32,266 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:20:32,266 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:20:32,267 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:20:32,267 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:20:32,270 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 20:20:32,270 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 20:20:32,277 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-17 20:20:32,294 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2025-03-17 20:20:32,296 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero. [2025-03-17 20:20:32,297 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:20:32,297 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,299 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-17 20:20:32,302 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-17 20:20:32,313 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-17 20:20:32,313 INFO L474 LassoAnalysis]: Proved termination. [2025-03-17 20:20:32,314 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2045*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2025-03-17 20:20:32,320 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-17 20:20:32,332 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-03-17 20:20:32,341 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-17 20:20:32,342 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-17 20:20:32,353 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,361 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:32,365 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:32,365 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,365 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,366 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-17 20:20:32,367 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:32,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:20:32,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:20:32,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,376 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-17 20:20:32,377 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:32,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,396 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-17 20:20:32,397 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.0) internal successors, (2), 1 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,420 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.0) internal successors, (2), 1 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 13 states and 19 transitions. Complement of second has 3 states. [2025-03-17 20:20:32,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-03-17 20:20:32,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.0) internal successors, (2), 1 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 2 transitions. [2025-03-17 20:20:32,431 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 1 letters. Loop has 1 letters. [2025-03-17 20:20:32,431 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:20:32,432 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 2 letters. Loop has 1 letters. [2025-03-17 20:20:32,432 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:20:32,432 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 1 letters. Loop has 2 letters. [2025-03-17 20:20:32,432 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:20:32,432 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 19 transitions. [2025-03-17 20:20:32,433 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,434 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 6 states and 8 transitions. [2025-03-17 20:20:32,435 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2025-03-17 20:20:32,435 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-03-17 20:20:32,435 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6 states and 8 transitions. [2025-03-17 20:20:32,436 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:32,436 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6 states and 8 transitions. [2025-03-17 20:20:32,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6 states and 8 transitions. [2025-03-17 20:20:32,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6 to 5. [2025-03-17 20:20:32,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 7 transitions. [2025-03-17 20:20:32,453 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5 states and 7 transitions. [2025-03-17 20:20:32,453 INFO L432 stractBuchiCegarLoop]: Abstraction has 5 states and 7 transitions. [2025-03-17 20:20:32,453 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 20:20:32,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5 states and 7 transitions. [2025-03-17 20:20:32,453 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,453 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:32,453 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:32,453 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-17 20:20:32,453 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:32,454 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:32,454 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:32,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1439, now seen corresponding path program 1 times [2025-03-17 20:20:32,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:32,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662433207] [2025-03-17 20:20:32,454 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:32,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:32,460 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:32,468 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:32,468 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,468 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,521 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:32,521 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662433207] [2025-03-17 20:20:32,521 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1662433207] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:20:32,521 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:20:32,521 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-03-17 20:20:32,522 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199747726] [2025-03-17 20:20:32,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:20:32,524 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:20:32,525 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,525 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 1 times [2025-03-17 20:20:32,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:32,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69334318] [2025-03-17 20:20:32,525 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:32,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:32,530 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:32,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:32,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:32,533 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:32,534 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:32,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:32,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:32,539 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:32,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:20:32,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:20:32,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:20:32,576 INFO L87 Difference]: Start difference. First operand 5 states and 7 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:20:32,586 INFO L93 Difference]: Finished difference Result 7 states and 8 transitions. [2025-03-17 20:20:32,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7 states and 8 transitions. [2025-03-17 20:20:32,587 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7 states to 7 states and 8 transitions. [2025-03-17 20:20:32,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 20:20:32,587 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 20:20:32,587 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2025-03-17 20:20:32,587 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:32,587 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-17 20:20:32,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2025-03-17 20:20:32,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 5. [2025-03-17 20:20:32,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 1.2) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6 transitions. [2025-03-17 20:20:32,588 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5 states and 6 transitions. [2025-03-17 20:20:32,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:20:32,589 INFO L432 stractBuchiCegarLoop]: Abstraction has 5 states and 6 transitions. [2025-03-17 20:20:32,589 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 20:20:32,589 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5 states and 6 transitions. [2025-03-17 20:20:32,589 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,589 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:32,590 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:32,590 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-17 20:20:32,590 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:32,590 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:32,590 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:32,590 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,590 INFO L85 PathProgramCache]: Analyzing trace with hash 44653, now seen corresponding path program 1 times [2025-03-17 20:20:32,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:32,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543742888] [2025-03-17 20:20:32,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:32,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:32,596 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 20:20:32,603 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 20:20:32,603 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,603 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:32,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543742888] [2025-03-17 20:20:32,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [543742888] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:20:32,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1002647459] [2025-03-17 20:20:32,648 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:20:32,648 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:20:32,648 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,651 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,652 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-17 20:20:32,681 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 20:20:32,688 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 20:20:32,688 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,688 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,689 INFO L256 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-17 20:20:32,690 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:32,701 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,701 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:20:32,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1002647459] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:20:32,714 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:20:32,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 5 [2025-03-17 20:20:32,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800458611] [2025-03-17 20:20:32,714 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:20:32,715 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:20:32,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,715 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 2 times [2025-03-17 20:20:32,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:32,715 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785629802] [2025-03-17 20:20:32,715 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:20:32,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:32,718 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:32,719 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:32,719 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:20:32,719 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:32,719 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:32,720 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:32,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:32,725 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:32,725 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:32,726 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:32,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:20:32,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:20:32,758 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:20:32,759 INFO L87 Difference]: Start difference. First operand 5 states and 6 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 1.3333333333333333) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:20:32,787 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2025-03-17 20:20:32,787 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2025-03-17 20:20:32,787 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2025-03-17 20:20:32,788 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-03-17 20:20:32,788 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-03-17 20:20:32,788 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2025-03-17 20:20:32,788 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:32,788 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-17 20:20:32,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2025-03-17 20:20:32,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 8. [2025-03-17 20:20:32,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:32,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2025-03-17 20:20:32,789 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-17 20:20:32,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 20:20:32,791 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-17 20:20:32,791 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 20:20:32,791 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2025-03-17 20:20:32,791 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:32,791 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:32,791 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:32,791 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1] [2025-03-17 20:20:32,791 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:32,791 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:32,791 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:32,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:32,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1330301215, now seen corresponding path program 2 times [2025-03-17 20:20:32,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:32,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715431859] [2025-03-17 20:20:32,792 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:20:32,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:32,798 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 6 statements into 2 equivalence classes. [2025-03-17 20:20:32,812 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 20:20:32,812 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:20:32,812 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,911 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,911 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:32,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715431859] [2025-03-17 20:20:32,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1715431859] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:20:32,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [587410082] [2025-03-17 20:20:32,911 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:20:32,911 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:20:32,911 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:32,914 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:20:32,915 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-17 20:20:32,943 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 6 statements into 2 equivalence classes. [2025-03-17 20:20:32,975 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 20:20:32,978 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-03-17 20:20:32,978 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:20:32,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:32,979 INFO L256 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-17 20:20:32,980 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:32,997 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:32,998 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:20:33,065 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:33,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [587410082] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:20:33,066 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:20:33,066 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2025-03-17 20:20:33,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560816684] [2025-03-17 20:20:33,066 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:20:33,066 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:20:33,067 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:33,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 3 times [2025-03-17 20:20:33,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:33,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743014677] [2025-03-17 20:20:33,067 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:20:33,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:33,070 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:33,071 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:33,071 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:20:33,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:33,071 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:33,073 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:33,075 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:33,076 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:33,076 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:33,077 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:33,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:20:33,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:20:33,110 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:20:33,111 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 12 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:33,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:20:33,173 INFO L93 Difference]: Finished difference Result 34 states and 35 transitions. [2025-03-17 20:20:33,173 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 35 transitions. [2025-03-17 20:20:33,174 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:33,175 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 35 transitions. [2025-03-17 20:20:33,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2025-03-17 20:20:33,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2025-03-17 20:20:33,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 35 transitions. [2025-03-17 20:20:33,176 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:33,176 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 35 transitions. [2025-03-17 20:20:33,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 35 transitions. [2025-03-17 20:20:33,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 14. [2025-03-17 20:20:33,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:33,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2025-03-17 20:20:33,177 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-17 20:20:33,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-17 20:20:33,178 INFO L432 stractBuchiCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-17 20:20:33,178 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 20:20:33,178 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 15 transitions. [2025-03-17 20:20:33,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:33,178 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:33,178 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:33,179 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1] [2025-03-17 20:20:33,179 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:33,179 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:33,179 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:33,179 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:33,179 INFO L85 PathProgramCache]: Analyzing trace with hash -1446566305, now seen corresponding path program 3 times [2025-03-17 20:20:33,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:33,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799515010] [2025-03-17 20:20:33,180 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:20:33,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:33,188 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 12 statements into 6 equivalence classes. [2025-03-17 20:20:33,201 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 20:20:33,202 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-17 20:20:33,202 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:33,414 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:33,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:33,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799515010] [2025-03-17 20:20:33,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1799515010] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:20:33,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [324293567] [2025-03-17 20:20:33,415 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:20:33,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:20:33,415 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:33,417 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:20:33,419 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-17 20:20:33,459 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 12 statements into 6 equivalence classes. [2025-03-17 20:20:33,502 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 20:20:33,502 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-17 20:20:33,502 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:33,503 INFO L256 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-17 20:20:33,504 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:33,529 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:33,529 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:20:33,722 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:33,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [324293567] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:20:33,726 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:20:33,726 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 23 [2025-03-17 20:20:33,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429397416] [2025-03-17 20:20:33,726 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:20:33,726 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:20:33,727 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:33,727 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 4 times [2025-03-17 20:20:33,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:33,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693073565] [2025-03-17 20:20:33,727 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:20:33,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:33,729 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-17 20:20:33,731 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:33,731 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:20:33,731 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:33,731 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:33,732 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:33,732 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:33,732 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:33,732 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:33,733 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:33,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:20:33,761 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-17 20:20:33,761 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-17 20:20:33,763 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 1.0833333333333333) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:33,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:20:33,888 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2025-03-17 20:20:33,888 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 71 transitions. [2025-03-17 20:20:33,890 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:33,890 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 71 transitions. [2025-03-17 20:20:33,890 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2025-03-17 20:20:33,890 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2025-03-17 20:20:33,890 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 71 transitions. [2025-03-17 20:20:33,891 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:33,891 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 71 transitions. [2025-03-17 20:20:33,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 71 transitions. [2025-03-17 20:20:33,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 26. [2025-03-17 20:20:33,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.0384615384615385) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:33,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2025-03-17 20:20:33,895 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-17 20:20:33,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-17 20:20:33,897 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-17 20:20:33,897 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 20:20:33,897 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 27 transitions. [2025-03-17 20:20:33,897 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:33,897 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:33,897 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:33,897 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1] [2025-03-17 20:20:33,897 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:33,898 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:33,898 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:33,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:33,898 INFO L85 PathProgramCache]: Analyzing trace with hash -822931233, now seen corresponding path program 4 times [2025-03-17 20:20:33,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:33,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343575777] [2025-03-17 20:20:33,898 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:20:33,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:33,912 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 24 statements into 2 equivalence classes. [2025-03-17 20:20:33,933 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 20:20:33,933 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:20:33,936 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:34,533 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:34,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:34,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343575777] [2025-03-17 20:20:34,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343575777] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:20:34,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1960106081] [2025-03-17 20:20:34,533 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:20:34,533 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:20:34,533 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:34,535 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:20:34,537 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-17 20:20:34,592 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 24 statements into 2 equivalence classes. [2025-03-17 20:20:34,623 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 20:20:34,623 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:20:34,623 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:34,627 INFO L256 TraceCheckSpWp]: Trace formula consists of 284 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-17 20:20:34,629 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:20:34,712 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:34,712 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:20:35,373 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:35,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1960106081] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:20:35,374 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:20:35,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23] total 47 [2025-03-17 20:20:35,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601393945] [2025-03-17 20:20:35,374 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:20:35,374 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:20:35,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:35,374 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 5 times [2025-03-17 20:20:35,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:35,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192768380] [2025-03-17 20:20:35,374 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:20:35,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:35,377 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:35,378 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:35,378 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:20:35,378 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:35,379 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:20:35,379 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:20:35,380 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:20:35,380 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:20:35,380 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:20:35,381 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:20:35,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:20:35,411 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-17 20:20:35,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-17 20:20:35,413 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 1.0416666666666667) internal successors, (50), 48 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:35,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:20:35,723 INFO L93 Difference]: Finished difference Result 142 states and 143 transitions. [2025-03-17 20:20:35,723 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 142 states and 143 transitions. [2025-03-17 20:20:35,726 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:35,727 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 142 states to 142 states and 143 transitions. [2025-03-17 20:20:35,727 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 96 [2025-03-17 20:20:35,727 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 96 [2025-03-17 20:20:35,727 INFO L73 IsDeterministic]: Start isDeterministic. Operand 142 states and 143 transitions. [2025-03-17 20:20:35,727 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:20:35,727 INFO L218 hiAutomatonCegarLoop]: Abstraction has 142 states and 143 transitions. [2025-03-17 20:20:35,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states and 143 transitions. [2025-03-17 20:20:35,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 50. [2025-03-17 20:20:35,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.02) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:20:35,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2025-03-17 20:20:35,732 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-17 20:20:35,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-17 20:20:35,734 INFO L432 stractBuchiCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-17 20:20:35,734 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 20:20:35,734 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 51 transitions. [2025-03-17 20:20:35,735 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:20:35,735 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:20:35,735 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:20:35,736 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1] [2025-03-17 20:20:35,736 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:20:35,736 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:20:35,739 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:20:35,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:20:35,740 INFO L85 PathProgramCache]: Analyzing trace with hash -473455137, now seen corresponding path program 5 times [2025-03-17 20:20:35,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:20:35,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783454681] [2025-03-17 20:20:35,740 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:20:35,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:20:35,774 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 48 statements into 24 equivalence classes. [2025-03-17 20:20:35,880 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 20:20:35,880 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-17 20:20:35,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:20:37,305 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:20:37,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:20:37,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783454681] [2025-03-17 20:20:37,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1783454681] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:20:37,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1611971851] [2025-03-17 20:20:37,306 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:20:37,306 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:20:37,306 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:20:37,309 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:20:37,311 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-17 20:20:37,382 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 48 statements into 24 equivalence classes. [2025-03-17 20:21:05,542 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 20:21:05,542 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-17 20:21:05,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:05,568 INFO L256 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-17 20:21:05,570 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:05,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:05,676 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:07,693 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:07,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1611971851] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:07,693 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:07,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47] total 94 [2025-03-17 20:21:07,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997547321] [2025-03-17 20:21:07,693 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:07,694 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:07,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:07,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1312, now seen corresponding path program 6 times [2025-03-17 20:21:07,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:07,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118931385] [2025-03-17 20:21:07,694 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:07,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:07,697 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:21:07,698 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:21:07,698 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:21:07,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:07,699 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:07,699 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:21:07,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:21:07,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:07,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:07,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:07,725 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:07,726 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-17 20:21:07,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-17 20:21:07,729 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. cyclomatic complexity: 3 Second operand has 96 states, 95 states have (on average 1.0105263157894737) internal successors, (96), 95 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:08,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:08,475 INFO L93 Difference]: Finished difference Result 286 states and 287 transitions. [2025-03-17 20:21:08,475 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 286 states and 287 transitions. [2025-03-17 20:21:08,478 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:21:08,479 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 286 states to 286 states and 287 transitions. [2025-03-17 20:21:08,479 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 192 [2025-03-17 20:21:08,479 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 192 [2025-03-17 20:21:08,479 INFO L73 IsDeterministic]: Start isDeterministic. Operand 286 states and 287 transitions. [2025-03-17 20:21:08,480 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:21:08,480 INFO L218 hiAutomatonCegarLoop]: Abstraction has 286 states and 287 transitions. [2025-03-17 20:21:08,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states and 287 transitions. [2025-03-17 20:21:08,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 98. [2025-03-17 20:21:08,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.010204081632653) internal successors, (99), 97 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:08,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 99 transitions. [2025-03-17 20:21:08,484 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 99 transitions. [2025-03-17 20:21:08,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-17 20:21:08,485 INFO L432 stractBuchiCegarLoop]: Abstraction has 98 states and 99 transitions. [2025-03-17 20:21:08,485 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-17 20:21:08,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 99 transitions. [2025-03-17 20:21:08,487 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 20:21:08,488 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:08,488 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:08,489 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1] [2025-03-17 20:21:08,491 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:21:08,491 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-03-17 20:21:08,492 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-17 20:21:08,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:08,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1931227169, now seen corresponding path program 6 times [2025-03-17 20:21:08,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:08,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975970251] [2025-03-17 20:21:08,492 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:08,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:08,531 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 96 statements into 48 equivalence classes. [2025-03-17 20:21:08,700 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 96 of 96 statements. [2025-03-17 20:21:08,700 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-03-17 20:21:08,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:12,914 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:12,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:12,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975970251] [2025-03-17 20:21:12,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [975970251] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:12,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [401146739] [2025-03-17 20:21:12,914 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:12,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:12,914 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:12,916 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:12,917 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-17 20:21:13,020 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 96 statements into 48 equivalence classes.