./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d628f3524885345eb9e2318f2d0dbb026e233c3bcc51319b2ad8fc1a71d35580 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 19:57:05,668 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 19:57:05,720 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-03-17 19:57:05,723 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 19:57:05,723 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 19:57:05,723 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 19:57:05,737 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 19:57:05,738 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 19:57:05,738 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 19:57:05,738 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 19:57:05,738 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 19:57:05,738 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 19:57:05,738 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 19:57:05,738 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 19:57:05,738 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 19:57:05,738 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 19:57:05,739 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 19:57:05,739 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 19:57:05,739 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 19:57:05,740 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 19:57:05,740 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 19:57:05,740 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 19:57:05,740 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d628f3524885345eb9e2318f2d0dbb026e233c3bcc51319b2ad8fc1a71d35580 [2025-03-17 19:57:05,973 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 19:57:05,979 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 19:57:05,980 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 19:57:05,981 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 19:57:05,981 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 19:57:05,982 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i [2025-03-17 19:57:07,081 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8f6b01cb4/ff4acb70338445e4a2c840e21956e550/FLAG8479ce501 [2025-03-17 19:57:07,321 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 19:57:07,322 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i [2025-03-17 19:57:07,332 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8f6b01cb4/ff4acb70338445e4a2c840e21956e550/FLAG8479ce501 [2025-03-17 19:57:07,638 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8f6b01cb4/ff4acb70338445e4a2c840e21956e550 [2025-03-17 19:57:07,639 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 19:57:07,640 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 19:57:07,641 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 19:57:07,641 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 19:57:07,644 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 19:57:07,645 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,645 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@cf7dd99 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07, skipping insertion in model container [2025-03-17 19:57:07,646 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,662 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 19:57:07,855 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 19:57:07,863 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 19:57:07,888 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 19:57:07,905 INFO L204 MainTranslator]: Completed translation [2025-03-17 19:57:07,905 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07 WrapperNode [2025-03-17 19:57:07,906 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 19:57:07,906 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 19:57:07,906 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 19:57:07,906 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 19:57:07,911 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,919 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,931 INFO L138 Inliner]: procedures = 109, calls = 25, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 54 [2025-03-17 19:57:07,931 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 19:57:07,932 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 19:57:07,932 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 19:57:07,932 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 19:57:07,936 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,937 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,938 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,948 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [6, 4, 4]. 43 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0]. The 7 writes are split as follows [3, 2, 2]. [2025-03-17 19:57:07,949 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,950 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,953 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,957 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,958 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,958 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,959 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 19:57:07,960 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 19:57:07,960 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 19:57:07,960 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 19:57:07,960 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (1/1) ... [2025-03-17 19:57:07,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:07,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:07,982 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:07,983 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 19:57:07,999 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 19:57:07,999 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 19:57:08,067 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 19:57:08,068 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 19:57:08,145 INFO L1322 $ProcedureCfgBuilder]: dead code at ProgramPoint L554: havoc main_#t~mem12#1;call ULTIMATE.dealloc(main_#t~malloc2#1.base, main_#t~malloc2#1.offset);havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call ULTIMATE.dealloc(main_#t~malloc3#1.base, main_#t~malloc3#1.offset);havoc main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call ULTIMATE.dealloc(main_#t~malloc4#1.base, main_#t~malloc4#1.offset);havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; [2025-03-17 19:57:08,152 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-17 19:57:08,152 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 19:57:08,157 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 19:57:08,158 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 19:57:08,158 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 07:57:08 BoogieIcfgContainer [2025-03-17 19:57:08,158 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 19:57:08,159 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 19:57:08,159 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 19:57:08,163 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 19:57:08,163 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:57:08,163 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 07:57:07" (1/3) ... [2025-03-17 19:57:08,164 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4117276a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 07:57:08, skipping insertion in model container [2025-03-17 19:57:08,164 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:57:08,164 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 07:57:07" (2/3) ... [2025-03-17 19:57:08,164 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4117276a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 07:57:08, skipping insertion in model container [2025-03-17 19:57:08,164 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 19:57:08,164 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 07:57:08" (3/3) ... [2025-03-17 19:57:08,165 INFO L363 chiAutomizerObserver]: Analyzing ICFG java_Sequence-alloca.i [2025-03-17 19:57:08,204 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 19:57:08,205 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 19:57:08,205 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 19:57:08,205 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 19:57:08,206 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 19:57:08,206 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 19:57:08,206 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 19:57:08,206 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 19:57:08,210 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:08,223 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:57:08,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:08,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:08,226 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 19:57:08,226 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:08,226 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 19:57:08,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:08,228 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-03-17 19:57:08,228 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:08,228 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:08,228 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 19:57:08,228 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:08,233 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" [2025-03-17 19:57:08,233 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" [2025-03-17 19:57:08,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:08,237 INFO L85 PathProgramCache]: Analyzing trace with hash 48, now seen corresponding path program 1 times [2025-03-17 19:57:08,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:08,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012990846] [2025-03-17 19:57:08,243 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:08,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:08,307 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 19:57:08,344 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 19:57:08,344 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,344 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,344 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:08,350 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 19:57:08,365 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 19:57:08,369 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,369 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,383 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:08,385 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:08,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1440, now seen corresponding path program 1 times [2025-03-17 19:57:08,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:08,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171577173] [2025-03-17 19:57:08,385 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:08,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:08,396 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:08,406 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:08,407 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,407 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,407 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:08,409 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:08,414 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:08,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,420 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:08,423 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:08,423 INFO L85 PathProgramCache]: Analyzing trace with hash 46607, now seen corresponding path program 1 times [2025-03-17 19:57:08,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:08,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888445265] [2025-03-17 19:57:08,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:08,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:08,440 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 19:57:08,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 19:57:08,469 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,470 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,470 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:08,473 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 19:57:08,491 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 19:57:08,492 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:08,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:08,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:08,989 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 19:57:08,990 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 19:57:08,990 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 19:57:08,990 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 19:57:08,990 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-17 19:57:08,990 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:08,990 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 19:57:08,990 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 19:57:08,991 INFO L132 ssoRankerPreferences]: Filename of dumped script: java_Sequence-alloca.i_Iteration1_Lasso [2025-03-17 19:57:08,991 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 19:57:08,991 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 19:57:09,001 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,008 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,010 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,012 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,014 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,017 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,304 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,308 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,310 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,312 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,314 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,316 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,319 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,322 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 19:57:09,619 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 19:57:09,622 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-17 19:57:09,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,623 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,625 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,626 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-17 19:57:09,628 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,639 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,639 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:57:09,639 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,639 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,639 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,642 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:57:09,642 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:57:09,644 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,650 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-03-17 19:57:09,650 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,650 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,652 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,655 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-17 19:57:09,655 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,665 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,665 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:57:09,665 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,665 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,665 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,665 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:57:09,666 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:57:09,668 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,674 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-17 19:57:09,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,675 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,677 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-17 19:57:09,680 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,690 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,691 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:57:09,691 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,691 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,691 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,692 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:57:09,692 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:57:09,694 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:09,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,701 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,703 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,704 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-17 19:57:09,707 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,717 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,717 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 19:57:09,717 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,717 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,717 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,718 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 19:57:09,718 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 19:57:09,719 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,724 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-17 19:57:09,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,724 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,727 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,728 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-17 19:57:09,728 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,740 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,740 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,740 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,740 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,744 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:57:09,744 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:57:09,747 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,753 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-03-17 19:57:09,754 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,754 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,756 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,756 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-17 19:57:09,759 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,769 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,769 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,769 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,769 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,773 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:57:09,774 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:57:09,780 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,786 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:09,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,786 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,788 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,789 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-17 19:57:09,791 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,801 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,801 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,801 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,801 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,804 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:57:09,804 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:57:09,810 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,816 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:09,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,818 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,820 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-17 19:57:09,821 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,832 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,832 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,832 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,832 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,837 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:57:09,838 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:57:09,840 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-17 19:57:09,846 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:09,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,846 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,848 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,849 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2025-03-17 19:57:09,851 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 19:57:09,862 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 19:57:09,862 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 19:57:09,862 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 19:57:09,862 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 19:57:09,867 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-17 19:57:09,868 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-17 19:57:09,873 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-17 19:57:09,897 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-03-17 19:57:09,899 INFO L444 ModelExtractionUtils]: 2 out of 10 variables were initially zero. Simplification set additionally 5 variables to zero. [2025-03-17 19:57:09,900 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 19:57:09,900 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:09,902 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 19:57:09,904 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2025-03-17 19:57:09,905 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-17 19:57:09,917 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-17 19:57:09,917 INFO L474 LassoAnalysis]: Proved termination. [2025-03-17 19:57:09,917 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#1 ULTIMATE.start_main_~i~0#1.base) 0)_1) = -2*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~i~0#1.base) 0)_1 + 199 Supporting invariants [] [2025-03-17 19:57:09,924 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:09,957 INFO L156 tatePredicateManager]: 15 out of 16 supporting invariants were superfluous and have been removed [2025-03-17 19:57:09,963 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2025-03-17 19:57:09,964 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2025-03-17 19:57:09,964 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~i~0!base,]]] [2025-03-17 19:57:09,983 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:09,990 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 19:57:09,998 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 19:57:09,998 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:09,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:09,999 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-03-17 19:57:09,999 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:10,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:10,011 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:10,011 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,011 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:10,011 INFO L256 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-03-17 19:57:10,012 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:10,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:10,047 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-03-17 19:57:10,048 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,102 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 24 states and 31 transitions. Complement of second has 8 states. [2025-03-17 19:57:10,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2025-03-17 19:57:10,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 19 transitions. [2025-03-17 19:57:10,111 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 19 transitions. Stem has 1 letters. Loop has 2 letters. [2025-03-17 19:57:10,111 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:57:10,111 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 19 transitions. Stem has 3 letters. Loop has 2 letters. [2025-03-17 19:57:10,111 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:57:10,111 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 19 transitions. Stem has 1 letters. Loop has 4 letters. [2025-03-17 19:57:10,112 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 19:57:10,112 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 31 transitions. [2025-03-17 19:57:10,113 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,114 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 8 states and 10 transitions. [2025-03-17 19:57:10,114 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-03-17 19:57:10,115 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:10,115 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2025-03-17 19:57:10,115 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:10,115 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-17 19:57:10,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2025-03-17 19:57:10,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2025-03-17 19:57:10,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2025-03-17 19:57:10,129 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-17 19:57:10,129 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-03-17 19:57:10,129 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 19:57:10,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2025-03-17 19:57:10,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:10,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:10,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-17 19:57:10,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:10,130 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:10,130 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:10,130 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:10,130 INFO L85 PathProgramCache]: Analyzing trace with hash 1444796, now seen corresponding path program 1 times [2025-03-17 19:57:10,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:10,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134044509] [2025-03-17 19:57:10,130 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:10,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:10,139 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 19:57:10,147 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 19:57:10,147 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,147 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:10,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:10,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:10,252 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134044509] [2025-03-17 19:57:10,252 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [134044509] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 19:57:10,252 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 19:57:10,253 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 19:57:10,253 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428065610] [2025-03-17 19:57:10,253 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 19:57:10,254 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:57:10,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:10,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 1 times [2025-03-17 19:57:10,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:10,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470754599] [2025-03-17 19:57:10,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:10,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:10,261 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:10,265 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:10,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:10,266 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:10,266 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:10,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:10,271 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,271 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:10,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:10,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:57:10,334 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 19:57:10,334 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 19:57:10,335 INFO L87 Difference]: Start difference. First operand 8 states and 10 transitions. cyclomatic complexity: 4 Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:57:10,352 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2025-03-17 19:57:10,352 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2025-03-17 19:57:10,352 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,353 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 9 states and 10 transitions. [2025-03-17 19:57:10,353 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 19:57:10,353 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:10,353 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2025-03-17 19:57:10,353 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:10,353 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2025-03-17 19:57:10,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2025-03-17 19:57:10,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2025-03-17 19:57:10,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2025-03-17 19:57:10,354 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-17 19:57:10,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 19:57:10,355 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2025-03-17 19:57:10,356 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 19:57:10,356 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2025-03-17 19:57:10,356 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,356 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:10,356 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:10,357 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1] [2025-03-17 19:57:10,357 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:10,357 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:10,357 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:10,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:10,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1388483965, now seen corresponding path program 1 times [2025-03-17 19:57:10,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:10,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052992778] [2025-03-17 19:57:10,357 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:10,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:10,366 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 19:57:10,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 19:57:10,378 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,378 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:10,400 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2025-03-17 19:57:10,528 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:10,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:10,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052992778] [2025-03-17 19:57:10,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052992778] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:57:10,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717128370] [2025-03-17 19:57:10,529 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 19:57:10,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:57:10,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:10,531 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:57:10,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-17 19:57:10,567 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 19:57:10,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 19:57:10,583 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,583 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:10,584 INFO L256 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 7 conjuncts are in the unsatisfiable core [2025-03-17 19:57:10,585 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:10,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:57:10,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:10,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:57:10,631 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:10,631 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:57:10,651 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:10,652 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717128370] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:57:10,652 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:57:10,652 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2025-03-17 19:57:10,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602384563] [2025-03-17 19:57:10,652 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:57:10,652 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:57:10,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:10,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 2 times [2025-03-17 19:57:10,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:10,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119632377] [2025-03-17 19:57:10,652 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:57:10,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:10,656 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:10,658 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:10,658 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:57:10,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:10,658 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:10,661 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:10,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:10,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:10,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:10,663 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:10,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:57:10,719 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 19:57:10,719 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2025-03-17 19:57:10,719 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 9 states, 9 states have (on average 1.5555555555555556) internal successors, (14), 8 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:57:10,766 INFO L93 Difference]: Finished difference Result 18 states and 19 transitions. [2025-03-17 19:57:10,766 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 19 transitions. [2025-03-17 19:57:10,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,767 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 15 states and 16 transitions. [2025-03-17 19:57:10,767 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 19:57:10,767 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:10,767 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2025-03-17 19:57:10,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:10,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2025-03-17 19:57:10,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2025-03-17 19:57:10,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2025-03-17 19:57:10,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:10,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2025-03-17 19:57:10,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-17 19:57:10,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 19:57:10,770 INFO L432 stractBuchiCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-03-17 19:57:10,770 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 19:57:10,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 15 transitions. [2025-03-17 19:57:10,770 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:10,770 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:10,770 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:10,770 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1] [2025-03-17 19:57:10,770 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:10,770 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:10,770 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:10,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:10,771 INFO L85 PathProgramCache]: Analyzing trace with hash 390588736, now seen corresponding path program 2 times [2025-03-17 19:57:10,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:10,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870247194] [2025-03-17 19:57:10,772 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:57:10,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:10,782 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 12 statements into 2 equivalence classes. [2025-03-17 19:57:10,790 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 19:57:10,790 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:57:10,790 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:11,068 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:11,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:11,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870247194] [2025-03-17 19:57:11,069 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [870247194] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:57:11,069 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1774282852] [2025-03-17 19:57:11,069 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 19:57:11,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:57:11,069 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:11,071 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:57:11,072 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-17 19:57:11,112 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 12 statements into 2 equivalence classes. [2025-03-17 19:57:11,130 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 19:57:11,131 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 19:57:11,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:11,132 INFO L256 TraceCheckSpWp]: Trace formula consists of 180 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-03-17 19:57:11,133 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:11,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:57:11,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:11,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:11,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:11,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:11,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:57:11,184 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:11,184 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:57:11,261 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:11,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1774282852] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:57:11,262 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:57:11,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2025-03-17 19:57:11,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934840213] [2025-03-17 19:57:11,262 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:57:11,262 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:57:11,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:11,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 3 times [2025-03-17 19:57:11,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:11,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89580856] [2025-03-17 19:57:11,262 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:57:11,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:11,267 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:11,268 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:11,268 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 19:57:11,268 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:11,268 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:11,270 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:11,279 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:11,279 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:11,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:11,281 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:11,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:57:11,335 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-03-17 19:57:11,336 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=127, Unknown=0, NotChecked=0, Total=210 [2025-03-17 19:57:11,336 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. cyclomatic complexity: 3 Second operand has 15 states, 15 states have (on average 1.7333333333333334) internal successors, (26), 14 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:11,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:57:11,454 INFO L93 Difference]: Finished difference Result 33 states and 34 transitions. [2025-03-17 19:57:11,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 34 transitions. [2025-03-17 19:57:11,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:11,455 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 27 states and 28 transitions. [2025-03-17 19:57:11,455 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 19:57:11,455 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:11,455 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2025-03-17 19:57:11,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:11,456 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2025-03-17 19:57:11,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2025-03-17 19:57:11,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2025-03-17 19:57:11,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.0384615384615385) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:11,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2025-03-17 19:57:11,457 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-17 19:57:11,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-03-17 19:57:11,459 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2025-03-17 19:57:11,459 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 19:57:11,459 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 27 transitions. [2025-03-17 19:57:11,461 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:11,461 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:11,461 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:11,461 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1] [2025-03-17 19:57:11,461 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:11,462 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:11,462 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:11,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:11,463 INFO L85 PathProgramCache]: Analyzing trace with hash -493820410, now seen corresponding path program 3 times [2025-03-17 19:57:11,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:11,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910817795] [2025-03-17 19:57:11,464 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:57:11,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:11,477 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 11 equivalence classes. [2025-03-17 19:57:11,515 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 19:57:11,515 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 19:57:11,515 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:12,242 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:12,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:12,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910817795] [2025-03-17 19:57:12,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910817795] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:57:12,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [625968744] [2025-03-17 19:57:12,242 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 19:57:12,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:57:12,242 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:12,245 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:57:12,247 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-17 19:57:12,298 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 11 equivalence classes. [2025-03-17 19:57:12,493 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 19:57:12,493 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 19:57:12,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:12,496 INFO L256 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 25 conjuncts are in the unsatisfiable core [2025-03-17 19:57:12,499 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:12,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:57:12,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:12,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:57:12,612 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:12,612 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:57:12,820 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:12,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [625968744] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:57:12,820 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:57:12,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 28 [2025-03-17 19:57:12,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635133035] [2025-03-17 19:57:12,820 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:57:12,820 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:57:12,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:12,821 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 4 times [2025-03-17 19:57:12,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:12,821 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593373000] [2025-03-17 19:57:12,821 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:57:12,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:12,824 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-17 19:57:12,825 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:12,825 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:57:12,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:12,825 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:12,826 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:12,827 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:12,827 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:12,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:12,828 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:12,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:57:12,885 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2025-03-17 19:57:12,885 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=461, Unknown=0, NotChecked=0, Total=812 [2025-03-17 19:57:12,886 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. cyclomatic complexity: 3 Second operand has 29 states, 29 states have (on average 1.8620689655172413) internal successors, (54), 28 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:13,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:57:13,209 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2025-03-17 19:57:13,209 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2025-03-17 19:57:13,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:13,213 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 51 states and 52 transitions. [2025-03-17 19:57:13,213 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 19:57:13,213 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:13,214 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2025-03-17 19:57:13,214 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:13,214 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2025-03-17 19:57:13,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2025-03-17 19:57:13,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 50. [2025-03-17 19:57:13,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.02) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:13,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2025-03-17 19:57:13,215 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-17 19:57:13,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2025-03-17 19:57:13,217 INFO L432 stractBuchiCegarLoop]: Abstraction has 50 states and 51 transitions. [2025-03-17 19:57:13,217 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 19:57:13,217 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 51 transitions. [2025-03-17 19:57:13,217 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:13,217 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:13,218 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:13,218 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1] [2025-03-17 19:57:13,218 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:13,218 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:13,220 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:13,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:13,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1308134254, now seen corresponding path program 4 times [2025-03-17 19:57:13,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:13,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612915104] [2025-03-17 19:57:13,221 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:57:13,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:13,240 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 48 statements into 2 equivalence classes. [2025-03-17 19:57:13,271 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 19:57:13,271 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:57:13,271 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:14,973 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:14,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:14,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612915104] [2025-03-17 19:57:14,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612915104] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:57:14,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [397007443] [2025-03-17 19:57:14,973 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 19:57:14,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:57:14,973 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:14,975 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:57:14,977 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-17 19:57:15,049 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 48 statements into 2 equivalence classes. [2025-03-17 19:57:15,102 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 19:57:15,102 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 19:57:15,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:15,106 INFO L256 TraceCheckSpWp]: Trace formula consists of 630 conjuncts, 49 conjuncts are in the unsatisfiable core [2025-03-17 19:57:15,109 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 19:57:15,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 19:57:15,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 19:57:15,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 19:57:15,285 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:15,285 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 19:57:15,969 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:15,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [397007443] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 19:57:15,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 19:57:15,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 50 [2025-03-17 19:57:15,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786183966] [2025-03-17 19:57:15,969 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 19:57:15,969 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 19:57:15,970 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:15,970 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 5 times [2025-03-17 19:57:15,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:15,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013137876] [2025-03-17 19:57:15,970 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:57:15,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:15,976 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:15,977 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:15,978 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 19:57:15,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:15,978 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 19:57:15,979 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 19:57:15,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 19:57:15,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 19:57:15,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 19:57:15,981 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 19:57:16,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 19:57:16,034 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2025-03-17 19:57:16,035 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1181, Invalid=1369, Unknown=0, NotChecked=0, Total=2550 [2025-03-17 19:57:16,036 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. cyclomatic complexity: 3 Second operand has 51 states, 51 states have (on average 1.9215686274509804) internal successors, (98), 50 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:16,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 19:57:16,930 INFO L93 Difference]: Finished difference Result 123 states and 124 transitions. [2025-03-17 19:57:16,930 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 123 states and 124 transitions. [2025-03-17 19:57:16,932 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:16,932 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 123 states to 99 states and 100 transitions. [2025-03-17 19:57:16,932 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-17 19:57:16,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-17 19:57:16,932 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2025-03-17 19:57:16,933 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 19:57:16,933 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2025-03-17 19:57:16,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2025-03-17 19:57:16,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 98. [2025-03-17 19:57:16,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.010204081632653) internal successors, (99), 97 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 19:57:16,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 99 transitions. [2025-03-17 19:57:16,936 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 99 transitions. [2025-03-17 19:57:16,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2025-03-17 19:57:16,938 INFO L432 stractBuchiCegarLoop]: Abstraction has 98 states and 99 transitions. [2025-03-17 19:57:16,938 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 19:57:16,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 99 transitions. [2025-03-17 19:57:16,939 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-17 19:57:16,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 19:57:16,939 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 19:57:16,940 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1] [2025-03-17 19:57:16,940 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 19:57:16,940 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#0(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(0, main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume main_#t~mem5#1 < 100;havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem6#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem7#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int#1(1 + main_#t~post8#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1;" "assume true;call main_#t~mem5#1 := read~int#1(main_~i~0#1.base, main_~i~0#1.offset, 4);" "assume !(main_#t~mem5#1 < 100);havoc main_#t~mem5#1;" "call write~int#2(5, main_~j~0#1.base, main_~j~0#1.offset, 4);" [2025-03-17 19:57:16,941 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem9#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);" "assume main_#t~mem9#1 < 21;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#0(1 + main_#t~mem10#1, main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem11#1 := read~int#2(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#2(3 + main_#t~mem11#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem11#1;" [2025-03-17 19:57:16,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 19:57:16,941 INFO L85 PathProgramCache]: Analyzing trace with hash -222239318, now seen corresponding path program 5 times [2025-03-17 19:57:16,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 19:57:16,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22483331] [2025-03-17 19:57:16,941 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:57:16,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 19:57:16,978 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 96 statements into 47 equivalence classes. [2025-03-17 19:57:17,623 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 96 of 96 statements. [2025-03-17 19:57:17,623 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-17 19:57:17,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 19:57:22,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 19:57:22,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 19:57:22,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22483331] [2025-03-17 19:57:22,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [22483331] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 19:57:22,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [590489195] [2025-03-17 19:57:22,752 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 19:57:22,752 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 19:57:22,752 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 19:57:22,754 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 19:57:22,756 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-17 19:57:22,848 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 96 statements into 47 equivalence classes.