./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 20:21:39,094 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 20:21:39,141 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-17 20:21:39,145 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 20:21:39,145 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 20:21:39,145 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 20:21:39,159 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 20:21:39,159 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 20:21:39,159 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 20:21:39,160 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 20:21:39,160 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 20:21:39,160 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 20:21:39,160 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 20:21:39,160 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 20:21:39,160 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 20:21:39,160 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 20:21:39,160 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 20:21:39,161 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 20:21:39,161 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 20:21:39,162 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 20:21:39,162 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 20:21:39,162 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 20:21:39,163 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 20:21:39,163 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 20:21:39,163 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 [2025-03-17 20:21:39,380 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 20:21:39,388 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 20:21:39,390 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 20:21:39,392 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 20:21:39,392 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 20:21:39,393 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-17 20:21:40,574 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6e14c22b5/9c924198baa945458e73e23985090faa/FLAGa37667492 [2025-03-17 20:21:40,775 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 20:21:40,775 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-17 20:21:40,781 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6e14c22b5/9c924198baa945458e73e23985090faa/FLAGa37667492 [2025-03-17 20:21:41,135 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6e14c22b5/9c924198baa945458e73e23985090faa [2025-03-17 20:21:41,137 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 20:21:41,138 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 20:21:41,138 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 20:21:41,138 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 20:21:41,141 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 20:21:41,142 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,144 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c103a5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41, skipping insertion in model container [2025-03-17 20:21:41,144 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,156 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 20:21:41,264 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:21:41,273 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 20:21:41,285 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:21:41,297 INFO L204 MainTranslator]: Completed translation [2025-03-17 20:21:41,297 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41 WrapperNode [2025-03-17 20:21:41,298 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 20:21:41,298 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 20:21:41,299 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 20:21:41,299 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 20:21:41,303 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,307 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,319 INFO L138 Inliner]: procedures = 16, calls = 8, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 52 [2025-03-17 20:21:41,319 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 20:21:41,320 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 20:21:41,320 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 20:21:41,320 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 20:21:41,325 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,325 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,327 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,334 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-17 20:21:41,334 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,334 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,337 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,341 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,342 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,342 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,343 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 20:21:41,344 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 20:21:41,344 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 20:21:41,344 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 20:21:41,348 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (1/1) ... [2025-03-17 20:21:41,352 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,361 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:41,375 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:21:41,379 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 20:21:41,398 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 20:21:41,398 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 20:21:41,399 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 20:21:41,399 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 20:21:41,440 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 20:21:41,442 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 20:21:41,547 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-17 20:21:41,548 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 20:21:41,556 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 20:21:41,557 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 20:21:41,557 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:21:41 BoogieIcfgContainer [2025-03-17 20:21:41,557 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 20:21:41,558 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 20:21:41,558 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 20:21:41,562 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 20:21:41,563 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:21:41,563 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 08:21:41" (1/3) ... [2025-03-17 20:21:41,564 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@e18e3af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:21:41, skipping insertion in model container [2025-03-17 20:21:41,564 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:21:41,564 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:21:41" (2/3) ... [2025-03-17 20:21:41,565 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@e18e3af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:21:41, skipping insertion in model container [2025-03-17 20:21:41,565 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:21:41,565 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:21:41" (3/3) ... [2025-03-17 20:21:41,566 INFO L363 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2025-03-17 20:21:41,608 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 20:21:41,609 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 20:21:41,609 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 20:21:41,609 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 20:21:41,609 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 20:21:41,609 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 20:21:41,610 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 20:21:41,610 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 20:21:41,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 13 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:41,626 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-17 20:21:41,626 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:41,627 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:41,629 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:21:41,629 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:21:41,629 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 20:21:41,630 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 13 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:41,631 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-17 20:21:41,631 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:41,631 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:41,631 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:21:41,631 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-17 20:21:41,636 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" [2025-03-17 20:21:41,637 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-03-17 20:21:41,642 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:41,642 INFO L85 PathProgramCache]: Analyzing trace with hash 59, now seen corresponding path program 1 times [2025-03-17 20:21:41,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:41,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724990655] [2025-03-17 20:21:41,648 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:41,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:41,695 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:41,706 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:41,707 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,707 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,707 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:41,710 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:41,712 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:41,712 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,712 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,725 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:41,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:41,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1792, now seen corresponding path program 1 times [2025-03-17 20:21:41,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:41,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270040867] [2025-03-17 20:21:41,729 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:41,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:41,732 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:21:41,737 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:21:41,738 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,738 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,738 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:41,741 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:21:41,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:21:41,744 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:41,746 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:41,746 INFO L85 PathProgramCache]: Analyzing trace with hash 57530, now seen corresponding path program 1 times [2025-03-17 20:21:41,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:41,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637498325] [2025-03-17 20:21:41,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:41,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:41,753 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 20:21:41,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 20:21:41,759 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,759 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,759 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:41,762 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-17 20:21:41,765 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-17 20:21:41,766 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:41,766 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:41,769 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:41,829 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 20:21:41,830 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 20:21:41,830 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 20:21:41,830 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 20:21:41,830 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-17 20:21:41,831 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,831 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 20:21:41,831 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 20:21:41,831 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-17 20:21:41,831 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 20:21:41,831 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 20:21:41,841 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,857 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,861 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,902 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 20:21:41,903 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-17 20:21:41,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,904 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:41,906 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:21:41,907 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-17 20:21:41,909 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-17 20:21:41,909 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-17 20:21:41,927 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-03-17 20:21:41,928 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,928 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:41,930 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:21:41,932 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-17 20:21:41,933 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-17 20:21:41,933 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-17 20:21:41,957 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-17 20:21:41,961 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-17 20:21:41,962 INFO L204 LassoAnalysis]: Preferences: [2025-03-17 20:21:41,962 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-17 20:21:41,962 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-17 20:21:41,962 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-17 20:21:41,962 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-17 20:21:41,962 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,962 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-17 20:21:41,962 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-17 20:21:41,962 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-17 20:21:41,962 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-17 20:21:41,962 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-17 20:21:41,963 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,970 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,973 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-17 20:21:41,993 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-17 20:21:41,996 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-17 20:21:41,997 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:41,997 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:41,999 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:21:42,001 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-17 20:21:42,002 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-17 20:21:42,013 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-17 20:21:42,013 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-17 20:21:42,014 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-17 20:21:42,014 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-17 20:21:42,014 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-17 20:21:42,018 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-17 20:21:42,018 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-17 20:21:42,020 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-17 20:21:42,024 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-17 20:21:42,026 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-03-17 20:21:42,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:21:42,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:42,034 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:21:42,035 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-17 20:21:42,036 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-17 20:21:42,036 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-17 20:21:42,037 INFO L474 LassoAnalysis]: Proved termination. [2025-03-17 20:21:42,037 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 1999999 Supporting invariants [] [2025-03-17 20:21:42,043 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-17 20:21:42,046 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-17 20:21:42,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,082 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,086 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,087 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,088 INFO L256 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-17 20:21:42,088 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:42,095 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 20:21:42,096 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 20:21:42,097 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,097 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,097 WARN L254 TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-17 20:21:42,097 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:42,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,125 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-17 20:21:42,126 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 13 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,162 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 13 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 35 states and 52 transitions. Complement of second has 6 states. [2025-03-17 20:21:42,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-17 20:21:42,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 30 transitions. [2025-03-17 20:21:42,172 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 1 letters. Loop has 2 letters. [2025-03-17 20:21:42,172 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:21:42,172 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 3 letters. Loop has 2 letters. [2025-03-17 20:21:42,172 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:21:42,172 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 1 letters. Loop has 4 letters. [2025-03-17 20:21:42,172 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-17 20:21:42,173 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 52 transitions. [2025-03-17 20:21:42,174 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-17 20:21:42,178 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 16 states and 21 transitions. [2025-03-17 20:21:42,178 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-03-17 20:21:42,178 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-17 20:21:42,179 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 21 transitions. [2025-03-17 20:21:42,179 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:42,179 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-17 20:21:42,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 21 transitions. [2025-03-17 20:21:42,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 14. [2025-03-17 20:21:42,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 13 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 19 transitions. [2025-03-17 20:21:42,197 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 19 transitions. [2025-03-17 20:21:42,197 INFO L432 stractBuchiCegarLoop]: Abstraction has 14 states and 19 transitions. [2025-03-17 20:21:42,197 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 20:21:42,197 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 19 transitions. [2025-03-17 20:21:42,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:42,197 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:42,198 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-17 20:21:42,198 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:42,198 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:42,198 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:42,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1783418, now seen corresponding path program 1 times [2025-03-17 20:21:42,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026945157] [2025-03-17 20:21:42,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,203 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-17 20:21:42,208 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-17 20:21:42,208 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,208 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,249 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:42,249 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026945157] [2025-03-17 20:21:42,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1026945157] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:21:42,249 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:21:42,250 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-03-17 20:21:42,250 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350172992] [2025-03-17 20:21:42,250 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:21:42,251 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:42,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,253 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 1 times [2025-03-17 20:21:42,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456205609] [2025-03-17 20:21:42,253 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,257 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,258 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,258 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,258 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,258 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:42,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,259 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,259 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,259 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:42,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:42,264 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:21:42,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:21:42,265 INFO L87 Difference]: Start difference. First operand 14 states and 19 transitions. cyclomatic complexity: 8 Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:42,285 INFO L93 Difference]: Finished difference Result 24 states and 30 transitions. [2025-03-17 20:21:42,285 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 30 transitions. [2025-03-17 20:21:42,286 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-17 20:21:42,286 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 24 states and 30 transitions. [2025-03-17 20:21:42,286 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-03-17 20:21:42,286 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-03-17 20:21:42,286 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 30 transitions. [2025-03-17 20:21:42,286 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:42,286 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2025-03-17 20:21:42,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 30 transitions. [2025-03-17 20:21:42,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 16. [2025-03-17 20:21:42,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.3125) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 21 transitions. [2025-03-17 20:21:42,291 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-17 20:21:42,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:21:42,292 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-17 20:21:42,292 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 20:21:42,292 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 21 transitions. [2025-03-17 20:21:42,292 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,292 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:42,292 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:42,292 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1] [2025-03-17 20:21:42,293 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:42,293 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:42,293 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:42,293 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1713901979, now seen corresponding path program 1 times [2025-03-17 20:21:42,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,293 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224665915] [2025-03-17 20:21:42,293 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 20:21:42,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 20:21:42,298 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,298 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,331 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:42,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224665915] [2025-03-17 20:21:42,331 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224665915] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:42,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [532031690] [2025-03-17 20:21:42,331 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,331 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:42,331 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:42,333 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:42,335 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-17 20:21:42,359 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 20:21:42,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 20:21:42,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,363 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,364 INFO L256 TraceCheckSpWp]: Trace formula consists of 27 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-17 20:21:42,364 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:42,386 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,386 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:42,415 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [532031690] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:42,416 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:42,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 4 [2025-03-17 20:21:42,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873685720] [2025-03-17 20:21:42,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:42,416 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:42,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,416 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 2 times [2025-03-17 20:21:42,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266458164] [2025-03-17 20:21:42,416 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:42,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,419 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,419 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,419 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:21:42,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,419 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:42,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,419 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,419 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,420 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:42,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:42,422 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 20:21:42,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2025-03-17 20:21:42,422 INFO L87 Difference]: Start difference. First operand 16 states and 21 transitions. cyclomatic complexity: 8 Second operand has 6 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:42,479 INFO L93 Difference]: Finished difference Result 58 states and 73 transitions. [2025-03-17 20:21:42,479 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 73 transitions. [2025-03-17 20:21:42,481 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 5 [2025-03-17 20:21:42,482 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 73 transitions. [2025-03-17 20:21:42,482 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2025-03-17 20:21:42,482 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2025-03-17 20:21:42,482 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 73 transitions. [2025-03-17 20:21:42,482 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:42,482 INFO L218 hiAutomatonCegarLoop]: Abstraction has 58 states and 73 transitions. [2025-03-17 20:21:42,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 73 transitions. [2025-03-17 20:21:42,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 22. [2025-03-17 20:21:42,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5) internal successors, (33), 21 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 33 transitions. [2025-03-17 20:21:42,484 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 33 transitions. [2025-03-17 20:21:42,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 20:21:42,487 INFO L432 stractBuchiCegarLoop]: Abstraction has 22 states and 33 transitions. [2025-03-17 20:21:42,487 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 20:21:42,487 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 33 transitions. [2025-03-17 20:21:42,487 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,487 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:42,487 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:42,488 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:42,488 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:42,490 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:42,490 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:42,491 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1590272494, now seen corresponding path program 1 times [2025-03-17 20:21:42,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536229831] [2025-03-17 20:21:42,491 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,494 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-17 20:21:42,501 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-17 20:21:42,501 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,501 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:42,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536229831] [2025-03-17 20:21:42,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1536229831] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:21:42,538 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:21:42,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 20:21:42,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980212260] [2025-03-17 20:21:42,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:21:42,538 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:42,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,539 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 3 times [2025-03-17 20:21:42,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411742343] [2025-03-17 20:21:42,539 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:42,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,542 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,542 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,542 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:21:42,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,542 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:42,543 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,543 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,543 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,543 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,543 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:42,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:42,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:21:42,546 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:21:42,547 INFO L87 Difference]: Start difference. First operand 22 states and 33 transitions. cyclomatic complexity: 14 Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:42,553 INFO L93 Difference]: Finished difference Result 25 states and 35 transitions. [2025-03-17 20:21:42,553 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 35 transitions. [2025-03-17 20:21:42,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,554 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 20 states and 26 transitions. [2025-03-17 20:21:42,554 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:42,554 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:42,554 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 26 transitions. [2025-03-17 20:21:42,554 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:42,555 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 26 transitions. [2025-03-17 20:21:42,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 26 transitions. [2025-03-17 20:21:42,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2025-03-17 20:21:42,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.3157894736842106) internal successors, (25), 18 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 25 transitions. [2025-03-17 20:21:42,557 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 25 transitions. [2025-03-17 20:21:42,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:21:42,558 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 25 transitions. [2025-03-17 20:21:42,558 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 20:21:42,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 25 transitions. [2025-03-17 20:21:42,558 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:42,558 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:42,559 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:42,559 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:42,559 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:42,559 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:42,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,560 INFO L85 PathProgramCache]: Analyzing trace with hash -756453713, now seen corresponding path program 1 times [2025-03-17 20:21:42,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133936300] [2025-03-17 20:21:42,560 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,563 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-17 20:21:42,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-17 20:21:42,567 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,603 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:42,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133936300] [2025-03-17 20:21:42,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2133936300] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:42,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1476093115] [2025-03-17 20:21:42,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:21:42,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:42,603 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:42,607 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:42,608 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-17 20:21:42,630 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-17 20:21:42,638 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-17 20:21:42,638 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,638 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,638 INFO L256 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-17 20:21:42,641 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:42,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,657 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:42,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1476093115] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:42,681 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:42,681 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-17 20:21:42,681 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584157986] [2025-03-17 20:21:42,681 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:42,682 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:42,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,682 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 4 times [2025-03-17 20:21:42,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130762612] [2025-03-17 20:21:42,682 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:42,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,685 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:21:42,689 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,689 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:42,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,689 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:42,690 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:42,690 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:42,690 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:42,690 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:42,691 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:42,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:42,695 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:21:42,695 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:21:42,695 INFO L87 Difference]: Start difference. First operand 19 states and 25 transitions. cyclomatic complexity: 9 Second operand has 7 states, 6 states have (on average 3.0) internal successors, (18), 7 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:42,733 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2025-03-17 20:21:42,733 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 38 transitions. [2025-03-17 20:21:42,734 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 26 states and 32 transitions. [2025-03-17 20:21:42,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:42,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:42,734 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2025-03-17 20:21:42,734 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:42,734 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-03-17 20:21:42,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2025-03-17 20:21:42,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2025-03-17 20:21:42,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.24) internal successors, (31), 24 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:42,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 31 transitions. [2025-03-17 20:21:42,740 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 31 transitions. [2025-03-17 20:21:42,740 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-17 20:21:42,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 20:21:42,741 INFO L432 stractBuchiCegarLoop]: Abstraction has 25 states and 31 transitions. [2025-03-17 20:21:42,741 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 20:21:42,741 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 31 transitions. [2025-03-17 20:21:42,741 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:42,741 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:42,741 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:42,742 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1] [2025-03-17 20:21:42,742 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:42,742 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:42,742 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:42,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:42,743 INFO L85 PathProgramCache]: Analyzing trace with hash 2144160126, now seen corresponding path program 2 times [2025-03-17 20:21:42,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:42,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623400743] [2025-03-17 20:21:42,743 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:42,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:42,748 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 12 statements into 2 equivalence classes. [2025-03-17 20:21:42,751 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 20:21:42,751 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:21:42,751 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,874 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:42,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623400743] [2025-03-17 20:21:42,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1623400743] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:42,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [628201424] [2025-03-17 20:21:42,875 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:42,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:42,875 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:42,877 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:42,878 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-17 20:21:42,904 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 12 statements into 2 equivalence classes. [2025-03-17 20:21:42,915 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 20:21:42,915 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:21:42,915 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:42,916 INFO L256 TraceCheckSpWp]: Trace formula consists of 42 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-17 20:21:42,917 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:42,946 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:42,946 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:43,035 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,036 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [628201424] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:43,036 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:43,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 10 [2025-03-17 20:21:43,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727164848] [2025-03-17 20:21:43,036 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:43,036 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:43,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:43,037 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 5 times [2025-03-17 20:21:43,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:43,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353453263] [2025-03-17 20:21:43,037 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:43,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:43,040 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,040 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,040 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:21:43,040 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,040 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:43,041 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,041 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,041 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:43,041 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:43,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:43,046 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-03-17 20:21:43,046 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2025-03-17 20:21:43,046 INFO L87 Difference]: Start difference. First operand 25 states and 31 transitions. cyclomatic complexity: 9 Second operand has 12 states, 11 states have (on average 2.1818181818181817) internal successors, (24), 11 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:43,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:43,131 INFO L93 Difference]: Finished difference Result 150 states and 169 transitions. [2025-03-17 20:21:43,132 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 169 transitions. [2025-03-17 20:21:43,133 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-17 20:21:43,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 138 states and 157 transitions. [2025-03-17 20:21:43,134 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2025-03-17 20:21:43,134 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2025-03-17 20:21:43,134 INFO L73 IsDeterministic]: Start isDeterministic. Operand 138 states and 157 transitions. [2025-03-17 20:21:43,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:43,134 INFO L218 hiAutomatonCegarLoop]: Abstraction has 138 states and 157 transitions. [2025-03-17 20:21:43,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states and 157 transitions. [2025-03-17 20:21:43,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 37. [2025-03-17 20:21:43,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3243243243243243) internal successors, (49), 36 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:43,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 49 transitions. [2025-03-17 20:21:43,136 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 49 transitions. [2025-03-17 20:21:43,137 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-17 20:21:43,137 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 49 transitions. [2025-03-17 20:21:43,137 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 20:21:43,138 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 49 transitions. [2025-03-17 20:21:43,138 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:43,138 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:43,138 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:43,138 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:43,138 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:43,138 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:43,138 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:43,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:43,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1240206194, now seen corresponding path program 2 times [2025-03-17 20:21:43,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:43,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904345658] [2025-03-17 20:21:43,139 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:43,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:43,146 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-17 20:21:43,149 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 20:21:43,149 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:21:43,149 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:43,207 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,208 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:43,208 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904345658] [2025-03-17 20:21:43,208 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904345658] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:43,208 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [176402146] [2025-03-17 20:21:43,208 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:43,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:43,208 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:43,210 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:43,211 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-17 20:21:43,230 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-17 20:21:43,235 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 20:21:43,236 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 20:21:43,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:43,236 INFO L256 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-17 20:21:43,237 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:43,271 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,271 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:43,332 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [176402146] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:43,332 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:43,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-17 20:21:43,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111727427] [2025-03-17 20:21:43,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:43,333 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:43,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:43,333 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 6 times [2025-03-17 20:21:43,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:43,333 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290163146] [2025-03-17 20:21:43,333 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:43,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:43,335 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,335 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,335 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:21:43,335 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,335 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:43,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,339 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,339 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:43,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,340 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:43,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:43,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:21:43,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:21:43,342 INFO L87 Difference]: Start difference. First operand 37 states and 49 transitions. cyclomatic complexity: 15 Second operand has 13 states, 12 states have (on average 2.5) internal successors, (30), 13 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:43,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:43,364 INFO L93 Difference]: Finished difference Result 62 states and 74 transitions. [2025-03-17 20:21:43,364 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 62 states and 74 transitions. [2025-03-17 20:21:43,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:43,366 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 62 states to 50 states and 62 transitions. [2025-03-17 20:21:43,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:43,366 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:43,366 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 62 transitions. [2025-03-17 20:21:43,366 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:43,366 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 62 transitions. [2025-03-17 20:21:43,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 62 transitions. [2025-03-17 20:21:43,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 49. [2025-03-17 20:21:43,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.2448979591836735) internal successors, (61), 48 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:43,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 61 transitions. [2025-03-17 20:21:43,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 61 transitions. [2025-03-17 20:21:43,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-17 20:21:43,370 INFO L432 stractBuchiCegarLoop]: Abstraction has 49 states and 61 transitions. [2025-03-17 20:21:43,370 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-17 20:21:43,370 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 61 transitions. [2025-03-17 20:21:43,371 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:43,371 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:43,371 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:43,371 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1] [2025-03-17 20:21:43,374 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:43,374 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:43,374 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:43,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:43,375 INFO L85 PathProgramCache]: Analyzing trace with hash -682801532, now seen corresponding path program 3 times [2025-03-17 20:21:43,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:43,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295240654] [2025-03-17 20:21:43,375 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:43,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:43,379 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 11 equivalence classes. [2025-03-17 20:21:43,391 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 20:21:43,391 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 20:21:43,391 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:43,560 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:43,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295240654] [2025-03-17 20:21:43,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295240654] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:43,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1150496269] [2025-03-17 20:21:43,560 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:43,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:43,560 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:43,563 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:43,571 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-17 20:21:43,595 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 11 equivalence classes. [2025-03-17 20:21:43,607 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 20:21:43,607 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 20:21:43,607 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:43,607 INFO L256 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-17 20:21:43,608 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:43,665 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,666 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:43,885 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:43,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1150496269] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:43,885 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:43,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 22 [2025-03-17 20:21:43,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333444566] [2025-03-17 20:21:43,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:43,886 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:43,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:43,886 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 7 times [2025-03-17 20:21:43,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:43,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314835826] [2025-03-17 20:21:43,886 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:21:43,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:43,888 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,888 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,888 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:43,888 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,888 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:43,888 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:43,889 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:43,889 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:43,889 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:43,889 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:43,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:43,891 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2025-03-17 20:21:43,891 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2025-03-17 20:21:43,892 INFO L87 Difference]: Start difference. First operand 49 states and 61 transitions. cyclomatic complexity: 15 Second operand has 24 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 23 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:44,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:44,054 INFO L93 Difference]: Finished difference Result 516 states and 553 transitions. [2025-03-17 20:21:44,054 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 516 states and 553 transitions. [2025-03-17 20:21:44,062 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 13 [2025-03-17 20:21:44,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 516 states to 492 states and 529 transitions. [2025-03-17 20:21:44,068 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2025-03-17 20:21:44,068 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2025-03-17 20:21:44,068 INFO L73 IsDeterministic]: Start isDeterministic. Operand 492 states and 529 transitions. [2025-03-17 20:21:44,069 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:44,069 INFO L218 hiAutomatonCegarLoop]: Abstraction has 492 states and 529 transitions. [2025-03-17 20:21:44,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states and 529 transitions. [2025-03-17 20:21:44,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 73. [2025-03-17 20:21:44,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.3287671232876712) internal successors, (97), 72 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:44,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 97 transitions. [2025-03-17 20:21:44,080 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 97 transitions. [2025-03-17 20:21:44,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-17 20:21:44,080 INFO L432 stractBuchiCegarLoop]: Abstraction has 73 states and 97 transitions. [2025-03-17 20:21:44,080 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-17 20:21:44,080 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 97 transitions. [2025-03-17 20:21:44,081 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:44,081 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:44,081 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:44,081 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:44,081 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:44,081 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:44,081 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:44,082 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:44,082 INFO L85 PathProgramCache]: Analyzing trace with hash 414145080, now seen corresponding path program 3 times [2025-03-17 20:21:44,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:44,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042910872] [2025-03-17 20:21:44,082 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:44,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:44,088 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-03-17 20:21:44,101 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-03-17 20:21:44,102 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 20:21:44,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:44,225 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:44,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:44,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042910872] [2025-03-17 20:21:44,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1042910872] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:44,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [79284046] [2025-03-17 20:21:44,225 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:44,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:44,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:44,258 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:44,267 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-17 20:21:44,289 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-03-17 20:21:44,301 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-03-17 20:21:44,301 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-17 20:21:44,301 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:44,302 INFO L256 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-17 20:21:44,303 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:44,345 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:44,345 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:44,525 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:44,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [79284046] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:44,526 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:44,526 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-17 20:21:44,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466529606] [2025-03-17 20:21:44,526 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:44,527 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:44,527 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:44,527 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 8 times [2025-03-17 20:21:44,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:44,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367837382] [2025-03-17 20:21:44,527 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:21:44,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:44,528 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:44,528 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:44,528 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:21:44,528 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:44,528 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:44,530 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:44,530 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:44,530 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:44,530 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:44,530 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:44,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:44,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-17 20:21:44,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-17 20:21:44,533 INFO L87 Difference]: Start difference. First operand 73 states and 97 transitions. cyclomatic complexity: 27 Second operand has 25 states, 24 states have (on average 2.25) internal successors, (54), 25 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:44,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:44,561 INFO L93 Difference]: Finished difference Result 122 states and 146 transitions. [2025-03-17 20:21:44,562 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 122 states and 146 transitions. [2025-03-17 20:21:44,562 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:44,563 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 122 states to 98 states and 122 transitions. [2025-03-17 20:21:44,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:44,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:44,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 122 transitions. [2025-03-17 20:21:44,563 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:44,564 INFO L218 hiAutomatonCegarLoop]: Abstraction has 98 states and 122 transitions. [2025-03-17 20:21:44,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 122 transitions. [2025-03-17 20:21:44,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2025-03-17 20:21:44,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.2474226804123711) internal successors, (121), 96 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:44,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 121 transitions. [2025-03-17 20:21:44,566 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 121 transitions. [2025-03-17 20:21:44,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-17 20:21:44,567 INFO L432 stractBuchiCegarLoop]: Abstraction has 97 states and 121 transitions. [2025-03-17 20:21:44,567 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-17 20:21:44,567 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 121 transitions. [2025-03-17 20:21:44,568 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:44,568 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:44,568 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:44,568 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1] [2025-03-17 20:21:44,568 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:44,569 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:44,569 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:44,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:44,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1552332176, now seen corresponding path program 4 times [2025-03-17 20:21:44,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:44,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565872357] [2025-03-17 20:21:44,569 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:44,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:44,573 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 48 statements into 2 equivalence classes. [2025-03-17 20:21:44,582 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 20:21:44,584 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:44,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:44,973 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:44,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:44,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565872357] [2025-03-17 20:21:44,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565872357] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:44,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1636151819] [2025-03-17 20:21:44,973 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:44,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:44,974 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:44,976 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:44,977 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-17 20:21:45,002 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 48 statements into 2 equivalence classes. [2025-03-17 20:21:45,014 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 48 of 48 statements. [2025-03-17 20:21:45,014 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:45,014 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:45,015 INFO L256 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-17 20:21:45,017 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:45,096 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:45,097 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:45,770 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:45,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1636151819] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:45,770 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:45,770 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23] total 46 [2025-03-17 20:21:45,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810575804] [2025-03-17 20:21:45,770 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:45,770 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:45,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:45,771 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 9 times [2025-03-17 20:21:45,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:45,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872812729] [2025-03-17 20:21:45,771 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:21:45,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:45,772 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:45,774 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:45,774 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:21:45,774 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:45,774 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:45,775 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:45,775 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:45,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:45,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:45,775 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:45,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:45,777 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-03-17 20:21:45,778 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-03-17 20:21:45,778 INFO L87 Difference]: Start difference. First operand 97 states and 121 transitions. cyclomatic complexity: 27 Second operand has 48 states, 47 states have (on average 2.0425531914893615) internal successors, (96), 47 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:46,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:46,144 INFO L93 Difference]: Finished difference Result 1896 states and 1969 transitions. [2025-03-17 20:21:46,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1896 states and 1969 transitions. [2025-03-17 20:21:46,156 INFO L131 ngComponentsAnalysis]: Automaton has 25 accepting balls. 25 [2025-03-17 20:21:46,163 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1896 states to 1848 states and 1921 transitions. [2025-03-17 20:21:46,163 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 79 [2025-03-17 20:21:46,163 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 79 [2025-03-17 20:21:46,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1848 states and 1921 transitions. [2025-03-17 20:21:46,163 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:46,163 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1848 states and 1921 transitions. [2025-03-17 20:21:46,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1848 states and 1921 transitions. [2025-03-17 20:21:46,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1848 to 145. [2025-03-17 20:21:46,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 145 states have (on average 1.3310344827586207) internal successors, (193), 144 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:46,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 193 transitions. [2025-03-17 20:21:46,172 INFO L240 hiAutomatonCegarLoop]: Abstraction has 145 states and 193 transitions. [2025-03-17 20:21:46,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-17 20:21:46,173 INFO L432 stractBuchiCegarLoop]: Abstraction has 145 states and 193 transitions. [2025-03-17 20:21:46,173 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-17 20:21:46,173 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 145 states and 193 transitions. [2025-03-17 20:21:46,174 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:46,174 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:46,174 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:46,175 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:46,175 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:46,175 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:46,175 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:46,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:46,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1428583228, now seen corresponding path program 4 times [2025-03-17 20:21:46,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:46,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819745692] [2025-03-17 20:21:46,175 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:46,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:46,179 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-03-17 20:21:46,187 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-03-17 20:21:46,187 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:46,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:46,595 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:46,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:46,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1819745692] [2025-03-17 20:21:46,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1819745692] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:46,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [396730615] [2025-03-17 20:21:46,595 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:46,596 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:46,596 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:46,600 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:46,601 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-17 20:21:46,634 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-03-17 20:21:46,649 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-03-17 20:21:46,649 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:46,649 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:46,650 INFO L256 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-17 20:21:46,652 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:46,709 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:46,710 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:47,266 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:47,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [396730615] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:47,267 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:47,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-03-17 20:21:47,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223114318] [2025-03-17 20:21:47,267 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:47,267 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:47,267 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:47,267 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 10 times [2025-03-17 20:21:47,267 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:47,267 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920961981] [2025-03-17 20:21:47,267 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:21:47,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:47,269 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:21:47,269 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:47,269 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:21:47,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:47,269 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:47,269 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:47,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:47,270 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:47,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:47,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:47,276 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:47,276 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-17 20:21:47,277 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-17 20:21:47,278 INFO L87 Difference]: Start difference. First operand 145 states and 193 transitions. cyclomatic complexity: 51 Second operand has 49 states, 48 states have (on average 2.125) internal successors, (102), 49 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:47,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:47,329 INFO L93 Difference]: Finished difference Result 242 states and 290 transitions. [2025-03-17 20:21:47,329 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 242 states and 290 transitions. [2025-03-17 20:21:47,330 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:47,331 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 242 states to 194 states and 242 transitions. [2025-03-17 20:21:47,331 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:47,331 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:47,331 INFO L73 IsDeterministic]: Start isDeterministic. Operand 194 states and 242 transitions. [2025-03-17 20:21:47,332 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:47,332 INFO L218 hiAutomatonCegarLoop]: Abstraction has 194 states and 242 transitions. [2025-03-17 20:21:47,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states and 242 transitions. [2025-03-17 20:21:47,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 193. [2025-03-17 20:21:47,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 193 states have (on average 1.2487046632124352) internal successors, (241), 192 states have internal predecessors, (241), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:47,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 241 transitions. [2025-03-17 20:21:47,338 INFO L240 hiAutomatonCegarLoop]: Abstraction has 193 states and 241 transitions. [2025-03-17 20:21:47,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-17 20:21:47,339 INFO L432 stractBuchiCegarLoop]: Abstraction has 193 states and 241 transitions. [2025-03-17 20:21:47,339 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-17 20:21:47,340 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 241 transitions. [2025-03-17 20:21:47,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:47,340 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:47,340 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:47,342 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1] [2025-03-17 20:21:47,342 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:47,342 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:47,342 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:47,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:47,343 INFO L85 PathProgramCache]: Analyzing trace with hash -1646696536, now seen corresponding path program 5 times [2025-03-17 20:21:47,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:47,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146092869] [2025-03-17 20:21:47,343 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:47,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:47,347 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 96 statements into 47 equivalence classes. [2025-03-17 20:21:47,379 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 96 of 96 statements. [2025-03-17 20:21:47,379 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-17 20:21:47,379 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:48,405 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:48,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:48,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146092869] [2025-03-17 20:21:48,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146092869] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:48,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [524467636] [2025-03-17 20:21:48,406 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:48,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:48,406 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:48,409 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:48,410 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-17 20:21:48,438 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 96 statements into 47 equivalence classes. [2025-03-17 20:21:48,475 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 96 of 96 statements. [2025-03-17 20:21:48,475 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-17 20:21:48,475 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:48,477 INFO L256 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-17 20:21:48,479 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:48,602 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:48,602 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:50,550 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:50,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [524467636] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:50,550 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:50,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47] total 94 [2025-03-17 20:21:50,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928259036] [2025-03-17 20:21:50,550 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:50,550 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:50,551 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:50,551 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 11 times [2025-03-17 20:21:50,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:50,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018203944] [2025-03-17 20:21:50,551 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:50,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:50,552 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:50,552 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:50,552 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:21:50,552 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:50,552 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:50,552 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:50,552 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:50,552 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:50,552 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:50,553 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:50,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:50,556 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-17 20:21:50,557 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-17 20:21:50,557 INFO L87 Difference]: Start difference. First operand 193 states and 241 transitions. cyclomatic complexity: 51 Second operand has 96 states, 95 states have (on average 2.0210526315789474) internal successors, (192), 95 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:52,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:52,093 INFO L93 Difference]: Finished difference Result 7248 states and 7393 transitions. [2025-03-17 20:21:52,093 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7248 states and 7393 transitions. [2025-03-17 20:21:52,124 INFO L131 ngComponentsAnalysis]: Automaton has 49 accepting balls. 49 [2025-03-17 20:21:52,147 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7248 states to 7152 states and 7297 transitions. [2025-03-17 20:21:52,147 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 151 [2025-03-17 20:21:52,147 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 151 [2025-03-17 20:21:52,147 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7152 states and 7297 transitions. [2025-03-17 20:21:52,149 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:52,150 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7152 states and 7297 transitions. [2025-03-17 20:21:52,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7152 states and 7297 transitions. [2025-03-17 20:21:52,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7152 to 289. [2025-03-17 20:21:52,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 289 states, 289 states have (on average 1.3321799307958477) internal successors, (385), 288 states have internal predecessors, (385), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:52,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 385 transitions. [2025-03-17 20:21:52,175 INFO L240 hiAutomatonCegarLoop]: Abstraction has 289 states and 385 transitions. [2025-03-17 20:21:52,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-17 20:21:52,179 INFO L432 stractBuchiCegarLoop]: Abstraction has 289 states and 385 transitions. [2025-03-17 20:21:52,179 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-17 20:21:52,179 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 289 states and 385 transitions. [2025-03-17 20:21:52,180 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:52,180 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:52,180 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:52,181 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1] [2025-03-17 20:21:52,181 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:52,181 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:21:52,181 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:52,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:52,182 INFO L85 PathProgramCache]: Analyzing trace with hash 234243548, now seen corresponding path program 5 times [2025-03-17 20:21:52,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:52,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119831503] [2025-03-17 20:21:52,182 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:52,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:52,187 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-03-17 20:21:52,209 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-03-17 20:21:52,210 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-17 20:21:52,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:53,227 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:53,227 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:53,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119831503] [2025-03-17 20:21:53,227 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119831503] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:53,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [441954796] [2025-03-17 20:21:53,227 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:21:53,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:53,227 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:53,229 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:53,231 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-17 20:21:53,259 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-03-17 20:21:53,295 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-03-17 20:21:53,296 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-17 20:21:53,296 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:53,297 INFO L256 TraceCheckSpWp]: Trace formula consists of 349 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-17 20:21:53,299 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:53,420 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:53,420 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:21:55,302 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:55,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [441954796] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:21:55,303 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:21:55,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-03-17 20:21:55,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404450411] [2025-03-17 20:21:55,303 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:21:55,303 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:21:55,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:55,303 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 12 times [2025-03-17 20:21:55,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:55,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071937109] [2025-03-17 20:21:55,303 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:55,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:55,304 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:55,305 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:55,305 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:21:55,305 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:55,305 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:21:55,305 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:21:55,305 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:21:55,305 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:21:55,305 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:21:55,305 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:21:55,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:21:55,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-17 20:21:55,312 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-17 20:21:55,312 INFO L87 Difference]: Start difference. First operand 289 states and 385 transitions. cyclomatic complexity: 99 Second operand has 96 states, 95 states have (on average 2.0526315789473686) internal successors, (195), 96 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:55,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:21:55,452 INFO L93 Difference]: Finished difference Result 482 states and 578 transitions. [2025-03-17 20:21:55,452 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 482 states and 578 transitions. [2025-03-17 20:21:55,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:55,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 482 states to 386 states and 482 transitions. [2025-03-17 20:21:55,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:21:55,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:21:55,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 386 states and 482 transitions. [2025-03-17 20:21:55,458 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:21:55,458 INFO L218 hiAutomatonCegarLoop]: Abstraction has 386 states and 482 transitions. [2025-03-17 20:21:55,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states and 482 transitions. [2025-03-17 20:21:55,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 385. [2025-03-17 20:21:55,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 385 states, 385 states have (on average 1.2493506493506494) internal successors, (481), 384 states have internal predecessors, (481), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:21:55,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 481 transitions. [2025-03-17 20:21:55,463 INFO L240 hiAutomatonCegarLoop]: Abstraction has 385 states and 481 transitions. [2025-03-17 20:21:55,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-17 20:21:55,465 INFO L432 stractBuchiCegarLoop]: Abstraction has 385 states and 481 transitions. [2025-03-17 20:21:55,465 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-17 20:21:55,465 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 385 states and 481 transitions. [2025-03-17 20:21:55,466 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:21:55,466 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:21:55,466 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:21:55,468 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1] [2025-03-17 20:21:55,469 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:21:55,470 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:21:55,470 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:21:55,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:21:55,470 INFO L85 PathProgramCache]: Analyzing trace with hash -1714545704, now seen corresponding path program 6 times [2025-03-17 20:21:55,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:21:55,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780072093] [2025-03-17 20:21:55,470 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:55,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:21:55,478 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 192 statements into 95 equivalence classes. [2025-03-17 20:21:55,542 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 192 of 192 statements. [2025-03-17 20:21:55,542 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-17 20:21:55,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:58,811 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:58,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:21:58,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780072093] [2025-03-17 20:21:58,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1780072093] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:21:58,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1525080704] [2025-03-17 20:21:58,811 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:21:58,811 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:21:58,812 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:21:58,814 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:21:58,815 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-17 20:21:58,849 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 192 statements into 95 equivalence classes. [2025-03-17 20:21:58,922 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 192 of 192 statements. [2025-03-17 20:21:58,922 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-17 20:21:58,922 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:21:58,924 INFO L256 TraceCheckSpWp]: Trace formula consists of 492 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-17 20:21:58,927 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:21:59,146 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:21:59,146 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:22:02,044 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:22:02,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1525080704] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:22:02,045 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:22:02,045 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [95, 95, 95] total 100 [2025-03-17 20:22:02,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [118689482] [2025-03-17 20:22:02,045 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:22:02,046 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:22:02,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:02,046 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 13 times [2025-03-17 20:22:02,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:02,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787563594] [2025-03-17 20:22:02,046 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:22:02,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:02,047 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:02,048 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:02,048 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:02,048 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:02,048 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:02,048 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:02,048 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:02,048 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:02,048 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:02,048 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:22:02,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:22:02,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2025-03-17 20:22:02,052 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2025-03-17 20:22:02,053 INFO L87 Difference]: Start difference. First operand 385 states and 481 transitions. cyclomatic complexity: 99 Second operand has 102 states, 101 states have (on average 2.0297029702970297) internal successors, (205), 101 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:22:03,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:22:03,650 INFO L93 Difference]: Finished difference Result 10590 states and 10699 transitions. [2025-03-17 20:22:03,650 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10590 states and 10699 transitions. [2025-03-17 20:22:03,675 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-17 20:22:03,705 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10590 states to 10578 states and 10687 transitions. [2025-03-17 20:22:03,705 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2025-03-17 20:22:03,705 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2025-03-17 20:22:03,706 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10578 states and 10687 transitions. [2025-03-17 20:22:03,713 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:22:03,713 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10578 states and 10687 transitions. [2025-03-17 20:22:03,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10578 states and 10687 transitions. [2025-03-17 20:22:03,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10578 to 397. [2025-03-17 20:22:03,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 397 states, 397 states have (on average 1.256926952141058) internal successors, (499), 396 states have internal predecessors, (499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:22:03,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 499 transitions. [2025-03-17 20:22:03,755 INFO L240 hiAutomatonCegarLoop]: Abstraction has 397 states and 499 transitions. [2025-03-17 20:22:03,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-17 20:22:03,755 INFO L432 stractBuchiCegarLoop]: Abstraction has 397 states and 499 transitions. [2025-03-17 20:22:03,755 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-17 20:22:03,755 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 397 states and 499 transitions. [2025-03-17 20:22:03,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:22:03,756 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:22:03,756 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:22:03,757 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1] [2025-03-17 20:22:03,757 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:22:03,758 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-17 20:22:03,758 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:22:03,758 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:03,758 INFO L85 PathProgramCache]: Analyzing trace with hash -1625225204, now seen corresponding path program 6 times [2025-03-17 20:22:03,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:03,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690546376] [2025-03-17 20:22:03,759 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:22:03,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:03,766 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-03-17 20:22:03,821 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-03-17 20:22:03,822 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-17 20:22:03,822 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:22:06,985 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:22:06,985 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:22:06,985 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690546376] [2025-03-17 20:22:06,985 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690546376] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 20:22:06,985 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1121406304] [2025-03-17 20:22:06,985 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:22:06,985 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 20:22:06,986 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:22:06,987 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 20:22:06,988 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-03-17 20:22:07,037 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-03-17 20:22:07,134 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-03-17 20:22:07,134 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-17 20:22:07,134 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:22:07,137 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-17 20:22:07,140 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 20:22:07,373 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:22:07,373 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 20:22:10,332 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:22:10,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1121406304] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 20:22:10,332 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 20:22:10,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-03-17 20:22:10,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793998046] [2025-03-17 20:22:10,332 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 20:22:10,333 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-17 20:22:10,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:10,333 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 14 times [2025-03-17 20:22:10,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:10,333 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313184430] [2025-03-17 20:22:10,333 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:22:10,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:10,336 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:10,336 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:10,337 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:22:10,337 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,337 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:10,337 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:10,337 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:10,337 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,338 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:22:10,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:22:10,340 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-03-17 20:22:10,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-03-17 20:22:10,342 INFO L87 Difference]: Start difference. First operand 397 states and 499 transitions. cyclomatic complexity: 105 Second operand has 103 states, 102 states have (on average 2.0686274509803924) internal successors, (211), 103 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:22:10,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:22:10,420 INFO L93 Difference]: Finished difference Result 422 states and 524 transitions. [2025-03-17 20:22:10,420 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 422 states and 524 transitions. [2025-03-17 20:22:10,420 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:22:10,422 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 422 states to 410 states and 512 transitions. [2025-03-17 20:22:10,422 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-03-17 20:22:10,422 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-03-17 20:22:10,422 INFO L73 IsDeterministic]: Start isDeterministic. Operand 410 states and 512 transitions. [2025-03-17 20:22:10,422 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-17 20:22:10,422 INFO L218 hiAutomatonCegarLoop]: Abstraction has 410 states and 512 transitions. [2025-03-17 20:22:10,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states and 512 transitions. [2025-03-17 20:22:10,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 409. [2025-03-17 20:22:10,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 409 states have (on average 1.2493887530562346) internal successors, (511), 408 states have internal predecessors, (511), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:22:10,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 511 transitions. [2025-03-17 20:22:10,426 INFO L240 hiAutomatonCegarLoop]: Abstraction has 409 states and 511 transitions. [2025-03-17 20:22:10,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-17 20:22:10,426 INFO L432 stractBuchiCegarLoop]: Abstraction has 409 states and 511 transitions. [2025-03-17 20:22:10,426 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-17 20:22:10,426 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 409 states and 511 transitions. [2025-03-17 20:22:10,427 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-17 20:22:10,427 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:22:10,427 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:22:10,428 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [101, 100, 1, 1, 1] [2025-03-17 20:22:10,428 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-17 20:22:10,428 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-17 20:22:10,429 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-17 20:22:10,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:10,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1186161118, now seen corresponding path program 7 times [2025-03-17 20:22:10,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:10,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952690652] [2025-03-17 20:22:10,429 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:22:10,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:10,435 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-17 20:22:10,463 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-17 20:22:10,463 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,463 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,463 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:10,466 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-17 20:22:10,482 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-17 20:22:10,482 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,482 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,493 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:22:10,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:10,494 INFO L85 PathProgramCache]: Analyzing trace with hash 61, now seen corresponding path program 15 times [2025-03-17 20:22:10,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:10,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731248050] [2025-03-17 20:22:10,494 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:22:10,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:10,495 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:10,495 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:10,495 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:22:10,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,495 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:10,496 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:22:10,496 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:22:10,496 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:22:10,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:22:10,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1883710976, now seen corresponding path program 1 times [2025-03-17 20:22:10,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:22:10,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432294526] [2025-03-17 20:22:10,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:22:10,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:22:10,501 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-17 20:22:10,519 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-17 20:22:10,519 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,519 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,519 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:10,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-17 20:22:10,556 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-17 20:22:10,556 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:10,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:10,566 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:22:17,462 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-17 20:22:17,481 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-17 20:22:17,481 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:17,482 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:17,482 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:22:17,503 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-17 20:22:17,522 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-17 20:22:17,522 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:22:17,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:22:17,613 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 17.03 08:22:17 BoogieIcfgContainer [2025-03-17 20:22:17,614 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-17 20:22:17,614 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-17 20:22:17,614 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-17 20:22:17,614 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-17 20:22:17,615 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:21:41" (3/4) ... [2025-03-17 20:22:17,619 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-17 20:22:17,676 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-17 20:22:17,676 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-17 20:22:17,677 INFO L158 Benchmark]: Toolchain (without parser) took 36539.22ms. Allocated memory was 167.8MB in the beginning and 906.0MB in the end (delta: 738.2MB). Free memory was 130.2MB in the beginning and 370.7MB in the end (delta: -240.5MB). Peak memory consumption was 492.4MB. Max. memory is 16.1GB. [2025-03-17 20:22:17,678 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 127.0MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:22:17,678 INFO L158 Benchmark]: CACSL2BoogieTranslator took 159.54ms. Allocated memory is still 167.8MB. Free memory was 130.2MB in the beginning and 119.4MB in the end (delta: 10.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-17 20:22:17,679 INFO L158 Benchmark]: Boogie Procedure Inliner took 21.08ms. Allocated memory is still 167.8MB. Free memory was 119.4MB in the beginning and 118.2MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:22:17,679 INFO L158 Benchmark]: Boogie Preprocessor took 23.22ms. Allocated memory is still 167.8MB. Free memory was 118.2MB in the beginning and 117.3MB in the end (delta: 843.4kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:22:17,679 INFO L158 Benchmark]: IcfgBuilder took 213.72ms. Allocated memory is still 167.8MB. Free memory was 117.3MB in the beginning and 106.0MB in the end (delta: 11.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-17 20:22:17,679 INFO L158 Benchmark]: BuchiAutomizer took 36055.59ms. Allocated memory was 167.8MB in the beginning and 906.0MB in the end (delta: 738.2MB). Free memory was 106.0MB in the beginning and 379.1MB in the end (delta: -273.1MB). Peak memory consumption was 458.8MB. Max. memory is 16.1GB. [2025-03-17 20:22:17,679 INFO L158 Benchmark]: Witness Printer took 62.18ms. Allocated memory is still 906.0MB. Free memory was 379.1MB in the beginning and 370.7MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-17 20:22:17,680 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 127.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 159.54ms. Allocated memory is still 167.8MB. Free memory was 130.2MB in the beginning and 119.4MB in the end (delta: 10.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 21.08ms. Allocated memory is still 167.8MB. Free memory was 119.4MB in the beginning and 118.2MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 23.22ms. Allocated memory is still 167.8MB. Free memory was 118.2MB in the beginning and 117.3MB in the end (delta: 843.4kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 213.72ms. Allocated memory is still 167.8MB. Free memory was 117.3MB in the beginning and 106.0MB in the end (delta: 11.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 36055.59ms. Allocated memory was 167.8MB in the beginning and 906.0MB in the end (delta: 738.2MB). Free memory was 106.0MB in the beginning and 379.1MB in the end (delta: -273.1MB). Peak memory consumption was 458.8MB. Max. memory is 16.1GB. * Witness Printer took 62.18ms. Allocated memory is still 906.0MB. Free memory was 379.1MB in the beginning and 370.7MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 15 terminating modules (14 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function (((long long) -2 * i) + 1999999) and consists of 4 locations. 14 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 409 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 35.9s and 16 iterations. TraceHistogramMax:101. Analysis of lassos took 31.2s. Construction of modules took 1.2s. Büchi inclusion checks took 3.3s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 15. Automata minimization 0.1s AutomataMinimizationTime, 15 MinimizatonAttempts, 19320 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3970 SdHoareTripleChecker+Valid, 1.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3969 mSDsluCounter, 1442 SdHoareTripleChecker+Invalid, 1.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1324 mSDsCounter, 1181 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1633 IncrementalHoareTripleChecker+Invalid, 2814 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1181 mSolverCounterUnsat, 118 mSDtfsCounter, 1633 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN14 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax100 hnf100 lsp100 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 39ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-17 20:22:17,700 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-03-17 20:22:17,900 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-03-17 20:22:18,100 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-03-17 20:22:18,300 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-03-17 20:22:18,500 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:18,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:18,919 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-03-17 20:22:19,101 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:19,303 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-17 20:22:19,503 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:19,704 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:19,904 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-03-17 20:22:20,106 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)