./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_14-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_14-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 20:03:18,071 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 20:03:18,127 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-17 20:03:18,132 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 20:03:18,132 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 20:03:18,132 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 20:03:18,153 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 20:03:18,154 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 20:03:18,154 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 20:03:18,155 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 20:03:18,155 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 20:03:18,155 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 20:03:18,155 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 20:03:18,156 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 20:03:18,156 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 20:03:18,156 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 20:03:18,157 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 20:03:18,157 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 20:03:18,158 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 20:03:18,158 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 20:03:18,158 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 20:03:18,159 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 20:03:18,160 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd [2025-03-17 20:03:18,369 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 20:03:18,377 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 20:03:18,379 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 20:03:18,380 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 20:03:18,380 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 20:03:18,382 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_14-1.c [2025-03-17 20:03:19,466 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c83eb73b6/c7bfeb0c0b3f40a2888da8706d1981f0/FLAGf19f3e05e [2025-03-17 20:03:19,718 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 20:03:19,718 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_14-1.c [2025-03-17 20:03:19,729 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c83eb73b6/c7bfeb0c0b3f40a2888da8706d1981f0/FLAGf19f3e05e [2025-03-17 20:03:20,030 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c83eb73b6/c7bfeb0c0b3f40a2888da8706d1981f0 [2025-03-17 20:03:20,032 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 20:03:20,033 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 20:03:20,034 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 20:03:20,034 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 20:03:20,037 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 20:03:20,038 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,038 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1994f997 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20, skipping insertion in model container [2025-03-17 20:03:20,038 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,049 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 20:03:20,173 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:03:20,180 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 20:03:20,195 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:03:20,205 INFO L204 MainTranslator]: Completed translation [2025-03-17 20:03:20,205 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20 WrapperNode [2025-03-17 20:03:20,205 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 20:03:20,206 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 20:03:20,206 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 20:03:20,206 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 20:03:20,211 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,216 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,228 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 179 [2025-03-17 20:03:20,228 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 20:03:20,229 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 20:03:20,229 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 20:03:20,229 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 20:03:20,235 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,235 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,236 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,246 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-17 20:03:20,247 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,247 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,249 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,250 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,251 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,251 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,252 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 20:03:20,253 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 20:03:20,253 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 20:03:20,253 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 20:03:20,253 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (1/1) ... [2025-03-17 20:03:20,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:03:20,265 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:03:20,275 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:03:20,279 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 20:03:20,297 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 20:03:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 20:03:20,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 20:03:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 20:03:20,345 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 20:03:20,347 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 20:03:20,519 INFO L? ?]: Removed 32 outVars from TransFormulas that were not future-live. [2025-03-17 20:03:20,520 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 20:03:20,526 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 20:03:20,527 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 20:03:20,527 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:03:20 BoogieIcfgContainer [2025-03-17 20:03:20,527 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 20:03:20,528 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 20:03:20,528 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 20:03:20,531 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 20:03:20,532 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:03:20,532 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 08:03:20" (1/3) ... [2025-03-17 20:03:20,532 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d568c83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:03:20, skipping insertion in model container [2025-03-17 20:03:20,533 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:03:20,533 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:03:20" (2/3) ... [2025-03-17 20:03:20,533 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d568c83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:03:20, skipping insertion in model container [2025-03-17 20:03:20,533 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:03:20,533 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:03:20" (3/3) ... [2025-03-17 20:03:20,534 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_14-1.c [2025-03-17 20:03:20,569 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 20:03:20,569 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 20:03:20,569 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 20:03:20,569 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 20:03:20,569 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 20:03:20,570 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 20:03:20,570 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 20:03:20,570 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 20:03:20,573 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 50 states, 49 states have (on average 1.8979591836734695) internal successors, (93), 49 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-03-17 20:03:20,586 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:20,586 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:20,590 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:20,590 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:20,590 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 20:03:20,590 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 50 states, 49 states have (on average 1.8979591836734695) internal successors, (93), 49 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,592 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-03-17 20:03:20,592 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:20,592 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:20,592 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:20,592 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:20,597 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:20,597 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:20,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,601 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 1 times [2025-03-17 20:03:20,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369456755] [2025-03-17 20:03:20,606 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:20,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:20,645 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,652 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:20,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,656 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,656 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,656 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,667 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:20,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,670 INFO L85 PathProgramCache]: Analyzing trace with hash -59060829, now seen corresponding path program 1 times [2025-03-17 20:03:20,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119116870] [2025-03-17 20:03:20,671 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:20,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:20,678 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:20,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:20,686 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:20,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:20,768 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:20,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119116870] [2025-03-17 20:03:20,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119116870] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:20,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:20,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:20,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379168607] [2025-03-17 20:03:20,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:20,772 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:20,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:20,789 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:20,789 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:20,791 INFO L87 Difference]: Start difference. First operand has 50 states, 49 states have (on average 1.8979591836734695) internal successors, (93), 49 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:20,824 INFO L93 Difference]: Finished difference Result 96 states and 176 transitions. [2025-03-17 20:03:20,825 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 176 transitions. [2025-03-17 20:03:20,828 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-03-17 20:03:20,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 88 states and 142 transitions. [2025-03-17 20:03:20,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 88 [2025-03-17 20:03:20,833 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 88 [2025-03-17 20:03:20,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 142 transitions. [2025-03-17 20:03:20,834 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:20,834 INFO L218 hiAutomatonCegarLoop]: Abstraction has 88 states and 142 transitions. [2025-03-17 20:03:20,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 142 transitions. [2025-03-17 20:03:20,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2025-03-17 20:03:20,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 88 states have (on average 1.6136363636363635) internal successors, (142), 87 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 142 transitions. [2025-03-17 20:03:20,852 INFO L240 hiAutomatonCegarLoop]: Abstraction has 88 states and 142 transitions. [2025-03-17 20:03:20,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:20,855 INFO L432 stractBuchiCegarLoop]: Abstraction has 88 states and 142 transitions. [2025-03-17 20:03:20,855 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 20:03:20,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 88 states and 142 transitions. [2025-03-17 20:03:20,857 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-03-17 20:03:20,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:20,857 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:20,857 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:20,857 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:20,857 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:20,857 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:20,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,858 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 2 times [2025-03-17 20:03:20,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851831269] [2025-03-17 20:03:20,858 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:03:20,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:20,862 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,866 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,868 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:03:20,868 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,868 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:20,869 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,873 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,876 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:20,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,876 INFO L85 PathProgramCache]: Analyzing trace with hash -313797374, now seen corresponding path program 1 times [2025-03-17 20:03:20,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191066390] [2025-03-17 20:03:20,877 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:20,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:20,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:20,888 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:20,889 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,889 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:20,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:20,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:20,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191066390] [2025-03-17 20:03:20,939 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1191066390] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:20,939 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:20,939 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:20,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084373521] [2025-03-17 20:03:20,939 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:20,939 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:20,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:20,941 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:20,941 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:20,941 INFO L87 Difference]: Start difference. First operand 88 states and 142 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:20,956 INFO L93 Difference]: Finished difference Result 173 states and 277 transitions. [2025-03-17 20:03:20,956 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 173 states and 277 transitions. [2025-03-17 20:03:20,958 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-03-17 20:03:20,959 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 173 states to 173 states and 277 transitions. [2025-03-17 20:03:20,963 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 173 [2025-03-17 20:03:20,963 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 173 [2025-03-17 20:03:20,963 INFO L73 IsDeterministic]: Start isDeterministic. Operand 173 states and 277 transitions. [2025-03-17 20:03:20,963 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:20,964 INFO L218 hiAutomatonCegarLoop]: Abstraction has 173 states and 277 transitions. [2025-03-17 20:03:20,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states and 277 transitions. [2025-03-17 20:03:20,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2025-03-17 20:03:20,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 173 states have (on average 1.6011560693641618) internal successors, (277), 172 states have internal predecessors, (277), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:20,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 277 transitions. [2025-03-17 20:03:20,978 INFO L240 hiAutomatonCegarLoop]: Abstraction has 173 states and 277 transitions. [2025-03-17 20:03:20,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:20,979 INFO L432 stractBuchiCegarLoop]: Abstraction has 173 states and 277 transitions. [2025-03-17 20:03:20,979 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 20:03:20,979 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 173 states and 277 transitions. [2025-03-17 20:03:20,981 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-03-17 20:03:20,981 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:20,981 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:20,981 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:20,981 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:20,981 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:20,981 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:20,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,982 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 3 times [2025-03-17 20:03:20,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000805359] [2025-03-17 20:03:20,982 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:03:20,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:20,988 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,990 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,991 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:03:20,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,991 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:20,993 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:20,994 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:20,995 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:20,995 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:20,997 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:20,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:20,998 INFO L85 PathProgramCache]: Analyzing trace with hash -282777567, now seen corresponding path program 1 times [2025-03-17 20:03:20,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:20,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840572578] [2025-03-17 20:03:20,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:20,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,003 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,008 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,008 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,036 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840572578] [2025-03-17 20:03:21,036 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840572578] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,036 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861231347] [2025-03-17 20:03:21,036 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,037 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,038 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,038 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,039 INFO L87 Difference]: Start difference. First operand 173 states and 277 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,061 INFO L93 Difference]: Finished difference Result 341 states and 541 transitions. [2025-03-17 20:03:21,061 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 341 states and 541 transitions. [2025-03-17 20:03:21,063 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-03-17 20:03:21,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 341 states to 341 states and 541 transitions. [2025-03-17 20:03:21,065 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 341 [2025-03-17 20:03:21,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 341 [2025-03-17 20:03:21,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 341 states and 541 transitions. [2025-03-17 20:03:21,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,067 INFO L218 hiAutomatonCegarLoop]: Abstraction has 341 states and 541 transitions. [2025-03-17 20:03:21,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states and 541 transitions. [2025-03-17 20:03:21,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 341. [2025-03-17 20:03:21,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 341 states, 341 states have (on average 1.5865102639296187) internal successors, (541), 340 states have internal predecessors, (541), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 541 transitions. [2025-03-17 20:03:21,095 INFO L240 hiAutomatonCegarLoop]: Abstraction has 341 states and 541 transitions. [2025-03-17 20:03:21,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:21,096 INFO L432 stractBuchiCegarLoop]: Abstraction has 341 states and 541 transitions. [2025-03-17 20:03:21,096 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 20:03:21,097 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 341 states and 541 transitions. [2025-03-17 20:03:21,098 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-03-17 20:03:21,098 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:21,098 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:21,099 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:21,099 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:21,099 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:21,099 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:21,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,100 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 4 times [2025-03-17 20:03:21,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469453233] [2025-03-17 20:03:21,100 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:03:21,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,103 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:03:21,105 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,105 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:03:21,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,105 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:21,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,107 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,107 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,107 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:21,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1934980386, now seen corresponding path program 1 times [2025-03-17 20:03:21,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771260210] [2025-03-17 20:03:21,109 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:21,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,120 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,121 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,121 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,143 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771260210] [2025-03-17 20:03:21,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771260210] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,143 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077087157] [2025-03-17 20:03:21,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,144 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,145 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,146 INFO L87 Difference]: Start difference. First operand 341 states and 541 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,164 INFO L93 Difference]: Finished difference Result 673 states and 1057 transitions. [2025-03-17 20:03:21,164 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 673 states and 1057 transitions. [2025-03-17 20:03:21,170 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-03-17 20:03:21,175 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 673 states to 673 states and 1057 transitions. [2025-03-17 20:03:21,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 673 [2025-03-17 20:03:21,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 673 [2025-03-17 20:03:21,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 673 states and 1057 transitions. [2025-03-17 20:03:21,181 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,182 INFO L218 hiAutomatonCegarLoop]: Abstraction has 673 states and 1057 transitions. [2025-03-17 20:03:21,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 673 states and 1057 transitions. [2025-03-17 20:03:21,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 673 to 673. [2025-03-17 20:03:21,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 673 states, 673 states have (on average 1.5705794947994056) internal successors, (1057), 672 states have internal predecessors, (1057), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 673 states to 673 states and 1057 transitions. [2025-03-17 20:03:21,201 INFO L240 hiAutomatonCegarLoop]: Abstraction has 673 states and 1057 transitions. [2025-03-17 20:03:21,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:21,202 INFO L432 stractBuchiCegarLoop]: Abstraction has 673 states and 1057 transitions. [2025-03-17 20:03:21,203 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 20:03:21,203 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 673 states and 1057 transitions. [2025-03-17 20:03:21,205 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-03-17 20:03:21,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:21,206 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:21,207 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:21,207 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:21,207 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:21,207 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:21,207 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,208 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 5 times [2025-03-17 20:03:21,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503216098] [2025-03-17 20:03:21,208 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:03:21,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,212 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,214 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,215 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:03:21,215 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,215 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:21,216 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,218 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,218 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,218 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,221 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:21,221 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,221 INFO L85 PathProgramCache]: Analyzing trace with hash 1867973633, now seen corresponding path program 1 times [2025-03-17 20:03:21,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156475656] [2025-03-17 20:03:21,221 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:21,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,224 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,226 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,226 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,226 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,252 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156475656] [2025-03-17 20:03:21,252 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156475656] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,253 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,253 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,253 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570831184] [2025-03-17 20:03:21,253 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,253 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,253 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,253 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,253 INFO L87 Difference]: Start difference. First operand 673 states and 1057 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,274 INFO L93 Difference]: Finished difference Result 1329 states and 2065 transitions. [2025-03-17 20:03:21,274 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1329 states and 2065 transitions. [2025-03-17 20:03:21,285 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-03-17 20:03:21,292 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1329 states to 1329 states and 2065 transitions. [2025-03-17 20:03:21,292 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1329 [2025-03-17 20:03:21,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1329 [2025-03-17 20:03:21,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1329 states and 2065 transitions. [2025-03-17 20:03:21,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,295 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1329 states and 2065 transitions. [2025-03-17 20:03:21,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1329 states and 2065 transitions. [2025-03-17 20:03:21,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1329 to 1329. [2025-03-17 20:03:21,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1329 states, 1329 states have (on average 1.5537998495109104) internal successors, (2065), 1328 states have internal predecessors, (2065), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1329 states to 1329 states and 2065 transitions. [2025-03-17 20:03:21,319 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1329 states and 2065 transitions. [2025-03-17 20:03:21,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:21,321 INFO L432 stractBuchiCegarLoop]: Abstraction has 1329 states and 2065 transitions. [2025-03-17 20:03:21,321 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 20:03:21,321 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1329 states and 2065 transitions. [2025-03-17 20:03:21,326 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-03-17 20:03:21,326 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:21,326 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:21,327 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:21,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:21,327 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:21,328 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:21,328 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,328 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 6 times [2025-03-17 20:03:21,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183268756] [2025-03-17 20:03:21,328 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:03:21,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,332 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,334 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,335 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:03:21,335 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,335 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:21,336 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,337 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,337 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,337 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,340 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:21,341 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,341 INFO L85 PathProgramCache]: Analyzing trace with hash -1182229182, now seen corresponding path program 1 times [2025-03-17 20:03:21,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,341 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644791710] [2025-03-17 20:03:21,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:21,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,347 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,349 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,349 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,364 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644791710] [2025-03-17 20:03:21,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644791710] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,364 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,365 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189653574] [2025-03-17 20:03:21,365 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,365 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,365 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,365 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,366 INFO L87 Difference]: Start difference. First operand 1329 states and 2065 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,391 INFO L93 Difference]: Finished difference Result 2625 states and 4033 transitions. [2025-03-17 20:03:21,391 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2625 states and 4033 transitions. [2025-03-17 20:03:21,408 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-03-17 20:03:21,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2625 states to 2625 states and 4033 transitions. [2025-03-17 20:03:21,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2625 [2025-03-17 20:03:21,420 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2625 [2025-03-17 20:03:21,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2625 states and 4033 transitions. [2025-03-17 20:03:21,423 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,423 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2625 states and 4033 transitions. [2025-03-17 20:03:21,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2625 states and 4033 transitions. [2025-03-17 20:03:21,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2625 to 2625. [2025-03-17 20:03:21,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2625 states, 2625 states have (on average 1.5363809523809524) internal successors, (4033), 2624 states have internal predecessors, (4033), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2625 states to 2625 states and 4033 transitions. [2025-03-17 20:03:21,501 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2625 states and 4033 transitions. [2025-03-17 20:03:21,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:21,503 INFO L432 stractBuchiCegarLoop]: Abstraction has 2625 states and 4033 transitions. [2025-03-17 20:03:21,503 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 20:03:21,503 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2625 states and 4033 transitions. [2025-03-17 20:03:21,512 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-03-17 20:03:21,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:21,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:21,513 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:21,513 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:21,514 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:21,514 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:21,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,514 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 7 times [2025-03-17 20:03:21,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81343786] [2025-03-17 20:03:21,515 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:03:21,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,517 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,519 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,519 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,519 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,519 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:21,520 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,522 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,523 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,523 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,525 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:21,525 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,525 INFO L85 PathProgramCache]: Analyzing trace with hash 1074681825, now seen corresponding path program 1 times [2025-03-17 20:03:21,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,526 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506397335] [2025-03-17 20:03:21,526 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:21,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,530 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,532 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,534 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,534 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506397335] [2025-03-17 20:03:21,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506397335] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,547 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,547 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666292468] [2025-03-17 20:03:21,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,547 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,547 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,547 INFO L87 Difference]: Start difference. First operand 2625 states and 4033 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,571 INFO L93 Difference]: Finished difference Result 5185 states and 7873 transitions. [2025-03-17 20:03:21,571 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5185 states and 7873 transitions. [2025-03-17 20:03:21,596 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-03-17 20:03:21,614 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5185 states to 5185 states and 7873 transitions. [2025-03-17 20:03:21,615 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5185 [2025-03-17 20:03:21,617 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5185 [2025-03-17 20:03:21,617 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5185 states and 7873 transitions. [2025-03-17 20:03:21,623 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,624 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5185 states and 7873 transitions. [2025-03-17 20:03:21,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5185 states and 7873 transitions. [2025-03-17 20:03:21,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5185 to 5185. [2025-03-17 20:03:21,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5185 states, 5185 states have (on average 1.5184185149469624) internal successors, (7873), 5184 states have internal predecessors, (7873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5185 states to 5185 states and 7873 transitions. [2025-03-17 20:03:21,692 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5185 states and 7873 transitions. [2025-03-17 20:03:21,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:21,693 INFO L432 stractBuchiCegarLoop]: Abstraction has 5185 states and 7873 transitions. [2025-03-17 20:03:21,693 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-17 20:03:21,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5185 states and 7873 transitions. [2025-03-17 20:03:21,732 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-03-17 20:03:21,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:21,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:21,734 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:21,734 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:21,734 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:21,734 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:21,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,735 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 8 times [2025-03-17 20:03:21,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758472009] [2025-03-17 20:03:21,735 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:03:21,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,738 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,739 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,740 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:03:21,740 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,740 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:21,741 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:21,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:21,742 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,742 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:21,743 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:21,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:21,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1286032738, now seen corresponding path program 1 times [2025-03-17 20:03:21,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:21,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813935833] [2025-03-17 20:03:21,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:21,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:21,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:21,753 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:21,754 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:21,754 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:21,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:21,771 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:21,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813935833] [2025-03-17 20:03:21,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1813935833] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:21,771 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:21,771 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:21,772 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890518129] [2025-03-17 20:03:21,772 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:21,772 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:21,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:21,774 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:21,774 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:21,774 INFO L87 Difference]: Start difference. First operand 5185 states and 7873 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:21,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:21,813 INFO L93 Difference]: Finished difference Result 10241 states and 15361 transitions. [2025-03-17 20:03:21,813 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10241 states and 15361 transitions. [2025-03-17 20:03:21,859 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-03-17 20:03:21,898 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10241 states to 10241 states and 15361 transitions. [2025-03-17 20:03:21,898 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10241 [2025-03-17 20:03:21,903 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10241 [2025-03-17 20:03:21,903 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10241 states and 15361 transitions. [2025-03-17 20:03:21,913 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:21,913 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10241 states and 15361 transitions. [2025-03-17 20:03:21,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10241 states and 15361 transitions. [2025-03-17 20:03:22,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10241 to 10241. [2025-03-17 20:03:22,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10241 states, 10241 states have (on average 1.499951176642906) internal successors, (15361), 10240 states have internal predecessors, (15361), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:22,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10241 states to 10241 states and 15361 transitions. [2025-03-17 20:03:22,106 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10241 states and 15361 transitions. [2025-03-17 20:03:22,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:22,109 INFO L432 stractBuchiCegarLoop]: Abstraction has 10241 states and 15361 transitions. [2025-03-17 20:03:22,109 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-17 20:03:22,109 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10241 states and 15361 transitions. [2025-03-17 20:03:22,144 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-03-17 20:03:22,145 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:22,145 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:22,145 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:22,145 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:22,145 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:22,145 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:22,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:22,146 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 9 times [2025-03-17 20:03:22,146 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:22,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026271777] [2025-03-17 20:03:22,146 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:03:22,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:22,148 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:22,150 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:22,150 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:03:22,150 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:22,150 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:22,151 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:22,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:22,152 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:22,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:22,156 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:22,156 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:22,157 INFO L85 PathProgramCache]: Analyzing trace with hash 877208513, now seen corresponding path program 1 times [2025-03-17 20:03:22,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:22,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598275378] [2025-03-17 20:03:22,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:22,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:22,160 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:22,163 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:22,164 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:22,164 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:22,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:22,183 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:22,183 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598275378] [2025-03-17 20:03:22,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1598275378] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:22,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:22,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:22,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246996221] [2025-03-17 20:03:22,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:22,184 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:22,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:22,184 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:22,184 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:22,184 INFO L87 Difference]: Start difference. First operand 10241 states and 15361 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:22,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:22,238 INFO L93 Difference]: Finished difference Result 20225 states and 29953 transitions. [2025-03-17 20:03:22,238 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20225 states and 29953 transitions. [2025-03-17 20:03:22,326 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-03-17 20:03:22,386 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20225 states to 20225 states and 29953 transitions. [2025-03-17 20:03:22,387 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20225 [2025-03-17 20:03:22,400 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20225 [2025-03-17 20:03:22,401 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20225 states and 29953 transitions. [2025-03-17 20:03:22,421 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:22,421 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20225 states and 29953 transitions. [2025-03-17 20:03:22,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20225 states and 29953 transitions. [2025-03-17 20:03:22,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20225 to 20225. [2025-03-17 20:03:22,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20225 states, 20225 states have (on average 1.4809888751545117) internal successors, (29953), 20224 states have internal predecessors, (29953), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:22,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20225 states to 20225 states and 29953 transitions. [2025-03-17 20:03:22,773 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20225 states and 29953 transitions. [2025-03-17 20:03:22,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:22,774 INFO L432 stractBuchiCegarLoop]: Abstraction has 20225 states and 29953 transitions. [2025-03-17 20:03:22,774 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-17 20:03:22,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20225 states and 29953 transitions. [2025-03-17 20:03:22,816 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-03-17 20:03:22,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:22,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:22,817 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:22,817 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:22,817 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:22,817 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:22,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:22,818 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 10 times [2025-03-17 20:03:22,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:22,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747661666] [2025-03-17 20:03:22,818 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:03:22,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:22,820 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:03:22,821 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:22,821 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:03:22,821 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:22,821 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:22,822 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:22,822 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:22,822 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:22,822 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:22,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:22,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:22,824 INFO L85 PathProgramCache]: Analyzing trace with hash -119863840, now seen corresponding path program 1 times [2025-03-17 20:03:22,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:22,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713254862] [2025-03-17 20:03:22,824 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:22,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:22,828 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:22,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:22,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:22,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:22,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:22,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:22,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713254862] [2025-03-17 20:03:22,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [713254862] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:22,849 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:22,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:22,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545689165] [2025-03-17 20:03:22,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:22,850 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:22,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:22,850 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:22,850 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:22,851 INFO L87 Difference]: Start difference. First operand 20225 states and 29953 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:22,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:22,972 INFO L93 Difference]: Finished difference Result 39937 states and 58369 transitions. [2025-03-17 20:03:22,972 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39937 states and 58369 transitions. [2025-03-17 20:03:23,156 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-03-17 20:03:23,338 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39937 states to 39937 states and 58369 transitions. [2025-03-17 20:03:23,338 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39937 [2025-03-17 20:03:23,376 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39937 [2025-03-17 20:03:23,376 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39937 states and 58369 transitions. [2025-03-17 20:03:23,466 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:23,467 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39937 states and 58369 transitions. [2025-03-17 20:03:23,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39937 states and 58369 transitions. [2025-03-17 20:03:23,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39937 to 39937. [2025-03-17 20:03:23,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39937 states, 39937 states have (on average 1.4615269048751784) internal successors, (58369), 39936 states have internal predecessors, (58369), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:23,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39937 states to 39937 states and 58369 transitions. [2025-03-17 20:03:23,972 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39937 states and 58369 transitions. [2025-03-17 20:03:23,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:23,973 INFO L432 stractBuchiCegarLoop]: Abstraction has 39937 states and 58369 transitions. [2025-03-17 20:03:23,973 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-17 20:03:23,973 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39937 states and 58369 transitions. [2025-03-17 20:03:24,082 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-03-17 20:03:24,082 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:24,082 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:24,083 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:24,083 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:24,083 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:24,083 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:24,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:24,084 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 11 times [2025-03-17 20:03:24,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:24,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691822252] [2025-03-17 20:03:24,084 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:03:24,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:24,086 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:24,087 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:24,088 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:03:24,088 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:24,088 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:24,090 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:24,091 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:24,091 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:24,091 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:24,092 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:24,092 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:24,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1233445857, now seen corresponding path program 1 times [2025-03-17 20:03:24,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:24,092 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099304337] [2025-03-17 20:03:24,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:24,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:24,097 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:24,098 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:24,099 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:24,099 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:24,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:24,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:24,112 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2099304337] [2025-03-17 20:03:24,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2099304337] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:24,112 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:24,112 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 20:03:24,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011727565] [2025-03-17 20:03:24,112 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:24,113 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:24,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:24,113 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:24,113 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:24,113 INFO L87 Difference]: Start difference. First operand 39937 states and 58369 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:24,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:24,260 INFO L93 Difference]: Finished difference Result 78849 states and 113665 transitions. [2025-03-17 20:03:24,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78849 states and 113665 transitions. [2025-03-17 20:03:24,689 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-03-17 20:03:24,825 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78849 states to 78849 states and 113665 transitions. [2025-03-17 20:03:24,825 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78849 [2025-03-17 20:03:24,860 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 78849 [2025-03-17 20:03:24,861 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78849 states and 113665 transitions. [2025-03-17 20:03:24,899 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:24,899 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78849 states and 113665 transitions. [2025-03-17 20:03:24,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78849 states and 113665 transitions. [2025-03-17 20:03:25,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78849 to 78849. [2025-03-17 20:03:25,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78849 states, 78849 states have (on average 1.4415528415071845) internal successors, (113665), 78848 states have internal predecessors, (113665), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:25,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78849 states to 78849 states and 113665 transitions. [2025-03-17 20:03:25,917 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78849 states and 113665 transitions. [2025-03-17 20:03:25,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:25,918 INFO L432 stractBuchiCegarLoop]: Abstraction has 78849 states and 113665 transitions. [2025-03-17 20:03:25,918 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-17 20:03:25,918 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78849 states and 113665 transitions. [2025-03-17 20:03:26,297 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-03-17 20:03:26,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:26,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:26,299 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:26,299 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:26,299 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:26,299 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:26,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:26,300 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 12 times [2025-03-17 20:03:26,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:26,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678296353] [2025-03-17 20:03:26,300 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:03:26,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:26,302 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:26,303 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:26,303 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:03:26,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:26,303 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:26,304 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:26,304 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:26,304 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:26,304 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:26,305 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:26,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:26,306 INFO L85 PathProgramCache]: Analyzing trace with hash 722911680, now seen corresponding path program 1 times [2025-03-17 20:03:26,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:26,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843330513] [2025-03-17 20:03:26,306 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:26,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:26,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:26,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:26,309 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:26,309 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:03:26,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:03:26,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:03:26,319 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843330513] [2025-03-17 20:03:26,319 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1843330513] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:03:26,319 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:03:26,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 20:03:26,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959365051] [2025-03-17 20:03:26,320 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:03:26,320 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:03:26,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:03:26,320 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 20:03:26,320 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 20:03:26,320 INFO L87 Difference]: Start difference. First operand 78849 states and 113665 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 2 states have (on average 15.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:26,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:03:26,567 INFO L93 Difference]: Finished difference Result 155649 states and 221185 transitions. [2025-03-17 20:03:26,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 155649 states and 221185 transitions. [2025-03-17 20:03:27,472 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-03-17 20:03:28,088 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 155649 states to 155649 states and 221185 transitions. [2025-03-17 20:03:28,088 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 155649 [2025-03-17 20:03:28,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 155649 [2025-03-17 20:03:28,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 155649 states and 221185 transitions. [2025-03-17 20:03:28,210 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:03:28,210 INFO L218 hiAutomatonCegarLoop]: Abstraction has 155649 states and 221185 transitions. [2025-03-17 20:03:28,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155649 states and 221185 transitions. [2025-03-17 20:03:29,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155649 to 155649. [2025-03-17 20:03:29,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155649 states, 155649 states have (on average 1.4210499264370475) internal successors, (221185), 155648 states have internal predecessors, (221185), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:03:30,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155649 states to 155649 states and 221185 transitions. [2025-03-17 20:03:30,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155649 states and 221185 transitions. [2025-03-17 20:03:30,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 20:03:30,005 INFO L432 stractBuchiCegarLoop]: Abstraction has 155649 states and 221185 transitions. [2025-03-17 20:03:30,005 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-17 20:03:30,005 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155649 states and 221185 transitions. [2025-03-17 20:03:30,520 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-03-17 20:03:30,520 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:03:30,520 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:03:30,522 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:03:30,522 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:03:30,522 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-17 20:03:30,522 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-17 20:03:30,523 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:30,523 INFO L85 PathProgramCache]: Analyzing trace with hash 169, now seen corresponding path program 13 times [2025-03-17 20:03:30,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:30,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605122087] [2025-03-17 20:03:30,523 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:03:30,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:30,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:30,527 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:30,527 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,527 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,527 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:30,528 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:30,528 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:30,528 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,530 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:30,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:30,530 INFO L85 PathProgramCache]: Analyzing trace with hash -2064503807, now seen corresponding path program 1 times [2025-03-17 20:03:30,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:30,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824328275] [2025-03-17 20:03:30,530 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:30,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:30,532 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:30,534 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:30,534 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,534 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,534 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:30,534 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-17 20:03:30,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-17 20:03:30,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:30,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:03:30,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1035310761, now seen corresponding path program 1 times [2025-03-17 20:03:30,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:03:30,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267223405] [2025-03-17 20:03:30,542 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:03:30,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:03:30,545 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-03-17 20:03:30,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-03-17 20:03:30,547 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,547 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,547 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:30,548 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-03-17 20:03:30,549 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-03-17 20:03:30,549 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:30,549 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:30,555 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:03:31,051 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:31,052 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:31,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:31,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:31,052 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:03:31,057 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:03:31,058 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:03:31,058 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:03:31,058 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:03:31,089 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 17.03 08:03:31 BoogieIcfgContainer [2025-03-17 20:03:31,090 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-17 20:03:31,090 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-17 20:03:31,090 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-17 20:03:31,091 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-17 20:03:31,091 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:03:20" (3/4) ... [2025-03-17 20:03:31,093 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-17 20:03:31,123 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-17 20:03:31,123 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-17 20:03:31,124 INFO L158 Benchmark]: Toolchain (without parser) took 11090.64ms. Allocated memory was 142.6MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 106.9MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 869.3MB. Max. memory is 16.1GB. [2025-03-17 20:03:31,125 INFO L158 Benchmark]: CDTParser took 0.60ms. Allocated memory is still 201.3MB. Free memory is still 115.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:03:31,125 INFO L158 Benchmark]: CACSL2BoogieTranslator took 171.86ms. Allocated memory is still 142.6MB. Free memory was 106.9MB in the beginning and 94.9MB in the end (delta: 12.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-17 20:03:31,125 INFO L158 Benchmark]: Boogie Procedure Inliner took 22.00ms. Allocated memory is still 142.6MB. Free memory was 94.9MB in the beginning and 93.4MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:03:31,125 INFO L158 Benchmark]: Boogie Preprocessor took 23.47ms. Allocated memory is still 142.6MB. Free memory was 93.4MB in the beginning and 92.6MB in the end (delta: 772.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-17 20:03:31,125 INFO L158 Benchmark]: IcfgBuilder took 274.42ms. Allocated memory is still 142.6MB. Free memory was 91.8MB in the beginning and 75.8MB in the end (delta: 16.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-17 20:03:31,126 INFO L158 Benchmark]: BuchiAutomizer took 10561.95ms. Allocated memory was 142.6MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 75.8MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 835.7MB. Max. memory is 16.1GB. [2025-03-17 20:03:31,126 INFO L158 Benchmark]: Witness Printer took 32.83ms. Allocated memory is still 3.3GB. Free memory was 2.4GB in the beginning and 2.4GB in the end (delta: 3.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-17 20:03:31,128 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.60ms. Allocated memory is still 201.3MB. Free memory is still 115.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 171.86ms. Allocated memory is still 142.6MB. Free memory was 106.9MB in the beginning and 94.9MB in the end (delta: 12.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 22.00ms. Allocated memory is still 142.6MB. Free memory was 94.9MB in the beginning and 93.4MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 23.47ms. Allocated memory is still 142.6MB. Free memory was 93.4MB in the beginning and 92.6MB in the end (delta: 772.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 274.42ms. Allocated memory is still 142.6MB. Free memory was 91.8MB in the beginning and 75.8MB in the end (delta: 16.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 10561.95ms. Allocated memory was 142.6MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 75.8MB in the beginning and 2.4GB in the end (delta: -2.3GB). Peak memory consumption was 835.7MB. Max. memory is 16.1GB. * Witness Printer took 32.83ms. Allocated memory is still 3.3GB. Free memory was 2.4GB in the beginning and 2.4GB in the end (delta: 3.5MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 155649 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 10.5s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.1s. Construction of modules took 0.0s. Büchi inclusion checks took 8.0s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 4.1s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.8s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 688 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 688 mSDsluCounter, 2129 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 820 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1309 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 53]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L53] COND TRUE 1 [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 53]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L53] COND TRUE 1 [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-17 20:03:31,143 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)