./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5577528c45849c92d31dcecadbfe6524610e7683d1e420d37b6f0ce59c6c59b8 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 20:50:14,633 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 20:50:14,674 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-17 20:50:14,677 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 20:50:14,678 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 20:50:14,678 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-17 20:50:14,696 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 20:50:14,698 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 20:50:14,698 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 20:50:14,698 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 20:50:14,699 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 20:50:14,699 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 20:50:14,700 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-17 20:50:14,700 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-17 20:50:14,701 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-17 20:50:14,701 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-17 20:50:14,702 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 20:50:14,702 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 20:50:14,702 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 20:50:14,702 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 20:50:14,702 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 20:50:14,702 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 20:50:14,703 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-17 20:50:14,703 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5577528c45849c92d31dcecadbfe6524610e7683d1e420d37b6f0ce59c6c59b8 [2025-03-17 20:50:14,908 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 20:50:14,916 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 20:50:14,917 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 20:50:14,918 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 20:50:14,918 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 20:50:14,919 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i [2025-03-17 20:50:16,003 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7774943a/cb013bc2f2cd4588ab27def855bcfc29/FLAG2d587e22a [2025-03-17 20:50:16,272 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 20:50:16,273 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-3.i [2025-03-17 20:50:16,283 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7774943a/cb013bc2f2cd4588ab27def855bcfc29/FLAG2d587e22a [2025-03-17 20:50:16,562 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7774943a/cb013bc2f2cd4588ab27def855bcfc29 [2025-03-17 20:50:16,564 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 20:50:16,564 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 20:50:16,565 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 20:50:16,565 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 20:50:16,568 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 20:50:16,569 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:50:16" (1/1) ... [2025-03-17 20:50:16,569 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e519300 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:16, skipping insertion in model container [2025-03-17 20:50:16,569 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 08:50:16" (1/1) ... [2025-03-17 20:50:16,598 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 20:50:16,985 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:50:16,995 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 20:50:17,099 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 20:50:17,120 INFO L204 MainTranslator]: Completed translation [2025-03-17 20:50:17,120 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17 WrapperNode [2025-03-17 20:50:17,121 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 20:50:17,121 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 20:50:17,122 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 20:50:17,122 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 20:50:17,125 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,150 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,262 INFO L138 Inliner]: procedures = 177, calls = 606, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3807 [2025-03-17 20:50:17,262 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 20:50:17,263 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 20:50:17,263 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 20:50:17,263 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 20:50:17,271 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,271 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,292 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,403 INFO L175 MemorySlicer]: Split 574 memory accesses to 3 slices as follows [2, 106, 466]. 81 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 102 writes are split as follows [0, 4, 98]. [2025-03-17 20:50:17,403 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,403 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,469 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,476 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,486 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,497 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,516 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 20:50:17,517 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 20:50:17,518 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 20:50:17,518 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 20:50:17,518 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (1/1) ... [2025-03-17 20:50:17,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-17 20:50:17,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 20:50:17,574 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-17 20:50:17,576 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-17 20:50:17,594 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-03-17 20:50:17,596 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-03-17 20:50:17,596 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-03-17 20:50:17,596 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-03-17 20:50:17,596 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-17 20:50:17,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-03-17 20:50:17,598 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 20:50:17,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 20:50:17,812 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 20:50:17,814 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 20:50:20,101 INFO L1322 $ProcedureCfgBuilder]: dead code at ProgramPoint L731: call ULTIMATE.dealloc(main_~#i~0#1.base, main_~#i~0#1.offset);havoc main_~#i~0#1.base, main_~#i~0#1.offset; [2025-03-17 20:50:20,254 INFO L? ?]: Removed 934 outVars from TransFormulas that were not future-live. [2025-03-17 20:50:20,254 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 20:50:20,324 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 20:50:20,324 INFO L336 CfgBuilder]: Removed 2 assume(true) statements. [2025-03-17 20:50:20,324 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:50:20 BoogieIcfgContainer [2025-03-17 20:50:20,324 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 20:50:20,325 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-17 20:50:20,325 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-17 20:50:20,333 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-17 20:50:20,333 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:50:20,333 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.03 08:50:16" (1/3) ... [2025-03-17 20:50:20,334 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4bcc1942 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:50:20, skipping insertion in model container [2025-03-17 20:50:20,335 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:50:20,335 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 08:50:17" (2/3) ... [2025-03-17 20:50:20,335 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4bcc1942 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.03 08:50:20, skipping insertion in model container [2025-03-17 20:50:20,335 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-17 20:50:20,335 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 08:50:20" (3/3) ... [2025-03-17 20:50:20,336 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test10-3.i [2025-03-17 20:50:20,395 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-17 20:50:20,395 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-17 20:50:20,395 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-17 20:50:20,395 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-17 20:50:20,395 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-17 20:50:20,396 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-17 20:50:20,396 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-17 20:50:20,396 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-17 20:50:20,401 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1134 states, 1126 states have (on average 1.625222024866785) internal successors, (1830), 1126 states have internal predecessors, (1830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:20,453 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1035 [2025-03-17 20:50:20,458 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:20,458 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:20,464 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:20,464 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:20,465 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-17 20:50:20,467 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1134 states, 1126 states have (on average 1.625222024866785) internal successors, (1830), 1126 states have internal predecessors, (1830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:20,489 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1035 [2025-03-17 20:50:20,490 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:20,490 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:20,491 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:20,491 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:20,495 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:20,496 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume !true;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:20,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:20,500 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 1 times [2025-03-17 20:50:20,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:20,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865790288] [2025-03-17 20:50:20,505 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:20,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:20,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:20,592 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:20,593 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:20,593 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:20,593 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:20,605 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:20,613 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:20,614 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:20,615 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:20,648 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:20,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:20,651 INFO L85 PathProgramCache]: Analyzing trace with hash 51795152, now seen corresponding path program 1 times [2025-03-17 20:50:20,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:20,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597979186] [2025-03-17 20:50:20,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:20,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:20,663 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-17 20:50:20,666 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-17 20:50:20,667 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:20,667 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:20,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:20,700 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:20,700 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597979186] [2025-03-17 20:50:20,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1597979186] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:20,701 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:20,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 20:50:20,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081913549] [2025-03-17 20:50:20,702 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:20,704 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:20,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:20,727 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-17 20:50:20,727 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-17 20:50:20,732 INFO L87 Difference]: Start difference. First operand has 1134 states, 1126 states have (on average 1.625222024866785) internal successors, (1830), 1126 states have internal predecessors, (1830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:20,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:20,921 INFO L93 Difference]: Finished difference Result 1118 states and 1632 transitions. [2025-03-17 20:50:20,922 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1118 states and 1632 transitions. [2025-03-17 20:50:20,934 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-03-17 20:50:20,948 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1118 states to 1099 states and 1613 transitions. [2025-03-17 20:50:20,949 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1099 [2025-03-17 20:50:20,951 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1099 [2025-03-17 20:50:20,952 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1099 states and 1613 transitions. [2025-03-17 20:50:20,961 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:20,961 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1099 states and 1613 transitions. [2025-03-17 20:50:20,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states and 1613 transitions. [2025-03-17 20:50:21,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 1099. [2025-03-17 20:50:21,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1099 states, 1092 states have (on average 1.466117216117216) internal successors, (1601), 1091 states have internal predecessors, (1601), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:21,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1099 states to 1099 states and 1613 transitions. [2025-03-17 20:50:21,018 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1099 states and 1613 transitions. [2025-03-17 20:50:21,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-17 20:50:21,025 INFO L432 stractBuchiCegarLoop]: Abstraction has 1099 states and 1613 transitions. [2025-03-17 20:50:21,026 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-17 20:50:21,026 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1099 states and 1613 transitions. [2025-03-17 20:50:21,030 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-03-17 20:50:21,030 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:21,031 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:21,032 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:21,032 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:21,033 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:21,034 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem183#1 := read~int#2(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem183#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem184#1 := read~int#2(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem185#1 := read~int#2(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem186#1 := read~int#2(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem187#1 := read~int#2(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem187#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem188#1 := read~int#2(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem188#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem188#1 % 256 % 4294967296 else main_#t~mem188#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:21,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:21,037 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 2 times [2025-03-17 20:50:21,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:21,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714219755] [2025-03-17 20:50:21,037 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:50:21,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:21,058 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:21,063 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:21,064 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:21,064 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:21,065 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:21,074 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:21,079 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:21,080 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:21,080 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:21,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:21,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:21,091 INFO L85 PathProgramCache]: Analyzing trace with hash -231513153, now seen corresponding path program 1 times [2025-03-17 20:50:21,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:21,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285322152] [2025-03-17 20:50:21,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:21,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:21,131 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 75 statements into 1 equivalence classes. [2025-03-17 20:50:21,145 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 75 of 75 statements. [2025-03-17 20:50:21,148 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:21,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:21,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:21,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:21,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285322152] [2025-03-17 20:50:21,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285322152] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:21,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:21,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 20:50:21,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [839242816] [2025-03-17 20:50:21,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:21,499 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:21,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:21,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 20:50:21,499 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 20:50:21,500 INFO L87 Difference]: Start difference. First operand 1099 states and 1613 transitions. cyclomatic complexity: 525 Second operand has 5 states, 5 states have (on average 15.0) internal successors, (75), 5 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:21,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:21,856 INFO L93 Difference]: Finished difference Result 1102 states and 1609 transitions. [2025-03-17 20:50:21,856 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1102 states and 1609 transitions. [2025-03-17 20:50:21,863 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 670 [2025-03-17 20:50:21,871 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1102 states to 1102 states and 1609 transitions. [2025-03-17 20:50:21,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1102 [2025-03-17 20:50:21,874 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1102 [2025-03-17 20:50:21,874 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1102 states and 1609 transitions. [2025-03-17 20:50:21,877 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:21,877 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1102 states and 1609 transitions. [2025-03-17 20:50:21,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states and 1609 transitions. [2025-03-17 20:50:21,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 1099. [2025-03-17 20:50:21,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1099 states, 1092 states have (on average 1.4597069597069596) internal successors, (1594), 1091 states have internal predecessors, (1594), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:21,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1099 states to 1099 states and 1606 transitions. [2025-03-17 20:50:21,897 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1099 states and 1606 transitions. [2025-03-17 20:50:21,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 20:50:21,899 INFO L432 stractBuchiCegarLoop]: Abstraction has 1099 states and 1606 transitions. [2025-03-17 20:50:21,899 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-17 20:50:21,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1099 states and 1606 transitions. [2025-03-17 20:50:21,904 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-03-17 20:50:21,905 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:21,905 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:21,905 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:21,907 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:21,907 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:21,907 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:21,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:21,908 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 3 times [2025-03-17 20:50:21,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:21,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386958720] [2025-03-17 20:50:21,908 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:50:21,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:21,920 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:21,922 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:21,925 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:50:21,925 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:21,925 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:21,932 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:21,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:21,940 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:21,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:21,949 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:21,954 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:21,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1301687173, now seen corresponding path program 1 times [2025-03-17 20:50:21,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:21,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056511333] [2025-03-17 20:50:21,954 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:21,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:21,984 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 75 statements into 1 equivalence classes. [2025-03-17 20:50:22,149 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 75 of 75 statements. [2025-03-17 20:50:22,149 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:22,149 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:22,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:22,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:22,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056511333] [2025-03-17 20:50:22,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1056511333] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:22,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:22,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-17 20:50:22,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14446716] [2025-03-17 20:50:22,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:22,622 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:22,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:22,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 20:50:22,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 20:50:22,623 INFO L87 Difference]: Start difference. First operand 1099 states and 1606 transitions. cyclomatic complexity: 518 Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:23,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:23,520 INFO L93 Difference]: Finished difference Result 1133 states and 1648 transitions. [2025-03-17 20:50:23,520 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1133 states and 1648 transitions. [2025-03-17 20:50:23,526 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 701 [2025-03-17 20:50:23,533 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1133 states to 1133 states and 1648 transitions. [2025-03-17 20:50:23,533 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1133 [2025-03-17 20:50:23,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1133 [2025-03-17 20:50:23,534 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1133 states and 1648 transitions. [2025-03-17 20:50:23,538 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:23,538 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1133 states and 1648 transitions. [2025-03-17 20:50:23,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1133 states and 1648 transitions. [2025-03-17 20:50:23,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1133 to 1129. [2025-03-17 20:50:23,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1129 states, 1122 states have (on average 1.4536541889483066) internal successors, (1631), 1121 states have internal predecessors, (1631), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:23,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1129 states to 1129 states and 1643 transitions. [2025-03-17 20:50:23,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1129 states and 1643 transitions. [2025-03-17 20:50:23,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 20:50:23,557 INFO L432 stractBuchiCegarLoop]: Abstraction has 1129 states and 1643 transitions. [2025-03-17 20:50:23,557 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-17 20:50:23,557 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1129 states and 1643 transitions. [2025-03-17 20:50:23,561 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 697 [2025-03-17 20:50:23,561 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:23,561 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:23,562 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:23,562 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:23,562 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:23,562 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:23,562 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:23,562 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 4 times [2025-03-17 20:50:23,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:23,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833548837] [2025-03-17 20:50:23,563 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:50:23,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:23,572 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:50:23,575 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:23,575 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:50:23,575 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:23,575 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:23,579 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:23,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:23,581 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:23,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:23,589 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:23,589 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:23,590 INFO L85 PathProgramCache]: Analyzing trace with hash -319518842, now seen corresponding path program 1 times [2025-03-17 20:50:23,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:23,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114815034] [2025-03-17 20:50:23,590 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:23,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:23,621 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-03-17 20:50:23,648 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-03-17 20:50:23,651 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:23,651 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:23,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:23,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:23,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114815034] [2025-03-17 20:50:23,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114815034] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:23,927 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:23,927 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-17 20:50:23,927 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20192976] [2025-03-17 20:50:23,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:23,927 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:23,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:23,928 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:50:23,928 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:50:23,928 INFO L87 Difference]: Start difference. First operand 1129 states and 1643 transitions. cyclomatic complexity: 525 Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:24,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:24,748 INFO L93 Difference]: Finished difference Result 1141 states and 1660 transitions. [2025-03-17 20:50:24,748 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1141 states and 1660 transitions. [2025-03-17 20:50:24,753 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 709 [2025-03-17 20:50:24,758 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1141 states to 1141 states and 1660 transitions. [2025-03-17 20:50:24,758 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1141 [2025-03-17 20:50:24,759 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1141 [2025-03-17 20:50:24,759 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1141 states and 1660 transitions. [2025-03-17 20:50:24,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:24,761 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1141 states and 1660 transitions. [2025-03-17 20:50:24,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states and 1660 transitions. [2025-03-17 20:50:24,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 1138. [2025-03-17 20:50:24,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1138 states, 1131 states have (on average 1.453580901856764) internal successors, (1644), 1130 states have internal predecessors, (1644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:24,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 1138 states and 1656 transitions. [2025-03-17 20:50:24,777 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1138 states and 1656 transitions. [2025-03-17 20:50:24,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 20:50:24,778 INFO L432 stractBuchiCegarLoop]: Abstraction has 1138 states and 1656 transitions. [2025-03-17 20:50:24,778 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-17 20:50:24,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1138 states and 1656 transitions. [2025-03-17 20:50:24,782 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 706 [2025-03-17 20:50:24,782 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:24,782 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:24,783 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:24,783 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:24,783 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:24,784 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:24,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:24,784 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 5 times [2025-03-17 20:50:24,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:24,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265412334] [2025-03-17 20:50:24,784 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:50:24,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:24,795 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:24,797 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:24,797 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:24,797 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:24,797 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:24,801 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:24,802 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:24,802 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:24,802 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:24,811 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:24,812 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:24,812 INFO L85 PathProgramCache]: Analyzing trace with hash -1973924638, now seen corresponding path program 1 times [2025-03-17 20:50:24,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:24,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841429587] [2025-03-17 20:50:24,812 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:24,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:24,844 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-03-17 20:50:24,864 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-03-17 20:50:24,864 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:24,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:25,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:25,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:25,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841429587] [2025-03-17 20:50:25,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841429587] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:25,057 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:25,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-17 20:50:25,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580349676] [2025-03-17 20:50:25,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:25,058 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:25,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:25,058 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 20:50:25,058 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-17 20:50:25,058 INFO L87 Difference]: Start difference. First operand 1138 states and 1656 transitions. cyclomatic complexity: 529 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:25,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:25,676 INFO L93 Difference]: Finished difference Result 1141 states and 1659 transitions. [2025-03-17 20:50:25,677 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1141 states and 1659 transitions. [2025-03-17 20:50:25,681 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 709 [2025-03-17 20:50:25,685 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1141 states to 1141 states and 1659 transitions. [2025-03-17 20:50:25,685 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1141 [2025-03-17 20:50:25,686 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1141 [2025-03-17 20:50:25,686 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1141 states and 1659 transitions. [2025-03-17 20:50:25,687 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:25,687 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1141 states and 1659 transitions. [2025-03-17 20:50:25,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states and 1659 transitions. [2025-03-17 20:50:25,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 1141. [2025-03-17 20:50:25,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1141 states, 1134 states have (on average 1.4523809523809523) internal successors, (1647), 1133 states have internal predecessors, (1647), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:25,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1141 states to 1141 states and 1659 transitions. [2025-03-17 20:50:25,700 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1141 states and 1659 transitions. [2025-03-17 20:50:25,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 20:50:25,700 INFO L432 stractBuchiCegarLoop]: Abstraction has 1141 states and 1659 transitions. [2025-03-17 20:50:25,700 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-17 20:50:25,700 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1141 states and 1659 transitions. [2025-03-17 20:50:25,703 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 709 [2025-03-17 20:50:25,703 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:25,703 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:25,704 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:25,704 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:25,704 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:25,704 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:25,705 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:25,705 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 6 times [2025-03-17 20:50:25,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:25,705 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515579472] [2025-03-17 20:50:25,705 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:50:25,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:25,713 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:25,716 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:25,716 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:50:25,717 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:25,717 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:25,720 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:25,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:25,742 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:25,743 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:25,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:25,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:25,750 INFO L85 PathProgramCache]: Analyzing trace with hash -1337262082, now seen corresponding path program 1 times [2025-03-17 20:50:25,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:25,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11385534] [2025-03-17 20:50:25,750 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:25,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:25,772 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-03-17 20:50:25,793 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-03-17 20:50:25,794 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:25,794 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:26,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:26,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:26,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11385534] [2025-03-17 20:50:26,062 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [11385534] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:26,062 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:26,062 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:50:26,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872283666] [2025-03-17 20:50:26,063 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:26,063 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:26,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:26,063 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:50:26,063 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:50:26,064 INFO L87 Difference]: Start difference. First operand 1141 states and 1659 transitions. cyclomatic complexity: 529 Second operand has 9 states, 9 states have (on average 8.555555555555555) internal successors, (77), 9 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:27,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:27,137 INFO L93 Difference]: Finished difference Result 1155 states and 1677 transitions. [2025-03-17 20:50:27,137 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1155 states and 1677 transitions. [2025-03-17 20:50:27,140 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 723 [2025-03-17 20:50:27,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1155 states to 1155 states and 1677 transitions. [2025-03-17 20:50:27,144 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1155 [2025-03-17 20:50:27,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1155 [2025-03-17 20:50:27,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1155 states and 1677 transitions. [2025-03-17 20:50:27,146 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:27,146 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1155 states and 1677 transitions. [2025-03-17 20:50:27,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1155 states and 1677 transitions. [2025-03-17 20:50:27,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1155 to 1149. [2025-03-17 20:50:27,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1149 states, 1142 states have (on average 1.4509632224168125) internal successors, (1657), 1141 states have internal predecessors, (1657), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:27,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1149 states to 1149 states and 1669 transitions. [2025-03-17 20:50:27,159 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1149 states and 1669 transitions. [2025-03-17 20:50:27,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-17 20:50:27,160 INFO L432 stractBuchiCegarLoop]: Abstraction has 1149 states and 1669 transitions. [2025-03-17 20:50:27,160 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-17 20:50:27,160 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1149 states and 1669 transitions. [2025-03-17 20:50:27,162 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 717 [2025-03-17 20:50:27,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:27,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:27,162 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:27,162 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:27,162 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, 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main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:27,163 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:27,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:27,163 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 7 times [2025-03-17 20:50:27,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:27,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139932835] [2025-03-17 20:50:27,163 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:50:27,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:27,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:27,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:27,172 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:27,172 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:27,172 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:27,176 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:27,177 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:27,177 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:27,177 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:27,182 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:27,183 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:27,183 INFO L85 PathProgramCache]: Analyzing trace with hash 1620199720, now seen corresponding path program 1 times [2025-03-17 20:50:27,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:27,183 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191990772] [2025-03-17 20:50:27,183 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:27,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:27,208 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-03-17 20:50:27,290 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-03-17 20:50:27,291 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:27,291 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:27,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:27,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:27,451 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191990772] [2025-03-17 20:50:27,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1191990772] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:27,451 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:27,451 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-17 20:50:27,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [892083467] [2025-03-17 20:50:27,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:27,452 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:27,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:27,452 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:50:27,452 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:50:27,452 INFO L87 Difference]: Start difference. First operand 1149 states and 1669 transitions. cyclomatic complexity: 531 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:28,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:28,252 INFO L93 Difference]: Finished difference Result 1156 states and 1678 transitions. [2025-03-17 20:50:28,252 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1156 states and 1678 transitions. [2025-03-17 20:50:28,255 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 724 [2025-03-17 20:50:28,259 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1156 states to 1156 states and 1678 transitions. [2025-03-17 20:50:28,259 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1156 [2025-03-17 20:50:28,260 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1156 [2025-03-17 20:50:28,260 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1156 states and 1678 transitions. [2025-03-17 20:50:28,261 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:28,261 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1156 states and 1678 transitions. [2025-03-17 20:50:28,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1156 states and 1678 transitions. [2025-03-17 20:50:28,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1156 to 1149. [2025-03-17 20:50:28,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1149 states, 1142 states have (on average 1.4509632224168125) internal successors, (1657), 1141 states have internal predecessors, (1657), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:28,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1149 states to 1149 states and 1669 transitions. [2025-03-17 20:50:28,273 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1149 states and 1669 transitions. [2025-03-17 20:50:28,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 20:50:28,273 INFO L432 stractBuchiCegarLoop]: Abstraction has 1149 states and 1669 transitions. [2025-03-17 20:50:28,273 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-17 20:50:28,274 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1149 states and 1669 transitions. [2025-03-17 20:50:28,275 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 717 [2025-03-17 20:50:28,276 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:28,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:28,276 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:28,276 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:28,276 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, 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main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:28,277 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:28,277 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:28,277 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 8 times [2025-03-17 20:50:28,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:28,277 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549105301] [2025-03-17 20:50:28,277 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:50:28,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:28,284 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:28,286 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:28,286 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:28,286 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:28,286 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:28,289 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:28,290 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:28,290 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:28,290 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:28,295 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:28,296 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:28,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1623159482, now seen corresponding path program 1 times [2025-03-17 20:50:28,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:28,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713455141] [2025-03-17 20:50:28,296 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:28,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:28,320 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-03-17 20:50:28,565 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-03-17 20:50:28,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:28,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:29,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:29,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:29,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713455141] [2025-03-17 20:50:29,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1713455141] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:29,068 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:29,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-17 20:50:29,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633912759] [2025-03-17 20:50:29,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:29,068 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:29,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:29,068 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:50:29,068 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:50:29,068 INFO L87 Difference]: Start difference. First operand 1149 states and 1669 transitions. cyclomatic complexity: 531 Second operand has 13 states, 13 states have (on average 6.0) internal successors, (78), 13 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:31,263 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.06s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-17 20:50:32,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:32,156 INFO L93 Difference]: Finished difference Result 1247 states and 1809 transitions. [2025-03-17 20:50:32,156 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1247 states and 1809 transitions. [2025-03-17 20:50:32,159 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 815 [2025-03-17 20:50:32,162 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1247 states to 1247 states and 1809 transitions. [2025-03-17 20:50:32,162 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1247 [2025-03-17 20:50:32,163 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1247 [2025-03-17 20:50:32,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1247 states and 1809 transitions. [2025-03-17 20:50:32,165 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:32,165 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1247 states and 1809 transitions. [2025-03-17 20:50:32,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1247 states and 1809 transitions. [2025-03-17 20:50:32,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1247 to 1155. [2025-03-17 20:50:32,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1155 states, 1148 states have (on average 1.4503484320557491) internal successors, (1665), 1147 states have internal predecessors, (1665), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:32,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1155 states to 1155 states and 1677 transitions. [2025-03-17 20:50:32,177 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1155 states and 1677 transitions. [2025-03-17 20:50:32,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-17 20:50:32,177 INFO L432 stractBuchiCegarLoop]: Abstraction has 1155 states and 1677 transitions. [2025-03-17 20:50:32,178 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-17 20:50:32,178 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1155 states and 1677 transitions. [2025-03-17 20:50:32,179 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 723 [2025-03-17 20:50:32,179 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:32,179 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:32,180 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:32,180 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:32,180 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, 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main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:32,180 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:32,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:32,181 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 9 times [2025-03-17 20:50:32,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:32,181 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245999849] [2025-03-17 20:50:32,181 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:50:32,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:32,189 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:32,190 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:32,190 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:50:32,190 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:32,190 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:32,194 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:32,195 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:32,195 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:32,195 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:32,200 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:32,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:32,201 INFO L85 PathProgramCache]: Analyzing trace with hash -1335528804, now seen corresponding path program 1 times [2025-03-17 20:50:32,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:32,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952908252] [2025-03-17 20:50:32,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:32,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:32,225 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-03-17 20:50:32,285 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-03-17 20:50:32,285 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:32,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:32,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:32,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:32,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952908252] [2025-03-17 20:50:32,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1952908252] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:32,488 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:32,488 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:50:32,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545674989] [2025-03-17 20:50:32,489 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:32,489 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:32,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:32,490 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:50:32,490 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:50:32,490 INFO L87 Difference]: Start difference. First operand 1155 states and 1677 transitions. cyclomatic complexity: 533 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:33,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:33,723 INFO L93 Difference]: Finished difference Result 1175 states and 1703 transitions. [2025-03-17 20:50:33,723 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1175 states and 1703 transitions. [2025-03-17 20:50:33,727 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 743 [2025-03-17 20:50:33,730 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1175 states to 1175 states and 1703 transitions. [2025-03-17 20:50:33,731 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1175 [2025-03-17 20:50:33,731 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1175 [2025-03-17 20:50:33,731 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1175 states and 1703 transitions. [2025-03-17 20:50:33,733 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:33,733 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1175 states and 1703 transitions. [2025-03-17 20:50:33,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1175 states and 1703 transitions. [2025-03-17 20:50:33,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1175 to 1158. [2025-03-17 20:50:33,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1158 states, 1151 states have (on average 1.4500434404865334) internal successors, (1669), 1150 states have internal predecessors, (1669), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:33,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1158 states to 1158 states and 1681 transitions. [2025-03-17 20:50:33,747 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1158 states and 1681 transitions. [2025-03-17 20:50:33,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:50:33,748 INFO L432 stractBuchiCegarLoop]: Abstraction has 1158 states and 1681 transitions. [2025-03-17 20:50:33,748 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-17 20:50:33,748 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1158 states and 1681 transitions. [2025-03-17 20:50:33,751 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 726 [2025-03-17 20:50:33,751 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:33,751 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:33,751 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:33,751 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:33,752 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:33,752 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:33,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:33,752 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 10 times [2025-03-17 20:50:33,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:33,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241681587] [2025-03-17 20:50:33,753 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:50:33,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:33,764 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:50:33,765 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:33,765 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:50:33,765 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:33,765 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:33,769 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:33,770 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:33,770 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:33,770 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:33,779 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:33,779 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:33,780 INFO L85 PathProgramCache]: Analyzing trace with hash -989184485, now seen corresponding path program 1 times [2025-03-17 20:50:33,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:33,780 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661385724] [2025-03-17 20:50:33,780 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:33,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:33,814 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-03-17 20:50:33,827 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-03-17 20:50:33,827 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:33,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:33,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:33,997 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:33,998 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661385724] [2025-03-17 20:50:33,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1661385724] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:33,998 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:33,998 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:50:33,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517938879] [2025-03-17 20:50:33,998 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:33,998 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:33,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:33,998 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:50:33,998 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:50:33,998 INFO L87 Difference]: Start difference. First operand 1158 states and 1681 transitions. cyclomatic complexity: 534 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:34,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:34,839 INFO L93 Difference]: Finished difference Result 1171 states and 1697 transitions. [2025-03-17 20:50:34,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1171 states and 1697 transitions. [2025-03-17 20:50:34,842 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 739 [2025-03-17 20:50:34,845 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1171 states to 1171 states and 1697 transitions. [2025-03-17 20:50:34,845 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1171 [2025-03-17 20:50:34,846 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1171 [2025-03-17 20:50:34,846 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1171 states and 1697 transitions. [2025-03-17 20:50:34,847 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:34,847 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1171 states and 1697 transitions. [2025-03-17 20:50:34,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1171 states and 1697 transitions. [2025-03-17 20:50:34,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1171 to 1158. [2025-03-17 20:50:34,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1158 states, 1151 states have (on average 1.4500434404865334) internal successors, (1669), 1150 states have internal predecessors, (1669), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:34,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1158 states to 1158 states and 1681 transitions. [2025-03-17 20:50:34,858 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1158 states and 1681 transitions. [2025-03-17 20:50:34,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-17 20:50:34,859 INFO L432 stractBuchiCegarLoop]: Abstraction has 1158 states and 1681 transitions. [2025-03-17 20:50:34,859 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-17 20:50:34,859 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1158 states and 1681 transitions. [2025-03-17 20:50:34,862 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 726 [2025-03-17 20:50:34,862 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:34,862 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:34,863 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:34,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:34,863 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:34,864 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:34,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:34,864 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 11 times [2025-03-17 20:50:34,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:34,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659333140] [2025-03-17 20:50:34,864 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:50:34,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:34,872 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:34,873 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:34,873 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:34,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:34,874 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:34,877 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:34,878 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:34,878 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:34,878 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:34,884 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:34,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:34,884 INFO L85 PathProgramCache]: Analyzing trace with hash -427984196, now seen corresponding path program 1 times [2025-03-17 20:50:34,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:34,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20054810] [2025-03-17 20:50:34,884 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:34,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:34,908 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-03-17 20:50:34,997 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-03-17 20:50:34,997 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:34,997 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:35,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:35,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:35,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20054810] [2025-03-17 20:50:35,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [20054810] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:35,338 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:35,338 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-17 20:50:35,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458995766] [2025-03-17 20:50:35,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:35,338 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:35,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:35,338 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:50:35,339 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:50:35,339 INFO L87 Difference]: Start difference. First operand 1158 states and 1681 transitions. cyclomatic complexity: 534 Second operand has 13 states, 13 states have (on average 6.076923076923077) internal successors, (79), 13 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:36,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:36,876 INFO L93 Difference]: Finished difference Result 1252 states and 1815 transitions. [2025-03-17 20:50:36,876 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1252 states and 1815 transitions. [2025-03-17 20:50:36,879 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 820 [2025-03-17 20:50:36,883 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1252 states to 1252 states and 1815 transitions. [2025-03-17 20:50:36,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1252 [2025-03-17 20:50:36,884 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1252 [2025-03-17 20:50:36,884 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1252 states and 1815 transitions. [2025-03-17 20:50:36,885 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:36,885 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1252 states and 1815 transitions. [2025-03-17 20:50:36,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1252 states and 1815 transitions. [2025-03-17 20:50:36,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1252 to 1159. [2025-03-17 20:50:36,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1159 states, 1152 states have (on average 1.4505208333333333) internal successors, (1671), 1151 states have internal predecessors, (1671), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:36,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1159 states to 1159 states and 1683 transitions. [2025-03-17 20:50:36,895 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1159 states and 1683 transitions. [2025-03-17 20:50:36,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-17 20:50:36,898 INFO L432 stractBuchiCegarLoop]: Abstraction has 1159 states and 1683 transitions. [2025-03-17 20:50:36,898 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-17 20:50:36,898 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1159 states and 1683 transitions. [2025-03-17 20:50:36,900 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 727 [2025-03-17 20:50:36,900 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:36,900 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:36,901 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:36,901 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:36,901 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:36,902 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:36,902 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:36,902 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 12 times [2025-03-17 20:50:36,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:36,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622125057] [2025-03-17 20:50:36,902 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:50:36,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:36,911 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:36,912 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:36,912 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:50:36,912 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:36,912 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:36,915 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:36,916 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:36,916 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:36,916 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:36,922 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:36,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:36,922 INFO L85 PathProgramCache]: Analyzing trace with hash 1253000661, now seen corresponding path program 1 times [2025-03-17 20:50:36,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:36,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188578196] [2025-03-17 20:50:36,922 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:36,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:36,967 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-03-17 20:50:37,024 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-03-17 20:50:37,025 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:37,025 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:37,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:37,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:37,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188578196] [2025-03-17 20:50:37,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1188578196] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:37,503 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:37,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:50:37,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378497134] [2025-03-17 20:50:37,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:37,503 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:37,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:37,503 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:50:37,503 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:50:37,503 INFO L87 Difference]: Start difference. First operand 1159 states and 1683 transitions. cyclomatic complexity: 535 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:38,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:38,240 INFO L93 Difference]: Finished difference Result 1154 states and 1675 transitions. [2025-03-17 20:50:38,240 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1154 states and 1675 transitions. [2025-03-17 20:50:38,243 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 722 [2025-03-17 20:50:38,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1154 states to 1154 states and 1675 transitions. [2025-03-17 20:50:38,247 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1154 [2025-03-17 20:50:38,247 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1154 [2025-03-17 20:50:38,247 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1154 states and 1675 transitions. [2025-03-17 20:50:38,248 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:38,248 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1154 states and 1675 transitions. [2025-03-17 20:50:38,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1154 states and 1675 transitions. [2025-03-17 20:50:38,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1154 to 1152. [2025-03-17 20:50:38,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1152 states, 1145 states have (on average 1.4497816593886463) internal successors, (1660), 1144 states have internal predecessors, (1660), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:38,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1152 states to 1152 states and 1672 transitions. [2025-03-17 20:50:38,258 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1152 states and 1672 transitions. [2025-03-17 20:50:38,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-17 20:50:38,260 INFO L432 stractBuchiCegarLoop]: Abstraction has 1152 states and 1672 transitions. [2025-03-17 20:50:38,260 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-17 20:50:38,260 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1152 states and 1672 transitions. [2025-03-17 20:50:38,262 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 720 [2025-03-17 20:50:38,262 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:38,263 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:38,263 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:38,263 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:38,263 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:38,263 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:38,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:38,263 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 13 times [2025-03-17 20:50:38,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:38,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897713112] [2025-03-17 20:50:38,264 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:50:38,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:38,273 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:38,275 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:38,275 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:38,275 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:38,275 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:38,278 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:38,278 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:38,279 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:38,279 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:38,285 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:38,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:38,286 INFO L85 PathProgramCache]: Analyzing trace with hash -325012830, now seen corresponding path program 1 times [2025-03-17 20:50:38,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:38,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51730881] [2025-03-17 20:50:38,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:38,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:38,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:38,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:38,321 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:38,321 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:38,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:38,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:38,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51730881] [2025-03-17 20:50:38,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [51730881] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:38,522 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:38,522 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-17 20:50:38,522 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646236679] [2025-03-17 20:50:38,522 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:38,522 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:38,522 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:38,523 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 20:50:38,523 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-17 20:50:38,523 INFO L87 Difference]: Start difference. First operand 1152 states and 1672 transitions. cyclomatic complexity: 531 Second operand has 10 states, 10 states have (on average 8.0) internal successors, (80), 10 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:39,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:39,630 INFO L93 Difference]: Finished difference Result 1168 states and 1693 transitions. [2025-03-17 20:50:39,630 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1168 states and 1693 transitions. [2025-03-17 20:50:39,633 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 736 [2025-03-17 20:50:39,636 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1168 states to 1168 states and 1693 transitions. [2025-03-17 20:50:39,636 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1168 [2025-03-17 20:50:39,637 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1168 [2025-03-17 20:50:39,637 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1168 states and 1693 transitions. [2025-03-17 20:50:39,638 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:39,638 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1168 states and 1693 transitions. [2025-03-17 20:50:39,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1168 states and 1693 transitions. [2025-03-17 20:50:39,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1168 to 1162. [2025-03-17 20:50:39,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1162 states, 1155 states have (on average 1.4476190476190476) internal successors, (1672), 1154 states have internal predecessors, (1672), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:39,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1162 states to 1162 states and 1684 transitions. [2025-03-17 20:50:39,647 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1162 states and 1684 transitions. [2025-03-17 20:50:39,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:50:39,649 INFO L432 stractBuchiCegarLoop]: Abstraction has 1162 states and 1684 transitions. [2025-03-17 20:50:39,649 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-17 20:50:39,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1162 states and 1684 transitions. [2025-03-17 20:50:39,651 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 730 [2025-03-17 20:50:39,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:39,651 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:39,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:39,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:39,652 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:39,652 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:39,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:39,652 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 14 times [2025-03-17 20:50:39,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:39,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429894381] [2025-03-17 20:50:39,653 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:50:39,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:39,660 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:39,662 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:39,662 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:39,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:39,662 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:39,665 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:39,666 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:39,666 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:39,666 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:39,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:39,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:39,674 INFO L85 PathProgramCache]: Analyzing trace with hash 372579155, now seen corresponding path program 1 times [2025-03-17 20:50:39,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:39,675 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241211734] [2025-03-17 20:50:39,675 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:39,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:39,697 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:39,772 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:39,772 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:39,772 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:40,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:40,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:40,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241211734] [2025-03-17 20:50:40,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241211734] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:40,113 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:40,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:50:40,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15034885] [2025-03-17 20:50:40,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:40,114 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:40,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:40,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:50:40,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:50:40,114 INFO L87 Difference]: Start difference. First operand 1162 states and 1684 transitions. cyclomatic complexity: 533 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:41,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:41,412 INFO L93 Difference]: Finished difference Result 1173 states and 1697 transitions. [2025-03-17 20:50:41,412 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1173 states and 1697 transitions. [2025-03-17 20:50:41,415 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 741 [2025-03-17 20:50:41,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1173 states to 1173 states and 1697 transitions. [2025-03-17 20:50:41,418 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1173 [2025-03-17 20:50:41,418 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1173 [2025-03-17 20:50:41,418 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1173 states and 1697 transitions. [2025-03-17 20:50:41,419 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:41,419 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1173 states and 1697 transitions. [2025-03-17 20:50:41,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1173 states and 1697 transitions. [2025-03-17 20:50:41,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1173 to 1165. [2025-03-17 20:50:41,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1165 states, 1158 states have (on average 1.4464594127806563) internal successors, (1675), 1157 states have internal predecessors, (1675), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:41,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1165 states to 1165 states and 1687 transitions. [2025-03-17 20:50:41,429 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1165 states and 1687 transitions. [2025-03-17 20:50:41,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:50:41,430 INFO L432 stractBuchiCegarLoop]: Abstraction has 1165 states and 1687 transitions. [2025-03-17 20:50:41,430 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-17 20:50:41,430 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1165 states and 1687 transitions. [2025-03-17 20:50:41,432 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 733 [2025-03-17 20:50:41,432 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:41,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:41,432 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:41,432 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:41,433 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:41,433 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:41,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:41,433 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 15 times [2025-03-17 20:50:41,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:41,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564553672] [2025-03-17 20:50:41,434 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:50:41,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:41,441 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:41,442 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:41,442 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:50:41,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:41,442 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:41,445 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:41,446 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:41,446 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:41,446 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:41,451 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:41,451 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:41,451 INFO L85 PathProgramCache]: Analyzing trace with hash 1113464727, now seen corresponding path program 1 times [2025-03-17 20:50:41,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:41,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708135569] [2025-03-17 20:50:41,452 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:41,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:41,474 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:41,570 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:41,571 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:41,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:41,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:41,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:41,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [708135569] [2025-03-17 20:50:41,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [708135569] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:41,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:41,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-17 20:50:41,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34133600] [2025-03-17 20:50:41,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:41,953 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:41,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:41,953 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:50:41,953 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:50:41,953 INFO L87 Difference]: Start difference. First operand 1165 states and 1687 transitions. cyclomatic complexity: 533 Second operand has 13 states, 13 states have (on average 6.153846153846154) internal successors, (80), 13 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:43,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:43,010 INFO L93 Difference]: Finished difference Result 1220 states and 1768 transitions. [2025-03-17 20:50:43,011 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1220 states and 1768 transitions. [2025-03-17 20:50:43,014 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 788 [2025-03-17 20:50:43,017 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1220 states to 1220 states and 1768 transitions. [2025-03-17 20:50:43,017 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1220 [2025-03-17 20:50:43,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1220 [2025-03-17 20:50:43,018 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1220 states and 1768 transitions. [2025-03-17 20:50:43,018 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:43,018 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1220 states and 1768 transitions. [2025-03-17 20:50:43,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1220 states and 1768 transitions. [2025-03-17 20:50:43,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1220 to 1173. [2025-03-17 20:50:43,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1173 states, 1166 states have (on average 1.4459691252144082) internal successors, (1686), 1165 states have internal predecessors, (1686), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:43,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1173 states to 1173 states and 1698 transitions. [2025-03-17 20:50:43,029 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1173 states and 1698 transitions. [2025-03-17 20:50:43,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-17 20:50:43,030 INFO L432 stractBuchiCegarLoop]: Abstraction has 1173 states and 1698 transitions. [2025-03-17 20:50:43,030 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-17 20:50:43,030 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1173 states and 1698 transitions. [2025-03-17 20:50:43,032 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 741 [2025-03-17 20:50:43,032 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:43,032 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:43,032 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:43,032 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:43,032 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:43,033 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:43,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:43,034 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 16 times [2025-03-17 20:50:43,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:43,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797285501] [2025-03-17 20:50:43,034 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:50:43,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:43,044 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:50:43,045 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:43,045 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:50:43,045 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:43,045 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:43,049 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:43,050 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:43,050 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:43,050 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:43,056 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:43,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:43,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1823215169, now seen corresponding path program 1 times [2025-03-17 20:50:43,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:43,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592520493] [2025-03-17 20:50:43,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:43,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:43,080 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:43,106 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:43,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:43,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:43,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:43,305 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:43,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592520493] [2025-03-17 20:50:43,305 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [592520493] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:43,305 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:43,305 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-17 20:50:43,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728277846] [2025-03-17 20:50:43,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:43,305 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:43,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:43,306 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 20:50:43,306 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-03-17 20:50:43,306 INFO L87 Difference]: Start difference. First operand 1173 states and 1698 transitions. cyclomatic complexity: 536 Second operand has 10 states, 10 states have (on average 8.0) internal successors, (80), 10 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:44,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:44,408 INFO L93 Difference]: Finished difference Result 1188 states and 1719 transitions. [2025-03-17 20:50:44,408 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1188 states and 1719 transitions. [2025-03-17 20:50:44,440 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 756 [2025-03-17 20:50:44,443 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1188 states to 1188 states and 1719 transitions. [2025-03-17 20:50:44,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1188 [2025-03-17 20:50:44,444 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1188 [2025-03-17 20:50:44,444 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1188 states and 1719 transitions. [2025-03-17 20:50:44,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:44,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1188 states and 1719 transitions. [2025-03-17 20:50:44,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states and 1719 transitions. [2025-03-17 20:50:44,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1173. [2025-03-17 20:50:44,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1173 states, 1166 states have (on average 1.4459691252144082) internal successors, (1686), 1165 states have internal predecessors, (1686), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:44,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1173 states to 1173 states and 1698 transitions. [2025-03-17 20:50:44,454 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1173 states and 1698 transitions. [2025-03-17 20:50:44,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:50:44,455 INFO L432 stractBuchiCegarLoop]: Abstraction has 1173 states and 1698 transitions. [2025-03-17 20:50:44,455 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-17 20:50:44,455 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1173 states and 1698 transitions. [2025-03-17 20:50:44,457 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 741 [2025-03-17 20:50:44,457 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:44,457 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:44,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:44,457 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:44,458 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:44,458 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:44,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:44,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 17 times [2025-03-17 20:50:44,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:44,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547210636] [2025-03-17 20:50:44,459 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:50:44,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:44,466 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:44,467 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:44,467 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:44,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:44,467 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:44,471 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:44,471 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:44,471 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:44,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:44,479 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:44,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:44,479 INFO L85 PathProgramCache]: Analyzing trace with hash -189382431, now seen corresponding path program 1 times [2025-03-17 20:50:44,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:44,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338303371] [2025-03-17 20:50:44,479 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:44,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:44,512 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:44,618 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:44,618 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:44,618 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:44,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:44,830 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:44,830 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338303371] [2025-03-17 20:50:44,831 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1338303371] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:44,831 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:44,831 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-17 20:50:44,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037913417] [2025-03-17 20:50:44,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:44,831 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:44,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:44,831 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:50:44,831 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:50:44,831 INFO L87 Difference]: Start difference. First operand 1173 states and 1698 transitions. cyclomatic complexity: 536 Second operand has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:45,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:45,497 INFO L93 Difference]: Finished difference Result 1180 states and 1705 transitions. [2025-03-17 20:50:45,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1180 states and 1705 transitions. [2025-03-17 20:50:45,500 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 748 [2025-03-17 20:50:45,503 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1180 states to 1180 states and 1705 transitions. [2025-03-17 20:50:45,503 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1180 [2025-03-17 20:50:45,503 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1180 [2025-03-17 20:50:45,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1180 states and 1705 transitions. [2025-03-17 20:50:45,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:45,504 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1180 states and 1705 transitions. [2025-03-17 20:50:45,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1180 states and 1705 transitions. [2025-03-17 20:50:45,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1180 to 1173. [2025-03-17 20:50:45,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1173 states, 1166 states have (on average 1.4451114922813035) internal successors, (1685), 1165 states have internal predecessors, (1685), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:45,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1173 states to 1173 states and 1697 transitions. [2025-03-17 20:50:45,512 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1173 states and 1697 transitions. [2025-03-17 20:50:45,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 20:50:45,513 INFO L432 stractBuchiCegarLoop]: Abstraction has 1173 states and 1697 transitions. [2025-03-17 20:50:45,513 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-17 20:50:45,513 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1173 states and 1697 transitions. [2025-03-17 20:50:45,515 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 741 [2025-03-17 20:50:45,515 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:45,515 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:45,516 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:45,516 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:45,516 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:45,516 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:45,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:45,517 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 18 times [2025-03-17 20:50:45,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:45,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210070719] [2025-03-17 20:50:45,517 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:50:45,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:45,524 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:45,525 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:45,525 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:50:45,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:45,525 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:45,528 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:45,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:45,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:45,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:45,534 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:45,534 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:45,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1162918875, now seen corresponding path program 1 times [2025-03-17 20:50:45,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:45,534 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438605201] [2025-03-17 20:50:45,534 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:45,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:45,557 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-17 20:50:45,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-17 20:50:45,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:45,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:45,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:45,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:45,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438605201] [2025-03-17 20:50:45,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1438605201] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:45,751 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:45,751 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-17 20:50:45,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012944175] [2025-03-17 20:50:45,752 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:45,752 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:45,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:45,752 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 20:50:45,752 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-17 20:50:45,752 INFO L87 Difference]: Start difference. First operand 1173 states and 1697 transitions. cyclomatic complexity: 535 Second operand has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:46,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:46,598 INFO L93 Difference]: Finished difference Result 1178 states and 1703 transitions. [2025-03-17 20:50:46,598 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1178 states and 1703 transitions. [2025-03-17 20:50:46,600 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 746 [2025-03-17 20:50:46,603 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1178 states to 1178 states and 1703 transitions. [2025-03-17 20:50:46,603 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1178 [2025-03-17 20:50:46,604 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1178 [2025-03-17 20:50:46,604 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1178 states and 1703 transitions. [2025-03-17 20:50:46,604 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:46,604 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1178 states and 1703 transitions. [2025-03-17 20:50:46,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1178 states and 1703 transitions. [2025-03-17 20:50:46,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1178 to 1177. [2025-03-17 20:50:46,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1177 states, 1170 states have (on average 1.4444444444444444) internal successors, (1690), 1169 states have internal predecessors, (1690), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:46,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1177 states to 1177 states and 1702 transitions. [2025-03-17 20:50:46,612 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1177 states and 1702 transitions. [2025-03-17 20:50:46,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 20:50:46,613 INFO L432 stractBuchiCegarLoop]: Abstraction has 1177 states and 1702 transitions. [2025-03-17 20:50:46,613 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-17 20:50:46,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1177 states and 1702 transitions. [2025-03-17 20:50:46,615 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 745 [2025-03-17 20:50:46,615 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:46,615 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:46,615 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:46,615 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:46,616 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:46,616 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:46,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:46,616 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 19 times [2025-03-17 20:50:46,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:46,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997760909] [2025-03-17 20:50:46,617 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:50:46,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:46,625 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:46,626 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:46,626 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:46,626 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:46,626 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:46,629 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:46,629 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:46,629 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:46,629 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:46,635 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:46,635 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:46,635 INFO L85 PathProgramCache]: Analyzing trace with hash -630031656, now seen corresponding path program 1 times [2025-03-17 20:50:46,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:46,636 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262962108] [2025-03-17 20:50:46,636 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:46,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:46,656 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:50:46,775 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:50:46,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:46,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:47,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:47,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:47,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262962108] [2025-03-17 20:50:47,239 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [262962108] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:47,239 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:47,239 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-03-17 20:50:47,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675779114] [2025-03-17 20:50:47,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:47,239 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:47,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:47,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-03-17 20:50:47,239 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2025-03-17 20:50:47,239 INFO L87 Difference]: Start difference. First operand 1177 states and 1702 transitions. cyclomatic complexity: 536 Second operand has 18 states, 18 states have (on average 4.5) internal successors, (81), 18 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:50:49,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:50:49,879 INFO L93 Difference]: Finished difference Result 1289 states and 1863 transitions. [2025-03-17 20:50:49,879 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1289 states and 1863 transitions. [2025-03-17 20:50:49,882 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 857 [2025-03-17 20:50:49,885 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1289 states to 1289 states and 1863 transitions. [2025-03-17 20:50:49,885 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1289 [2025-03-17 20:50:49,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1289 [2025-03-17 20:50:49,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1289 states and 1863 transitions. [2025-03-17 20:50:49,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:50:49,887 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1289 states and 1863 transitions. [2025-03-17 20:50:49,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1289 states and 1863 transitions. [2025-03-17 20:50:49,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1289 to 1190. [2025-03-17 20:50:49,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1190 states, 1183 states have (on average 1.4437869822485208) internal successors, (1708), 1182 states have internal predecessors, (1708), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:50:49,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1190 states to 1190 states and 1720 transitions. [2025-03-17 20:50:49,895 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1190 states and 1720 transitions. [2025-03-17 20:50:49,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-03-17 20:50:49,896 INFO L432 stractBuchiCegarLoop]: Abstraction has 1190 states and 1720 transitions. [2025-03-17 20:50:49,896 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-17 20:50:49,896 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1190 states and 1720 transitions. [2025-03-17 20:50:49,898 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 758 [2025-03-17 20:50:49,898 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:50:49,898 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:50:49,899 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:50:49,899 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:50:49,899 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:50:49,899 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:50:49,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:49,899 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 20 times [2025-03-17 20:50:49,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:49,899 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268725390] [2025-03-17 20:50:49,900 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:50:49,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:49,907 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:49,908 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:49,909 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:50:49,909 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:49,909 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:50:49,911 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:50:49,912 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:50:49,912 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:49,912 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:50:49,917 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:50:49,918 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:50:49,918 INFO L85 PathProgramCache]: Analyzing trace with hash 432603302, now seen corresponding path program 1 times [2025-03-17 20:50:49,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:50:49,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843088098] [2025-03-17 20:50:49,918 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:50:49,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:50:49,940 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:50:50,005 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:50:50,005 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:50:50,005 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:50:50,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:50:50,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:50:50,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843088098] [2025-03-17 20:50:50,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1843088098] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:50:50,151 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:50:50,151 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-17 20:50:50,151 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [796006841] [2025-03-17 20:50:50,152 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:50:50,152 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:50:50,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:50:50,152 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-17 20:50:50,152 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-03-17 20:50:50,153 INFO L87 Difference]: Start difference. First operand 1190 states and 1720 transitions. cyclomatic complexity: 541 Second operand has 8 states, 8 states have (on average 10.125) internal successors, (81), 8 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:02,659 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-17 20:51:03,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:03,102 INFO L93 Difference]: Finished difference Result 1286 states and 1856 transitions. [2025-03-17 20:51:03,102 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1286 states and 1856 transitions. [2025-03-17 20:51:03,104 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 854 [2025-03-17 20:51:03,107 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1286 states to 1286 states and 1856 transitions. [2025-03-17 20:51:03,107 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1286 [2025-03-17 20:51:03,107 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1286 [2025-03-17 20:51:03,107 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1286 states and 1856 transitions. [2025-03-17 20:51:03,108 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:03,108 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1286 states and 1856 transitions. [2025-03-17 20:51:03,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1286 states and 1856 transitions. [2025-03-17 20:51:03,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1286 to 1192. [2025-03-17 20:51:03,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1192 states, 1185 states have (on average 1.4438818565400844) internal successors, (1711), 1184 states have internal predecessors, (1711), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:03,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 1723 transitions. [2025-03-17 20:51:03,116 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1192 states and 1723 transitions. [2025-03-17 20:51:03,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-17 20:51:03,117 INFO L432 stractBuchiCegarLoop]: Abstraction has 1192 states and 1723 transitions. [2025-03-17 20:51:03,117 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-03-17 20:51:03,117 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1192 states and 1723 transitions. [2025-03-17 20:51:03,119 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 760 [2025-03-17 20:51:03,119 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:03,119 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:03,119 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:03,119 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:03,119 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:03,120 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:03,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:03,120 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 21 times [2025-03-17 20:51:03,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:03,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662900838] [2025-03-17 20:51:03,120 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-17 20:51:03,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:03,128 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:03,129 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:03,129 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-17 20:51:03,129 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:03,129 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:03,132 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:03,132 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:03,132 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:03,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:03,138 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:03,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:03,138 INFO L85 PathProgramCache]: Analyzing trace with hash -780546711, now seen corresponding path program 1 times [2025-03-17 20:51:03,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:03,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395645034] [2025-03-17 20:51:03,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:03,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:03,163 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:03,434 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:03,441 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:03,441 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:03,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:51:03,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:51:03,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395645034] [2025-03-17 20:51:03,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395645034] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:51:03,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:51:03,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-17 20:51:03,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459537162] [2025-03-17 20:51:03,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:51:03,740 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:51:03,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:51:03,740 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 20:51:03,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-17 20:51:03,741 INFO L87 Difference]: Start difference. First operand 1192 states and 1723 transitions. cyclomatic complexity: 542 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:16,274 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-17 20:51:17,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:17,624 INFO L93 Difference]: Finished difference Result 1204 states and 1740 transitions. [2025-03-17 20:51:17,624 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1204 states and 1740 transitions. [2025-03-17 20:51:17,626 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 772 [2025-03-17 20:51:17,631 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1204 states to 1204 states and 1740 transitions. [2025-03-17 20:51:17,631 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1204 [2025-03-17 20:51:17,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1204 [2025-03-17 20:51:17,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1204 states and 1740 transitions. [2025-03-17 20:51:17,633 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:17,633 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1204 states and 1740 transitions. [2025-03-17 20:51:17,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1204 states and 1740 transitions. [2025-03-17 20:51:17,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1204 to 1196. [2025-03-17 20:51:17,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1196 states, 1189 states have (on average 1.4432296047098403) internal successors, (1716), 1188 states have internal predecessors, (1716), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:17,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1196 states to 1196 states and 1728 transitions. [2025-03-17 20:51:17,641 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1196 states and 1728 transitions. [2025-03-17 20:51:17,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:51:17,642 INFO L432 stractBuchiCegarLoop]: Abstraction has 1196 states and 1728 transitions. [2025-03-17 20:51:17,644 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-03-17 20:51:17,644 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1196 states and 1728 transitions. [2025-03-17 20:51:17,646 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 764 [2025-03-17 20:51:17,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:17,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:17,646 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:17,647 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:17,647 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:17,647 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:17,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:17,647 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 22 times [2025-03-17 20:51:17,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:17,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762803160] [2025-03-17 20:51:17,648 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-17 20:51:17,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:17,657 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-17 20:51:17,658 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:17,658 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-17 20:51:17,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:17,658 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:17,661 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:17,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:17,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:17,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:17,668 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:17,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:17,669 INFO L85 PathProgramCache]: Analyzing trace with hash -1712859329, now seen corresponding path program 1 times [2025-03-17 20:51:17,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:17,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456971995] [2025-03-17 20:51:17,670 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:17,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:17,693 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:17,761 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:17,761 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:17,761 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:17,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:51:17,965 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:51:17,965 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [456971995] [2025-03-17 20:51:17,965 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [456971995] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:51:17,965 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:51:17,965 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 20:51:17,965 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366881182] [2025-03-17 20:51:17,965 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:51:17,965 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:51:17,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:51:17,965 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 20:51:17,965 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-17 20:51:17,966 INFO L87 Difference]: Start difference. First operand 1196 states and 1728 transitions. cyclomatic complexity: 543 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:20,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:20,295 INFO L93 Difference]: Finished difference Result 1210 states and 1746 transitions. [2025-03-17 20:51:20,296 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1210 states and 1746 transitions. [2025-03-17 20:51:20,298 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 778 [2025-03-17 20:51:20,300 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1210 states to 1210 states and 1746 transitions. [2025-03-17 20:51:20,301 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1210 [2025-03-17 20:51:20,301 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1210 [2025-03-17 20:51:20,301 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1210 states and 1746 transitions. [2025-03-17 20:51:20,302 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:20,302 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1210 states and 1746 transitions. [2025-03-17 20:51:20,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1210 states and 1746 transitions. [2025-03-17 20:51:20,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1210 to 1199. [2025-03-17 20:51:20,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1199 states, 1192 states have (on average 1.4429530201342282) internal successors, (1720), 1191 states have internal predecessors, (1720), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:20,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1199 states to 1199 states and 1732 transitions. [2025-03-17 20:51:20,312 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1199 states and 1732 transitions. [2025-03-17 20:51:20,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:51:20,313 INFO L432 stractBuchiCegarLoop]: Abstraction has 1199 states and 1732 transitions. [2025-03-17 20:51:20,313 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-03-17 20:51:20,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1199 states and 1732 transitions. [2025-03-17 20:51:20,315 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 767 [2025-03-17 20:51:20,315 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:20,315 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:20,316 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:20,316 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:20,316 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:20,316 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:20,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:20,317 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 23 times [2025-03-17 20:51:20,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:20,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136606777] [2025-03-17 20:51:20,317 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-17 20:51:20,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:20,326 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:20,328 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:20,328 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:51:20,328 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:20,328 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:20,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:20,336 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:20,337 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:20,337 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:20,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:20,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:20,343 INFO L85 PathProgramCache]: Analyzing trace with hash 951347583, now seen corresponding path program 1 times [2025-03-17 20:51:20,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:20,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301058765] [2025-03-17 20:51:20,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:20,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:20,367 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:20,433 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:20,434 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:20,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:20,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:51:20,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:51:20,884 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301058765] [2025-03-17 20:51:20,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301058765] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:51:20,884 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:51:20,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-17 20:51:20,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646936774] [2025-03-17 20:51:20,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:51:20,884 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:51:20,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:51:20,884 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 20:51:20,885 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-17 20:51:20,885 INFO L87 Difference]: Start difference. First operand 1199 states and 1732 transitions. cyclomatic complexity: 544 Second operand has 13 states, 13 states have (on average 6.230769230769231) internal successors, (81), 13 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:22,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:22,815 INFO L93 Difference]: Finished difference Result 1212 states and 1749 transitions. [2025-03-17 20:51:22,815 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1212 states and 1749 transitions. [2025-03-17 20:51:22,818 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 780 [2025-03-17 20:51:22,820 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1212 states to 1212 states and 1749 transitions. [2025-03-17 20:51:22,820 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1212 [2025-03-17 20:51:22,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1212 [2025-03-17 20:51:22,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1212 states and 1749 transitions. [2025-03-17 20:51:22,821 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:22,821 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1212 states and 1749 transitions. [2025-03-17 20:51:22,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1212 states and 1749 transitions. [2025-03-17 20:51:22,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1212 to 1206. [2025-03-17 20:51:22,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1206 states, 1199 states have (on average 1.4428690575479566) internal successors, (1730), 1198 states have internal predecessors, (1730), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:22,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1206 states to 1206 states and 1742 transitions. [2025-03-17 20:51:22,829 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1206 states and 1742 transitions. [2025-03-17 20:51:22,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-17 20:51:22,830 INFO L432 stractBuchiCegarLoop]: Abstraction has 1206 states and 1742 transitions. [2025-03-17 20:51:22,830 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-03-17 20:51:22,830 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1206 states and 1742 transitions. [2025-03-17 20:51:22,832 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 774 [2025-03-17 20:51:22,832 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:22,832 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:22,832 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:22,832 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:22,833 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:22,833 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:22,833 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:22,833 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 24 times [2025-03-17 20:51:22,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:22,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413503650] [2025-03-17 20:51:22,833 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-17 20:51:22,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:22,841 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:22,844 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:22,844 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-17 20:51:22,844 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:22,844 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:22,847 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:22,848 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:22,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:22,849 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:22,854 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:22,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:22,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1390011818, now seen corresponding path program 1 times [2025-03-17 20:51:22,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:22,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137379536] [2025-03-17 20:51:22,855 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:22,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:22,877 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:22,910 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:22,911 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:22,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:23,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:51:23,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:51:23,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137379536] [2025-03-17 20:51:23,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137379536] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:51:23,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:51:23,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-17 20:51:23,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734103721] [2025-03-17 20:51:23,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:51:23,438 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:51:23,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:51:23,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 20:51:23,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-17 20:51:23,439 INFO L87 Difference]: Start difference. First operand 1206 states and 1742 transitions. cyclomatic complexity: 547 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:27,160 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.18s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-17 20:51:28,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:28,947 INFO L93 Difference]: Finished difference Result 1219 states and 1758 transitions. [2025-03-17 20:51:28,947 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1219 states and 1758 transitions. [2025-03-17 20:51:28,949 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 787 [2025-03-17 20:51:28,951 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1219 states to 1219 states and 1758 transitions. [2025-03-17 20:51:28,951 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1219 [2025-03-17 20:51:28,952 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1219 [2025-03-17 20:51:28,952 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1219 states and 1758 transitions. [2025-03-17 20:51:28,953 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:28,953 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1219 states and 1758 transitions. [2025-03-17 20:51:28,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1219 states and 1758 transitions. [2025-03-17 20:51:28,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1219 to 1204. [2025-03-17 20:51:28,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1204 states, 1197 states have (on average 1.4427736006683376) internal successors, (1727), 1196 states have internal predecessors, (1727), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:28,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1204 states to 1204 states and 1739 transitions. [2025-03-17 20:51:28,962 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1204 states and 1739 transitions. [2025-03-17 20:51:28,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:51:28,962 INFO L432 stractBuchiCegarLoop]: Abstraction has 1204 states and 1739 transitions. [2025-03-17 20:51:28,962 INFO L338 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2025-03-17 20:51:28,962 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1204 states and 1739 transitions. [2025-03-17 20:51:28,964 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 772 [2025-03-17 20:51:28,964 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:28,964 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:28,965 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:28,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:28,965 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:28,965 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:28,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:28,966 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 25 times [2025-03-17 20:51:28,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:28,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2092955759] [2025-03-17 20:51:28,966 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-17 20:51:28,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:28,974 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:28,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:28,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:28,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:28,975 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:28,979 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:28,979 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:28,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:28,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:28,985 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:28,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:28,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1478774805, now seen corresponding path program 1 times [2025-03-17 20:51:28,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:28,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695739006] [2025-03-17 20:51:28,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:28,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:29,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:29,037 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:29,038 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:29,038 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:29,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 20:51:29,341 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 20:51:29,341 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695739006] [2025-03-17 20:51:29,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695739006] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 20:51:29,341 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 20:51:29,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-17 20:51:29,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611393077] [2025-03-17 20:51:29,341 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 20:51:29,341 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-17 20:51:29,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 20:51:29,341 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-17 20:51:29,341 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-03-17 20:51:29,342 INFO L87 Difference]: Start difference. First operand 1204 states and 1739 transitions. cyclomatic complexity: 546 Second operand has 11 states, 11 states have (on average 7.363636363636363) internal successors, (81), 11 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 20:51:31,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 20:51:31,665 INFO L93 Difference]: Finished difference Result 1221 states and 1761 transitions. [2025-03-17 20:51:31,665 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1221 states and 1761 transitions. [2025-03-17 20:51:31,668 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 789 [2025-03-17 20:51:31,670 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1221 states to 1221 states and 1761 transitions. [2025-03-17 20:51:31,670 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1221 [2025-03-17 20:51:31,670 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1221 [2025-03-17 20:51:31,671 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1221 states and 1761 transitions. [2025-03-17 20:51:31,671 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-17 20:51:31,671 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1221 states and 1761 transitions. [2025-03-17 20:51:31,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1221 states and 1761 transitions. [2025-03-17 20:51:31,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1221 to 1210. [2025-03-17 20:51:31,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1210 states, 1203 states have (on average 1.4413965087281795) internal successors, (1734), 1202 states have internal predecessors, (1734), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-17 20:51:31,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1210 states to 1210 states and 1746 transitions. [2025-03-17 20:51:31,679 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1210 states and 1746 transitions. [2025-03-17 20:51:31,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 20:51:31,680 INFO L432 stractBuchiCegarLoop]: Abstraction has 1210 states and 1746 transitions. [2025-03-17 20:51:31,680 INFO L338 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2025-03-17 20:51:31,680 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1210 states and 1746 transitions. [2025-03-17 20:51:31,683 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 778 [2025-03-17 20:51:31,683 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-17 20:51:31,683 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-17 20:51:31,683 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-03-17 20:51:31,683 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 20:51:31,683 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, 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main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-03-17 20:51:31,684 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-03-17 20:51:31,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:31,684 INFO L85 PathProgramCache]: Analyzing trace with hash 2045, now seen corresponding path program 26 times [2025-03-17 20:51:31,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:31,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707662806] [2025-03-17 20:51:31,684 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 20:51:31,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:31,692 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:31,692 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:31,692 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-17 20:51:31,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:31,692 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-17 20:51:31,695 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-17 20:51:31,696 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-17 20:51:31,696 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:31,696 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-17 20:51:31,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-17 20:51:31,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 20:51:31,702 INFO L85 PathProgramCache]: Analyzing trace with hash -1447277001, now seen corresponding path program 1 times [2025-03-17 20:51:31,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 20:51:31,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1927440097] [2025-03-17 20:51:31,702 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 20:51:31,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 20:51:31,742 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-17 20:51:31,883 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-17 20:51:31,883 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 20:51:31,883 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 20:51:44,206 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 10 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)