./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 21:07:39,892 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 21:07:39,941 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-03-16 21:07:39,945 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 21:07:39,945 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 21:07:39,962 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 21:07:39,962 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 21:07:39,962 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 21:07:39,963 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 21:07:39,963 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 21:07:39,963 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 21:07:39,963 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 21:07:39,963 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 21:07:39,963 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 21:07:39,963 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 21:07:39,964 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 21:07:39,964 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 21:07:39,964 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 21:07:39,965 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 21:07:39,965 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e [2025-03-16 21:07:40,219 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 21:07:40,227 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 21:07:40,229 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 21:07:40,231 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 21:07:40,231 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 21:07:40,233 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:07:41,369 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13762b2c8/055dcea50bf049bfaed14cb4f7e40a54/FLAGbe658c928 [2025-03-16 21:07:41,768 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 21:07:41,768 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:07:41,787 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13762b2c8/055dcea50bf049bfaed14cb4f7e40a54/FLAGbe658c928 [2025-03-16 21:07:41,942 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13762b2c8/055dcea50bf049bfaed14cb4f7e40a54 [2025-03-16 21:07:41,943 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 21:07:41,945 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 21:07:41,946 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 21:07:41,946 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 21:07:41,949 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 21:07:41,949 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 09:07:41" (1/1) ... [2025-03-16 21:07:41,950 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@608424ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:41, skipping insertion in model container [2025-03-16 21:07:41,950 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 09:07:41" (1/1) ... [2025-03-16 21:07:41,984 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 21:07:42,105 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-16 21:07:42,346 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 21:07:42,353 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 21:07:42,360 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-16 21:07:42,484 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 21:07:42,494 INFO L204 MainTranslator]: Completed translation [2025-03-16 21:07:42,495 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42 WrapperNode [2025-03-16 21:07:42,495 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 21:07:42,496 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 21:07:42,496 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 21:07:42,496 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 21:07:42,500 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:42,551 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:42,884 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3827 [2025-03-16 21:07:42,885 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 21:07:42,889 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 21:07:42,889 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 21:07:42,889 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 21:07:42,900 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:42,915 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,000 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,104 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 21:07:43,105 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,105 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,196 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,208 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,226 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,244 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,282 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 21:07:43,284 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 21:07:43,284 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 21:07:43,284 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 21:07:43,285 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (1/1) ... [2025-03-16 21:07:43,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 21:07:43,298 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 21:07:43,309 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 21:07:43,312 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 21:07:43,330 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 21:07:43,330 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-16 21:07:43,330 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 21:07:43,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 21:07:43,625 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 21:07:43,626 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 21:07:46,008 INFO L? ?]: Removed 2501 outVars from TransFormulas that were not future-live. [2025-03-16 21:07:46,009 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 21:07:46,218 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 21:07:46,222 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 21:07:46,222 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 09:07:46 BoogieIcfgContainer [2025-03-16 21:07:46,223 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 21:07:46,224 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 21:07:46,224 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 21:07:46,229 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 21:07:46,229 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 09:07:41" (1/3) ... [2025-03-16 21:07:46,230 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61fa8079 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 09:07:46, skipping insertion in model container [2025-03-16 21:07:46,230 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:07:42" (2/3) ... [2025-03-16 21:07:46,230 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61fa8079 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 09:07:46, skipping insertion in model container [2025-03-16 21:07:46,231 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 09:07:46" (3/3) ... [2025-03-16 21:07:46,232 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:07:46,245 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 21:07:46,246 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.cache_coherence_two.c that has 1 procedures, 924 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 21:07:46,319 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 21:07:46,329 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@706e58fe, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 21:07:46,330 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 21:07:46,337 INFO L276 IsEmpty]: Start isEmpty. Operand has 924 states, 922 states have (on average 1.5) internal successors, (1383), 923 states have internal predecessors, (1383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:46,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2025-03-16 21:07:46,349 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:46,350 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:46,350 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:46,355 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:46,356 INFO L85 PathProgramCache]: Analyzing trace with hash 1317880962, now seen corresponding path program 1 times [2025-03-16 21:07:46,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:46,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308843238] [2025-03-16 21:07:46,363 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:46,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:46,485 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 156 statements into 1 equivalence classes. [2025-03-16 21:07:47,014 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 156 of 156 statements. [2025-03-16 21:07:47,014 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:47,015 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:48,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:48,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:48,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308843238] [2025-03-16 21:07:48,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [308843238] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:48,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:48,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:07:48,165 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741467783] [2025-03-16 21:07:48,166 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:48,169 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 21:07:48,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:48,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 21:07:48,187 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:07:48,191 INFO L87 Difference]: Start difference. First operand has 924 states, 922 states have (on average 1.5) internal successors, (1383), 923 states have internal predecessors, (1383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 6 states, 6 states have (on average 26.0) internal successors, (156), 6 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:48,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:48,891 INFO L93 Difference]: Finished difference Result 1821 states and 2728 transitions. [2025-03-16 21:07:48,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 21:07:48,897 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 26.0) internal successors, (156), 6 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 156 [2025-03-16 21:07:48,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:48,915 INFO L225 Difference]: With dead ends: 1821 [2025-03-16 21:07:48,915 INFO L226 Difference]: Without dead ends: 1014 [2025-03-16 21:07:48,919 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:07:48,923 INFO L435 NwaCegarLoop]: 1147 mSDtfsCounter, 89 mSDsluCounter, 3539 mSDsCounter, 0 mSdLazyCounter, 965 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 4686 SdHoareTripleChecker+Invalid, 966 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 965 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:48,926 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 4686 Invalid, 966 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 965 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:07:48,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states. [2025-03-16 21:07:48,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1011. [2025-03-16 21:07:49,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 1010 states have (on average 1.497029702970297) internal successors, (1512), 1010 states have internal predecessors, (1512), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:49,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1512 transitions. [2025-03-16 21:07:49,014 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1512 transitions. Word has length 156 [2025-03-16 21:07:49,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:49,016 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1512 transitions. [2025-03-16 21:07:49,017 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 26.0) internal successors, (156), 6 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:49,017 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1512 transitions. [2025-03-16 21:07:49,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2025-03-16 21:07:49,019 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:49,023 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:49,023 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-16 21:07:49,024 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:49,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:49,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1871078486, now seen corresponding path program 1 times [2025-03-16 21:07:49,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:49,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706831111] [2025-03-16 21:07:49,026 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:49,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:49,092 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 157 statements into 1 equivalence classes. [2025-03-16 21:07:49,144 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 157 of 157 statements. [2025-03-16 21:07:49,144 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:49,144 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:49,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:49,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:49,484 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706831111] [2025-03-16 21:07:49,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1706831111] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:49,485 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:49,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:49,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743733316] [2025-03-16 21:07:49,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:49,486 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:07:49,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:49,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:07:49,487 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:49,487 INFO L87 Difference]: Start difference. First operand 1011 states and 1512 transitions. Second operand has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:49,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:49,871 INFO L93 Difference]: Finished difference Result 1907 states and 2852 transitions. [2025-03-16 21:07:49,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:07:49,871 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 157 [2025-03-16 21:07:49,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:49,875 INFO L225 Difference]: With dead ends: 1907 [2025-03-16 21:07:49,876 INFO L226 Difference]: Without dead ends: 1013 [2025-03-16 21:07:49,877 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:49,877 INFO L435 NwaCegarLoop]: 1149 mSDtfsCounter, 0 mSDsluCounter, 2290 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3439 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:49,877 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3439 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:07:49,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1013 states. [2025-03-16 21:07:49,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1013 to 1013. [2025-03-16 21:07:49,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1013 states, 1012 states have (on average 1.4960474308300395) internal successors, (1514), 1012 states have internal predecessors, (1514), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:49,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1013 states to 1013 states and 1514 transitions. [2025-03-16 21:07:49,905 INFO L78 Accepts]: Start accepts. Automaton has 1013 states and 1514 transitions. Word has length 157 [2025-03-16 21:07:49,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:49,905 INFO L471 AbstractCegarLoop]: Abstraction has 1013 states and 1514 transitions. [2025-03-16 21:07:49,906 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:49,906 INFO L276 IsEmpty]: Start isEmpty. Operand 1013 states and 1514 transitions. [2025-03-16 21:07:49,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2025-03-16 21:07:49,910 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:49,910 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:49,911 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-16 21:07:49,911 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:49,911 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:49,913 INFO L85 PathProgramCache]: Analyzing trace with hash 1964030979, now seen corresponding path program 1 times [2025-03-16 21:07:49,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:49,914 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122370186] [2025-03-16 21:07:49,914 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:49,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:49,975 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 157 statements into 1 equivalence classes. [2025-03-16 21:07:50,020 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 157 of 157 statements. [2025-03-16 21:07:50,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:50,021 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:50,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:50,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:50,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122370186] [2025-03-16 21:07:50,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2122370186] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:50,461 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:50,461 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:50,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639421543] [2025-03-16 21:07:50,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:50,461 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:07:50,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:50,462 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:07:50,462 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:50,462 INFO L87 Difference]: Start difference. First operand 1013 states and 1514 transitions. Second operand has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:50,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:50,816 INFO L93 Difference]: Finished difference Result 1017 states and 1518 transitions. [2025-03-16 21:07:50,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:07:50,816 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 157 [2025-03-16 21:07:50,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:50,821 INFO L225 Difference]: With dead ends: 1017 [2025-03-16 21:07:50,822 INFO L226 Difference]: Without dead ends: 1015 [2025-03-16 21:07:50,822 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:50,823 INFO L435 NwaCegarLoop]: 1149 mSDtfsCounter, 0 mSDsluCounter, 2293 mSDsCounter, 0 mSdLazyCounter, 697 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3442 SdHoareTripleChecker+Invalid, 697 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 697 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:50,823 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3442 Invalid, 697 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 697 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:07:50,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1015 states. [2025-03-16 21:07:50,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1015 to 1015. [2025-03-16 21:07:50,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1015 states, 1014 states have (on average 1.495069033530572) internal successors, (1516), 1014 states have internal predecessors, (1516), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:50,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1015 states to 1015 states and 1516 transitions. [2025-03-16 21:07:50,851 INFO L78 Accepts]: Start accepts. Automaton has 1015 states and 1516 transitions. Word has length 157 [2025-03-16 21:07:50,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:50,852 INFO L471 AbstractCegarLoop]: Abstraction has 1015 states and 1516 transitions. [2025-03-16 21:07:50,852 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:50,852 INFO L276 IsEmpty]: Start isEmpty. Operand 1015 states and 1516 transitions. [2025-03-16 21:07:50,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2025-03-16 21:07:50,853 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:50,854 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:50,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-16 21:07:50,854 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:50,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:50,856 INFO L85 PathProgramCache]: Analyzing trace with hash 760098419, now seen corresponding path program 1 times [2025-03-16 21:07:50,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:50,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331636696] [2025-03-16 21:07:50,856 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:50,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:50,903 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 158 statements into 1 equivalence classes. [2025-03-16 21:07:50,946 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 158 of 158 statements. [2025-03-16 21:07:50,946 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:50,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:51,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:51,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:51,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331636696] [2025-03-16 21:07:51,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [331636696] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:51,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:51,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:51,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1301185155] [2025-03-16 21:07:51,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:51,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:07:51,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:51,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:07:51,165 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:51,165 INFO L87 Difference]: Start difference. First operand 1015 states and 1516 transitions. Second operand has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:51,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:51,521 INFO L93 Difference]: Finished difference Result 1915 states and 2860 transitions. [2025-03-16 21:07:51,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:07:51,522 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 158 [2025-03-16 21:07:51,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:51,525 INFO L225 Difference]: With dead ends: 1915 [2025-03-16 21:07:51,526 INFO L226 Difference]: Without dead ends: 1017 [2025-03-16 21:07:51,527 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:51,527 INFO L435 NwaCegarLoop]: 1149 mSDtfsCounter, 0 mSDsluCounter, 2290 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3439 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:51,527 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3439 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:07:51,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2025-03-16 21:07:51,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 1017. [2025-03-16 21:07:51,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1017 states, 1016 states have (on average 1.4940944881889764) internal successors, (1518), 1016 states have internal predecessors, (1518), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:51,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1017 states to 1017 states and 1518 transitions. [2025-03-16 21:07:51,543 INFO L78 Accepts]: Start accepts. Automaton has 1017 states and 1518 transitions. Word has length 158 [2025-03-16 21:07:51,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:51,544 INFO L471 AbstractCegarLoop]: Abstraction has 1017 states and 1518 transitions. [2025-03-16 21:07:51,544 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:51,544 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1518 transitions. [2025-03-16 21:07:51,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2025-03-16 21:07:51,545 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:51,545 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:51,545 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-16 21:07:51,545 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:51,546 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:51,546 INFO L85 PathProgramCache]: Analyzing trace with hash -275242498, now seen corresponding path program 1 times [2025-03-16 21:07:51,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:51,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924372328] [2025-03-16 21:07:51,546 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:51,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:51,589 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 159 statements into 1 equivalence classes. [2025-03-16 21:07:51,745 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 159 of 159 statements. [2025-03-16 21:07:51,746 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:51,746 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:52,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:52,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:52,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924372328] [2025-03-16 21:07:52,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924372328] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:52,085 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:52,085 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:52,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860941926] [2025-03-16 21:07:52,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:52,086 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:07:52,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:52,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:07:52,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:07:52,087 INFO L87 Difference]: Start difference. First operand 1017 states and 1518 transitions. Second operand has 5 states, 5 states have (on average 31.8) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:52,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:52,614 INFO L93 Difference]: Finished difference Result 1921 states and 2867 transitions. [2025-03-16 21:07:52,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:07:52,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 159 [2025-03-16 21:07:52,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:52,618 INFO L225 Difference]: With dead ends: 1921 [2025-03-16 21:07:52,618 INFO L226 Difference]: Without dead ends: 1021 [2025-03-16 21:07:52,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:07:52,620 INFO L435 NwaCegarLoop]: 1132 mSDtfsCounter, 1235 mSDsluCounter, 2258 mSDsCounter, 0 mSdLazyCounter, 749 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1235 SdHoareTripleChecker+Valid, 3390 SdHoareTripleChecker+Invalid, 750 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 749 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:52,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1235 Valid, 3390 Invalid, 750 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 749 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 21:07:52,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1021 states. [2025-03-16 21:07:52,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1021 to 1020. [2025-03-16 21:07:52,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1019 states have (on average 1.492639842983317) internal successors, (1521), 1019 states have internal predecessors, (1521), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:52,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1521 transitions. [2025-03-16 21:07:52,638 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1521 transitions. Word has length 159 [2025-03-16 21:07:52,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:52,639 INFO L471 AbstractCegarLoop]: Abstraction has 1020 states and 1521 transitions. [2025-03-16 21:07:52,639 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:52,639 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1521 transitions. [2025-03-16 21:07:52,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2025-03-16 21:07:52,640 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:52,640 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:52,640 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-16 21:07:52,641 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:52,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:52,641 INFO L85 PathProgramCache]: Analyzing trace with hash -1556666330, now seen corresponding path program 1 times [2025-03-16 21:07:52,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:52,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969003622] [2025-03-16 21:07:52,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:52,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:52,691 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 160 statements into 1 equivalence classes. [2025-03-16 21:07:52,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 160 of 160 statements. [2025-03-16 21:07:52,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:52,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:53,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:53,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:53,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969003622] [2025-03-16 21:07:53,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1969003622] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:53,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:53,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:53,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201571494] [2025-03-16 21:07:53,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:53,228 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:07:53,228 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:53,229 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:07:53,229 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:07:53,229 INFO L87 Difference]: Start difference. First operand 1020 states and 1521 transitions. Second operand has 5 states, 5 states have (on average 32.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:53,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:53,915 INFO L93 Difference]: Finished difference Result 2374 states and 3535 transitions. [2025-03-16 21:07:53,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:07:53,915 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 160 [2025-03-16 21:07:53,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:53,919 INFO L225 Difference]: With dead ends: 2374 [2025-03-16 21:07:53,920 INFO L226 Difference]: Without dead ends: 1471 [2025-03-16 21:07:53,921 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:07:53,921 INFO L435 NwaCegarLoop]: 1128 mSDtfsCounter, 2295 mSDsluCounter, 2254 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2295 SdHoareTripleChecker+Valid, 3382 SdHoareTripleChecker+Invalid, 758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:53,921 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2295 Valid, 3382 Invalid, 758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:07:53,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1471 states. [2025-03-16 21:07:53,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1471 to 1256. [2025-03-16 21:07:53,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1255 states have (on average 1.490836653386454) internal successors, (1871), 1255 states have internal predecessors, (1871), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:53,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1871 transitions. [2025-03-16 21:07:53,947 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1871 transitions. Word has length 160 [2025-03-16 21:07:53,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:53,947 INFO L471 AbstractCegarLoop]: Abstraction has 1256 states and 1871 transitions. [2025-03-16 21:07:53,947 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:53,947 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1871 transitions. [2025-03-16 21:07:53,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2025-03-16 21:07:53,948 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:53,949 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:53,950 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-16 21:07:53,950 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:53,950 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:53,950 INFO L85 PathProgramCache]: Analyzing trace with hash 1093223269, now seen corresponding path program 1 times [2025-03-16 21:07:53,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:53,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870621933] [2025-03-16 21:07:53,951 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:53,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:53,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 162 statements into 1 equivalence classes. [2025-03-16 21:07:54,104 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 162 of 162 statements. [2025-03-16 21:07:54,105 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:54,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:54,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:54,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:54,552 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1870621933] [2025-03-16 21:07:54,552 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1870621933] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:54,552 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:54,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:54,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1788670776] [2025-03-16 21:07:54,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:54,553 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:07:54,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:54,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:07:54,554 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:54,554 INFO L87 Difference]: Start difference. First operand 1256 states and 1871 transitions. Second operand has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:54,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:54,941 INFO L93 Difference]: Finished difference Result 2383 states and 3549 transitions. [2025-03-16 21:07:54,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:07:54,941 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 162 [2025-03-16 21:07:54,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:54,945 INFO L225 Difference]: With dead ends: 2383 [2025-03-16 21:07:54,945 INFO L226 Difference]: Without dead ends: 1256 [2025-03-16 21:07:54,947 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:54,947 INFO L435 NwaCegarLoop]: 1146 mSDtfsCounter, 6 mSDsluCounter, 2283 mSDsCounter, 0 mSdLazyCounter, 699 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 3429 SdHoareTripleChecker+Invalid, 699 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 699 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:54,948 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 3429 Invalid, 699 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 699 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:07:54,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1256 states. [2025-03-16 21:07:54,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1256 to 1256. [2025-03-16 21:07:54,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1255 states have (on average 1.4892430278884463) internal successors, (1869), 1255 states have internal predecessors, (1869), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:54,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1869 transitions. [2025-03-16 21:07:54,968 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1869 transitions. Word has length 162 [2025-03-16 21:07:54,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:54,968 INFO L471 AbstractCegarLoop]: Abstraction has 1256 states and 1869 transitions. [2025-03-16 21:07:54,968 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:54,968 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1869 transitions. [2025-03-16 21:07:54,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2025-03-16 21:07:54,970 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:54,970 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:54,970 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-16 21:07:54,970 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:54,970 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:54,970 INFO L85 PathProgramCache]: Analyzing trace with hash 2079113235, now seen corresponding path program 1 times [2025-03-16 21:07:54,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:54,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959313206] [2025-03-16 21:07:54,971 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:54,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:55,038 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 163 statements into 1 equivalence classes. [2025-03-16 21:07:55,188 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 163 of 163 statements. [2025-03-16 21:07:55,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:55,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:55,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:55,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:55,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959313206] [2025-03-16 21:07:55,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959313206] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:55,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:55,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:55,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448756971] [2025-03-16 21:07:55,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:55,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:07:55,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:55,633 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:07:55,634 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:55,634 INFO L87 Difference]: Start difference. First operand 1256 states and 1869 transitions. Second operand has 4 states, 4 states have (on average 40.75) internal successors, (163), 4 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:56,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:56,028 INFO L93 Difference]: Finished difference Result 2371 states and 3528 transitions. [2025-03-16 21:07:56,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:07:56,029 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.75) internal successors, (163), 4 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 163 [2025-03-16 21:07:56,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:56,034 INFO L225 Difference]: With dead ends: 2371 [2025-03-16 21:07:56,034 INFO L226 Difference]: Without dead ends: 1256 [2025-03-16 21:07:56,036 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:07:56,037 INFO L435 NwaCegarLoop]: 1145 mSDtfsCounter, 6 mSDsluCounter, 2281 mSDsCounter, 0 mSdLazyCounter, 699 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 3426 SdHoareTripleChecker+Invalid, 699 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 699 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:56,037 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 3426 Invalid, 699 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 699 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:07:56,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1256 states. [2025-03-16 21:07:56,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1256 to 1256. [2025-03-16 21:07:56,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1255 states have (on average 1.4876494023904383) internal successors, (1867), 1255 states have internal predecessors, (1867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:56,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1867 transitions. [2025-03-16 21:07:56,056 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1867 transitions. Word has length 163 [2025-03-16 21:07:56,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:56,057 INFO L471 AbstractCegarLoop]: Abstraction has 1256 states and 1867 transitions. [2025-03-16 21:07:56,057 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.75) internal successors, (163), 4 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:56,057 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1867 transitions. [2025-03-16 21:07:56,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2025-03-16 21:07:56,058 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:56,058 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:56,058 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-16 21:07:56,059 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:56,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:56,060 INFO L85 PathProgramCache]: Analyzing trace with hash -891312138, now seen corresponding path program 1 times [2025-03-16 21:07:56,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:56,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8032429] [2025-03-16 21:07:56,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:56,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:56,104 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 164 statements into 1 equivalence classes. [2025-03-16 21:07:56,134 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 164 of 164 statements. [2025-03-16 21:07:56,137 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:56,137 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:56,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:56,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:56,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8032429] [2025-03-16 21:07:56,574 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [8032429] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:56,574 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:56,574 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 21:07:56,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016576387] [2025-03-16 21:07:56,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:56,575 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 21:07:56,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:56,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 21:07:56,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:07:56,575 INFO L87 Difference]: Start difference. First operand 1256 states and 1867 transitions. Second operand has 8 states, 8 states have (on average 20.5) internal successors, (164), 8 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:57,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:57,161 INFO L93 Difference]: Finished difference Result 2401 states and 3567 transitions. [2025-03-16 21:07:57,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 21:07:57,162 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.5) internal successors, (164), 8 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 164 [2025-03-16 21:07:57,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:57,166 INFO L225 Difference]: With dead ends: 2401 [2025-03-16 21:07:57,166 INFO L226 Difference]: Without dead ends: 1290 [2025-03-16 21:07:57,167 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:07:57,170 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 14 mSDsluCounter, 4579 mSDsCounter, 0 mSdLazyCounter, 1197 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 5721 SdHoareTripleChecker+Invalid, 1197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:57,170 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 5721 Invalid, 1197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1197 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 21:07:57,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1290 states. [2025-03-16 21:07:57,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1290 to 1282. [2025-03-16 21:07:57,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1282 states, 1281 states have (on average 1.4855581576893053) internal successors, (1903), 1281 states have internal predecessors, (1903), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:57,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1282 states to 1282 states and 1903 transitions. [2025-03-16 21:07:57,189 INFO L78 Accepts]: Start accepts. Automaton has 1282 states and 1903 transitions. Word has length 164 [2025-03-16 21:07:57,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:57,190 INFO L471 AbstractCegarLoop]: Abstraction has 1282 states and 1903 transitions. [2025-03-16 21:07:57,190 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.5) internal successors, (164), 8 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:57,190 INFO L276 IsEmpty]: Start isEmpty. Operand 1282 states and 1903 transitions. [2025-03-16 21:07:57,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-03-16 21:07:57,191 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:57,191 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:57,191 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-16 21:07:57,192 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:57,192 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:57,192 INFO L85 PathProgramCache]: Analyzing trace with hash 1365909902, now seen corresponding path program 1 times [2025-03-16 21:07:57,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:57,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64092814] [2025-03-16 21:07:57,192 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:57,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:57,241 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-03-16 21:07:57,268 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-03-16 21:07:57,269 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:57,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:57,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:57,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:57,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64092814] [2025-03-16 21:07:57,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64092814] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:57,712 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:57,712 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 21:07:57,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990008410] [2025-03-16 21:07:57,712 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:57,712 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 21:07:57,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:57,713 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 21:07:57,713 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:07:57,714 INFO L87 Difference]: Start difference. First operand 1282 states and 1903 transitions. Second operand has 8 states, 8 states have (on average 20.625) internal successors, (165), 8 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:58,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:58,356 INFO L93 Difference]: Finished difference Result 2650 states and 3936 transitions. [2025-03-16 21:07:58,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 21:07:58,356 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.625) internal successors, (165), 8 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 165 [2025-03-16 21:07:58,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:58,361 INFO L225 Difference]: With dead ends: 2650 [2025-03-16 21:07:58,361 INFO L226 Difference]: Without dead ends: 1734 [2025-03-16 21:07:58,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:07:58,362 INFO L435 NwaCegarLoop]: 1141 mSDtfsCounter, 149 mSDsluCounter, 4914 mSDsCounter, 0 mSdLazyCounter, 1273 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 149 SdHoareTripleChecker+Valid, 6055 SdHoareTripleChecker+Invalid, 1273 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1273 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:58,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [149 Valid, 6055 Invalid, 1273 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1273 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:07:58,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1734 states. [2025-03-16 21:07:58,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1734 to 1730. [2025-03-16 21:07:58,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1730 states, 1729 states have (on average 1.4852515905147483) internal successors, (2568), 1729 states have internal predecessors, (2568), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:58,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1730 states to 1730 states and 2568 transitions. [2025-03-16 21:07:58,388 INFO L78 Accepts]: Start accepts. Automaton has 1730 states and 2568 transitions. Word has length 165 [2025-03-16 21:07:58,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:58,389 INFO L471 AbstractCegarLoop]: Abstraction has 1730 states and 2568 transitions. [2025-03-16 21:07:58,389 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.625) internal successors, (165), 8 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:58,389 INFO L276 IsEmpty]: Start isEmpty. Operand 1730 states and 2568 transitions. [2025-03-16 21:07:58,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-03-16 21:07:58,390 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:58,391 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:58,391 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-16 21:07:58,391 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:58,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:58,392 INFO L85 PathProgramCache]: Analyzing trace with hash 573389664, now seen corresponding path program 1 times [2025-03-16 21:07:58,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:58,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166524536] [2025-03-16 21:07:58,392 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:58,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:58,433 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-03-16 21:07:58,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-03-16 21:07:58,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:58,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:07:58,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:07:58,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:07:58,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166524536] [2025-03-16 21:07:58,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1166524536] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:07:58,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:07:58,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:07:58,886 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010637681] [2025-03-16 21:07:58,886 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:07:58,886 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:07:58,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:07:58,886 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:07:58,887 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:07:58,887 INFO L87 Difference]: Start difference. First operand 1730 states and 2568 transitions. Second operand has 5 states, 5 states have (on average 33.0) internal successors, (165), 4 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:59,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:07:59,496 INFO L93 Difference]: Finished difference Result 3369 states and 4992 transitions. [2025-03-16 21:07:59,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:07:59,496 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 4 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 165 [2025-03-16 21:07:59,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:07:59,501 INFO L225 Difference]: With dead ends: 3369 [2025-03-16 21:07:59,502 INFO L226 Difference]: Without dead ends: 1869 [2025-03-16 21:07:59,503 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:07:59,504 INFO L435 NwaCegarLoop]: 1126 mSDtfsCounter, 1647 mSDsluCounter, 2250 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1647 SdHoareTripleChecker+Valid, 3376 SdHoareTripleChecker+Invalid, 758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:07:59,504 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1647 Valid, 3376 Invalid, 758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:07:59,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1869 states. [2025-03-16 21:07:59,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1869 to 1730. [2025-03-16 21:07:59,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1730 states, 1729 states have (on average 1.482938114517062) internal successors, (2564), 1729 states have internal predecessors, (2564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:59,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1730 states to 1730 states and 2564 transitions. [2025-03-16 21:07:59,530 INFO L78 Accepts]: Start accepts. Automaton has 1730 states and 2564 transitions. Word has length 165 [2025-03-16 21:07:59,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:07:59,530 INFO L471 AbstractCegarLoop]: Abstraction has 1730 states and 2564 transitions. [2025-03-16 21:07:59,531 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 4 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:07:59,532 INFO L276 IsEmpty]: Start isEmpty. Operand 1730 states and 2564 transitions. [2025-03-16 21:07:59,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-03-16 21:07:59,533 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:07:59,533 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:07:59,533 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-16 21:07:59,534 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:07:59,534 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:07:59,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1895099354, now seen corresponding path program 1 times [2025-03-16 21:07:59,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:07:59,534 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608604412] [2025-03-16 21:07:59,534 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:07:59,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:07:59,573 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-03-16 21:07:59,692 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-03-16 21:07:59,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:07:59,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:00,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:00,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:00,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608604412] [2025-03-16 21:08:00,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [608604412] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:00,421 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:00,421 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-16 21:08:00,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015498006] [2025-03-16 21:08:00,422 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:00,422 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2025-03-16 21:08:00,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:00,422 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2025-03-16 21:08:00,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182 [2025-03-16 21:08:00,423 INFO L87 Difference]: Start difference. First operand 1730 states and 2564 transitions. Second operand has 14 states, 14 states have (on average 11.928571428571429) internal successors, (167), 13 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:01,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:01,791 INFO L93 Difference]: Finished difference Result 3393 states and 5028 transitions. [2025-03-16 21:08:01,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-16 21:08:01,791 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 11.928571428571429) internal successors, (167), 13 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 167 [2025-03-16 21:08:01,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:01,796 INFO L225 Difference]: With dead ends: 3393 [2025-03-16 21:08:01,797 INFO L226 Difference]: Without dead ends: 2237 [2025-03-16 21:08:01,798 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2025-03-16 21:08:01,798 INFO L435 NwaCegarLoop]: 1110 mSDtfsCounter, 1740 mSDsluCounter, 12185 mSDsCounter, 0 mSdLazyCounter, 3251 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1740 SdHoareTripleChecker+Valid, 13295 SdHoareTripleChecker+Invalid, 3251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3251 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:01,799 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1740 Valid, 13295 Invalid, 3251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3251 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-16 21:08:01,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2237 states. [2025-03-16 21:08:01,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2237 to 2232. [2025-03-16 21:08:01,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2232 states, 2231 states have (on average 1.4805020170327208) internal successors, (3303), 2231 states have internal predecessors, (3303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:01,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2232 states to 2232 states and 3303 transitions. [2025-03-16 21:08:01,826 INFO L78 Accepts]: Start accepts. Automaton has 2232 states and 3303 transitions. Word has length 167 [2025-03-16 21:08:01,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:01,826 INFO L471 AbstractCegarLoop]: Abstraction has 2232 states and 3303 transitions. [2025-03-16 21:08:01,826 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 11.928571428571429) internal successors, (167), 13 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:01,826 INFO L276 IsEmpty]: Start isEmpty. Operand 2232 states and 3303 transitions. [2025-03-16 21:08:01,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-03-16 21:08:01,828 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:01,828 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:01,828 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-16 21:08:01,828 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:01,829 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:01,829 INFO L85 PathProgramCache]: Analyzing trace with hash -852302001, now seen corresponding path program 1 times [2025-03-16 21:08:01,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:01,829 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557782407] [2025-03-16 21:08:01,829 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:01,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:01,875 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-03-16 21:08:01,957 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-03-16 21:08:01,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:01,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:02,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:02,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557782407] [2025-03-16 21:08:02,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1557782407] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:02,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:02,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-16 21:08:02,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266038741] [2025-03-16 21:08:02,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:02,550 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-16 21:08:02,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:02,551 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-16 21:08:02,551 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-03-16 21:08:02,551 INFO L87 Difference]: Start difference. First operand 2232 states and 3303 transitions. Second operand has 10 states, 10 states have (on average 16.7) internal successors, (167), 10 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:03,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:03,231 INFO L93 Difference]: Finished difference Result 3683 states and 5456 transitions. [2025-03-16 21:08:03,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 21:08:03,231 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 16.7) internal successors, (167), 10 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 167 [2025-03-16 21:08:03,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:03,236 INFO L225 Difference]: With dead ends: 3683 [2025-03-16 21:08:03,236 INFO L226 Difference]: Without dead ends: 2257 [2025-03-16 21:08:03,238 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-03-16 21:08:03,239 INFO L435 NwaCegarLoop]: 1137 mSDtfsCounter, 286 mSDsluCounter, 7276 mSDsCounter, 0 mSdLazyCounter, 1807 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 286 SdHoareTripleChecker+Valid, 8413 SdHoareTripleChecker+Invalid, 1808 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1807 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:03,239 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [286 Valid, 8413 Invalid, 1808 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1807 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:08:03,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2257 states. [2025-03-16 21:08:03,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2257 to 2240. [2025-03-16 21:08:03,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2240 states, 2239 states have (on average 1.480571683787405) internal successors, (3315), 2239 states have internal predecessors, (3315), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:03,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2240 states to 2240 states and 3315 transitions. [2025-03-16 21:08:03,276 INFO L78 Accepts]: Start accepts. Automaton has 2240 states and 3315 transitions. Word has length 167 [2025-03-16 21:08:03,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:03,277 INFO L471 AbstractCegarLoop]: Abstraction has 2240 states and 3315 transitions. [2025-03-16 21:08:03,277 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 16.7) internal successors, (167), 10 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:03,277 INFO L276 IsEmpty]: Start isEmpty. Operand 2240 states and 3315 transitions. [2025-03-16 21:08:03,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-03-16 21:08:03,280 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:03,280 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:03,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-16 21:08:03,281 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:03,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:03,281 INFO L85 PathProgramCache]: Analyzing trace with hash -51526347, now seen corresponding path program 1 times [2025-03-16 21:08:03,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:03,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142619321] [2025-03-16 21:08:03,281 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:03,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:03,332 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-03-16 21:08:03,457 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-03-16 21:08:03,458 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:03,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:03,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:03,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:03,804 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142619321] [2025-03-16 21:08:03,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142619321] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:03,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:03,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:03,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850214052] [2025-03-16 21:08:03,804 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:03,805 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:03,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:03,805 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:03,805 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:03,805 INFO L87 Difference]: Start difference. First operand 2240 states and 3315 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:04,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:04,183 INFO L93 Difference]: Finished difference Result 4325 states and 6400 transitions. [2025-03-16 21:08:04,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:04,183 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 167 [2025-03-16 21:08:04,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:04,188 INFO L225 Difference]: With dead ends: 4325 [2025-03-16 21:08:04,188 INFO L226 Difference]: Without dead ends: 2258 [2025-03-16 21:08:04,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:04,190 INFO L435 NwaCegarLoop]: 1123 mSDtfsCounter, 1311 mSDsluCounter, 2240 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1311 SdHoareTripleChecker+Valid, 3363 SdHoareTripleChecker+Invalid, 770 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:04,190 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1311 Valid, 3363 Invalid, 770 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:08:04,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2258 states. [2025-03-16 21:08:04,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2258 to 2258. [2025-03-16 21:08:04,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2258 states, 2257 states have (on average 1.4767390341160833) internal successors, (3333), 2257 states have internal predecessors, (3333), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:04,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2258 states to 2258 states and 3333 transitions. [2025-03-16 21:08:04,220 INFO L78 Accepts]: Start accepts. Automaton has 2258 states and 3333 transitions. Word has length 167 [2025-03-16 21:08:04,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:04,220 INFO L471 AbstractCegarLoop]: Abstraction has 2258 states and 3333 transitions. [2025-03-16 21:08:04,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:04,220 INFO L276 IsEmpty]: Start isEmpty. Operand 2258 states and 3333 transitions. [2025-03-16 21:08:04,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-03-16 21:08:04,222 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:04,222 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:04,222 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-16 21:08:04,222 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:04,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:04,223 INFO L85 PathProgramCache]: Analyzing trace with hash -1175014189, now seen corresponding path program 1 times [2025-03-16 21:08:04,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:04,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885462511] [2025-03-16 21:08:04,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:04,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:04,259 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-03-16 21:08:04,392 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-03-16 21:08:04,392 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:04,392 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:04,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:04,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:04,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885462511] [2025-03-16 21:08:04,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885462511] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:04,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:04,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:04,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584290691] [2025-03-16 21:08:04,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:04,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:04,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:04,715 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:04,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:04,715 INFO L87 Difference]: Start difference. First operand 2258 states and 3333 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:05,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:05,114 INFO L93 Difference]: Finished difference Result 4149 states and 6127 transitions. [2025-03-16 21:08:05,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:05,115 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 167 [2025-03-16 21:08:05,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:05,120 INFO L225 Difference]: With dead ends: 4149 [2025-03-16 21:08:05,120 INFO L226 Difference]: Without dead ends: 2270 [2025-03-16 21:08:05,121 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:05,123 INFO L435 NwaCegarLoop]: 1123 mSDtfsCounter, 1318 mSDsluCounter, 2240 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1318 SdHoareTripleChecker+Valid, 3363 SdHoareTripleChecker+Invalid, 770 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:05,123 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1318 Valid, 3363 Invalid, 770 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:08:05,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2270 states. [2025-03-16 21:08:05,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2270 to 2270. [2025-03-16 21:08:05,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2270 states, 2269 states have (on average 1.4742177170559718) internal successors, (3345), 2269 states have internal predecessors, (3345), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:05,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2270 states to 2270 states and 3345 transitions. [2025-03-16 21:08:05,149 INFO L78 Accepts]: Start accepts. Automaton has 2270 states and 3345 transitions. Word has length 167 [2025-03-16 21:08:05,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:05,149 INFO L471 AbstractCegarLoop]: Abstraction has 2270 states and 3345 transitions. [2025-03-16 21:08:05,149 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:05,149 INFO L276 IsEmpty]: Start isEmpty. Operand 2270 states and 3345 transitions. [2025-03-16 21:08:05,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-16 21:08:05,151 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:05,151 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:05,151 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-16 21:08:05,151 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:05,151 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:05,152 INFO L85 PathProgramCache]: Analyzing trace with hash -1110761795, now seen corresponding path program 1 times [2025-03-16 21:08:05,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:05,152 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70884249] [2025-03-16 21:08:05,152 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:05,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:05,190 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-16 21:08:05,224 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-16 21:08:05,224 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:05,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:05,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:05,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:05,804 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70884249] [2025-03-16 21:08:05,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [70884249] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:05,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:05,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 21:08:05,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278080845] [2025-03-16 21:08:05,804 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:05,804 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 21:08:05,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:05,805 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 21:08:05,805 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:08:05,805 INFO L87 Difference]: Start difference. First operand 2270 states and 3345 transitions. Second operand has 8 states, 8 states have (on average 21.0) internal successors, (168), 7 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:07,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:07,375 INFO L93 Difference]: Finished difference Result 5575 states and 8224 transitions. [2025-03-16 21:08:07,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:07,376 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.0) internal successors, (168), 7 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-16 21:08:07,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:07,384 INFO L225 Difference]: With dead ends: 5575 [2025-03-16 21:08:07,384 INFO L226 Difference]: Without dead ends: 3485 [2025-03-16 21:08:07,386 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2025-03-16 21:08:07,388 INFO L435 NwaCegarLoop]: 712 mSDtfsCounter, 2681 mSDsluCounter, 2130 mSDsCounter, 0 mSdLazyCounter, 2667 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2681 SdHoareTripleChecker+Valid, 2842 SdHoareTripleChecker+Invalid, 2667 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2667 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:07,388 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2681 Valid, 2842 Invalid, 2667 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2667 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2025-03-16 21:08:07,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3485 states. [2025-03-16 21:08:07,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3485 to 2286. [2025-03-16 21:08:07,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2286 states, 2285 states have (on average 1.4726477024070022) internal successors, (3365), 2285 states have internal predecessors, (3365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:07,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2286 states to 2286 states and 3365 transitions. [2025-03-16 21:08:07,422 INFO L78 Accepts]: Start accepts. Automaton has 2286 states and 3365 transitions. Word has length 168 [2025-03-16 21:08:07,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:07,422 INFO L471 AbstractCegarLoop]: Abstraction has 2286 states and 3365 transitions. [2025-03-16 21:08:07,423 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.0) internal successors, (168), 7 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:07,423 INFO L276 IsEmpty]: Start isEmpty. Operand 2286 states and 3365 transitions. [2025-03-16 21:08:07,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-16 21:08:07,424 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:07,425 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:07,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-16 21:08:07,425 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:07,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:07,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1226896199, now seen corresponding path program 1 times [2025-03-16 21:08:07,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:07,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941122593] [2025-03-16 21:08:07,426 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:07,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:07,465 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-16 21:08:07,628 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-16 21:08:07,628 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:07,628 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:08,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:08,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:08,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941122593] [2025-03-16 21:08:08,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1941122593] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:08,323 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:08,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:08,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1033373840] [2025-03-16 21:08:08,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:08,324 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:08,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:08,324 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:08,324 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:08,324 INFO L87 Difference]: Start difference. First operand 2286 states and 3365 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:09,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:09,057 INFO L93 Difference]: Finished difference Result 5072 states and 7480 transitions. [2025-03-16 21:08:09,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:09,057 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-16 21:08:09,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:09,062 INFO L225 Difference]: With dead ends: 5072 [2025-03-16 21:08:09,062 INFO L226 Difference]: Without dead ends: 3024 [2025-03-16 21:08:09,063 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:09,064 INFO L435 NwaCegarLoop]: 1111 mSDtfsCounter, 3655 mSDsluCounter, 2218 mSDsCounter, 0 mSdLazyCounter, 804 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3655 SdHoareTripleChecker+Valid, 3329 SdHoareTripleChecker+Invalid, 805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 804 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:09,064 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3655 Valid, 3329 Invalid, 805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 804 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 21:08:09,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3024 states. [2025-03-16 21:08:09,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3024 to 2283. [2025-03-16 21:08:09,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2283 states, 2282 states have (on average 1.4706397896581946) internal successors, (3356), 2282 states have internal predecessors, (3356), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:09,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2283 states to 2283 states and 3356 transitions. [2025-03-16 21:08:09,085 INFO L78 Accepts]: Start accepts. Automaton has 2283 states and 3356 transitions. Word has length 168 [2025-03-16 21:08:09,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:09,085 INFO L471 AbstractCegarLoop]: Abstraction has 2283 states and 3356 transitions. [2025-03-16 21:08:09,085 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:09,085 INFO L276 IsEmpty]: Start isEmpty. Operand 2283 states and 3356 transitions. [2025-03-16 21:08:09,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-03-16 21:08:09,087 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:09,087 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:09,087 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-16 21:08:09,087 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:09,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:09,087 INFO L85 PathProgramCache]: Analyzing trace with hash -503013702, now seen corresponding path program 1 times [2025-03-16 21:08:09,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:09,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033178329] [2025-03-16 21:08:09,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:09,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:09,123 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-03-16 21:08:09,230 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-03-16 21:08:09,230 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:09,231 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:09,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:09,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:09,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033178329] [2025-03-16 21:08:09,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2033178329] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:09,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:09,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:09,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275055448] [2025-03-16 21:08:09,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:09,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:09,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:09,953 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:09,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:09,954 INFO L87 Difference]: Start difference. First operand 2283 states and 3356 transitions. Second operand has 5 states, 5 states have (on average 33.8) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:10,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:10,583 INFO L93 Difference]: Finished difference Result 4859 states and 7165 transitions. [2025-03-16 21:08:10,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:10,583 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.8) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 169 [2025-03-16 21:08:10,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:10,588 INFO L225 Difference]: With dead ends: 4859 [2025-03-16 21:08:10,588 INFO L226 Difference]: Without dead ends: 3024 [2025-03-16 21:08:10,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:10,590 INFO L435 NwaCegarLoop]: 1110 mSDtfsCounter, 3592 mSDsluCounter, 2218 mSDsCounter, 0 mSdLazyCounter, 805 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3592 SdHoareTripleChecker+Valid, 3328 SdHoareTripleChecker+Invalid, 805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 805 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:10,590 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3592 Valid, 3328 Invalid, 805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 805 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:08:10,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3024 states. [2025-03-16 21:08:10,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3024 to 2283. [2025-03-16 21:08:10,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2283 states, 2282 states have (on average 1.4680105170902717) internal successors, (3350), 2282 states have internal predecessors, (3350), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:10,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2283 states to 2283 states and 3350 transitions. [2025-03-16 21:08:10,610 INFO L78 Accepts]: Start accepts. Automaton has 2283 states and 3350 transitions. Word has length 169 [2025-03-16 21:08:10,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:10,610 INFO L471 AbstractCegarLoop]: Abstraction has 2283 states and 3350 transitions. [2025-03-16 21:08:10,610 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.8) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:10,610 INFO L276 IsEmpty]: Start isEmpty. Operand 2283 states and 3350 transitions. [2025-03-16 21:08:10,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-16 21:08:10,612 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:10,612 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:10,612 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-16 21:08:10,612 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:10,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:10,613 INFO L85 PathProgramCache]: Analyzing trace with hash -919951659, now seen corresponding path program 1 times [2025-03-16 21:08:10,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:10,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54771530] [2025-03-16 21:08:10,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:10,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:10,651 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-16 21:08:10,774 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-16 21:08:10,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:10,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:11,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:11,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:11,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54771530] [2025-03-16 21:08:11,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [54771530] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:11,612 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:11,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2025-03-16 21:08:11,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975234359] [2025-03-16 21:08:11,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:11,613 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2025-03-16 21:08:11,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:11,613 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-16 21:08:11,613 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2025-03-16 21:08:11,613 INFO L87 Difference]: Start difference. First operand 2283 states and 3350 transitions. Second operand has 13 states, 13 states have (on average 13.076923076923077) internal successors, (170), 12 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:12,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:12,710 INFO L93 Difference]: Finished difference Result 3976 states and 5841 transitions. [2025-03-16 21:08:12,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-16 21:08:12,710 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 13.076923076923077) internal successors, (170), 12 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-16 21:08:12,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:12,713 INFO L225 Difference]: With dead ends: 3976 [2025-03-16 21:08:12,713 INFO L226 Difference]: Without dead ends: 2311 [2025-03-16 21:08:12,715 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2025-03-16 21:08:12,715 INFO L435 NwaCegarLoop]: 1117 mSDtfsCounter, 1377 mSDsluCounter, 11149 mSDsCounter, 0 mSdLazyCounter, 2892 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1377 SdHoareTripleChecker+Valid, 12266 SdHoareTripleChecker+Invalid, 2892 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2892 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:12,715 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1377 Valid, 12266 Invalid, 2892 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2892 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 21:08:12,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2311 states. [2025-03-16 21:08:12,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2311 to 2309. [2025-03-16 21:08:12,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2309 states, 2308 states have (on average 1.464471403812825) internal successors, (3380), 2308 states have internal predecessors, (3380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:12,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2309 states to 2309 states and 3380 transitions. [2025-03-16 21:08:12,731 INFO L78 Accepts]: Start accepts. Automaton has 2309 states and 3380 transitions. Word has length 170 [2025-03-16 21:08:12,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:12,731 INFO L471 AbstractCegarLoop]: Abstraction has 2309 states and 3380 transitions. [2025-03-16 21:08:12,731 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 13.076923076923077) internal successors, (170), 12 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:12,731 INFO L276 IsEmpty]: Start isEmpty. Operand 2309 states and 3380 transitions. [2025-03-16 21:08:12,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-16 21:08:12,733 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:12,733 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:12,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-16 21:08:12,733 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:12,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:12,734 INFO L85 PathProgramCache]: Analyzing trace with hash 202237316, now seen corresponding path program 1 times [2025-03-16 21:08:12,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:12,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961566640] [2025-03-16 21:08:12,735 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:12,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:12,772 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-16 21:08:12,880 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-16 21:08:12,880 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:12,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:13,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:13,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:13,515 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961566640] [2025-03-16 21:08:13,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961566640] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:13,515 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:13,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:13,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925378014] [2025-03-16 21:08:13,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:13,516 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 21:08:13,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:13,516 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 21:08:13,516 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:13,517 INFO L87 Difference]: Start difference. First operand 2309 states and 3380 transitions. Second operand has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:14,102 INFO L93 Difference]: Finished difference Result 4596 states and 6736 transitions. [2025-03-16 21:08:14,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 21:08:14,102 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-16 21:08:14,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:14,106 INFO L225 Difference]: With dead ends: 4596 [2025-03-16 21:08:14,106 INFO L226 Difference]: Without dead ends: 2550 [2025-03-16 21:08:14,108 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:14,108 INFO L435 NwaCegarLoop]: 1126 mSDtfsCounter, 418 mSDsluCounter, 4487 mSDsCounter, 0 mSdLazyCounter, 1276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 418 SdHoareTripleChecker+Valid, 5613 SdHoareTripleChecker+Invalid, 1276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:14,110 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [418 Valid, 5613 Invalid, 1276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1276 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 21:08:14,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2550 states. [2025-03-16 21:08:14,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2550 to 2309. [2025-03-16 21:08:14,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2309 states, 2308 states have (on average 1.4631715771230502) internal successors, (3377), 2308 states have internal predecessors, (3377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2309 states to 2309 states and 3377 transitions. [2025-03-16 21:08:14,133 INFO L78 Accepts]: Start accepts. Automaton has 2309 states and 3377 transitions. Word has length 170 [2025-03-16 21:08:14,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:14,133 INFO L471 AbstractCegarLoop]: Abstraction has 2309 states and 3377 transitions. [2025-03-16 21:08:14,133 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,133 INFO L276 IsEmpty]: Start isEmpty. Operand 2309 states and 3377 transitions. [2025-03-16 21:08:14,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-03-16 21:08:14,135 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:14,135 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:14,135 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-16 21:08:14,135 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:14,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:14,135 INFO L85 PathProgramCache]: Analyzing trace with hash 1003291270, now seen corresponding path program 1 times [2025-03-16 21:08:14,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:14,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569248623] [2025-03-16 21:08:14,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:14,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:14,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-03-16 21:08:14,234 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-03-16 21:08:14,234 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:14,234 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:14,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:14,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:14,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569248623] [2025-03-16 21:08:14,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1569248623] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:14,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:14,568 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:14,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926203764] [2025-03-16 21:08:14,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:14,569 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 21:08:14,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:14,569 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 21:08:14,569 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:14,570 INFO L87 Difference]: Start difference. First operand 2309 states and 3377 transitions. Second operand has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:14,951 INFO L93 Difference]: Finished difference Result 4367 states and 6405 transitions. [2025-03-16 21:08:14,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:14,951 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-03-16 21:08:14,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:14,954 INFO L225 Difference]: With dead ends: 4367 [2025-03-16 21:08:14,954 INFO L226 Difference]: Without dead ends: 2321 [2025-03-16 21:08:14,956 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:14,956 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 4 mSDsluCounter, 3418 mSDsCounter, 0 mSdLazyCounter, 951 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 4561 SdHoareTripleChecker+Invalid, 951 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 951 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:14,957 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 4561 Invalid, 951 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 951 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:08:14,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2321 states. [2025-03-16 21:08:14,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2321 to 2318. [2025-03-16 21:08:14,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2318 states, 2317 states have (on average 1.4613724643936123) internal successors, (3386), 2317 states have internal predecessors, (3386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2318 states to 2318 states and 3386 transitions. [2025-03-16 21:08:14,972 INFO L78 Accepts]: Start accepts. Automaton has 2318 states and 3386 transitions. Word has length 171 [2025-03-16 21:08:14,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:14,972 INFO L471 AbstractCegarLoop]: Abstraction has 2318 states and 3386 transitions. [2025-03-16 21:08:14,972 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:14,973 INFO L276 IsEmpty]: Start isEmpty. Operand 2318 states and 3386 transitions. [2025-03-16 21:08:14,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-03-16 21:08:14,974 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:14,974 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:14,974 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-16 21:08:14,974 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:14,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:14,974 INFO L85 PathProgramCache]: Analyzing trace with hash 1295130111, now seen corresponding path program 1 times [2025-03-16 21:08:14,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:14,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549106596] [2025-03-16 21:08:14,975 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:14,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:15,010 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-03-16 21:08:15,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-03-16 21:08:15,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:15,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:15,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:15,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:15,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549106596] [2025-03-16 21:08:15,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1549106596] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:15,947 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:15,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2025-03-16 21:08:15,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610611487] [2025-03-16 21:08:15,947 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:15,947 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2025-03-16 21:08:15,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:15,948 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-03-16 21:08:15,948 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2025-03-16 21:08:15,948 INFO L87 Difference]: Start difference. First operand 2318 states and 3386 transitions. Second operand has 16 states, 16 states have (on average 10.75) internal successors, (172), 15 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:17,118 INFO L93 Difference]: Finished difference Result 3804 states and 5577 transitions. [2025-03-16 21:08:17,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-03-16 21:08:17,121 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 10.75) internal successors, (172), 15 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-03-16 21:08:17,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:17,124 INFO L225 Difference]: With dead ends: 3804 [2025-03-16 21:08:17,124 INFO L226 Difference]: Without dead ends: 2325 [2025-03-16 21:08:17,125 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=666, Unknown=0, NotChecked=0, Total=756 [2025-03-16 21:08:17,126 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 1956 mSDsluCounter, 10667 mSDsCounter, 0 mSdLazyCounter, 2900 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1956 SdHoareTripleChecker+Valid, 11776 SdHoareTripleChecker+Invalid, 2901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:17,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1956 Valid, 11776 Invalid, 2901 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2900 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 21:08:17,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2325 states. [2025-03-16 21:08:17,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2325 to 2322. [2025-03-16 21:08:17,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2322 states, 2321 states have (on average 1.4610081861266695) internal successors, (3391), 2321 states have internal predecessors, (3391), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2322 states to 2322 states and 3391 transitions. [2025-03-16 21:08:17,147 INFO L78 Accepts]: Start accepts. Automaton has 2322 states and 3391 transitions. Word has length 172 [2025-03-16 21:08:17,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:17,148 INFO L471 AbstractCegarLoop]: Abstraction has 2322 states and 3391 transitions. [2025-03-16 21:08:17,148 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 10.75) internal successors, (172), 15 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,148 INFO L276 IsEmpty]: Start isEmpty. Operand 2322 states and 3391 transitions. [2025-03-16 21:08:17,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-03-16 21:08:17,149 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:17,149 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:17,149 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-16 21:08:17,150 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:17,150 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:17,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1730557569, now seen corresponding path program 1 times [2025-03-16 21:08:17,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:17,151 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521029647] [2025-03-16 21:08:17,151 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:17,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:17,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-03-16 21:08:17,207 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-03-16 21:08:17,207 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:17,207 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:17,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:17,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:17,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521029647] [2025-03-16 21:08:17,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521029647] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:17,346 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:17,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:17,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673293625] [2025-03-16 21:08:17,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:17,346 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:08:17,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:17,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:08:17,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:08:17,347 INFO L87 Difference]: Start difference. First operand 2322 states and 3391 transitions. Second operand has 4 states, 4 states have (on average 43.0) internal successors, (172), 4 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:17,624 INFO L93 Difference]: Finished difference Result 4285 states and 6283 transitions. [2025-03-16 21:08:17,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:08:17,625 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 43.0) internal successors, (172), 4 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-03-16 21:08:17,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:17,628 INFO L225 Difference]: With dead ends: 4285 [2025-03-16 21:08:17,628 INFO L226 Difference]: Without dead ends: 2334 [2025-03-16 21:08:17,629 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:08:17,630 INFO L435 NwaCegarLoop]: 1147 mSDtfsCounter, 0 mSDsluCounter, 2286 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3433 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:17,630 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3433 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:08:17,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2334 states. [2025-03-16 21:08:17,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2334 to 2334. [2025-03-16 21:08:17,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2334 states, 2333 states have (on average 1.458636948135448) internal successors, (3403), 2333 states have internal predecessors, (3403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2334 states to 2334 states and 3403 transitions. [2025-03-16 21:08:17,645 INFO L78 Accepts]: Start accepts. Automaton has 2334 states and 3403 transitions. Word has length 172 [2025-03-16 21:08:17,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:17,645 INFO L471 AbstractCegarLoop]: Abstraction has 2334 states and 3403 transitions. [2025-03-16 21:08:17,645 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 43.0) internal successors, (172), 4 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:17,645 INFO L276 IsEmpty]: Start isEmpty. Operand 2334 states and 3403 transitions. [2025-03-16 21:08:17,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-03-16 21:08:17,646 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:17,646 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:17,646 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-16 21:08:17,647 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:17,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:17,647 INFO L85 PathProgramCache]: Analyzing trace with hash 1338679443, now seen corresponding path program 1 times [2025-03-16 21:08:17,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:17,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427204753] [2025-03-16 21:08:17,647 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:17,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:17,682 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-03-16 21:08:17,713 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-03-16 21:08:17,713 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:17,713 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:18,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:18,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:18,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427204753] [2025-03-16 21:08:18,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1427204753] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:18,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:18,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 21:08:18,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196910741] [2025-03-16 21:08:18,154 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:18,154 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 21:08:18,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:18,156 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 21:08:18,156 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:08:18,156 INFO L87 Difference]: Start difference. First operand 2334 states and 3403 transitions. Second operand has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:19,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:19,878 INFO L93 Difference]: Finished difference Result 6488 states and 9463 transitions. [2025-03-16 21:08:19,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:19,878 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-03-16 21:08:19,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:19,885 INFO L225 Difference]: With dead ends: 6488 [2025-03-16 21:08:19,885 INFO L226 Difference]: Without dead ends: 4325 [2025-03-16 21:08:19,887 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2025-03-16 21:08:19,888 INFO L435 NwaCegarLoop]: 1223 mSDtfsCounter, 2318 mSDsluCounter, 3146 mSDsCounter, 0 mSdLazyCounter, 3964 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2318 SdHoareTripleChecker+Valid, 4369 SdHoareTripleChecker+Invalid, 3964 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3964 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:19,889 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2318 Valid, 4369 Invalid, 3964 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3964 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2025-03-16 21:08:19,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4325 states. [2025-03-16 21:08:19,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4325 to 2366. [2025-03-16 21:08:19,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2366 states, 2365 states have (on average 1.454122621564482) internal successors, (3439), 2365 states have internal predecessors, (3439), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:19,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2366 states to 2366 states and 3439 transitions. [2025-03-16 21:08:19,917 INFO L78 Accepts]: Start accepts. Automaton has 2366 states and 3439 transitions. Word has length 172 [2025-03-16 21:08:19,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:19,917 INFO L471 AbstractCegarLoop]: Abstraction has 2366 states and 3439 transitions. [2025-03-16 21:08:19,917 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:19,917 INFO L276 IsEmpty]: Start isEmpty. Operand 2366 states and 3439 transitions. [2025-03-16 21:08:19,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-03-16 21:08:19,919 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:19,920 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:19,920 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-16 21:08:19,920 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:19,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:19,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1421262751, now seen corresponding path program 1 times [2025-03-16 21:08:19,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:19,920 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486483491] [2025-03-16 21:08:19,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:19,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:19,958 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-03-16 21:08:20,066 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-03-16 21:08:20,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:20,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:20,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:20,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:20,647 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486483491] [2025-03-16 21:08:20,647 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486483491] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:20,647 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:20,647 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:20,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936344294] [2025-03-16 21:08:20,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:20,647 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:20,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:20,648 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:20,648 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:20,648 INFO L87 Difference]: Start difference. First operand 2366 states and 3439 transitions. Second operand has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 6 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:22,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:22,125 INFO L93 Difference]: Finished difference Result 4802 states and 7002 transitions. [2025-03-16 21:08:22,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:22,126 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 6 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-03-16 21:08:22,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:22,128 INFO L225 Difference]: With dead ends: 4802 [2025-03-16 21:08:22,128 INFO L226 Difference]: Without dead ends: 2823 [2025-03-16 21:08:22,128 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:22,129 INFO L435 NwaCegarLoop]: 698 mSDtfsCounter, 5140 mSDsluCounter, 2088 mSDsCounter, 0 mSdLazyCounter, 2725 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5140 SdHoareTripleChecker+Valid, 2786 SdHoareTripleChecker+Invalid, 2726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2725 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:22,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5140 Valid, 2786 Invalid, 2726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2725 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2025-03-16 21:08:22,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2823 states. [2025-03-16 21:08:22,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2823 to 2322. [2025-03-16 21:08:22,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2322 states, 2321 states have (on average 1.4562688496337786) internal successors, (3380), 2321 states have internal predecessors, (3380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:22,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2322 states to 2322 states and 3380 transitions. [2025-03-16 21:08:22,144 INFO L78 Accepts]: Start accepts. Automaton has 2322 states and 3380 transitions. Word has length 172 [2025-03-16 21:08:22,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:22,144 INFO L471 AbstractCegarLoop]: Abstraction has 2322 states and 3380 transitions. [2025-03-16 21:08:22,144 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 6 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:22,144 INFO L276 IsEmpty]: Start isEmpty. Operand 2322 states and 3380 transitions. [2025-03-16 21:08:22,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-16 21:08:22,145 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:22,145 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:22,145 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-16 21:08:22,146 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:22,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:22,146 INFO L85 PathProgramCache]: Analyzing trace with hash 37152167, now seen corresponding path program 1 times [2025-03-16 21:08:22,146 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:22,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182405272] [2025-03-16 21:08:22,146 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:22,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:22,180 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-16 21:08:22,207 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-16 21:08:22,207 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:22,207 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:22,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:22,569 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:22,569 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182405272] [2025-03-16 21:08:22,569 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [182405272] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:22,569 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:22,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 21:08:22,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729113815] [2025-03-16 21:08:22,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:22,570 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 21:08:22,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:22,570 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 21:08:22,570 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:22,570 INFO L87 Difference]: Start difference. First operand 2322 states and 3380 transitions. Second operand has 6 states, 6 states have (on average 28.833333333333332) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:23,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:23,616 INFO L93 Difference]: Finished difference Result 5226 states and 7638 transitions. [2025-03-16 21:08:23,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 21:08:23,617 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.833333333333332) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-16 21:08:23,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:23,619 INFO L225 Difference]: With dead ends: 5226 [2025-03-16 21:08:23,619 INFO L226 Difference]: Without dead ends: 3065 [2025-03-16 21:08:23,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:23,621 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 2615 mSDsluCounter, 2349 mSDsCounter, 0 mSdLazyCounter, 2228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2615 SdHoareTripleChecker+Valid, 3280 SdHoareTripleChecker+Invalid, 2228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:23,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2615 Valid, 3280 Invalid, 2228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2228 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 21:08:23,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3065 states. [2025-03-16 21:08:23,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3065 to 2289. [2025-03-16 21:08:23,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2289 states, 2288 states have (on average 1.457167832167832) internal successors, (3334), 2288 states have internal predecessors, (3334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:23,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 2289 states and 3334 transitions. [2025-03-16 21:08:23,639 INFO L78 Accepts]: Start accepts. Automaton has 2289 states and 3334 transitions. Word has length 173 [2025-03-16 21:08:23,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:23,639 INFO L471 AbstractCegarLoop]: Abstraction has 2289 states and 3334 transitions. [2025-03-16 21:08:23,639 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.833333333333332) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:23,640 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 3334 transitions. [2025-03-16 21:08:23,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-16 21:08:23,641 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:23,641 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:23,641 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-16 21:08:23,641 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:23,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:23,641 INFO L85 PathProgramCache]: Analyzing trace with hash -1910337968, now seen corresponding path program 1 times [2025-03-16 21:08:23,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:23,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276818725] [2025-03-16 21:08:23,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:23,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:23,675 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-16 21:08:23,702 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-16 21:08:23,703 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:23,703 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:24,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:24,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:24,690 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276818725] [2025-03-16 21:08:24,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1276818725] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:24,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:24,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-16 21:08:24,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676938927] [2025-03-16 21:08:24,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:24,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2025-03-16 21:08:24,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:24,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2025-03-16 21:08:24,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2025-03-16 21:08:24,691 INFO L87 Difference]: Start difference. First operand 2289 states and 3334 transitions. Second operand has 14 states, 14 states have (on average 12.357142857142858) internal successors, (173), 13 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:26,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:26,399 INFO L93 Difference]: Finished difference Result 5638 states and 8270 transitions. [2025-03-16 21:08:26,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-16 21:08:26,400 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 12.357142857142858) internal successors, (173), 13 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-16 21:08:26,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:26,403 INFO L225 Difference]: With dead ends: 5638 [2025-03-16 21:08:26,403 INFO L226 Difference]: Without dead ends: 4117 [2025-03-16 21:08:26,405 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=432, Unknown=0, NotChecked=0, Total=552 [2025-03-16 21:08:26,406 INFO L435 NwaCegarLoop]: 729 mSDtfsCounter, 1714 mSDsluCounter, 3841 mSDsCounter, 0 mSdLazyCounter, 4067 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1714 SdHoareTripleChecker+Valid, 4570 SdHoareTripleChecker+Invalid, 4068 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 4067 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:26,406 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1714 Valid, 4570 Invalid, 4068 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 4067 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2025-03-16 21:08:26,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4117 states. [2025-03-16 21:08:26,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4117 to 3476. [2025-03-16 21:08:26,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3476 states, 3475 states have (on average 1.4633093525179857) internal successors, (5085), 3475 states have internal predecessors, (5085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:26,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3476 states to 3476 states and 5085 transitions. [2025-03-16 21:08:26,433 INFO L78 Accepts]: Start accepts. Automaton has 3476 states and 5085 transitions. Word has length 173 [2025-03-16 21:08:26,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:26,433 INFO L471 AbstractCegarLoop]: Abstraction has 3476 states and 5085 transitions. [2025-03-16 21:08:26,433 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 12.357142857142858) internal successors, (173), 13 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:26,434 INFO L276 IsEmpty]: Start isEmpty. Operand 3476 states and 5085 transitions. [2025-03-16 21:08:26,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-16 21:08:26,435 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:26,435 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:26,435 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-16 21:08:26,435 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:26,436 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:26,436 INFO L85 PathProgramCache]: Analyzing trace with hash -2035134727, now seen corresponding path program 1 times [2025-03-16 21:08:26,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:26,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845952528] [2025-03-16 21:08:26,436 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:26,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:26,471 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-16 21:08:26,494 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-16 21:08:26,494 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:26,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:26,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:26,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:26,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845952528] [2025-03-16 21:08:26,904 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1845952528] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:26,904 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:26,904 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 21:08:26,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561829862] [2025-03-16 21:08:26,905 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:26,905 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 21:08:26,905 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:26,905 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 21:08:26,905 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-03-16 21:08:26,906 INFO L87 Difference]: Start difference. First operand 3476 states and 5085 transitions. Second operand has 8 states, 8 states have (on average 21.625) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:28,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:28,288 INFO L93 Difference]: Finished difference Result 8572 states and 12557 transitions. [2025-03-16 21:08:28,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:28,288 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.625) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-16 21:08:28,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:28,294 INFO L225 Difference]: With dead ends: 8572 [2025-03-16 21:08:28,294 INFO L226 Difference]: Without dead ends: 6112 [2025-03-16 21:08:28,296 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2025-03-16 21:08:28,297 INFO L435 NwaCegarLoop]: 1601 mSDtfsCounter, 3748 mSDsluCounter, 6552 mSDsCounter, 0 mSdLazyCounter, 2985 mSolverCounterSat, 64 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3748 SdHoareTripleChecker+Valid, 8153 SdHoareTripleChecker+Invalid, 3049 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 64 IncrementalHoareTripleChecker+Valid, 2985 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:28,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3748 Valid, 8153 Invalid, 3049 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [64 Valid, 2985 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2025-03-16 21:08:28,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6112 states. [2025-03-16 21:08:28,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6112 to 3805. [2025-03-16 21:08:28,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3805 states, 3804 states have (on average 1.4584647739221872) internal successors, (5548), 3804 states have internal predecessors, (5548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:28,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3805 states to 3805 states and 5548 transitions. [2025-03-16 21:08:28,332 INFO L78 Accepts]: Start accepts. Automaton has 3805 states and 5548 transitions. Word has length 173 [2025-03-16 21:08:28,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:28,332 INFO L471 AbstractCegarLoop]: Abstraction has 3805 states and 5548 transitions. [2025-03-16 21:08:28,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.625) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:28,333 INFO L276 IsEmpty]: Start isEmpty. Operand 3805 states and 5548 transitions. [2025-03-16 21:08:28,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-16 21:08:28,335 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:28,335 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:28,335 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-16 21:08:28,335 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:28,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:28,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1812205293, now seen corresponding path program 1 times [2025-03-16 21:08:28,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:28,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132148077] [2025-03-16 21:08:28,336 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:28,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:28,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-16 21:08:28,419 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-16 21:08:28,419 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:28,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:28,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:28,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:28,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132148077] [2025-03-16 21:08:28,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132148077] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:28,626 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:28,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:28,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017125197] [2025-03-16 21:08:28,626 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:28,626 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:28,626 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:28,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:28,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:28,626 INFO L87 Difference]: Start difference. First operand 3805 states and 5548 transitions. Second operand has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:29,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:29,752 INFO L93 Difference]: Finished difference Result 7779 states and 11393 transitions. [2025-03-16 21:08:29,752 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 21:08:29,752 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-16 21:08:29,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:29,755 INFO L225 Difference]: With dead ends: 7779 [2025-03-16 21:08:29,755 INFO L226 Difference]: Without dead ends: 4996 [2025-03-16 21:08:29,757 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:29,757 INFO L435 NwaCegarLoop]: 746 mSDtfsCounter, 3165 mSDsluCounter, 2221 mSDsCounter, 0 mSdLazyCounter, 2589 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3165 SdHoareTripleChecker+Valid, 2967 SdHoareTripleChecker+Invalid, 2591 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2589 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:29,757 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3165 Valid, 2967 Invalid, 2591 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2589 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-16 21:08:29,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4996 states. [2025-03-16 21:08:29,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4996 to 3731. [2025-03-16 21:08:29,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3731 states, 3730 states have (on average 1.460053619302949) internal successors, (5446), 3730 states have internal predecessors, (5446), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:29,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3731 states to 3731 states and 5446 transitions. [2025-03-16 21:08:29,779 INFO L78 Accepts]: Start accepts. Automaton has 3731 states and 5446 transitions. Word has length 173 [2025-03-16 21:08:29,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:29,780 INFO L471 AbstractCegarLoop]: Abstraction has 3731 states and 5446 transitions. [2025-03-16 21:08:29,780 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:29,780 INFO L276 IsEmpty]: Start isEmpty. Operand 3731 states and 5446 transitions. [2025-03-16 21:08:29,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-16 21:08:29,781 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:29,781 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:29,782 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-16 21:08:29,782 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:29,782 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:29,782 INFO L85 PathProgramCache]: Analyzing trace with hash -1678180418, now seen corresponding path program 1 times [2025-03-16 21:08:29,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:29,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753704168] [2025-03-16 21:08:29,782 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:29,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:29,816 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-16 21:08:29,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-16 21:08:29,886 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:29,886 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:30,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:30,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753704168] [2025-03-16 21:08:30,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [753704168] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:30,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:30,437 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:30,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888362602] [2025-03-16 21:08:30,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:30,437 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:30,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:30,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:30,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:30,438 INFO L87 Difference]: Start difference. First operand 3731 states and 5446 transitions. Second operand has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:31,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:31,984 INFO L93 Difference]: Finished difference Result 6838 states and 10022 transitions. [2025-03-16 21:08:31,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:31,984 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-16 21:08:31,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:31,987 INFO L225 Difference]: With dead ends: 6838 [2025-03-16 21:08:31,987 INFO L226 Difference]: Without dead ends: 3292 [2025-03-16 21:08:31,990 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:31,990 INFO L435 NwaCegarLoop]: 698 mSDtfsCounter, 3546 mSDsluCounter, 2088 mSDsCounter, 0 mSdLazyCounter, 2725 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3546 SdHoareTripleChecker+Valid, 2786 SdHoareTripleChecker+Invalid, 2726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2725 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:31,990 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3546 Valid, 2786 Invalid, 2726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2725 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2025-03-16 21:08:31,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3292 states. [2025-03-16 21:08:32,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3292 to 2671. [2025-03-16 21:08:32,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2670 states have (on average 1.4677902621722847) internal successors, (3919), 2670 states have internal predecessors, (3919), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:32,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3919 transitions. [2025-03-16 21:08:32,011 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3919 transitions. Word has length 173 [2025-03-16 21:08:32,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:32,011 INFO L471 AbstractCegarLoop]: Abstraction has 2671 states and 3919 transitions. [2025-03-16 21:08:32,011 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:32,011 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3919 transitions. [2025-03-16 21:08:32,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-16 21:08:32,012 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:32,012 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:32,012 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-16 21:08:32,012 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:32,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:32,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1279527276, now seen corresponding path program 1 times [2025-03-16 21:08:32,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:32,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434944] [2025-03-16 21:08:32,012 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:32,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:32,049 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-16 21:08:32,148 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-16 21:08:32,148 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:32,149 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:32,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:32,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:32,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434944] [2025-03-16 21:08:32,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434944] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:32,580 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:32,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:32,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849687993] [2025-03-16 21:08:32,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:32,581 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:32,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:32,581 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:32,581 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:32,581 INFO L87 Difference]: Start difference. First operand 2671 states and 3919 transitions. Second operand has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:33,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:33,922 INFO L93 Difference]: Finished difference Result 5426 states and 7969 transitions. [2025-03-16 21:08:33,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:33,922 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-16 21:08:33,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:33,925 INFO L225 Difference]: With dead ends: 5426 [2025-03-16 21:08:33,925 INFO L226 Difference]: Without dead ends: 2947 [2025-03-16 21:08:33,926 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-16 21:08:33,927 INFO L435 NwaCegarLoop]: 699 mSDtfsCounter, 2409 mSDsluCounter, 2791 mSDsCounter, 0 mSdLazyCounter, 3399 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2409 SdHoareTripleChecker+Valid, 3490 SdHoareTripleChecker+Invalid, 3400 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3399 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:33,927 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2409 Valid, 3490 Invalid, 3400 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3399 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2025-03-16 21:08:33,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2947 states. [2025-03-16 21:08:33,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2947 to 2673. [2025-03-16 21:08:33,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2673 states, 2672 states have (on average 1.467440119760479) internal successors, (3921), 2672 states have internal predecessors, (3921), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:33,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2673 states to 2673 states and 3921 transitions. [2025-03-16 21:08:33,943 INFO L78 Accepts]: Start accepts. Automaton has 2673 states and 3921 transitions. Word has length 174 [2025-03-16 21:08:33,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:33,943 INFO L471 AbstractCegarLoop]: Abstraction has 2673 states and 3921 transitions. [2025-03-16 21:08:33,943 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:33,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2673 states and 3921 transitions. [2025-03-16 21:08:33,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-16 21:08:33,944 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:33,944 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:33,944 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-16 21:08:33,944 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:33,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:33,945 INFO L85 PathProgramCache]: Analyzing trace with hash -2110037006, now seen corresponding path program 1 times [2025-03-16 21:08:33,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:33,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140753187] [2025-03-16 21:08:33,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:33,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:33,978 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-16 21:08:34,029 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-16 21:08:34,029 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:34,029 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:34,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:34,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:34,633 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140753187] [2025-03-16 21:08:34,633 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2140753187] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:34,633 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:34,633 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-16 21:08:34,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026391609] [2025-03-16 21:08:34,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:34,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-03-16 21:08:34,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:34,634 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-16 21:08:34,634 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2025-03-16 21:08:34,634 INFO L87 Difference]: Start difference. First operand 2673 states and 3921 transitions. Second operand has 11 states, 11 states have (on average 15.818181818181818) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:35,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:35,304 INFO L93 Difference]: Finished difference Result 5381 states and 7916 transitions. [2025-03-16 21:08:35,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-16 21:08:35,304 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 15.818181818181818) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-16 21:08:35,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:35,306 INFO L225 Difference]: With dead ends: 5381 [2025-03-16 21:08:35,306 INFO L226 Difference]: Without dead ends: 3067 [2025-03-16 21:08:35,308 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2025-03-16 21:08:35,308 INFO L435 NwaCegarLoop]: 1133 mSDtfsCounter, 1580 mSDsluCounter, 6870 mSDsCounter, 0 mSdLazyCounter, 1799 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1580 SdHoareTripleChecker+Valid, 8003 SdHoareTripleChecker+Invalid, 1801 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1799 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:35,308 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1580 Valid, 8003 Invalid, 1801 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1799 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:08:35,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3067 states. [2025-03-16 21:08:35,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3067 to 2686. [2025-03-16 21:08:35,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2686 states, 2685 states have (on average 1.4651769087523276) internal successors, (3934), 2685 states have internal predecessors, (3934), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:35,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2686 states to 2686 states and 3934 transitions. [2025-03-16 21:08:35,327 INFO L78 Accepts]: Start accepts. Automaton has 2686 states and 3934 transitions. Word has length 174 [2025-03-16 21:08:35,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:35,327 INFO L471 AbstractCegarLoop]: Abstraction has 2686 states and 3934 transitions. [2025-03-16 21:08:35,327 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 15.818181818181818) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:35,327 INFO L276 IsEmpty]: Start isEmpty. Operand 2686 states and 3934 transitions. [2025-03-16 21:08:35,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-16 21:08:35,327 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:35,327 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:35,327 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-16 21:08:35,328 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:35,328 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:35,328 INFO L85 PathProgramCache]: Analyzing trace with hash -792505736, now seen corresponding path program 1 times [2025-03-16 21:08:35,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:35,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826610433] [2025-03-16 21:08:35,328 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:35,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:35,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-16 21:08:35,417 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-16 21:08:35,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:35,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:35,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:35,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:35,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [826610433] [2025-03-16 21:08:35,594 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [826610433] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:35,594 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:35,594 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:35,594 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873017884] [2025-03-16 21:08:35,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:35,595 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:35,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:35,595 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:35,595 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:35,595 INFO L87 Difference]: Start difference. First operand 2686 states and 3934 transitions. Second operand has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:36,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:36,652 INFO L93 Difference]: Finished difference Result 5205 states and 7643 transitions. [2025-03-16 21:08:36,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:36,653 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-16 21:08:36,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:36,655 INFO L225 Difference]: With dead ends: 5205 [2025-03-16 21:08:36,655 INFO L226 Difference]: Without dead ends: 2756 [2025-03-16 21:08:36,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:36,657 INFO L435 NwaCegarLoop]: 736 mSDtfsCounter, 1259 mSDsluCounter, 2933 mSDsCounter, 0 mSdLazyCounter, 3220 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1259 SdHoareTripleChecker+Valid, 3669 SdHoareTripleChecker+Invalid, 3222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:36,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1259 Valid, 3669 Invalid, 3222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3220 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 21:08:36,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2756 states. [2025-03-16 21:08:36,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2756 to 2756. [2025-03-16 21:08:36,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2756 states, 2755 states have (on average 1.4584392014519056) internal successors, (4018), 2755 states have internal predecessors, (4018), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:36,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2756 states to 2756 states and 4018 transitions. [2025-03-16 21:08:36,676 INFO L78 Accepts]: Start accepts. Automaton has 2756 states and 4018 transitions. Word has length 174 [2025-03-16 21:08:36,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:36,676 INFO L471 AbstractCegarLoop]: Abstraction has 2756 states and 4018 transitions. [2025-03-16 21:08:36,676 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.857142857142858) internal successors, (174), 6 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:36,676 INFO L276 IsEmpty]: Start isEmpty. Operand 2756 states and 4018 transitions. [2025-03-16 21:08:36,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-16 21:08:36,677 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:36,677 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:36,677 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-16 21:08:36,677 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:36,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:36,678 INFO L85 PathProgramCache]: Analyzing trace with hash 609980489, now seen corresponding path program 1 times [2025-03-16 21:08:36,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:36,678 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944614289] [2025-03-16 21:08:36,678 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:36,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:36,720 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-16 21:08:36,809 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-16 21:08:36,809 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:36,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:37,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:37,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:37,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944614289] [2025-03-16 21:08:37,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944614289] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:37,211 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:37,211 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:37,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362630463] [2025-03-16 21:08:37,211 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:37,211 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:37,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:37,211 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:37,211 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:37,212 INFO L87 Difference]: Start difference. First operand 2756 states and 4018 transitions. Second operand has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:37,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:37,798 INFO L93 Difference]: Finished difference Result 5491 states and 8014 transitions. [2025-03-16 21:08:37,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:37,799 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-16 21:08:37,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:37,801 INFO L225 Difference]: With dead ends: 5491 [2025-03-16 21:08:37,801 INFO L226 Difference]: Without dead ends: 3030 [2025-03-16 21:08:37,803 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-16 21:08:37,803 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2351 mSDsluCounter, 4417 mSDsCounter, 0 mSdLazyCounter, 1366 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2351 SdHoareTripleChecker+Valid, 5523 SdHoareTripleChecker+Invalid, 1366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1366 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:37,803 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2351 Valid, 5523 Invalid, 1366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1366 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 21:08:37,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3030 states. [2025-03-16 21:08:37,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3030 to 2755. [2025-03-16 21:08:37,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2755 states, 2754 states have (on average 1.458242556281772) internal successors, (4016), 2754 states have internal predecessors, (4016), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:37,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2755 states to 2755 states and 4016 transitions. [2025-03-16 21:08:37,840 INFO L78 Accepts]: Start accepts. Automaton has 2755 states and 4016 transitions. Word has length 175 [2025-03-16 21:08:37,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:37,840 INFO L471 AbstractCegarLoop]: Abstraction has 2755 states and 4016 transitions. [2025-03-16 21:08:37,840 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:37,840 INFO L276 IsEmpty]: Start isEmpty. Operand 2755 states and 4016 transitions. [2025-03-16 21:08:37,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-16 21:08:37,840 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:37,841 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:37,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-03-16 21:08:37,841 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:37,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:37,841 INFO L85 PathProgramCache]: Analyzing trace with hash 1085038283, now seen corresponding path program 1 times [2025-03-16 21:08:37,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:37,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169748258] [2025-03-16 21:08:37,841 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:37,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:37,873 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-16 21:08:37,891 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-16 21:08:37,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:37,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:38,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:38,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:38,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169748258] [2025-03-16 21:08:38,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [169748258] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:38,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:38,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 21:08:38,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463163280] [2025-03-16 21:08:38,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:38,030 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:38,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:38,031 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:38,031 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:38,031 INFO L87 Difference]: Start difference. First operand 2755 states and 4016 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:38,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:38,341 INFO L93 Difference]: Finished difference Result 5436 states and 7943 transitions. [2025-03-16 21:08:38,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:38,341 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-16 21:08:38,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:38,344 INFO L225 Difference]: With dead ends: 5436 [2025-03-16 21:08:38,344 INFO L226 Difference]: Without dead ends: 2923 [2025-03-16 21:08:38,345 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:38,346 INFO L435 NwaCegarLoop]: 1146 mSDtfsCounter, 8 mSDsluCounter, 3429 mSDsCounter, 0 mSdLazyCounter, 936 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 4575 SdHoareTripleChecker+Invalid, 936 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 936 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:38,346 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 4575 Invalid, 936 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 936 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 21:08:38,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2923 states. [2025-03-16 21:08:38,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2923 to 2923. [2025-03-16 21:08:38,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2923 states, 2922 states have (on average 1.4510609171800137) internal successors, (4240), 2922 states have internal predecessors, (4240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:38,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2923 states to 2923 states and 4240 transitions. [2025-03-16 21:08:38,367 INFO L78 Accepts]: Start accepts. Automaton has 2923 states and 4240 transitions. Word has length 175 [2025-03-16 21:08:38,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:38,367 INFO L471 AbstractCegarLoop]: Abstraction has 2923 states and 4240 transitions. [2025-03-16 21:08:38,367 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:38,367 INFO L276 IsEmpty]: Start isEmpty. Operand 2923 states and 4240 transitions. [2025-03-16 21:08:38,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-16 21:08:38,368 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:38,368 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:38,368 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-16 21:08:38,368 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:38,369 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:38,369 INFO L85 PathProgramCache]: Analyzing trace with hash -940001402, now seen corresponding path program 1 times [2025-03-16 21:08:38,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:38,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125466355] [2025-03-16 21:08:38,369 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:38,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:38,404 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-16 21:08:38,458 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-16 21:08:38,458 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:38,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:38,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:38,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:38,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125466355] [2025-03-16 21:08:38,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [125466355] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:38,815 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:38,816 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:38,816 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333734483] [2025-03-16 21:08:38,816 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:38,816 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 21:08:38,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:38,816 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 21:08:38,816 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:38,816 INFO L87 Difference]: Start difference. First operand 2923 states and 4240 transitions. Second operand has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:39,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:39,591 INFO L93 Difference]: Finished difference Result 6295 states and 9161 transitions. [2025-03-16 21:08:39,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 21:08:39,592 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-16 21:08:39,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:39,595 INFO L225 Difference]: With dead ends: 6295 [2025-03-16 21:08:39,595 INFO L226 Difference]: Without dead ends: 3598 [2025-03-16 21:08:39,596 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-16 21:08:39,597 INFO L435 NwaCegarLoop]: 1108 mSDtfsCounter, 3577 mSDsluCounter, 4426 mSDsCounter, 0 mSdLazyCounter, 1355 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3577 SdHoareTripleChecker+Valid, 5534 SdHoareTripleChecker+Invalid, 1356 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1355 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:39,597 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3577 Valid, 5534 Invalid, 1356 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1355 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 21:08:39,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3598 states. [2025-03-16 21:08:39,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3598 to 2927. [2025-03-16 21:08:39,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2927 states, 2926 states have (on average 1.4490772385509227) internal successors, (4240), 2926 states have internal predecessors, (4240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:39,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2927 states to 2927 states and 4240 transitions. [2025-03-16 21:08:39,616 INFO L78 Accepts]: Start accepts. Automaton has 2927 states and 4240 transitions. Word has length 175 [2025-03-16 21:08:39,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:39,616 INFO L471 AbstractCegarLoop]: Abstraction has 2927 states and 4240 transitions. [2025-03-16 21:08:39,616 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:39,616 INFO L276 IsEmpty]: Start isEmpty. Operand 2927 states and 4240 transitions. [2025-03-16 21:08:39,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-16 21:08:39,617 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:39,617 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:39,617 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2025-03-16 21:08:39,617 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:39,617 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:39,617 INFO L85 PathProgramCache]: Analyzing trace with hash 857892405, now seen corresponding path program 1 times [2025-03-16 21:08:39,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:39,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034465490] [2025-03-16 21:08:39,618 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:39,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:39,651 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-16 21:08:39,692 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-16 21:08:39,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:39,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:39,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:39,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:39,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034465490] [2025-03-16 21:08:39,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034465490] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:39,992 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:39,992 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:39,992 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523299362] [2025-03-16 21:08:39,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:39,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:39,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:39,992 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:39,992 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:39,993 INFO L87 Difference]: Start difference. First operand 2927 states and 4240 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:40,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:40,626 INFO L93 Difference]: Finished difference Result 6286 states and 9141 transitions. [2025-03-16 21:08:40,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:40,627 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-16 21:08:40,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:40,630 INFO L225 Difference]: With dead ends: 6286 [2025-03-16 21:08:40,630 INFO L226 Difference]: Without dead ends: 3552 [2025-03-16 21:08:40,631 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:40,632 INFO L435 NwaCegarLoop]: 1112 mSDtfsCounter, 3569 mSDsluCounter, 2219 mSDsCounter, 0 mSdLazyCounter, 802 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3569 SdHoareTripleChecker+Valid, 3331 SdHoareTripleChecker+Invalid, 802 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 802 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:40,632 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3569 Valid, 3331 Invalid, 802 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 802 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:08:40,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3552 states. [2025-03-16 21:08:40,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3552 to 2881. [2025-03-16 21:08:40,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2881 states, 2880 states have (on average 1.4506944444444445) internal successors, (4178), 2880 states have internal predecessors, (4178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:40,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2881 states to 2881 states and 4178 transitions. [2025-03-16 21:08:40,649 INFO L78 Accepts]: Start accepts. Automaton has 2881 states and 4178 transitions. Word has length 175 [2025-03-16 21:08:40,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:40,649 INFO L471 AbstractCegarLoop]: Abstraction has 2881 states and 4178 transitions. [2025-03-16 21:08:40,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:40,649 INFO L276 IsEmpty]: Start isEmpty. Operand 2881 states and 4178 transitions. [2025-03-16 21:08:40,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-16 21:08:40,650 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:40,650 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:40,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-03-16 21:08:40,650 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:40,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:40,650 INFO L85 PathProgramCache]: Analyzing trace with hash -2064015971, now seen corresponding path program 1 times [2025-03-16 21:08:40,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:40,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602885021] [2025-03-16 21:08:40,650 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:40,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:40,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-16 21:08:40,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-16 21:08:40,742 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:40,743 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:41,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:41,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:41,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602885021] [2025-03-16 21:08:41,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [602885021] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:41,020 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:41,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 21:08:41,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782897002] [2025-03-16 21:08:41,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:41,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 21:08:41,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:41,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 21:08:41,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:41,021 INFO L87 Difference]: Start difference. First operand 2881 states and 4178 transitions. Second operand has 5 states, 5 states have (on average 35.2) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:41,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:41,694 INFO L93 Difference]: Finished difference Result 6208 states and 9036 transitions. [2025-03-16 21:08:41,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:41,694 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.2) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-16 21:08:41,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:41,697 INFO L225 Difference]: With dead ends: 6208 [2025-03-16 21:08:41,697 INFO L226 Difference]: Without dead ends: 3536 [2025-03-16 21:08:41,699 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 21:08:41,699 INFO L435 NwaCegarLoop]: 1112 mSDtfsCounter, 3544 mSDsluCounter, 2219 mSDsCounter, 0 mSdLazyCounter, 802 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3544 SdHoareTripleChecker+Valid, 3331 SdHoareTripleChecker+Invalid, 802 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 802 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:41,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3544 Valid, 3331 Invalid, 802 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 802 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 21:08:41,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3536 states. [2025-03-16 21:08:41,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3536 to 2865. [2025-03-16 21:08:41,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2865 states, 2864 states have (on average 1.4504189944134078) internal successors, (4154), 2864 states have internal predecessors, (4154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:41,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2865 states to 2865 states and 4154 transitions. [2025-03-16 21:08:41,718 INFO L78 Accepts]: Start accepts. Automaton has 2865 states and 4154 transitions. Word has length 176 [2025-03-16 21:08:41,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:41,718 INFO L471 AbstractCegarLoop]: Abstraction has 2865 states and 4154 transitions. [2025-03-16 21:08:41,718 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.2) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:41,718 INFO L276 IsEmpty]: Start isEmpty. Operand 2865 states and 4154 transitions. [2025-03-16 21:08:41,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-16 21:08:41,718 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:41,718 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:41,718 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-03-16 21:08:41,719 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:41,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:41,719 INFO L85 PathProgramCache]: Analyzing trace with hash -1888343801, now seen corresponding path program 1 times [2025-03-16 21:08:41,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:41,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087585332] [2025-03-16 21:08:41,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:41,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:41,753 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-16 21:08:41,793 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-16 21:08:41,793 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:41,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:42,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:42,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:42,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087585332] [2025-03-16 21:08:42,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087585332] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:42,147 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:42,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 21:08:42,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874984442] [2025-03-16 21:08:42,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:42,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 21:08:42,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:42,148 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 21:08:42,148 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:42,148 INFO L87 Difference]: Start difference. First operand 2865 states and 4154 transitions. Second operand has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:42,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:42,584 INFO L93 Difference]: Finished difference Result 5575 states and 8098 transitions. [2025-03-16 21:08:42,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 21:08:42,584 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-16 21:08:42,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:42,586 INFO L225 Difference]: With dead ends: 5575 [2025-03-16 21:08:42,586 INFO L226 Difference]: Without dead ends: 2917 [2025-03-16 21:08:42,588 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 21:08:42,588 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 3 mSDsluCounter, 4555 mSDsCounter, 0 mSdLazyCounter, 1189 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 5697 SdHoareTripleChecker+Invalid, 1189 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1189 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:42,589 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 5697 Invalid, 1189 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1189 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:08:42,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2917 states. [2025-03-16 21:08:42,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2917 to 2904. [2025-03-16 21:08:42,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2904 states, 2903 states have (on average 1.4488460213572167) internal successors, (4206), 2903 states have internal predecessors, (4206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:42,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2904 states to 2904 states and 4206 transitions. [2025-03-16 21:08:42,605 INFO L78 Accepts]: Start accepts. Automaton has 2904 states and 4206 transitions. Word has length 176 [2025-03-16 21:08:42,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:42,605 INFO L471 AbstractCegarLoop]: Abstraction has 2904 states and 4206 transitions. [2025-03-16 21:08:42,605 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:42,605 INFO L276 IsEmpty]: Start isEmpty. Operand 2904 states and 4206 transitions. [2025-03-16 21:08:42,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-03-16 21:08:42,606 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:42,606 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:42,606 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-03-16 21:08:42,606 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:42,607 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:42,607 INFO L85 PathProgramCache]: Analyzing trace with hash 1383619020, now seen corresponding path program 1 times [2025-03-16 21:08:42,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:42,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806357391] [2025-03-16 21:08:42,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:42,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:42,641 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-03-16 21:08:42,663 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-03-16 21:08:42,663 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:42,663 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:43,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:43,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:43,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806357391] [2025-03-16 21:08:43,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806357391] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:43,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:43,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-16 21:08:43,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285165027] [2025-03-16 21:08:43,317 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:43,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-03-16 21:08:43,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:43,318 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-16 21:08:43,318 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-16 21:08:43,318 INFO L87 Difference]: Start difference. First operand 2904 states and 4206 transitions. Second operand has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:44,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:44,687 INFO L93 Difference]: Finished difference Result 6265 states and 9116 transitions. [2025-03-16 21:08:44,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-16 21:08:44,688 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-03-16 21:08:44,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:44,690 INFO L225 Difference]: With dead ends: 6265 [2025-03-16 21:08:44,690 INFO L226 Difference]: Without dead ends: 3698 [2025-03-16 21:08:44,691 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-16 21:08:44,691 INFO L435 NwaCegarLoop]: 1220 mSDtfsCounter, 210 mSDsluCounter, 5679 mSDsCounter, 0 mSdLazyCounter, 3666 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 6899 SdHoareTripleChecker+Invalid, 3670 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 3666 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:44,692 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [210 Valid, 6899 Invalid, 3670 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 3666 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2025-03-16 21:08:44,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3698 states. [2025-03-16 21:08:44,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3698 to 3264. [2025-03-16 21:08:44,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3264 states, 3263 states have (on average 1.453263867606497) internal successors, (4742), 3263 states have internal predecessors, (4742), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:44,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3264 states to 3264 states and 4742 transitions. [2025-03-16 21:08:44,711 INFO L78 Accepts]: Start accepts. Automaton has 3264 states and 4742 transitions. Word has length 177 [2025-03-16 21:08:44,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:44,711 INFO L471 AbstractCegarLoop]: Abstraction has 3264 states and 4742 transitions. [2025-03-16 21:08:44,711 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:44,711 INFO L276 IsEmpty]: Start isEmpty. Operand 3264 states and 4742 transitions. [2025-03-16 21:08:44,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-16 21:08:44,712 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:44,712 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:44,712 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-03-16 21:08:44,712 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:44,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:44,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1218381814, now seen corresponding path program 1 times [2025-03-16 21:08:44,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:44,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039462979] [2025-03-16 21:08:44,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:44,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:44,743 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-16 21:08:44,784 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-16 21:08:44,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:44,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:45,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:45,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:45,296 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039462979] [2025-03-16 21:08:45,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039462979] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:45,296 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:45,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 21:08:45,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86663003] [2025-03-16 21:08:45,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:45,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-16 21:08:45,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:45,297 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-16 21:08:45,297 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2025-03-16 21:08:45,297 INFO L87 Difference]: Start difference. First operand 3264 states and 4742 transitions. Second operand has 9 states, 9 states have (on average 19.77777777777778) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:45,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:45,754 INFO L93 Difference]: Finished difference Result 6509 states and 9481 transitions. [2025-03-16 21:08:45,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-16 21:08:45,754 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 19.77777777777778) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-16 21:08:45,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:45,756 INFO L225 Difference]: With dead ends: 6509 [2025-03-16 21:08:45,756 INFO L226 Difference]: Without dead ends: 3625 [2025-03-16 21:08:45,757 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-16 21:08:45,758 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1415 mSDsluCounter, 4687 mSDsCounter, 0 mSdLazyCounter, 1296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1415 SdHoareTripleChecker+Valid, 5821 SdHoareTripleChecker+Invalid, 1297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:45,758 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1415 Valid, 5821 Invalid, 1297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1296 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 21:08:45,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3625 states. [2025-03-16 21:08:45,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3625 to 3210. [2025-03-16 21:08:45,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3210 states, 3209 states have (on average 1.4527890308507323) internal successors, (4662), 3209 states have internal predecessors, (4662), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:45,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3210 states to 3210 states and 4662 transitions. [2025-03-16 21:08:45,776 INFO L78 Accepts]: Start accepts. Automaton has 3210 states and 4662 transitions. Word has length 178 [2025-03-16 21:08:45,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:45,776 INFO L471 AbstractCegarLoop]: Abstraction has 3210 states and 4662 transitions. [2025-03-16 21:08:45,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 19.77777777777778) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:45,776 INFO L276 IsEmpty]: Start isEmpty. Operand 3210 states and 4662 transitions. [2025-03-16 21:08:45,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-16 21:08:45,777 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:45,777 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:45,777 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2025-03-16 21:08:45,777 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:45,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:45,777 INFO L85 PathProgramCache]: Analyzing trace with hash 1843165565, now seen corresponding path program 1 times [2025-03-16 21:08:45,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:45,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744705268] [2025-03-16 21:08:45,778 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:45,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:45,811 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-16 21:08:45,866 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-16 21:08:45,867 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:45,867 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 21:08:46,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 21:08:46,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 21:08:46,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744705268] [2025-03-16 21:08:46,008 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744705268] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 21:08:46,008 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 21:08:46,008 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 21:08:46,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360001812] [2025-03-16 21:08:46,008 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 21:08:46,008 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 21:08:46,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 21:08:46,008 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 21:08:46,008 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 21:08:46,008 INFO L87 Difference]: Start difference. First operand 3210 states and 4662 transitions. Second operand has 4 states, 4 states have (on average 44.5) internal successors, (178), 3 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:46,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 21:08:46,257 INFO L93 Difference]: Finished difference Result 6047 states and 8801 transitions. [2025-03-16 21:08:46,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 21:08:46,258 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 3 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-16 21:08:46,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 21:08:46,260 INFO L225 Difference]: With dead ends: 6047 [2025-03-16 21:08:46,260 INFO L226 Difference]: Without dead ends: 3174 [2025-03-16 21:08:46,261 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 21:08:46,261 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1218 mSDsluCounter, 1141 mSDsCounter, 0 mSdLazyCounter, 463 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1218 SdHoareTripleChecker+Valid, 2284 SdHoareTripleChecker+Invalid, 463 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 463 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-16 21:08:46,261 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1218 Valid, 2284 Invalid, 463 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 463 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-16 21:08:46,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3174 states. [2025-03-16 21:08:46,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3174 to 3150. [2025-03-16 21:08:46,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3150 states, 3149 states have (on average 1.4499841219434741) internal successors, (4566), 3149 states have internal predecessors, (4566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:46,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3150 states to 3150 states and 4566 transitions. [2025-03-16 21:08:46,281 INFO L78 Accepts]: Start accepts. Automaton has 3150 states and 4566 transitions. Word has length 178 [2025-03-16 21:08:46,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 21:08:46,281 INFO L471 AbstractCegarLoop]: Abstraction has 3150 states and 4566 transitions. [2025-03-16 21:08:46,281 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 3 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 21:08:46,281 INFO L276 IsEmpty]: Start isEmpty. Operand 3150 states and 4566 transitions. [2025-03-16 21:08:46,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-16 21:08:46,282 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 21:08:46,282 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:46,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2025-03-16 21:08:46,282 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 21:08:46,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 21:08:46,282 INFO L85 PathProgramCache]: Analyzing trace with hash 316083234, now seen corresponding path program 1 times [2025-03-16 21:08:46,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 21:08:46,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943838260] [2025-03-16 21:08:46,283 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 21:08:46,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 21:08:46,319 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-16 21:08:46,420 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-16 21:08:46,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:46,420 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 21:08:46,420 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-16 21:08:46,436 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-16 21:08:46,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-16 21:08:46,573 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 21:08:46,573 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 21:08:46,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-16 21:08:46,675 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-16 21:08:46,675 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-16 21:08:46,677 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2025-03-16 21:08:46,679 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 21:08:46,773 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-03-16 21:08:46,797 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-16 21:08:46,799 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 09:08:46 BoogieIcfgContainer [2025-03-16 21:08:46,799 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-16 21:08:46,800 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-16 21:08:46,800 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-16 21:08:46,800 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-16 21:08:46,801 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 09:07:46" (3/4) ... [2025-03-16 21:08:46,802 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-16 21:08:46,803 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-16 21:08:46,803 INFO L158 Benchmark]: Toolchain (without parser) took 64858.61ms. Allocated memory was 142.6MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 101.1MB in the beginning and 1.4GB in the end (delta: -1.3GB). Peak memory consumption was 366.6MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,803 INFO L158 Benchmark]: CDTParser took 0.36ms. Allocated memory is still 201.3MB. Free memory is still 127.9MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: CACSL2BoogieTranslator took 549.74ms. Allocated memory is still 142.6MB. Free memory was 101.1MB in the beginning and 80.1MB in the end (delta: 21.0MB). Peak memory consumption was 95.9MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: Boogie Procedure Inliner took 392.56ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 36.3MB in the end (delta: 43.8MB). Peak memory consumption was 78.5MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: Boogie Preprocessor took 393.19ms. Allocated memory was 142.6MB in the beginning and 436.2MB in the end (delta: 293.6MB). Free memory was 36.3MB in the beginning and 304.8MB in the end (delta: -268.5MB). Peak memory consumption was 37.3MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: IcfgBuilder took 2938.88ms. Allocated memory is still 436.2MB. Free memory was 304.8MB in the beginning and 245.1MB in the end (delta: 59.6MB). Peak memory consumption was 207.8MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: TraceAbstraction took 60574.97ms. Allocated memory was 436.2MB in the beginning and 1.8GB in the end (delta: 1.4GB). Free memory was 245.1MB in the beginning and 1.4GB in the end (delta: -1.1GB). Peak memory consumption was 215.5MB. Max. memory is 16.1GB. [2025-03-16 21:08:46,804 INFO L158 Benchmark]: Witness Printer took 2.90ms. Allocated memory is still 1.8GB. Free memory was 1.4GB in the beginning and 1.4GB in the end (delta: 157.2kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 21:08:46,805 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36ms. Allocated memory is still 201.3MB. Free memory is still 127.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 549.74ms. Allocated memory is still 142.6MB. Free memory was 101.1MB in the beginning and 80.1MB in the end (delta: 21.0MB). Peak memory consumption was 95.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 392.56ms. Allocated memory is still 142.6MB. Free memory was 80.1MB in the beginning and 36.3MB in the end (delta: 43.8MB). Peak memory consumption was 78.5MB. Max. memory is 16.1GB. * Boogie Preprocessor took 393.19ms. Allocated memory was 142.6MB in the beginning and 436.2MB in the end (delta: 293.6MB). Free memory was 36.3MB in the beginning and 304.8MB in the end (delta: -268.5MB). Peak memory consumption was 37.3MB. Max. memory is 16.1GB. * IcfgBuilder took 2938.88ms. Allocated memory is still 436.2MB. Free memory was 304.8MB in the beginning and 245.1MB in the end (delta: 59.6MB). Peak memory consumption was 207.8MB. Max. memory is 16.1GB. * TraceAbstraction took 60574.97ms. Allocated memory was 436.2MB in the beginning and 1.8GB in the end (delta: 1.4GB). Free memory was 245.1MB in the beginning and 1.4GB in the end (delta: -1.1GB). Peak memory consumption was 215.5MB. Max. memory is 16.1GB. * Witness Printer took 2.90ms. Allocated memory is still 1.8GB. Free memory was 1.4GB in the beginning and 1.4GB in the end (delta: 157.2kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 414, overapproximation of bitwiseAnd at line 422, overapproximation of bitwiseAnd at line 236, overapproximation of bitwiseAnd at line 260, overapproximation of bitwiseAnd at line 310, overapproximation of bitwiseAnd at line 392. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L32] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 2); [L33] const SORT_6 msb_SORT_6 = (SORT_6)1 << (2 - 1); [L35] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 31); [L36] const SORT_38 msb_SORT_38 = (SORT_38)1 << (31 - 1); [L38] const SORT_45 mask_SORT_45 = (SORT_45)-1 >> (sizeof(SORT_45) * 8 - 3); [L39] const SORT_45 msb_SORT_45 = (SORT_45)1 << (3 - 1); [L41] const SORT_3 var_4 = 0; [L42] const SORT_3 var_5 = 1; [L43] const SORT_6 var_7 = 2; [L44] const SORT_6 var_10 = 1; [L45] const SORT_1 var_32 = 1; [L46] const SORT_1 var_33 = 0; [L47] const SORT_38 var_39 = 0; [L48] const SORT_6 var_41 = 0; [L49] const SORT_45 var_46 = 0; [L50] const SORT_45 var_50 = 1; [L51] const SORT_45 var_56 = 4; [L52] const SORT_45 var_58 = 5; [L53] const SORT_45 var_76 = 2; [L54] const SORT_45 var_86 = 3; [L56] SORT_1 input_2; [L57] SORT_45 input_451; [L58] SORT_45 input_572; [L60] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L60] SORT_6 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L61] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L61] SORT_6 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L62] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L62] SORT_1 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L63] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L63] SORT_6 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L64] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L64] SORT_45 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L65] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L65] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L66] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L66] SORT_6 state_98 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L67] SORT_1 state_129 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L68] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L68] SORT_1 state_131 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L69] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L69] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L70] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L70] SORT_1 state_143 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L71] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L71] SORT_1 state_145 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L72] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L72] SORT_1 state_147 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L73] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L73] SORT_45 state_149 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L74] SORT_1 state_154 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L75] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L75] SORT_1 state_168 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L76] SORT_45 state_170 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L77] SORT_1 state_172 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L78] SORT_1 state_174 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L79] SORT_1 state_176 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L80] SORT_1 state_178 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L81] SORT_1 state_180 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L82] SORT_1 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L83] SORT_45 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L84] SORT_1 state_189 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L85] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L86] SORT_45 state_205 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L87] SORT_1 state_207 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L88] SORT_1 state_209 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] SORT_6 init_9_arg_1 = var_7; [L91] state_8 = init_9_arg_1 [L92] SORT_6 init_18_arg_1 = var_7; [L93] state_17 = init_18_arg_1 [L94] SORT_1 init_35_arg_1 = var_33; [L95] state_34 = init_35_arg_1 [L96] SORT_6 init_43_arg_1 = var_41; [L97] state_42 = init_43_arg_1 [L98] SORT_45 init_48_arg_1 = var_46; [L99] state_47 = init_48_arg_1 [L100] SORT_1 init_73_arg_1 = var_33; [L101] state_72 = init_73_arg_1 [L102] SORT_6 init_99_arg_1 = var_41; [L103] state_98 = init_99_arg_1 [L104] SORT_1 init_130_arg_1 = var_33; [L105] state_129 = init_130_arg_1 [L106] SORT_1 init_132_arg_1 = var_33; [L107] state_131 = init_132_arg_1 [L108] SORT_1 init_142_arg_1 = var_33; [L109] state_141 = init_142_arg_1 [L110] SORT_1 init_144_arg_1 = var_33; [L111] state_143 = init_144_arg_1 [L112] SORT_1 init_146_arg_1 = var_33; [L113] state_145 = init_146_arg_1 [L114] SORT_1 init_148_arg_1 = var_32; [L115] state_147 = init_148_arg_1 [L116] SORT_45 init_150_arg_1 = var_58; [L117] state_149 = init_150_arg_1 [L118] SORT_1 init_155_arg_1 = var_32; [L119] state_154 = init_155_arg_1 [L120] SORT_1 init_169_arg_1 = var_32; [L121] state_168 = init_169_arg_1 [L122] SORT_45 init_171_arg_1 = var_76; [L123] state_170 = init_171_arg_1 [L124] SORT_1 init_173_arg_1 = var_33; [L125] state_172 = init_173_arg_1 [L126] SORT_1 init_175_arg_1 = var_33; [L127] state_174 = init_175_arg_1 [L128] SORT_1 init_177_arg_1 = var_33; [L129] state_176 = init_177_arg_1 [L130] SORT_1 init_179_arg_1 = var_33; [L131] state_178 = init_179_arg_1 [L132] SORT_1 init_181_arg_1 = var_33; [L133] state_180 = init_181_arg_1 [L134] SORT_1 init_183_arg_1 = var_32; [L135] state_182 = init_183_arg_1 [L136] SORT_45 init_185_arg_1 = var_58; [L137] state_184 = init_185_arg_1 [L138] SORT_1 init_190_arg_1 = var_32; [L139] state_189 = init_190_arg_1 [L140] SORT_1 init_204_arg_1 = var_32; [L141] state_203 = init_204_arg_1 [L142] SORT_45 init_206_arg_1 = var_76; [L143] state_205 = init_206_arg_1 [L144] SORT_1 init_208_arg_1 = var_33; [L145] state_207 = init_208_arg_1 [L146] SORT_1 init_210_arg_1 = var_33; [L147] state_209 = init_210_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L150] input_2 = __VERIFIER_nondet_uchar() [L151] input_451 = __VERIFIER_nondet_uchar() [L152] input_572 = __VERIFIER_nondet_uchar() [L155] SORT_6 var_11_arg_0 = state_8; [L156] SORT_6 var_11_arg_1 = var_10; [L157] SORT_1 var_11 = var_11_arg_0 == var_11_arg_1; [L158] SORT_1 var_12_arg_0 = var_11; [L159] SORT_3 var_12_arg_1 = var_5; [L160] SORT_3 var_12_arg_2 = var_4; [L161] SORT_3 var_12 = var_12_arg_0 ? var_12_arg_1 : var_12_arg_2; [L162] SORT_3 var_13_arg_0 = var_12; [L163] SORT_1 var_13 = var_13_arg_0 >> 0; [L164] SORT_1 var_14_arg_0 = var_13; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_14_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L165] EXPR var_14_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L165] var_14_arg_0 = var_14_arg_0 & mask_SORT_1 [L166] SORT_3 var_14 = var_14_arg_0; [L167] SORT_3 var_15_arg_0 = var_14; [L168] SORT_3 var_15_arg_1 = var_5; [L169] SORT_1 var_15 = var_15_arg_0 == var_15_arg_1; [L170] SORT_1 var_16_arg_0 = var_15; [L171] SORT_1 var_16 = ~var_16_arg_0; [L172] SORT_6 var_19_arg_0 = state_17; [L173] SORT_6 var_19_arg_1 = var_10; [L174] SORT_1 var_19 = var_19_arg_0 == var_19_arg_1; [L175] SORT_1 var_20_arg_0 = var_19; [L176] SORT_3 var_20_arg_1 = var_5; [L177] SORT_3 var_20_arg_2 = var_4; [L178] SORT_3 var_20 = var_20_arg_0 ? var_20_arg_1 : var_20_arg_2; [L179] SORT_3 var_21_arg_0 = var_20; [L180] SORT_1 var_21 = var_21_arg_0 >> 0; [L181] SORT_1 var_22_arg_0 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_16=-1, var_21=0, var_22_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L182] EXPR var_22_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_16=-1, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L182] var_22_arg_0 = var_22_arg_0 & mask_SORT_1 [L183] SORT_3 var_22 = var_22_arg_0; [L184] SORT_3 var_23_arg_0 = var_22; [L185] SORT_3 var_23_arg_1 = var_5; [L186] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L187] SORT_1 var_24_arg_0 = var_16; [L188] SORT_1 var_24_arg_1 = var_23; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24_arg_0=-1, var_24_arg_1=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L189] EXPR var_24_arg_0 | var_24_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L189] SORT_1 var_24 = var_24_arg_0 | var_24_arg_1; [L190] SORT_1 var_25_arg_0 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_25_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L191] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L191] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L192] SORT_3 var_25 = var_25_arg_0; [L193] SORT_3 var_26_arg_0 = var_25; [L194] SORT_3 var_26_arg_1 = var_5; [L195] SORT_1 var_26 = var_26_arg_0 == var_26_arg_1; [L196] SORT_1 var_27_arg_0 = var_26; [L197] SORT_1 var_27 = ~var_27_arg_0; [L198] SORT_1 var_28_arg_0 = var_13; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_27=-1, var_28_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L199] EXPR var_28_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_27=-1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L199] var_28_arg_0 = var_28_arg_0 & mask_SORT_1 [L200] SORT_3 var_28 = var_28_arg_0; [L201] SORT_3 var_29_arg_0 = var_28; [L202] SORT_3 var_29_arg_1 = var_5; [L203] SORT_1 var_29 = var_29_arg_0 == var_29_arg_1; [L204] SORT_1 var_30_arg_0 = var_27; [L205] SORT_1 var_30_arg_1 = var_29; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_30_arg_0=-1, var_30_arg_1=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L206] EXPR var_30_arg_0 | var_30_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L206] SORT_1 var_30 = var_30_arg_0 | var_30_arg_1; [L207] SORT_1 var_31_arg_0 = var_24; [L208] SORT_1 var_31_arg_1 = var_30; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31_arg_0=255, var_31_arg_1=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L209] EXPR var_31_arg_0 & var_31_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L209] SORT_1 var_31 = var_31_arg_0 & var_31_arg_1; [L210] SORT_45 var_64_arg_0 = state_47; [L211] SORT_45 var_64_arg_1 = var_50; [L212] SORT_1 var_64 = var_64_arg_0 == var_64_arg_1; [L213] SORT_6 var_65_arg_0 = state_42; [L214] SORT_6 var_65_arg_1 = var_10; [L215] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L216] SORT_1 var_66_arg_0 = var_64; [L217] SORT_1 var_66_arg_1 = var_65; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66_arg_0=0, var_66_arg_1=0, var_76=2, var_7=2, var_86=3] [L218] EXPR var_66_arg_0 | var_66_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L218] SORT_1 var_66 = var_66_arg_0 | var_66_arg_1; [L219] EXPR var_66 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L219] var_66 = var_66 & mask_SORT_1 [L220] SORT_6 var_44_arg_0 = state_42; [L221] SORT_6 var_44_arg_1 = var_41; [L222] SORT_1 var_44 = var_44_arg_0 == var_44_arg_1; [L223] SORT_45 var_49_arg_0 = state_47; [L224] SORT_45 var_49_arg_1 = var_46; [L225] SORT_1 var_49 = var_49_arg_0 == var_49_arg_1; [L226] SORT_45 var_51_arg_0 = state_47; [L227] SORT_45 var_51_arg_1 = var_50; [L228] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L229] SORT_1 var_52_arg_0 = var_49; [L230] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_44=1, var_46=0, var_4=0, var_50=1, var_52_arg_0=1, var_52_arg_1=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L231] EXPR var_52_arg_0 | var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_44=1, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L231] SORT_1 var_52 = var_52_arg_0 | var_52_arg_1; [L232] SORT_1 var_53_arg_0 = var_52; [L233] SORT_1 var_53 = ~var_53_arg_0; [L234] SORT_1 var_54_arg_0 = var_44; [L235] SORT_1 var_54_arg_1 = var_53; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54_arg_0=1, var_54_arg_1=-2, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L236] EXPR var_54_arg_0 & var_54_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L236] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L237] SORT_6 var_55_arg_0 = state_42; [L238] SORT_6 var_55_arg_1 = var_10; [L239] SORT_1 var_55 = var_55_arg_0 == var_55_arg_1; [L240] SORT_45 var_57_arg_0 = state_47; [L241] SORT_45 var_57_arg_1 = var_56; [L242] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L243] SORT_45 var_59_arg_0 = state_47; [L244] SORT_45 var_59_arg_1 = var_58; [L245] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L246] SORT_1 var_60_arg_0 = var_57; [L247] SORT_1 var_60_arg_1 = var_59; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_55=0, var_56=4, var_58=5, var_5=1, var_60_arg_0=0, var_60_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L248] EXPR var_60_arg_0 | var_60_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_55=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L248] SORT_1 var_60 = var_60_arg_0 | var_60_arg_1; [L249] SORT_1 var_61_arg_0 = var_55; [L250] SORT_1 var_61_arg_1 = var_60; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_56=4, var_58=5, var_5=1, var_61_arg_0=0, var_61_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L251] EXPR var_61_arg_0 & var_61_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L251] SORT_1 var_61 = var_61_arg_0 & var_61_arg_1; [L252] SORT_1 var_62_arg_0 = var_54; [L253] SORT_1 var_62_arg_1 = var_61; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62_arg_0=0, var_62_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L254] EXPR var_62_arg_0 | var_62_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L254] SORT_1 var_62 = var_62_arg_0 | var_62_arg_1; [L255] EXPR var_62 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L255] var_62 = var_62 & mask_SORT_1 [L256] SORT_1 var_36_arg_0 = state_34; [L257] SORT_1 var_36 = ~var_36_arg_0; [L258] SORT_1 var_37_arg_0 = var_32; [L259] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37_arg_0=1, var_37_arg_1=-1, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L260] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L260] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L261] EXPR var_37 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L261] var_37 = var_37 & mask_SORT_1 [L262] SORT_38 var_40_arg_0 = var_39; [L263] SORT_1 var_40_arg_1 = var_37; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_40_arg_0=0, var_40_arg_1=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L264] EXPR ((SORT_3)var_40_arg_0 << 1) | var_40_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L264] SORT_3 var_40 = ((SORT_3)var_40_arg_0 << 1) | var_40_arg_1; [L265] SORT_1 var_63_arg_0 = var_62; [L266] SORT_3 var_63_arg_1 = var_40; [L267] SORT_3 var_63_arg_2 = var_4; [L268] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L269] SORT_1 var_67_arg_0 = var_66; [L270] SORT_3 var_67_arg_1 = var_5; [L271] SORT_3 var_67_arg_2 = var_63; [L272] SORT_3 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L273] SORT_3 var_68_arg_0 = var_67; [L274] SORT_1 var_68 = var_68_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L275] EXPR var_68 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L275] var_68 = var_68 & mask_SORT_1 [L276] SORT_1 var_69_arg_0 = var_13; [L277] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_69_arg_0=0, var_69_arg_1=0, var_76=2, var_7=2, var_86=3] [L278] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L278] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L279] SORT_1 var_70_arg_0 = var_69; [L280] SORT_1 var_70_arg_1 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_70_arg_0=0, var_70_arg_1=0, var_76=2, var_7=2, var_86=3] [L281] EXPR var_70_arg_0 & var_70_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L281] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L282] SORT_1 var_71_arg_0 = var_70; [L283] SORT_1 var_71 = ~var_71_arg_0; [L284] SORT_45 var_113_arg_0 = state_47; [L285] SORT_45 var_113_arg_1 = var_50; [L286] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L287] SORT_6 var_114_arg_0 = state_98; [L288] SORT_6 var_114_arg_1 = var_10; [L289] SORT_1 var_114 = var_114_arg_0 == var_114_arg_1; [L290] SORT_1 var_115_arg_0 = var_113; [L291] SORT_1 var_115_arg_1 = var_114; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115_arg_0=0, var_115_arg_1=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L292] EXPR var_115_arg_0 | var_115_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L292] SORT_1 var_115 = var_115_arg_0 | var_115_arg_1; [L293] EXPR var_115 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L293] var_115 = var_115 & mask_SORT_1 [L294] SORT_6 var_100_arg_0 = state_98; [L295] SORT_6 var_100_arg_1 = var_41; [L296] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L297] SORT_45 var_101_arg_0 = state_47; [L298] SORT_45 var_101_arg_1 = var_46; [L299] SORT_1 var_101 = var_101_arg_0 == var_101_arg_1; [L300] SORT_45 var_102_arg_0 = state_47; [L301] SORT_45 var_102_arg_1 = var_50; [L302] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L303] SORT_1 var_103_arg_0 = var_101; [L304] SORT_1 var_103_arg_1 = var_102; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_100=1, var_103_arg_0=1, var_103_arg_1=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L305] EXPR var_103_arg_0 | var_103_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_100=1, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L305] SORT_1 var_103 = var_103_arg_0 | var_103_arg_1; [L306] SORT_1 var_104_arg_0 = var_103; [L307] SORT_1 var_104 = ~var_104_arg_0; [L308] SORT_1 var_105_arg_0 = var_100; [L309] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105_arg_0=1, var_105_arg_1=-2, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L310] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L310] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L311] SORT_6 var_106_arg_0 = state_98; [L312] SORT_6 var_106_arg_1 = var_10; [L313] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L314] SORT_45 var_107_arg_0 = state_47; [L315] SORT_45 var_107_arg_1 = var_56; [L316] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L317] SORT_45 var_108_arg_0 = state_47; [L318] SORT_45 var_108_arg_1 = var_58; [L319] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L320] SORT_1 var_109_arg_0 = var_107; [L321] SORT_1 var_109_arg_1 = var_108; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_106=0, var_109_arg_0=0, var_109_arg_1=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L322] EXPR var_109_arg_0 | var_109_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_106=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L322] SORT_1 var_109 = var_109_arg_0 | var_109_arg_1; [L323] SORT_1 var_110_arg_0 = var_106; [L324] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_10=1, var_110_arg_0=0, var_110_arg_1=0, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L325] EXPR var_110_arg_0 & var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L325] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L326] SORT_1 var_111_arg_0 = var_105; [L327] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111_arg_0=1, var_111_arg_1=0, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L328] EXPR var_111_arg_0 | var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L328] SORT_1 var_111 = var_111_arg_0 | var_111_arg_1; [L329] EXPR var_111 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L329] var_111 = var_111 & mask_SORT_1 [L330] SORT_6 var_92_arg_0 = state_42; [L331] SORT_6 var_92_arg_1 = var_7; [L332] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L333] SORT_1 var_93_arg_0 = var_33; [L334] SORT_1 var_93_arg_1 = var_92; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93_arg_0=0, var_93_arg_1=0] [L335] EXPR var_93_arg_0 | var_93_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L335] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L336] EXPR var_93 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L336] var_93 = var_93 & mask_SORT_1 [L337] SORT_45 var_77_arg_0 = state_47; [L338] SORT_45 var_77_arg_1 = var_76; [L339] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L340] SORT_45 var_78_arg_0 = state_47; [L341] SORT_45 var_78_arg_1 = var_56; [L342] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L343] SORT_1 var_79_arg_0 = var_77; [L344] SORT_1 var_79_arg_1 = var_78; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_79_arg_0=0, var_79_arg_1=0, var_7=2, var_86=3, var_93=0] [L345] EXPR var_79_arg_0 | var_79_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L345] SORT_1 var_79 = var_79_arg_0 | var_79_arg_1; [L346] SORT_45 var_80_arg_0 = state_47; [L347] SORT_45 var_80_arg_1 = var_58; [L348] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L349] SORT_1 var_81_arg_0 = var_79; [L350] SORT_1 var_81_arg_1 = var_80; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81_arg_0=0, var_81_arg_1=0, var_86=3, var_93=0] [L351] EXPR var_81_arg_0 | var_81_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L351] SORT_1 var_81 = var_81_arg_0 | var_81_arg_1; [L352] SORT_45 var_82_arg_0 = state_47; [L353] SORT_45 var_82_arg_1 = var_50; [L354] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L355] SORT_6 var_83_arg_0 = state_42; [L356] SORT_6 var_83_arg_1 = var_10; [L357] SORT_1 var_83 = var_83_arg_0 == var_83_arg_1; [L358] SORT_1 var_84_arg_0 = var_82; [L359] SORT_1 var_84_arg_1 = var_83; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81=0, var_84_arg_0=0, var_84_arg_1=0, var_86=3, var_93=0] [L360] EXPR var_84_arg_0 & var_84_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81=0, var_86=3, var_93=0] [L360] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L361] SORT_1 var_85_arg_0 = var_81; [L362] SORT_1 var_85_arg_1 = var_84; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85_arg_0=0, var_85_arg_1=0, var_86=3, var_93=0] [L363] EXPR var_85_arg_0 | var_85_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L363] SORT_1 var_85 = var_85_arg_0 | var_85_arg_1; [L364] SORT_45 var_87_arg_0 = state_47; [L365] SORT_45 var_87_arg_1 = var_86; [L366] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L367] SORT_6 var_88_arg_0 = state_42; [L368] SORT_6 var_88_arg_1 = var_41; [L369] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L370] SORT_1 var_89_arg_0 = var_87; [L371] SORT_1 var_89_arg_1 = var_88; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85=0, var_86=3, var_89_arg_0=0, var_89_arg_1=1, var_93=0] [L372] EXPR var_89_arg_0 & var_89_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85=0, var_86=3, var_93=0] [L372] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L373] SORT_1 var_90_arg_0 = var_85; [L374] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_90_arg_0=0, var_90_arg_1=0, var_93=0] [L375] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L375] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L376] EXPR var_90 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L376] var_90 = var_90 & mask_SORT_1 [L377] SORT_1 var_91_arg_0 = var_90; [L378] SORT_3 var_91_arg_1 = var_5; [L379] SORT_3 var_91_arg_2 = var_4; [L380] SORT_3 var_91 = var_91_arg_0 ? var_91_arg_1 : var_91_arg_2; [L381] SORT_1 var_94_arg_0 = var_93; [L382] SORT_3 var_94_arg_1 = var_4; [L383] SORT_3 var_94_arg_2 = var_91; [L384] SORT_3 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L385] SORT_3 var_95_arg_0 = var_94; [L386] SORT_1 var_95 = var_95_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L387] EXPR var_95 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L387] var_95 = var_95 & mask_SORT_1 [L388] SORT_1 var_74_arg_0 = state_72; [L389] SORT_1 var_74 = ~var_74_arg_0; [L390] SORT_1 var_75_arg_0 = var_32; [L391] SORT_1 var_75_arg_1 = var_74; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_75_arg_0=1, var_75_arg_1=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L392] EXPR var_75_arg_0 & var_75_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L392] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L393] SORT_1 var_96_arg_0 = var_95; [L394] SORT_1 var_96_arg_1 = var_37; [L395] SORT_1 var_96_arg_2 = var_75; [L396] SORT_1 var_96 = var_96_arg_0 ? var_96_arg_1 : var_96_arg_2; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_96=1] [L397] EXPR var_96 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L397] var_96 = var_96 & mask_SORT_1 [L398] SORT_38 var_97_arg_0 = var_39; [L399] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_97_arg_0=0, var_97_arg_1=1] [L400] EXPR ((SORT_3)var_97_arg_0 << 1) | var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L400] SORT_3 var_97 = ((SORT_3)var_97_arg_0 << 1) | var_97_arg_1; [L401] SORT_1 var_112_arg_0 = var_111; [L402] SORT_3 var_112_arg_1 = var_97; [L403] SORT_3 var_112_arg_2 = var_4; [L404] SORT_3 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L405] SORT_1 var_116_arg_0 = var_115; [L406] SORT_3 var_116_arg_1 = var_5; [L407] SORT_3 var_116_arg_2 = var_112; [L408] SORT_3 var_116 = var_116_arg_0 ? var_116_arg_1 : var_116_arg_2; [L409] SORT_3 var_117_arg_0 = var_116; [L410] SORT_1 var_117 = var_117_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L411] EXPR var_117 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L411] var_117 = var_117 & mask_SORT_1 [L412] SORT_1 var_118_arg_0 = var_71; [L413] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_118_arg_0=-1, var_118_arg_1=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L414] EXPR var_118_arg_0 | var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L414] SORT_1 var_118 = var_118_arg_0 | var_118_arg_1; [L415] SORT_1 var_119_arg_0 = var_31; [L416] SORT_1 var_119_arg_1 = var_118; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_119_arg_0=255, var_119_arg_1=256, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L417] EXPR var_119_arg_0 & var_119_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L417] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L418] SORT_1 var_122_arg_0 = var_119; [L419] SORT_1 var_122 = ~var_122_arg_0; [L420] SORT_1 var_123_arg_0 = var_32; [L421] SORT_1 var_123_arg_1 = var_122; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_123_arg_0=1, var_123_arg_1=-1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L422] EXPR var_123_arg_0 & var_123_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L422] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L423] EXPR var_123 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L423] var_123 = var_123 & mask_SORT_1 [L424] SORT_1 bad_124_arg_0 = var_123; [L425] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 924 locations, 1383 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 60.4s, OverallIterations: 43, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 33.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 67168 SdHoareTripleChecker+Valid, 31.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 67168 mSDsluCounter, 206435 SdHoareTripleChecker+Invalid, 26.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 161396 mSDsCounter, 87 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 70362 IncrementalHoareTripleChecker+Invalid, 70449 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 87 mSolverCounterUnsat, 45039 mSDtfsCounter, 70362 mSolverCounterSat, 0.4s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 391 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 298 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 392 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3805occurred in iteration=28, InterpolantAutomatonStates: 284, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.0s AutomataMinimizationTime, 42 MinimizatonAttempts, 15221 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 3.6s SatisfiabilityAnalysisTime, 19.6s InterpolantComputationTime, 7288 NumberOfCodeBlocks, 7288 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 7068 ConstructedInterpolants, 0 QuantifiedInterpolants, 30112 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 42 InterpolantComputations, 42 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-03-16 21:08:46,834 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 21:08:48,854 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 21:08:48,928 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-03-16 21:08:48,932 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 21:08:48,932 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 21:08:48,951 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 21:08:48,952 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 21:08:48,952 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 21:08:48,953 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 21:08:48,953 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 21:08:48,954 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 21:08:48,954 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 21:08:48,954 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 21:08:48,954 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 21:08:48,954 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 21:08:48,954 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 21:08:48,955 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 21:08:48,956 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 21:08:48,956 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 21:08:48,956 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 21:08:48,956 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 21:08:48,956 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 21:08:48,957 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 21:08:48,957 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e [2025-03-16 21:08:49,210 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 21:08:49,220 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 21:08:49,221 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 21:08:49,224 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 21:08:49,224 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 21:08:49,225 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:08:50,415 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/91a71e587/0188c14cd88047faba1e29f303d65e36/FLAGa57830e2c [2025-03-16 21:08:50,735 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 21:08:50,736 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:08:50,754 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/91a71e587/0188c14cd88047faba1e29f303d65e36/FLAGa57830e2c [2025-03-16 21:08:50,993 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/91a71e587/0188c14cd88047faba1e29f303d65e36 [2025-03-16 21:08:50,995 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 21:08:50,997 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 21:08:50,998 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 21:08:50,998 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 21:08:51,001 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 21:08:51,001 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 09:08:50" (1/1) ... [2025-03-16 21:08:51,003 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@48ffc43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51, skipping insertion in model container [2025-03-16 21:08:51,003 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 09:08:50" (1/1) ... [2025-03-16 21:08:51,054 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 21:08:51,177 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-16 21:08:51,404 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 21:08:51,416 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 21:08:51,422 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-16 21:08:51,511 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 21:08:51,521 INFO L204 MainTranslator]: Completed translation [2025-03-16 21:08:51,521 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51 WrapperNode [2025-03-16 21:08:51,522 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 21:08:51,522 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 21:08:51,522 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 21:08:51,523 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 21:08:51,526 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,552 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,651 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1995 [2025-03-16 21:08:51,651 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 21:08:51,652 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 21:08:51,652 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 21:08:51,652 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 21:08:51,658 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,659 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,674 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,707 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 21:08:51,709 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,709 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,742 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,748 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,757 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,763 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,775 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 21:08:51,776 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 21:08:51,776 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 21:08:51,776 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 21:08:51,777 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (1/1) ... [2025-03-16 21:08:51,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 21:08:51,789 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 21:08:51,798 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 21:08:51,800 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 21:08:51,816 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 21:08:51,816 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2025-03-16 21:08:51,816 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 21:08:51,816 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 21:08:52,083 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 21:08:52,084 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 21:08:53,003 INFO L? ?]: Removed 291 outVars from TransFormulas that were not future-live. [2025-03-16 21:08:53,004 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 21:08:53,010 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 21:08:53,010 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 21:08:53,011 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 09:08:53 BoogieIcfgContainer [2025-03-16 21:08:53,011 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 21:08:53,013 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 21:08:53,013 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 21:08:53,015 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 21:08:53,016 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 09:08:50" (1/3) ... [2025-03-16 21:08:53,016 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@577ad185 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 09:08:53, skipping insertion in model container [2025-03-16 21:08:53,016 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 09:08:51" (2/3) ... [2025-03-16 21:08:53,017 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@577ad185 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 09:08:53, skipping insertion in model container [2025-03-16 21:08:53,017 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 09:08:53" (3/3) ... [2025-03-16 21:08:53,018 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.cache_coherence_two.c [2025-03-16 21:08:53,028 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 21:08:53,029 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.cache_coherence_two.c that has 1 procedures, 8 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 21:08:53,059 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 21:08:53,068 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6b1c1e34, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 21:08:53,068 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 21:08:53,071 INFO L276 IsEmpty]: Start isEmpty. Operand has 8 states, 6 states have (on average 1.5) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)