./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4fbb35f76027517819b7c383b61e34fa76a9ce203f76a516ef6e2a6ae9cf5da8 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 22:48:27,084 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 22:48:27,132 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-03-16 22:48:27,136 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 22:48:27,137 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 22:48:27,159 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 22:48:27,160 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 22:48:27,161 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 22:48:27,161 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 22:48:27,161 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 22:48:27,162 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 22:48:27,162 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 22:48:27,162 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 22:48:27,162 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 22:48:27,163 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 22:48:27,163 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 22:48:27,164 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 22:48:27,164 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 22:48:27,164 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 22:48:27,164 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 22:48:27,164 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 22:48:27,164 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 22:48:27,164 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 22:48:27,165 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4fbb35f76027517819b7c383b61e34fa76a9ce203f76a516ef6e2a6ae9cf5da8 [2025-03-16 22:48:27,389 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 22:48:27,397 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 22:48:27,399 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 22:48:27,400 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 22:48:27,400 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 22:48:27,401 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c [2025-03-16 22:48:28,537 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/92b8cd578/6663fc1091174bd0a5776b417633db34/FLAG6322a624f [2025-03-16 22:48:28,851 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 22:48:28,851 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c [2025-03-16 22:48:28,868 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/92b8cd578/6663fc1091174bd0a5776b417633db34/FLAG6322a624f [2025-03-16 22:48:29,113 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/92b8cd578/6663fc1091174bd0a5776b417633db34 [2025-03-16 22:48:29,114 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 22:48:29,115 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 22:48:29,116 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 22:48:29,116 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 22:48:29,119 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 22:48:29,119 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:29,120 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f713cbb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29, skipping insertion in model container [2025-03-16 22:48:29,120 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:29,158 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 22:48:29,278 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c[1258,1271] [2025-03-16 22:48:29,561 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 22:48:29,568 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 22:48:29,575 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c[1258,1271] [2025-03-16 22:48:29,721 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 22:48:29,731 INFO L204 MainTranslator]: Completed translation [2025-03-16 22:48:29,732 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29 WrapperNode [2025-03-16 22:48:29,732 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 22:48:29,733 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 22:48:29,733 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 22:48:29,733 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 22:48:29,738 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:29,783 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,082 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 4637 [2025-03-16 22:48:30,082 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 22:48:30,083 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 22:48:30,083 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 22:48:30,083 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 22:48:30,089 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,090 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,193 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,314 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 22:48:30,315 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,315 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,440 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,461 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,486 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,507 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,579 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 22:48:30,580 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 22:48:30,580 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 22:48:30,580 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 22:48:30,581 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (1/1) ... [2025-03-16 22:48:30,586 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 22:48:30,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 22:48:30,633 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 22:48:30,636 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 22:48:30,650 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 22:48:30,650 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-16 22:48:30,650 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 22:48:30,650 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 22:48:30,956 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 22:48:30,957 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 22:48:34,012 INFO L? ?]: Removed 2909 outVars from TransFormulas that were not future-live. [2025-03-16 22:48:34,012 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 22:48:34,113 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 22:48:34,113 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 22:48:34,113 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 10:48:34 BoogieIcfgContainer [2025-03-16 22:48:34,114 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 22:48:34,115 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 22:48:34,115 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 22:48:34,118 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 22:48:34,119 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 10:48:29" (1/3) ... [2025-03-16 22:48:34,119 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d05cdaf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 10:48:34, skipping insertion in model container [2025-03-16 22:48:34,119 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 10:48:29" (2/3) ... [2025-03-16 22:48:34,119 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d05cdaf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 10:48:34, skipping insertion in model container [2025-03-16 22:48:34,119 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 10:48:34" (3/3) ... [2025-03-16 22:48:34,122 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_arrays_bpbs_p2.c [2025-03-16 22:48:34,133 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 22:48:34,134 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.vis_arrays_bpbs_p2.c that has 1 procedures, 1152 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 22:48:34,204 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 22:48:34,213 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@59822c09, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 22:48:34,213 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 22:48:34,219 INFO L276 IsEmpty]: Start isEmpty. Operand has 1152 states, 1150 states have (on average 1.5) internal successors, (1725), 1151 states have internal predecessors, (1725), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:34,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2025-03-16 22:48:34,234 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:34,235 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:34,235 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:34,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:34,240 INFO L85 PathProgramCache]: Analyzing trace with hash 622899345, now seen corresponding path program 1 times [2025-03-16 22:48:34,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:34,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748935621] [2025-03-16 22:48:34,246 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:34,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:34,368 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 194 statements into 1 equivalence classes. [2025-03-16 22:48:34,864 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 194 of 194 statements. [2025-03-16 22:48:34,865 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:34,865 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:36,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:36,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:36,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748935621] [2025-03-16 22:48:36,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [748935621] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:36,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:36,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:36,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598880412] [2025-03-16 22:48:36,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:36,091 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:48:36,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:36,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:48:36,110 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:36,115 INFO L87 Difference]: Start difference. First operand has 1152 states, 1150 states have (on average 1.5) internal successors, (1725), 1151 states have internal predecessors, (1725), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 38.8) internal successors, (194), 5 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:36,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:36,876 INFO L93 Difference]: Finished difference Result 2169 states and 3250 transitions. [2025-03-16 22:48:36,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:36,878 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 38.8) internal successors, (194), 5 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 194 [2025-03-16 22:48:36,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:36,889 INFO L225 Difference]: With dead ends: 2169 [2025-03-16 22:48:36,889 INFO L226 Difference]: Without dead ends: 1158 [2025-03-16 22:48:36,893 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:36,895 INFO L435 NwaCegarLoop]: 1431 mSDtfsCounter, 6 mSDsluCounter, 4285 mSDsCounter, 0 mSdLazyCounter, 1171 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5716 SdHoareTripleChecker+Invalid, 1171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1171 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:36,896 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5716 Invalid, 1171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1171 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 22:48:36,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1158 states. [2025-03-16 22:48:36,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1158 to 1156. [2025-03-16 22:48:36,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1156 states, 1155 states have (on average 1.4978354978354977) internal successors, (1730), 1155 states have internal predecessors, (1730), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:36,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1156 states to 1156 states and 1730 transitions. [2025-03-16 22:48:36,975 INFO L78 Accepts]: Start accepts. Automaton has 1156 states and 1730 transitions. Word has length 194 [2025-03-16 22:48:36,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:36,977 INFO L471 AbstractCegarLoop]: Abstraction has 1156 states and 1730 transitions. [2025-03-16 22:48:36,977 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 38.8) internal successors, (194), 5 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:36,977 INFO L276 IsEmpty]: Start isEmpty. Operand 1156 states and 1730 transitions. [2025-03-16 22:48:36,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2025-03-16 22:48:36,983 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:36,983 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:36,983 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-16 22:48:36,984 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:36,984 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:36,984 INFO L85 PathProgramCache]: Analyzing trace with hash -906399093, now seen corresponding path program 1 times [2025-03-16 22:48:36,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:36,984 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524090850] [2025-03-16 22:48:36,985 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:36,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:37,055 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 195 statements into 1 equivalence classes. [2025-03-16 22:48:37,099 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 195 of 195 statements. [2025-03-16 22:48:37,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:37,100 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:37,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:37,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:37,681 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524090850] [2025-03-16 22:48:37,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524090850] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:37,681 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:37,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:48:37,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840880194] [2025-03-16 22:48:37,682 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:37,682 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:48:37,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:37,683 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:48:37,683 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:37,683 INFO L87 Difference]: Start difference. First operand 1156 states and 1730 transitions. Second operand has 4 states, 4 states have (on average 48.75) internal successors, (195), 4 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:38,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:38,181 INFO L93 Difference]: Finished difference Result 1160 states and 1734 transitions. [2025-03-16 22:48:38,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:48:38,182 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 48.75) internal successors, (195), 4 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 195 [2025-03-16 22:48:38,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:38,186 INFO L225 Difference]: With dead ends: 1160 [2025-03-16 22:48:38,186 INFO L226 Difference]: Without dead ends: 1158 [2025-03-16 22:48:38,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:38,187 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2863 mSDsCounter, 0 mSdLazyCounter, 868 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4297 SdHoareTripleChecker+Invalid, 868 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 868 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:38,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4297 Invalid, 868 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 868 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:38,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1158 states. [2025-03-16 22:48:38,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1158 to 1158. [2025-03-16 22:48:38,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1158 states, 1157 states have (on average 1.4969749351771824) internal successors, (1732), 1157 states have internal predecessors, (1732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:38,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1158 states to 1158 states and 1732 transitions. [2025-03-16 22:48:38,213 INFO L78 Accepts]: Start accepts. Automaton has 1158 states and 1732 transitions. Word has length 195 [2025-03-16 22:48:38,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:38,214 INFO L471 AbstractCegarLoop]: Abstraction has 1158 states and 1732 transitions. [2025-03-16 22:48:38,214 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 48.75) internal successors, (195), 4 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:38,214 INFO L276 IsEmpty]: Start isEmpty. Operand 1158 states and 1732 transitions. [2025-03-16 22:48:38,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2025-03-16 22:48:38,217 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:38,218 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:38,218 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-16 22:48:38,218 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:38,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:38,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1971079669, now seen corresponding path program 1 times [2025-03-16 22:48:38,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:38,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929595744] [2025-03-16 22:48:38,219 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:38,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:38,280 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 196 statements into 1 equivalence classes. [2025-03-16 22:48:38,333 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 196 of 196 statements. [2025-03-16 22:48:38,334 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:38,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:38,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:38,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:38,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929595744] [2025-03-16 22:48:38,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1929595744] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:38,626 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:38,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:48:38,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133366415] [2025-03-16 22:48:38,626 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:38,627 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:48:38,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:38,627 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:48:38,627 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:38,627 INFO L87 Difference]: Start difference. First operand 1158 states and 1732 transitions. Second operand has 4 states, 4 states have (on average 49.0) internal successors, (196), 4 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:39,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:39,069 INFO L93 Difference]: Finished difference Result 2177 states and 3256 transitions. [2025-03-16 22:48:39,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:48:39,070 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 49.0) internal successors, (196), 4 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 196 [2025-03-16 22:48:39,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:39,076 INFO L225 Difference]: With dead ends: 2177 [2025-03-16 22:48:39,076 INFO L226 Difference]: Without dead ends: 1160 [2025-03-16 22:48:39,078 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:39,080 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:39,081 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:48:39,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1160 states. [2025-03-16 22:48:39,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1160 to 1160. [2025-03-16 22:48:39,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1160 states, 1159 states have (on average 1.4961173425366696) internal successors, (1734), 1159 states have internal predecessors, (1734), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:39,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1160 states to 1160 states and 1734 transitions. [2025-03-16 22:48:39,114 INFO L78 Accepts]: Start accepts. Automaton has 1160 states and 1734 transitions. Word has length 196 [2025-03-16 22:48:39,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:39,114 INFO L471 AbstractCegarLoop]: Abstraction has 1160 states and 1734 transitions. [2025-03-16 22:48:39,115 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 49.0) internal successors, (196), 4 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:39,115 INFO L276 IsEmpty]: Start isEmpty. Operand 1160 states and 1734 transitions. [2025-03-16 22:48:39,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2025-03-16 22:48:39,116 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:39,116 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:39,116 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-16 22:48:39,116 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:39,117 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:39,117 INFO L85 PathProgramCache]: Analyzing trace with hash -1389529146, now seen corresponding path program 1 times [2025-03-16 22:48:39,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:39,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233506459] [2025-03-16 22:48:39,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:39,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:39,158 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-03-16 22:48:39,268 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-03-16 22:48:39,268 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:39,268 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:40,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:40,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:40,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233506459] [2025-03-16 22:48:40,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [233506459] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:40,020 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:40,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:40,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123924922] [2025-03-16 22:48:40,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:40,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:48:40,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:40,022 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:48:40,022 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:40,022 INFO L87 Difference]: Start difference. First operand 1160 states and 1734 transitions. Second operand has 7 states, 7 states have (on average 28.142857142857142) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:40,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:40,736 INFO L93 Difference]: Finished difference Result 2187 states and 3269 transitions. [2025-03-16 22:48:40,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:48:40,736 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 28.142857142857142) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 197 [2025-03-16 22:48:40,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:40,740 INFO L225 Difference]: With dead ends: 2187 [2025-03-16 22:48:40,740 INFO L226 Difference]: Without dead ends: 1168 [2025-03-16 22:48:40,741 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:40,744 INFO L435 NwaCegarLoop]: 1401 mSDtfsCounter, 1646 mSDsluCounter, 4196 mSDsCounter, 0 mSdLazyCounter, 1295 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1646 SdHoareTripleChecker+Valid, 5597 SdHoareTripleChecker+Invalid, 1296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1295 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:40,744 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1646 Valid, 5597 Invalid, 1296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1295 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 22:48:40,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1168 states. [2025-03-16 22:48:40,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1168 to 1165. [2025-03-16 22:48:40,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1165 states, 1164 states have (on average 1.4948453608247423) internal successors, (1740), 1164 states have internal predecessors, (1740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:40,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1165 states to 1165 states and 1740 transitions. [2025-03-16 22:48:40,765 INFO L78 Accepts]: Start accepts. Automaton has 1165 states and 1740 transitions. Word has length 197 [2025-03-16 22:48:40,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:40,766 INFO L471 AbstractCegarLoop]: Abstraction has 1165 states and 1740 transitions. [2025-03-16 22:48:40,766 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.142857142857142) internal successors, (197), 6 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:40,767 INFO L276 IsEmpty]: Start isEmpty. Operand 1165 states and 1740 transitions. [2025-03-16 22:48:40,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2025-03-16 22:48:40,768 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:40,768 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:40,768 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-16 22:48:40,768 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:40,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:40,769 INFO L85 PathProgramCache]: Analyzing trace with hash 420532324, now seen corresponding path program 1 times [2025-03-16 22:48:40,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:40,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091646033] [2025-03-16 22:48:40,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:40,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:40,813 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 198 statements into 1 equivalence classes. [2025-03-16 22:48:40,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 198 of 198 statements. [2025-03-16 22:48:40,991 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:40,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:41,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:41,438 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:41,438 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091646033] [2025-03-16 22:48:41,438 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091646033] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:41,438 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:41,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:41,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867061189] [2025-03-16 22:48:41,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:41,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:48:41,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:41,439 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:48:41,439 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:41,439 INFO L87 Difference]: Start difference. First operand 1165 states and 1740 transitions. Second operand has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:42,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:42,019 INFO L93 Difference]: Finished difference Result 2195 states and 3278 transitions. [2025-03-16 22:48:42,019 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:42,019 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2025-03-16 22:48:42,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:42,023 INFO L225 Difference]: With dead ends: 2195 [2025-03-16 22:48:42,023 INFO L226 Difference]: Without dead ends: 1171 [2025-03-16 22:48:42,024 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:42,025 INFO L435 NwaCegarLoop]: 1431 mSDtfsCounter, 5 mSDsluCounter, 4285 mSDsCounter, 0 mSdLazyCounter, 1171 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 5716 SdHoareTripleChecker+Invalid, 1171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1171 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:42,025 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 5716 Invalid, 1171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1171 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:42,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1171 states. [2025-03-16 22:48:42,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1171 to 1169. [2025-03-16 22:48:42,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1169 states, 1168 states have (on average 1.4940068493150684) internal successors, (1745), 1168 states have internal predecessors, (1745), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:42,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1169 states to 1169 states and 1745 transitions. [2025-03-16 22:48:42,043 INFO L78 Accepts]: Start accepts. Automaton has 1169 states and 1745 transitions. Word has length 198 [2025-03-16 22:48:42,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:42,043 INFO L471 AbstractCegarLoop]: Abstraction has 1169 states and 1745 transitions. [2025-03-16 22:48:42,043 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 39.6) internal successors, (198), 5 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:42,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 1745 transitions. [2025-03-16 22:48:42,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2025-03-16 22:48:42,045 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:42,045 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:42,045 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-16 22:48:42,045 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:42,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:42,046 INFO L85 PathProgramCache]: Analyzing trace with hash -711596183, now seen corresponding path program 1 times [2025-03-16 22:48:42,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:42,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815209716] [2025-03-16 22:48:42,046 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:42,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:42,134 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 198 statements into 1 equivalence classes. [2025-03-16 22:48:42,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 198 of 198 statements. [2025-03-16 22:48:42,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:42,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:42,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:42,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:42,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1815209716] [2025-03-16 22:48:42,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1815209716] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:42,749 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:42,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 22:48:42,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986252879] [2025-03-16 22:48:42,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:42,751 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 22:48:42,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:42,752 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 22:48:42,752 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:42,752 INFO L87 Difference]: Start difference. First operand 1169 states and 1745 transitions. Second operand has 8 states, 8 states have (on average 24.75) internal successors, (198), 8 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:43,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:43,456 INFO L93 Difference]: Finished difference Result 2236 states and 3336 transitions. [2025-03-16 22:48:43,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 22:48:43,456 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 24.75) internal successors, (198), 8 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2025-03-16 22:48:43,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:43,460 INFO L225 Difference]: With dead ends: 2236 [2025-03-16 22:48:43,460 INFO L226 Difference]: Without dead ends: 1208 [2025-03-16 22:48:43,461 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:43,462 INFO L435 NwaCegarLoop]: 1429 mSDtfsCounter, 31 mSDsluCounter, 5765 mSDsCounter, 0 mSdLazyCounter, 1494 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 7194 SdHoareTripleChecker+Invalid, 1494 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1494 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:43,462 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 7194 Invalid, 1494 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1494 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 22:48:43,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1208 states. [2025-03-16 22:48:43,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1208 to 1204. [2025-03-16 22:48:43,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1204 states, 1203 states have (on average 1.4929343308395677) internal successors, (1796), 1203 states have internal predecessors, (1796), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:43,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1204 states to 1204 states and 1796 transitions. [2025-03-16 22:48:43,481 INFO L78 Accepts]: Start accepts. Automaton has 1204 states and 1796 transitions. Word has length 198 [2025-03-16 22:48:43,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:43,481 INFO L471 AbstractCegarLoop]: Abstraction has 1204 states and 1796 transitions. [2025-03-16 22:48:43,481 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 24.75) internal successors, (198), 8 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:43,482 INFO L276 IsEmpty]: Start isEmpty. Operand 1204 states and 1796 transitions. [2025-03-16 22:48:43,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2025-03-16 22:48:43,483 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:43,483 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:43,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-16 22:48:43,484 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:43,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:43,485 INFO L85 PathProgramCache]: Analyzing trace with hash 1424663283, now seen corresponding path program 1 times [2025-03-16 22:48:43,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:43,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787112560] [2025-03-16 22:48:43,485 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:43,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:43,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 198 statements into 1 equivalence classes. [2025-03-16 22:48:43,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 198 of 198 statements. [2025-03-16 22:48:43,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:43,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:43,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:43,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:43,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787112560] [2025-03-16 22:48:43,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787112560] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:43,815 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:43,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:43,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [467051389] [2025-03-16 22:48:43,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:43,816 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:48:43,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:43,817 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:48:43,817 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:43,817 INFO L87 Difference]: Start difference. First operand 1204 states and 1796 transitions. Second operand has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:44,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:44,441 INFO L93 Difference]: Finished difference Result 2279 states and 3399 transitions. [2025-03-16 22:48:44,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:44,441 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2025-03-16 22:48:44,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:44,446 INFO L225 Difference]: With dead ends: 2279 [2025-03-16 22:48:44,446 INFO L226 Difference]: Without dead ends: 1216 [2025-03-16 22:48:44,448 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:44,448 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 4 mSDsluCounter, 5717 mSDsCounter, 0 mSdLazyCounter, 1459 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 7150 SdHoareTripleChecker+Invalid, 1460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1459 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:44,448 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 7150 Invalid, 1460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1459 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:48:44,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1216 states. [2025-03-16 22:48:44,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1216 to 1216. [2025-03-16 22:48:44,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1216 states, 1215 states have (on average 1.491358024691358) internal successors, (1812), 1215 states have internal predecessors, (1812), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:44,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1216 states to 1216 states and 1812 transitions. [2025-03-16 22:48:44,468 INFO L78 Accepts]: Start accepts. Automaton has 1216 states and 1812 transitions. Word has length 198 [2025-03-16 22:48:44,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:44,468 INFO L471 AbstractCegarLoop]: Abstraction has 1216 states and 1812 transitions. [2025-03-16 22:48:44,468 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:44,468 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 1812 transitions. [2025-03-16 22:48:44,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2025-03-16 22:48:44,469 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:44,470 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:44,470 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-16 22:48:44,470 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:44,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:44,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1769301663, now seen corresponding path program 1 times [2025-03-16 22:48:44,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:44,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365045140] [2025-03-16 22:48:44,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:44,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:44,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 198 statements into 1 equivalence classes. [2025-03-16 22:48:44,542 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 198 of 198 statements. [2025-03-16 22:48:44,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:44,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:44,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:44,788 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:44,788 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365045140] [2025-03-16 22:48:44,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [365045140] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:44,788 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:44,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:44,789 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624662438] [2025-03-16 22:48:44,789 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:44,789 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:48:44,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:44,790 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:48:44,790 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:44,790 INFO L87 Difference]: Start difference. First operand 1216 states and 1812 transitions. Second operand has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:45,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:45,316 INFO L93 Difference]: Finished difference Result 2297 states and 3422 transitions. [2025-03-16 22:48:45,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:45,317 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2025-03-16 22:48:45,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:45,321 INFO L225 Difference]: With dead ends: 2297 [2025-03-16 22:48:45,321 INFO L226 Difference]: Without dead ends: 1222 [2025-03-16 22:48:45,322 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:45,323 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 4 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1166 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 5722 SdHoareTripleChecker+Invalid, 1167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1166 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:45,323 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 5722 Invalid, 1167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1166 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:45,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1222 states. [2025-03-16 22:48:45,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1222 to 1222. [2025-03-16 22:48:45,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1222 states, 1221 states have (on average 1.4905814905814905) internal successors, (1820), 1221 states have internal predecessors, (1820), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:45,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1222 states to 1222 states and 1820 transitions. [2025-03-16 22:48:45,344 INFO L78 Accepts]: Start accepts. Automaton has 1222 states and 1820 transitions. Word has length 198 [2025-03-16 22:48:45,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:45,344 INFO L471 AbstractCegarLoop]: Abstraction has 1222 states and 1820 transitions. [2025-03-16 22:48:45,345 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.0) internal successors, (198), 6 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:45,345 INFO L276 IsEmpty]: Start isEmpty. Operand 1222 states and 1820 transitions. [2025-03-16 22:48:45,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2025-03-16 22:48:45,346 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:45,347 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:45,347 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-16 22:48:45,347 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:45,347 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:45,347 INFO L85 PathProgramCache]: Analyzing trace with hash -1497118044, now seen corresponding path program 1 times [2025-03-16 22:48:45,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:45,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198777386] [2025-03-16 22:48:45,348 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:45,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:45,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 199 statements into 1 equivalence classes. [2025-03-16 22:48:45,508 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 199 of 199 statements. [2025-03-16 22:48:45,509 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:45,509 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:46,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:46,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:46,053 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198777386] [2025-03-16 22:48:46,053 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198777386] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:46,053 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:46,053 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:46,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162956566] [2025-03-16 22:48:46,053 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:46,053 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:48:46,053 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:46,054 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:48:46,054 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:46,054 INFO L87 Difference]: Start difference. First operand 1222 states and 1820 transitions. Second operand has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 6 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:46,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:46,714 INFO L93 Difference]: Finished difference Result 2311 states and 3441 transitions. [2025-03-16 22:48:46,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:48:46,714 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 6 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 199 [2025-03-16 22:48:46,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:46,718 INFO L225 Difference]: With dead ends: 2311 [2025-03-16 22:48:46,718 INFO L226 Difference]: Without dead ends: 1230 [2025-03-16 22:48:46,719 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:46,721 INFO L435 NwaCegarLoop]: 1401 mSDtfsCounter, 1617 mSDsluCounter, 4196 mSDsCounter, 0 mSdLazyCounter, 1295 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1617 SdHoareTripleChecker+Valid, 5597 SdHoareTripleChecker+Invalid, 1296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1295 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:46,722 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1617 Valid, 5597 Invalid, 1296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1295 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:48:46,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1230 states. [2025-03-16 22:48:46,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1230 to 1227. [2025-03-16 22:48:46,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1227 states, 1226 states have (on average 1.4893964110929854) internal successors, (1826), 1226 states have internal predecessors, (1826), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:46,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1227 states to 1227 states and 1826 transitions. [2025-03-16 22:48:46,741 INFO L78 Accepts]: Start accepts. Automaton has 1227 states and 1826 transitions. Word has length 199 [2025-03-16 22:48:46,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:46,741 INFO L471 AbstractCegarLoop]: Abstraction has 1227 states and 1826 transitions. [2025-03-16 22:48:46,741 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.428571428571427) internal successors, (199), 6 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:46,741 INFO L276 IsEmpty]: Start isEmpty. Operand 1227 states and 1826 transitions. [2025-03-16 22:48:46,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2025-03-16 22:48:46,742 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:46,743 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:46,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-16 22:48:46,743 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:46,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:46,746 INFO L85 PathProgramCache]: Analyzing trace with hash 743539782, now seen corresponding path program 1 times [2025-03-16 22:48:46,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:46,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584284127] [2025-03-16 22:48:46,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:46,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:46,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 200 statements into 1 equivalence classes. [2025-03-16 22:48:46,830 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 200 of 200 statements. [2025-03-16 22:48:46,831 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:46,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:47,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:47,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:47,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584284127] [2025-03-16 22:48:47,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584284127] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:47,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:47,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 22:48:47,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938737191] [2025-03-16 22:48:47,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:47,284 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 22:48:47,285 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:47,285 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 22:48:47,285 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:47,285 INFO L87 Difference]: Start difference. First operand 1227 states and 1826 transitions. Second operand has 8 states, 8 states have (on average 25.0) internal successors, (200), 8 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:47,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:47,978 INFO L93 Difference]: Finished difference Result 2351 states and 3496 transitions. [2025-03-16 22:48:47,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 22:48:47,979 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 25.0) internal successors, (200), 8 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 200 [2025-03-16 22:48:47,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:47,982 INFO L225 Difference]: With dead ends: 2351 [2025-03-16 22:48:47,982 INFO L226 Difference]: Without dead ends: 1265 [2025-03-16 22:48:47,983 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:47,984 INFO L435 NwaCegarLoop]: 1428 mSDtfsCounter, 31 mSDsluCounter, 5762 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 7190 SdHoareTripleChecker+Invalid, 1498 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:47,984 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 7190 Invalid, 1498 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 22:48:47,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1265 states. [2025-03-16 22:48:47,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1265 to 1261. [2025-03-16 22:48:48,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1261 states, 1260 states have (on average 1.4880952380952381) internal successors, (1875), 1260 states have internal predecessors, (1875), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:48,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1261 states to 1261 states and 1875 transitions. [2025-03-16 22:48:48,003 INFO L78 Accepts]: Start accepts. Automaton has 1261 states and 1875 transitions. Word has length 200 [2025-03-16 22:48:48,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:48,003 INFO L471 AbstractCegarLoop]: Abstraction has 1261 states and 1875 transitions. [2025-03-16 22:48:48,003 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 25.0) internal successors, (200), 8 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:48,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1261 states and 1875 transitions. [2025-03-16 22:48:48,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2025-03-16 22:48:48,004 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:48,005 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:48,005 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-16 22:48:48,005 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:48,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:48,006 INFO L85 PathProgramCache]: Analyzing trace with hash 952012459, now seen corresponding path program 1 times [2025-03-16 22:48:48,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:48,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581662395] [2025-03-16 22:48:48,006 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:48,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:48,048 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 200 statements into 1 equivalence classes. [2025-03-16 22:48:48,186 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 200 of 200 statements. [2025-03-16 22:48:48,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:48,186 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:48,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:48,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:48,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581662395] [2025-03-16 22:48:48,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581662395] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:48,705 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:48,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:48,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127686327] [2025-03-16 22:48:48,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:48,705 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:48:48,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:48,706 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:48:48,706 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:48,706 INFO L87 Difference]: Start difference. First operand 1261 states and 1875 transitions. Second operand has 7 states, 7 states have (on average 28.571428571428573) internal successors, (200), 6 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:49,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:49,226 INFO L93 Difference]: Finished difference Result 2389 states and 3551 transitions. [2025-03-16 22:48:49,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:48:49,227 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 28.571428571428573) internal successors, (200), 6 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 200 [2025-03-16 22:48:49,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:49,230 INFO L225 Difference]: With dead ends: 2389 [2025-03-16 22:48:49,230 INFO L226 Difference]: Without dead ends: 1269 [2025-03-16 22:48:49,231 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:49,231 INFO L435 NwaCegarLoop]: 1401 mSDtfsCounter, 1596 mSDsluCounter, 4196 mSDsCounter, 0 mSdLazyCounter, 1295 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1596 SdHoareTripleChecker+Valid, 5597 SdHoareTripleChecker+Invalid, 1296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1295 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:49,231 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1596 Valid, 5597 Invalid, 1296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1295 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:49,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1269 states. [2025-03-16 22:48:49,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1269 to 1266. [2025-03-16 22:48:49,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1266 states, 1265 states have (on average 1.4869565217391305) internal successors, (1881), 1265 states have internal predecessors, (1881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:49,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1266 states to 1266 states and 1881 transitions. [2025-03-16 22:48:49,245 INFO L78 Accepts]: Start accepts. Automaton has 1266 states and 1881 transitions. Word has length 200 [2025-03-16 22:48:49,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:49,245 INFO L471 AbstractCegarLoop]: Abstraction has 1266 states and 1881 transitions. [2025-03-16 22:48:49,245 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.571428571428573) internal successors, (200), 6 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:49,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1266 states and 1881 transitions. [2025-03-16 22:48:49,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2025-03-16 22:48:49,247 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:49,247 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:49,247 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-16 22:48:49,247 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:49,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:49,248 INFO L85 PathProgramCache]: Analyzing trace with hash -1887099556, now seen corresponding path program 1 times [2025-03-16 22:48:49,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:49,248 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237639127] [2025-03-16 22:48:49,248 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:49,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:49,285 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 201 statements into 1 equivalence classes. [2025-03-16 22:48:49,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 201 of 201 statements. [2025-03-16 22:48:49,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:49,363 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:49,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:49,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:49,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [237639127] [2025-03-16 22:48:49,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [237639127] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:49,708 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:49,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:49,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520413134] [2025-03-16 22:48:49,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:49,709 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:48:49,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:49,709 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:48:49,709 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:49,710 INFO L87 Difference]: Start difference. First operand 1266 states and 1881 transitions. Second operand has 5 states, 5 states have (on average 40.2) internal successors, (201), 5 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:50,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:50,158 INFO L93 Difference]: Finished difference Result 2402 states and 3568 transitions. [2025-03-16 22:48:50,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:50,159 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.2) internal successors, (201), 5 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2025-03-16 22:48:50,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:50,161 INFO L225 Difference]: With dead ends: 2402 [2025-03-16 22:48:50,161 INFO L226 Difference]: Without dead ends: 1277 [2025-03-16 22:48:50,162 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:50,163 INFO L435 NwaCegarLoop]: 1431 mSDtfsCounter, 5 mSDsluCounter, 4285 mSDsCounter, 0 mSdLazyCounter, 1171 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 5716 SdHoareTripleChecker+Invalid, 1171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1171 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:50,163 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 5716 Invalid, 1171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1171 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:48:50,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1277 states. [2025-03-16 22:48:50,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1277 to 1274. [2025-03-16 22:48:50,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1274 states, 1273 states have (on average 1.485467399842891) internal successors, (1891), 1273 states have internal predecessors, (1891), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:50,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1274 states to 1274 states and 1891 transitions. [2025-03-16 22:48:50,175 INFO L78 Accepts]: Start accepts. Automaton has 1274 states and 1891 transitions. Word has length 201 [2025-03-16 22:48:50,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:50,175 INFO L471 AbstractCegarLoop]: Abstraction has 1274 states and 1891 transitions. [2025-03-16 22:48:50,175 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.2) internal successors, (201), 5 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:50,175 INFO L276 IsEmpty]: Start isEmpty. Operand 1274 states and 1891 transitions. [2025-03-16 22:48:50,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2025-03-16 22:48:50,177 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:50,177 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:50,177 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-16 22:48:50,177 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:50,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:50,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1800289065, now seen corresponding path program 1 times [2025-03-16 22:48:50,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:50,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427279520] [2025-03-16 22:48:50,178 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:50,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:50,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 201 statements into 1 equivalence classes. [2025-03-16 22:48:50,302 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 201 of 201 statements. [2025-03-16 22:48:50,302 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:50,302 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:50,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:50,660 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:50,660 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [427279520] [2025-03-16 22:48:50,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [427279520] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:50,660 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:50,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:50,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907859966] [2025-03-16 22:48:50,660 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:50,660 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:48:50,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:50,661 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:48:50,661 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:50,661 INFO L87 Difference]: Start difference. First operand 1274 states and 1891 transitions. Second operand has 6 states, 6 states have (on average 33.5) internal successors, (201), 6 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:51,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:51,145 INFO L93 Difference]: Finished difference Result 2419 states and 3589 transitions. [2025-03-16 22:48:51,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:51,145 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.5) internal successors, (201), 6 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2025-03-16 22:48:51,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:51,148 INFO L225 Difference]: With dead ends: 2419 [2025-03-16 22:48:51,148 INFO L226 Difference]: Without dead ends: 1286 [2025-03-16 22:48:51,149 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:51,149 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 4 mSDsluCounter, 5717 mSDsCounter, 0 mSdLazyCounter, 1459 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 7150 SdHoareTripleChecker+Invalid, 1460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1459 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:51,150 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 7150 Invalid, 1460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1459 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:51,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1286 states. [2025-03-16 22:48:51,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1286 to 1286. [2025-03-16 22:48:51,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1286 states, 1285 states have (on average 1.484046692607004) internal successors, (1907), 1285 states have internal predecessors, (1907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:51,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1286 states to 1286 states and 1907 transitions. [2025-03-16 22:48:51,162 INFO L78 Accepts]: Start accepts. Automaton has 1286 states and 1907 transitions. Word has length 201 [2025-03-16 22:48:51,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:51,162 INFO L471 AbstractCegarLoop]: Abstraction has 1286 states and 1907 transitions. [2025-03-16 22:48:51,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.5) internal successors, (201), 6 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:51,162 INFO L276 IsEmpty]: Start isEmpty. Operand 1286 states and 1907 transitions. [2025-03-16 22:48:51,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2025-03-16 22:48:51,163 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:51,164 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:51,164 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-16 22:48:51,164 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:51,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:51,164 INFO L85 PathProgramCache]: Analyzing trace with hash 43812693, now seen corresponding path program 1 times [2025-03-16 22:48:51,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:51,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1510665057] [2025-03-16 22:48:51,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:51,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:51,226 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 201 statements into 1 equivalence classes. [2025-03-16 22:48:51,316 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 201 of 201 statements. [2025-03-16 22:48:51,316 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:51,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:51,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:51,679 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:51,679 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1510665057] [2025-03-16 22:48:51,679 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1510665057] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:51,679 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:51,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:48:51,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840226791] [2025-03-16 22:48:51,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:51,679 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:48:51,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:51,680 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:48:51,680 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:51,680 INFO L87 Difference]: Start difference. First operand 1286 states and 1907 transitions. Second operand has 5 states, 5 states have (on average 40.2) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:52,070 INFO L93 Difference]: Finished difference Result 2441 states and 3617 transitions. [2025-03-16 22:48:52,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:52,070 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.2) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2025-03-16 22:48:52,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:52,073 INFO L225 Difference]: With dead ends: 2441 [2025-03-16 22:48:52,073 INFO L226 Difference]: Without dead ends: 1296 [2025-03-16 22:48:52,074 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:52,074 INFO L435 NwaCegarLoop]: 1401 mSDtfsCounter, 1624 mSDsluCounter, 2796 mSDsCounter, 0 mSdLazyCounter, 968 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1624 SdHoareTripleChecker+Valid, 4197 SdHoareTripleChecker+Invalid, 968 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 968 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:52,074 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1624 Valid, 4197 Invalid, 968 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 968 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:48:52,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1296 states. [2025-03-16 22:48:52,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1296 to 1296. [2025-03-16 22:48:52,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1296 states, 1295 states have (on average 1.481853281853282) internal successors, (1919), 1295 states have internal predecessors, (1919), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 1296 states and 1919 transitions. [2025-03-16 22:48:52,087 INFO L78 Accepts]: Start accepts. Automaton has 1296 states and 1919 transitions. Word has length 201 [2025-03-16 22:48:52,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:52,087 INFO L471 AbstractCegarLoop]: Abstraction has 1296 states and 1919 transitions. [2025-03-16 22:48:52,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.2) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,087 INFO L276 IsEmpty]: Start isEmpty. Operand 1296 states and 1919 transitions. [2025-03-16 22:48:52,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2025-03-16 22:48:52,088 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:52,088 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:52,088 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-16 22:48:52,088 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:52,089 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:52,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1908164100, now seen corresponding path program 1 times [2025-03-16 22:48:52,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:52,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713442126] [2025-03-16 22:48:52,089 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:52,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:52,124 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 201 statements into 1 equivalence classes. [2025-03-16 22:48:52,153 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 201 of 201 statements. [2025-03-16 22:48:52,153 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:52,153 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:52,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:52,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:52,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713442126] [2025-03-16 22:48:52,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1713442126] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:52,406 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:52,406 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:48:52,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918955167] [2025-03-16 22:48:52,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:52,407 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:48:52,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:52,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:48:52,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:52,408 INFO L87 Difference]: Start difference. First operand 1296 states and 1919 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:52,786 INFO L93 Difference]: Finished difference Result 2455 states and 3633 transitions. [2025-03-16 22:48:52,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:48:52,787 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2025-03-16 22:48:52,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:52,790 INFO L225 Difference]: With dead ends: 2455 [2025-03-16 22:48:52,790 INFO L226 Difference]: Without dead ends: 1300 [2025-03-16 22:48:52,791 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:52,791 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:52,791 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:48:52,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1300 states. [2025-03-16 22:48:52,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1300 to 1300. [2025-03-16 22:48:52,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1300 states, 1299 states have (on average 1.4803695150115475) internal successors, (1923), 1299 states have internal predecessors, (1923), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1300 states to 1300 states and 1923 transitions. [2025-03-16 22:48:52,808 INFO L78 Accepts]: Start accepts. Automaton has 1300 states and 1923 transitions. Word has length 201 [2025-03-16 22:48:52,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:52,809 INFO L471 AbstractCegarLoop]: Abstraction has 1300 states and 1923 transitions. [2025-03-16 22:48:52,809 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:52,809 INFO L276 IsEmpty]: Start isEmpty. Operand 1300 states and 1923 transitions. [2025-03-16 22:48:52,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2025-03-16 22:48:52,811 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:52,811 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:52,811 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-16 22:48:52,811 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:52,811 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:52,812 INFO L85 PathProgramCache]: Analyzing trace with hash 603618029, now seen corresponding path program 1 times [2025-03-16 22:48:52,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:52,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731071626] [2025-03-16 22:48:52,812 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:52,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:52,859 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 201 statements into 1 equivalence classes. [2025-03-16 22:48:52,958 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 201 of 201 statements. [2025-03-16 22:48:52,959 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:52,959 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:53,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:53,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:53,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731071626] [2025-03-16 22:48:53,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [731071626] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:53,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:53,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:48:53,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832618550] [2025-03-16 22:48:53,123 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:53,123 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:48:53,123 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:53,124 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:48:53,124 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:53,124 INFO L87 Difference]: Start difference. First operand 1300 states and 1923 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:53,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:53,432 INFO L93 Difference]: Finished difference Result 2461 states and 3638 transitions. [2025-03-16 22:48:53,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:48:53,433 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2025-03-16 22:48:53,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:53,435 INFO L225 Difference]: With dead ends: 2461 [2025-03-16 22:48:53,435 INFO L226 Difference]: Without dead ends: 1302 [2025-03-16 22:48:53,436 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:48:53,437 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:53,437 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:48:53,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1302 states. [2025-03-16 22:48:53,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1302 to 1302. [2025-03-16 22:48:53,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1302 states, 1301 states have (on average 1.479631053036126) internal successors, (1925), 1301 states have internal predecessors, (1925), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:53,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1302 states to 1302 states and 1925 transitions. [2025-03-16 22:48:53,448 INFO L78 Accepts]: Start accepts. Automaton has 1302 states and 1925 transitions. Word has length 201 [2025-03-16 22:48:53,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:53,448 INFO L471 AbstractCegarLoop]: Abstraction has 1302 states and 1925 transitions. [2025-03-16 22:48:53,448 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:53,448 INFO L276 IsEmpty]: Start isEmpty. Operand 1302 states and 1925 transitions. [2025-03-16 22:48:53,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2025-03-16 22:48:53,449 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:53,449 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:53,449 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-16 22:48:53,449 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:53,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:53,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1624359573, now seen corresponding path program 1 times [2025-03-16 22:48:53,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:53,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145080974] [2025-03-16 22:48:53,450 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:53,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:53,484 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 202 statements into 1 equivalence classes. [2025-03-16 22:48:53,563 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 202 of 202 statements. [2025-03-16 22:48:53,563 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:53,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:53,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:53,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:53,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145080974] [2025-03-16 22:48:53,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145080974] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:53,869 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:53,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:53,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117248702] [2025-03-16 22:48:53,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:53,869 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:48:53,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:53,870 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:48:53,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:53,870 INFO L87 Difference]: Start difference. First operand 1302 states and 1925 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:54,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:54,305 INFO L93 Difference]: Finished difference Result 2469 states and 3648 transitions. [2025-03-16 22:48:54,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:48:54,305 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 202 [2025-03-16 22:48:54,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:54,308 INFO L225 Difference]: With dead ends: 2469 [2025-03-16 22:48:54,308 INFO L226 Difference]: Without dead ends: 1308 [2025-03-16 22:48:54,309 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:48:54,309 INFO L435 NwaCegarLoop]: 1431 mSDtfsCounter, 5 mSDsluCounter, 4285 mSDsCounter, 0 mSdLazyCounter, 1171 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 5716 SdHoareTripleChecker+Invalid, 1171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1171 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:54,309 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 5716 Invalid, 1171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1171 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:48:54,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1308 states. [2025-03-16 22:48:54,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1308 to 1306. [2025-03-16 22:48:54,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1306 states, 1305 states have (on average 1.4789272030651341) internal successors, (1930), 1305 states have internal predecessors, (1930), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:54,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1306 states to 1306 states and 1930 transitions. [2025-03-16 22:48:54,320 INFO L78 Accepts]: Start accepts. Automaton has 1306 states and 1930 transitions. Word has length 202 [2025-03-16 22:48:54,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:54,321 INFO L471 AbstractCegarLoop]: Abstraction has 1306 states and 1930 transitions. [2025-03-16 22:48:54,321 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:54,321 INFO L276 IsEmpty]: Start isEmpty. Operand 1306 states and 1930 transitions. [2025-03-16 22:48:54,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2025-03-16 22:48:54,322 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:54,322 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:54,322 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-16 22:48:54,323 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:54,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:54,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1101149946, now seen corresponding path program 1 times [2025-03-16 22:48:54,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:54,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801994862] [2025-03-16 22:48:54,323 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:54,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:54,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 202 statements into 1 equivalence classes. [2025-03-16 22:48:54,471 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 202 of 202 statements. [2025-03-16 22:48:54,472 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:54,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:54,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:54,717 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:54,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801994862] [2025-03-16 22:48:54,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [801994862] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:54,717 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:54,718 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:54,718 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591140438] [2025-03-16 22:48:54,718 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:54,718 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:48:54,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:54,718 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:48:54,718 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:54,719 INFO L87 Difference]: Start difference. First operand 1306 states and 1930 transitions. Second operand has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:55,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:55,732 INFO L93 Difference]: Finished difference Result 3017 states and 4439 transitions. [2025-03-16 22:48:55,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:48:55,733 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 202 [2025-03-16 22:48:55,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:55,737 INFO L225 Difference]: With dead ends: 3017 [2025-03-16 22:48:55,737 INFO L226 Difference]: Without dead ends: 1852 [2025-03-16 22:48:55,738 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:55,739 INFO L435 NwaCegarLoop]: 1166 mSDtfsCounter, 2725 mSDsluCounter, 3489 mSDsCounter, 0 mSdLazyCounter, 2232 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2725 SdHoareTripleChecker+Valid, 4655 SdHoareTripleChecker+Invalid, 2232 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:55,739 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2725 Valid, 4655 Invalid, 2232 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2232 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 22:48:55,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1852 states. [2025-03-16 22:48:55,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1852 to 1461. [2025-03-16 22:48:55,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1461 states, 1460 states have (on average 1.4787671232876711) internal successors, (2159), 1460 states have internal predecessors, (2159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:55,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1461 states to 1461 states and 2159 transitions. [2025-03-16 22:48:55,753 INFO L78 Accepts]: Start accepts. Automaton has 1461 states and 2159 transitions. Word has length 202 [2025-03-16 22:48:55,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:55,753 INFO L471 AbstractCegarLoop]: Abstraction has 1461 states and 2159 transitions. [2025-03-16 22:48:55,754 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:55,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1461 states and 2159 transitions. [2025-03-16 22:48:55,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2025-03-16 22:48:55,755 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:55,755 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:55,755 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-16 22:48:55,755 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:55,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:55,756 INFO L85 PathProgramCache]: Analyzing trace with hash 238908405, now seen corresponding path program 1 times [2025-03-16 22:48:55,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:55,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22042149] [2025-03-16 22:48:55,756 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:55,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:55,792 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 202 statements into 1 equivalence classes. [2025-03-16 22:48:55,976 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 202 of 202 statements. [2025-03-16 22:48:55,976 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:55,976 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:56,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:56,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:56,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22042149] [2025-03-16 22:48:56,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [22042149] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:56,210 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:56,210 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:48:56,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87997558] [2025-03-16 22:48:56,211 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:56,211 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:48:56,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:56,211 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:48:56,211 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:48:56,212 INFO L87 Difference]: Start difference. First operand 1461 states and 2159 transitions. Second operand has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:57,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:57,038 INFO L93 Difference]: Finished difference Result 3017 states and 4437 transitions. [2025-03-16 22:48:57,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:48:57,038 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 202 [2025-03-16 22:48:57,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:57,042 INFO L225 Difference]: With dead ends: 3017 [2025-03-16 22:48:57,042 INFO L226 Difference]: Without dead ends: 1852 [2025-03-16 22:48:57,045 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:57,046 INFO L435 NwaCegarLoop]: 1166 mSDtfsCounter, 2203 mSDsluCounter, 3488 mSDsCounter, 0 mSdLazyCounter, 2233 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2203 SdHoareTripleChecker+Valid, 4654 SdHoareTripleChecker+Invalid, 2233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:57,046 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2203 Valid, 4654 Invalid, 2233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2233 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-16 22:48:57,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1852 states. [2025-03-16 22:48:57,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1852 to 1540. [2025-03-16 22:48:57,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1540 states, 1539 states have (on average 1.4736842105263157) internal successors, (2268), 1539 states have internal predecessors, (2268), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:57,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 1540 states and 2268 transitions. [2025-03-16 22:48:57,060 INFO L78 Accepts]: Start accepts. Automaton has 1540 states and 2268 transitions. Word has length 202 [2025-03-16 22:48:57,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:57,060 INFO L471 AbstractCegarLoop]: Abstraction has 1540 states and 2268 transitions. [2025-03-16 22:48:57,060 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 33.666666666666664) internal successors, (202), 5 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:57,060 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 2268 transitions. [2025-03-16 22:48:57,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2025-03-16 22:48:57,061 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:57,061 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:57,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-16 22:48:57,062 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:57,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:57,062 INFO L85 PathProgramCache]: Analyzing trace with hash 531444124, now seen corresponding path program 1 times [2025-03-16 22:48:57,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:57,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128926149] [2025-03-16 22:48:57,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:57,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:57,105 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 202 statements into 1 equivalence classes. [2025-03-16 22:48:57,274 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 202 of 202 statements. [2025-03-16 22:48:57,274 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:57,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:57,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:57,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:57,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128926149] [2025-03-16 22:48:57,816 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [128926149] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:57,816 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:57,816 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:57,816 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380610907] [2025-03-16 22:48:57,816 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:57,816 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:48:57,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:57,817 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:48:57,817 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:57,817 INFO L87 Difference]: Start difference. First operand 1540 states and 2268 transitions. Second operand has 7 states, 7 states have (on average 28.857142857142858) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:58,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:58,368 INFO L93 Difference]: Finished difference Result 2712 states and 3998 transitions. [2025-03-16 22:48:58,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:48:58,368 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 28.857142857142858) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 202 [2025-03-16 22:48:58,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:58,371 INFO L225 Difference]: With dead ends: 2712 [2025-03-16 22:48:58,371 INFO L226 Difference]: Without dead ends: 1547 [2025-03-16 22:48:58,372 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:58,372 INFO L435 NwaCegarLoop]: 1398 mSDtfsCounter, 1538 mSDsluCounter, 5581 mSDsCounter, 0 mSdLazyCounter, 1630 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1538 SdHoareTripleChecker+Valid, 6979 SdHoareTripleChecker+Invalid, 1632 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1630 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:58,373 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1538 Valid, 6979 Invalid, 1632 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1630 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:48:58,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1547 states. [2025-03-16 22:48:58,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1547 to 1546. [2025-03-16 22:48:58,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1546 states, 1545 states have (on average 1.4724919093851132) internal successors, (2275), 1545 states have internal predecessors, (2275), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:58,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1546 states to 1546 states and 2275 transitions. [2025-03-16 22:48:58,384 INFO L78 Accepts]: Start accepts. Automaton has 1546 states and 2275 transitions. Word has length 202 [2025-03-16 22:48:58,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:58,385 INFO L471 AbstractCegarLoop]: Abstraction has 1546 states and 2275 transitions. [2025-03-16 22:48:58,385 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 28.857142857142858) internal successors, (202), 6 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:58,385 INFO L276 IsEmpty]: Start isEmpty. Operand 1546 states and 2275 transitions. [2025-03-16 22:48:58,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:48:58,386 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:58,386 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:58,386 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-16 22:48:58,386 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:58,386 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:58,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1183262500, now seen corresponding path program 1 times [2025-03-16 22:48:58,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:58,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134446333] [2025-03-16 22:48:58,387 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:58,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:48:58,426 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:48:58,573 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:48:58,573 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:48:58,573 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:48:59,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:48:59,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:48:59,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134446333] [2025-03-16 22:48:59,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134446333] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:48:59,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:48:59,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:48:59,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327765179] [2025-03-16 22:48:59,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:48:59,206 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:48:59,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:48:59,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:48:59,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:48:59,207 INFO L87 Difference]: Start difference. First operand 1546 states and 2275 transitions. Second operand has 7 states, 7 states have (on average 29.0) internal successors, (203), 6 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:59,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:48:59,930 INFO L93 Difference]: Finished difference Result 2721 states and 4007 transitions. [2025-03-16 22:48:59,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:48:59,931 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.0) internal successors, (203), 6 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:48:59,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:48:59,934 INFO L225 Difference]: With dead ends: 2721 [2025-03-16 22:48:59,934 INFO L226 Difference]: Without dead ends: 1550 [2025-03-16 22:48:59,935 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:48:59,935 INFO L435 NwaCegarLoop]: 1400 mSDtfsCounter, 1744 mSDsluCounter, 5325 mSDsCounter, 0 mSdLazyCounter, 1568 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1744 SdHoareTripleChecker+Valid, 6725 SdHoareTripleChecker+Invalid, 1569 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1568 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:48:59,935 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1744 Valid, 6725 Invalid, 1569 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1568 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-16 22:48:59,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1550 states. [2025-03-16 22:48:59,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1550 to 1546. [2025-03-16 22:48:59,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1546 states, 1545 states have (on average 1.4724919093851132) internal successors, (2275), 1545 states have internal predecessors, (2275), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:59,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1546 states to 1546 states and 2275 transitions. [2025-03-16 22:48:59,950 INFO L78 Accepts]: Start accepts. Automaton has 1546 states and 2275 transitions. Word has length 203 [2025-03-16 22:48:59,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:48:59,951 INFO L471 AbstractCegarLoop]: Abstraction has 1546 states and 2275 transitions. [2025-03-16 22:48:59,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.0) internal successors, (203), 6 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:48:59,951 INFO L276 IsEmpty]: Start isEmpty. Operand 1546 states and 2275 transitions. [2025-03-16 22:48:59,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:48:59,952 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:48:59,952 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:48:59,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-16 22:48:59,952 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:48:59,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:48:59,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1670823067, now seen corresponding path program 1 times [2025-03-16 22:48:59,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:48:59,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808356372] [2025-03-16 22:48:59,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:48:59,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:00,001 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:00,215 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:00,216 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:00,216 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:00,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:00,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:00,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808356372] [2025-03-16 22:49:00,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808356372] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:00,811 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:00,811 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2025-03-16 22:49:00,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [4641641] [2025-03-16 22:49:00,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:00,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-03-16 22:49:00,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:00,816 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-03-16 22:49:00,816 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-03-16 22:49:00,816 INFO L87 Difference]: Start difference. First operand 1546 states and 2275 transitions. Second operand has 12 states, 12 states have (on average 16.916666666666668) internal successors, (203), 12 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:01,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:01,754 INFO L93 Difference]: Finished difference Result 2810 states and 4131 transitions. [2025-03-16 22:49:01,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-16 22:49:01,756 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 16.916666666666668) internal successors, (203), 12 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:01,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:01,758 INFO L225 Difference]: With dead ends: 2810 [2025-03-16 22:49:01,758 INFO L226 Difference]: Without dead ends: 1639 [2025-03-16 22:49:01,759 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-03-16 22:49:01,760 INFO L435 NwaCegarLoop]: 1424 mSDtfsCounter, 43 mSDsluCounter, 12829 mSDsCounter, 0 mSdLazyCounter, 3017 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 14253 SdHoareTripleChecker+Invalid, 3017 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3017 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:01,760 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 14253 Invalid, 3017 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3017 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-16 22:49:01,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1639 states. [2025-03-16 22:49:01,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1639 to 1616. [2025-03-16 22:49:01,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1616 states, 1615 states have (on average 1.4693498452012383) internal successors, (2373), 1615 states have internal predecessors, (2373), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:01,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1616 states to 1616 states and 2373 transitions. [2025-03-16 22:49:01,772 INFO L78 Accepts]: Start accepts. Automaton has 1616 states and 2373 transitions. Word has length 203 [2025-03-16 22:49:01,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:01,773 INFO L471 AbstractCegarLoop]: Abstraction has 1616 states and 2373 transitions. [2025-03-16 22:49:01,773 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 16.916666666666668) internal successors, (203), 12 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:01,773 INFO L276 IsEmpty]: Start isEmpty. Operand 1616 states and 2373 transitions. [2025-03-16 22:49:01,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:49:01,774 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:01,774 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:01,774 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-16 22:49:01,774 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:01,775 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:01,775 INFO L85 PathProgramCache]: Analyzing trace with hash 71691006, now seen corresponding path program 1 times [2025-03-16 22:49:01,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:01,775 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788856918] [2025-03-16 22:49:01,775 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:01,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:01,810 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:01,835 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:01,835 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:01,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:02,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:02,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:02,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788856918] [2025-03-16 22:49:02,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788856918] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:02,224 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:02,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 22:49:02,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222801617] [2025-03-16 22:49:02,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:02,225 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 22:49:02,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:02,225 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 22:49:02,225 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:02,225 INFO L87 Difference]: Start difference. First operand 1616 states and 2373 transitions. Second operand has 8 states, 8 states have (on average 25.375) internal successors, (203), 8 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:02,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:02,878 INFO L93 Difference]: Finished difference Result 2869 states and 4214 transitions. [2025-03-16 22:49:02,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 22:49:02,879 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 25.375) internal successors, (203), 8 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:02,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:02,881 INFO L225 Difference]: With dead ends: 2869 [2025-03-16 22:49:02,881 INFO L226 Difference]: Without dead ends: 1658 [2025-03-16 22:49:02,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:02,883 INFO L435 NwaCegarLoop]: 1428 mSDtfsCounter, 30 mSDsluCounter, 8549 mSDsCounter, 0 mSdLazyCounter, 2074 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 9977 SdHoareTripleChecker+Invalid, 2074 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2074 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:02,883 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 9977 Invalid, 2074 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2074 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:49:02,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1658 states. [2025-03-16 22:49:02,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1658 to 1654. [2025-03-16 22:49:02,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1654 states, 1653 states have (on average 1.4682395644283122) internal successors, (2427), 1653 states have internal predecessors, (2427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:02,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 2427 transitions. [2025-03-16 22:49:02,902 INFO L78 Accepts]: Start accepts. Automaton has 1654 states and 2427 transitions. Word has length 203 [2025-03-16 22:49:02,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:02,902 INFO L471 AbstractCegarLoop]: Abstraction has 1654 states and 2427 transitions. [2025-03-16 22:49:02,902 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 25.375) internal successors, (203), 8 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:02,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1654 states and 2427 transitions. [2025-03-16 22:49:02,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:49:02,904 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:02,904 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:02,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-16 22:49:02,904 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:02,904 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:02,904 INFO L85 PathProgramCache]: Analyzing trace with hash 530380980, now seen corresponding path program 1 times [2025-03-16 22:49:02,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:02,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384721685] [2025-03-16 22:49:02,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:02,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:02,941 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:02,963 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:02,964 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:02,964 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:03,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:03,133 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:03,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384721685] [2025-03-16 22:49:03,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384721685] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:03,133 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:03,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:03,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409871550] [2025-03-16 22:49:03,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:03,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:03,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:03,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:03,135 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:03,135 INFO L87 Difference]: Start difference. First operand 1654 states and 2427 transitions. Second operand has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:03,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:03,522 INFO L93 Difference]: Finished difference Result 2915 states and 4280 transitions. [2025-03-16 22:49:03,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:03,522 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:03,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:03,524 INFO L225 Difference]: With dead ends: 2915 [2025-03-16 22:49:03,525 INFO L226 Difference]: Without dead ends: 1666 [2025-03-16 22:49:03,526 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:03,526 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 4 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1165 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 5722 SdHoareTripleChecker+Invalid, 1165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1165 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:03,526 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 5722 Invalid, 1165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1165 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:03,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1666 states. [2025-03-16 22:49:03,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1666 to 1666. [2025-03-16 22:49:03,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1666 states, 1665 states have (on average 1.4672672672672673) internal successors, (2443), 1665 states have internal predecessors, (2443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:03,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1666 states to 1666 states and 2443 transitions. [2025-03-16 22:49:03,538 INFO L78 Accepts]: Start accepts. Automaton has 1666 states and 2443 transitions. Word has length 203 [2025-03-16 22:49:03,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:03,538 INFO L471 AbstractCegarLoop]: Abstraction has 1666 states and 2443 transitions. [2025-03-16 22:49:03,538 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:03,538 INFO L276 IsEmpty]: Start isEmpty. Operand 1666 states and 2443 transitions. [2025-03-16 22:49:03,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:49:03,539 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:03,539 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:03,539 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-16 22:49:03,539 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:03,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:03,540 INFO L85 PathProgramCache]: Analyzing trace with hash -62924839, now seen corresponding path program 1 times [2025-03-16 22:49:03,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:03,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291525840] [2025-03-16 22:49:03,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:03,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:03,576 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:03,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:03,595 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:03,595 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:03,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:03,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:03,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291525840] [2025-03-16 22:49:03,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [291525840] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:03,742 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:03,742 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:49:03,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442866200] [2025-03-16 22:49:03,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:03,742 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:49:03,743 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:03,743 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:49:03,743 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:03,743 INFO L87 Difference]: Start difference. First operand 1666 states and 2443 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:04,045 INFO L93 Difference]: Finished difference Result 2931 states and 4300 transitions. [2025-03-16 22:49:04,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:04,046 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:04,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:04,048 INFO L225 Difference]: With dead ends: 2931 [2025-03-16 22:49:04,048 INFO L226 Difference]: Without dead ends: 1670 [2025-03-16 22:49:04,049 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:04,049 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:04,050 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:49:04,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1670 states. [2025-03-16 22:49:04,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1670 to 1670. [2025-03-16 22:49:04,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1670 states, 1669 states have (on average 1.4661473936488916) internal successors, (2447), 1669 states have internal predecessors, (2447), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1670 states to 1670 states and 2447 transitions. [2025-03-16 22:49:04,062 INFO L78 Accepts]: Start accepts. Automaton has 1670 states and 2447 transitions. Word has length 203 [2025-03-16 22:49:04,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:04,062 INFO L471 AbstractCegarLoop]: Abstraction has 1670 states and 2447 transitions. [2025-03-16 22:49:04,063 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,063 INFO L276 IsEmpty]: Start isEmpty. Operand 1670 states and 2447 transitions. [2025-03-16 22:49:04,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:49:04,064 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:04,064 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:04,064 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-16 22:49:04,064 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:04,064 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:04,065 INFO L85 PathProgramCache]: Analyzing trace with hash -1942942255, now seen corresponding path program 1 times [2025-03-16 22:49:04,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:04,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268513489] [2025-03-16 22:49:04,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:04,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:04,103 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:04,124 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:04,124 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:04,124 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:04,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:04,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:04,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268513489] [2025-03-16 22:49:04,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1268513489] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:04,299 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:04,299 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:49:04,299 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924201559] [2025-03-16 22:49:04,299 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:04,299 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:49:04,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:04,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:49:04,300 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:04,300 INFO L87 Difference]: Start difference. First operand 1670 states and 2447 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:04,620 INFO L93 Difference]: Finished difference Result 3020 states and 4424 transitions. [2025-03-16 22:49:04,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:04,621 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:04,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:04,623 INFO L225 Difference]: With dead ends: 3020 [2025-03-16 22:49:04,623 INFO L226 Difference]: Without dead ends: 1682 [2025-03-16 22:49:04,624 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:04,624 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:04,624 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:49:04,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1682 states. [2025-03-16 22:49:04,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1682 to 1682. [2025-03-16 22:49:04,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1682 states, 1681 states have (on average 1.462819750148721) internal successors, (2459), 1681 states have internal predecessors, (2459), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1682 states to 1682 states and 2459 transitions. [2025-03-16 22:49:04,635 INFO L78 Accepts]: Start accepts. Automaton has 1682 states and 2459 transitions. Word has length 203 [2025-03-16 22:49:04,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:04,635 INFO L471 AbstractCegarLoop]: Abstraction has 1682 states and 2459 transitions. [2025-03-16 22:49:04,636 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:04,636 INFO L276 IsEmpty]: Start isEmpty. Operand 1682 states and 2459 transitions. [2025-03-16 22:49:04,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2025-03-16 22:49:04,637 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:04,637 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:04,637 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-16 22:49:04,637 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:04,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:04,637 INFO L85 PathProgramCache]: Analyzing trace with hash -941653713, now seen corresponding path program 1 times [2025-03-16 22:49:04,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:04,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912780201] [2025-03-16 22:49:04,637 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:04,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:04,672 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 203 statements into 1 equivalence classes. [2025-03-16 22:49:04,694 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 203 of 203 statements. [2025-03-16 22:49:04,694 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:04,694 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:04,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:04,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:04,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912780201] [2025-03-16 22:49:04,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1912780201] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:04,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:04,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:04,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904349210] [2025-03-16 22:49:04,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:04,881 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:04,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:04,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:04,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:04,882 INFO L87 Difference]: Start difference. First operand 1682 states and 2459 transitions. Second operand has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:05,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:05,288 INFO L93 Difference]: Finished difference Result 3098 states and 4521 transitions. [2025-03-16 22:49:05,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:05,288 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 203 [2025-03-16 22:49:05,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:05,290 INFO L225 Difference]: With dead ends: 3098 [2025-03-16 22:49:05,290 INFO L226 Difference]: Without dead ends: 1686 [2025-03-16 22:49:05,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:05,291 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1164 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5723 SdHoareTripleChecker+Invalid, 1165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:05,292 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5723 Invalid, 1165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1164 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:05,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1686 states. [2025-03-16 22:49:05,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1686 to 1686. [2025-03-16 22:49:05,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1686 states, 1685 states have (on average 1.461721068249258) internal successors, (2463), 1685 states have internal predecessors, (2463), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:05,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1686 states to 1686 states and 2463 transitions. [2025-03-16 22:49:05,319 INFO L78 Accepts]: Start accepts. Automaton has 1686 states and 2463 transitions. Word has length 203 [2025-03-16 22:49:05,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:05,319 INFO L471 AbstractCegarLoop]: Abstraction has 1686 states and 2463 transitions. [2025-03-16 22:49:05,319 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.6) internal successors, (203), 5 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:05,320 INFO L276 IsEmpty]: Start isEmpty. Operand 1686 states and 2463 transitions. [2025-03-16 22:49:05,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:05,321 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:05,321 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:05,321 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-16 22:49:05,321 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:05,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:05,321 INFO L85 PathProgramCache]: Analyzing trace with hash -355646028, now seen corresponding path program 1 times [2025-03-16 22:49:05,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:05,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319708990] [2025-03-16 22:49:05,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:05,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:05,358 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:05,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:05,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:05,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:05,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:05,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:05,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319708990] [2025-03-16 22:49:05,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319708990] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:05,770 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:05,770 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:05,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869541425] [2025-03-16 22:49:05,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:05,771 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:05,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:05,771 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:05,772 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:05,772 INFO L87 Difference]: Start difference. First operand 1686 states and 2463 transitions. Second operand has 6 states, 6 states have (on average 34.0) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:06,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:06,256 INFO L93 Difference]: Finished difference Result 3777 states and 5484 transitions. [2025-03-16 22:49:06,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:06,256 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.0) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:06,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:06,259 INFO L225 Difference]: With dead ends: 3777 [2025-03-16 22:49:06,259 INFO L226 Difference]: Without dead ends: 2357 [2025-03-16 22:49:06,261 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:06,261 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2022 mSDsluCounter, 4221 mSDsCounter, 0 mSdLazyCounter, 1256 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2022 SdHoareTripleChecker+Valid, 5631 SdHoareTripleChecker+Invalid, 1256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:06,261 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2022 Valid, 5631 Invalid, 1256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:06,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2357 states. [2025-03-16 22:49:06,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2357 to 1948. [2025-03-16 22:49:06,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1948 states, 1947 states have (on average 1.465331278890601) internal successors, (2853), 1947 states have internal predecessors, (2853), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:06,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 2853 transitions. [2025-03-16 22:49:06,276 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 2853 transitions. Word has length 204 [2025-03-16 22:49:06,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:06,276 INFO L471 AbstractCegarLoop]: Abstraction has 1948 states and 2853 transitions. [2025-03-16 22:49:06,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.0) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:06,276 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 2853 transitions. [2025-03-16 22:49:06,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:06,278 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:06,278 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:06,278 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-16 22:49:06,278 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:06,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:06,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1200189900, now seen corresponding path program 1 times [2025-03-16 22:49:06,279 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:06,279 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560812613] [2025-03-16 22:49:06,279 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:06,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:06,313 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:06,407 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:06,408 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:06,408 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:06,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:06,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:06,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560812613] [2025-03-16 22:49:06,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560812613] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:06,676 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:06,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:06,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495581705] [2025-03-16 22:49:06,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:06,676 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:06,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:06,676 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:06,676 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:06,677 INFO L87 Difference]: Start difference. First operand 1948 states and 2853 transitions. Second operand has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:07,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:07,100 INFO L93 Difference]: Finished difference Result 3710 states and 5403 transitions. [2025-03-16 22:49:07,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:07,100 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:07,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:07,104 INFO L225 Difference]: With dead ends: 3710 [2025-03-16 22:49:07,104 INFO L226 Difference]: Without dead ends: 2323 [2025-03-16 22:49:07,105 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:07,106 INFO L435 NwaCegarLoop]: 1430 mSDtfsCounter, 505 mSDsluCounter, 4278 mSDsCounter, 0 mSdLazyCounter, 1185 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 5708 SdHoareTripleChecker+Invalid, 1185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1185 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:07,106 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 5708 Invalid, 1185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1185 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:07,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2323 states. [2025-03-16 22:49:07,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2323 to 1941. [2025-03-16 22:49:07,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1941 states, 1940 states have (on average 1.465463917525773) internal successors, (2843), 1940 states have internal predecessors, (2843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:07,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1941 states to 1941 states and 2843 transitions. [2025-03-16 22:49:07,125 INFO L78 Accepts]: Start accepts. Automaton has 1941 states and 2843 transitions. Word has length 204 [2025-03-16 22:49:07,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:07,125 INFO L471 AbstractCegarLoop]: Abstraction has 1941 states and 2843 transitions. [2025-03-16 22:49:07,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:07,125 INFO L276 IsEmpty]: Start isEmpty. Operand 1941 states and 2843 transitions. [2025-03-16 22:49:07,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:07,126 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:07,126 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:07,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-16 22:49:07,127 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:07,127 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:07,127 INFO L85 PathProgramCache]: Analyzing trace with hash -1934375409, now seen corresponding path program 1 times [2025-03-16 22:49:07,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:07,127 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671533761] [2025-03-16 22:49:07,127 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:07,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:07,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:07,227 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:07,228 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:07,228 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:07,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:07,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:07,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671533761] [2025-03-16 22:49:07,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1671533761] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:07,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:07,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:49:07,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494904015] [2025-03-16 22:49:07,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:07,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:49:07,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:07,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:49:07,622 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:07,622 INFO L87 Difference]: Start difference. First operand 1941 states and 2843 transitions. Second operand has 7 states, 7 states have (on average 29.142857142857142) internal successors, (204), 6 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:08,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:08,232 INFO L93 Difference]: Finished difference Result 4198 states and 6112 transitions. [2025-03-16 22:49:08,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:08,232 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.142857142857142) internal successors, (204), 6 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:08,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:08,236 INFO L225 Difference]: With dead ends: 4198 [2025-03-16 22:49:08,236 INFO L226 Difference]: Without dead ends: 2834 [2025-03-16 22:49:08,238 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:08,238 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2013 mSDsluCounter, 5626 mSDsCounter, 0 mSdLazyCounter, 1573 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2013 SdHoareTripleChecker+Valid, 7036 SdHoareTripleChecker+Invalid, 1574 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1573 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:08,241 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2013 Valid, 7036 Invalid, 1574 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1573 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:49:08,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2834 states. [2025-03-16 22:49:08,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2834 to 2514. [2025-03-16 22:49:08,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2514 states, 2513 states have (on average 1.464783127735774) internal successors, (3681), 2513 states have internal predecessors, (3681), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:08,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2514 states to 2514 states and 3681 transitions. [2025-03-16 22:49:08,266 INFO L78 Accepts]: Start accepts. Automaton has 2514 states and 3681 transitions. Word has length 204 [2025-03-16 22:49:08,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:08,266 INFO L471 AbstractCegarLoop]: Abstraction has 2514 states and 3681 transitions. [2025-03-16 22:49:08,266 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.142857142857142) internal successors, (204), 6 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:08,266 INFO L276 IsEmpty]: Start isEmpty. Operand 2514 states and 3681 transitions. [2025-03-16 22:49:08,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:08,268 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:08,268 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:08,269 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-16 22:49:08,269 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:08,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:08,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1299669219, now seen corresponding path program 1 times [2025-03-16 22:49:08,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:08,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556331605] [2025-03-16 22:49:08,269 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:08,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:08,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:08,428 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:08,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:08,429 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:08,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:08,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:08,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [556331605] [2025-03-16 22:49:08,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [556331605] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:08,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:08,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:08,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201744321] [2025-03-16 22:49:08,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:08,710 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:08,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:08,711 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:08,711 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:08,711 INFO L87 Difference]: Start difference. First operand 2514 states and 3681 transitions. Second operand has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:09,125 INFO L93 Difference]: Finished difference Result 4150 states and 6058 transitions. [2025-03-16 22:49:09,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:09,126 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:09,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:09,129 INFO L225 Difference]: With dead ends: 4150 [2025-03-16 22:49:09,129 INFO L226 Difference]: Without dead ends: 2872 [2025-03-16 22:49:09,131 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:09,131 INFO L435 NwaCegarLoop]: 1432 mSDtfsCounter, 485 mSDsluCounter, 4281 mSDsCounter, 0 mSdLazyCounter, 1189 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 5713 SdHoareTripleChecker+Invalid, 1189 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1189 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:09,131 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 5713 Invalid, 1189 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1189 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:09,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2872 states. [2025-03-16 22:49:09,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2872 to 2509. [2025-03-16 22:49:09,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2509 states, 2508 states have (on average 1.4637161084529506) internal successors, (3671), 2508 states have internal predecessors, (3671), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2509 states to 2509 states and 3671 transitions. [2025-03-16 22:49:09,154 INFO L78 Accepts]: Start accepts. Automaton has 2509 states and 3671 transitions. Word has length 204 [2025-03-16 22:49:09,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:09,154 INFO L471 AbstractCegarLoop]: Abstraction has 2509 states and 3671 transitions. [2025-03-16 22:49:09,154 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,154 INFO L276 IsEmpty]: Start isEmpty. Operand 2509 states and 3671 transitions. [2025-03-16 22:49:09,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:09,156 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:09,156 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:09,156 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-16 22:49:09,156 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:09,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:09,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1215540084, now seen corresponding path program 1 times [2025-03-16 22:49:09,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:09,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235048012] [2025-03-16 22:49:09,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:09,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:09,193 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:09,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:09,213 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:09,213 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:09,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:09,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:09,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235048012] [2025-03-16 22:49:09,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235048012] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:09,386 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:09,386 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 22:49:09,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241190824] [2025-03-16 22:49:09,386 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:09,386 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 22:49:09,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:09,387 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 22:49:09,387 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:09,387 INFO L87 Difference]: Start difference. First operand 2509 states and 3671 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:09,690 INFO L93 Difference]: Finished difference Result 3786 states and 5540 transitions. [2025-03-16 22:49:09,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:09,691 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:09,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:09,693 INFO L225 Difference]: With dead ends: 3786 [2025-03-16 22:49:09,693 INFO L226 Difference]: Without dead ends: 2513 [2025-03-16 22:49:09,694 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 22:49:09,694 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 871 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:09,695 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 871 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:49:09,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2513 states. [2025-03-16 22:49:09,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2513 to 2513. [2025-03-16 22:49:09,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2513 states, 2512 states have (on average 1.4629777070063694) internal successors, (3675), 2512 states have internal predecessors, (3675), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2513 states to 2513 states and 3675 transitions. [2025-03-16 22:49:09,713 INFO L78 Accepts]: Start accepts. Automaton has 2513 states and 3675 transitions. Word has length 204 [2025-03-16 22:49:09,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:09,713 INFO L471 AbstractCegarLoop]: Abstraction has 2513 states and 3675 transitions. [2025-03-16 22:49:09,713 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:09,713 INFO L276 IsEmpty]: Start isEmpty. Operand 2513 states and 3675 transitions. [2025-03-16 22:49:09,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:09,715 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:09,715 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:09,715 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-16 22:49:09,715 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:09,716 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:09,716 INFO L85 PathProgramCache]: Analyzing trace with hash 789494439, now seen corresponding path program 1 times [2025-03-16 22:49:09,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:09,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923772031] [2025-03-16 22:49:09,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:09,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:09,751 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:09,903 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:09,904 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:09,904 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:10,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:10,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:10,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923772031] [2025-03-16 22:49:10,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923772031] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:10,487 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:10,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 22:49:10,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100006311] [2025-03-16 22:49:10,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:10,487 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 22:49:10,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:10,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 22:49:10,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:10,488 INFO L87 Difference]: Start difference. First operand 2513 states and 3675 transitions. Second operand has 8 states, 8 states have (on average 25.5) internal successors, (204), 7 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:11,128 INFO L93 Difference]: Finished difference Result 5512 states and 8036 transitions. [2025-03-16 22:49:11,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 22:49:11,128 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 25.5) internal successors, (204), 7 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:11,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:11,131 INFO L225 Difference]: With dead ends: 5512 [2025-03-16 22:49:11,131 INFO L226 Difference]: Without dead ends: 4235 [2025-03-16 22:49:11,133 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2025-03-16 22:49:11,133 INFO L435 NwaCegarLoop]: 1409 mSDtfsCounter, 2556 mSDsluCounter, 7030 mSDsCounter, 0 mSdLazyCounter, 1892 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2556 SdHoareTripleChecker+Valid, 8439 SdHoareTripleChecker+Invalid, 1892 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1892 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:11,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2556 Valid, 8439 Invalid, 1892 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1892 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:49:11,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4235 states. [2025-03-16 22:49:11,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4235 to 4231. [2025-03-16 22:49:11,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4231 states, 4230 states have (on average 1.4569739952718677) internal successors, (6163), 4230 states have internal predecessors, (6163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4231 states to 4231 states and 6163 transitions. [2025-03-16 22:49:11,161 INFO L78 Accepts]: Start accepts. Automaton has 4231 states and 6163 transitions. Word has length 204 [2025-03-16 22:49:11,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:11,161 INFO L471 AbstractCegarLoop]: Abstraction has 4231 states and 6163 transitions. [2025-03-16 22:49:11,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 25.5) internal successors, (204), 7 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,162 INFO L276 IsEmpty]: Start isEmpty. Operand 4231 states and 6163 transitions. [2025-03-16 22:49:11,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2025-03-16 22:49:11,165 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:11,165 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:11,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-16 22:49:11,165 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:11,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:11,166 INFO L85 PathProgramCache]: Analyzing trace with hash 834292555, now seen corresponding path program 1 times [2025-03-16 22:49:11,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:11,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256572378] [2025-03-16 22:49:11,166 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:11,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:11,204 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 204 statements into 1 equivalence classes. [2025-03-16 22:49:11,225 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 204 of 204 statements. [2025-03-16 22:49:11,225 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:11,225 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:11,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:11,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:11,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256572378] [2025-03-16 22:49:11,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256572378] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:11,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:11,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:11,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83810338] [2025-03-16 22:49:11,399 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:11,399 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:11,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:11,400 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:11,400 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:11,400 INFO L87 Difference]: Start difference. First operand 4231 states and 6163 transitions. Second operand has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:11,769 INFO L93 Difference]: Finished difference Result 5552 states and 8096 transitions. [2025-03-16 22:49:11,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:11,769 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 204 [2025-03-16 22:49:11,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:11,773 INFO L225 Difference]: With dead ends: 5552 [2025-03-16 22:49:11,773 INFO L226 Difference]: Without dead ends: 4275 [2025-03-16 22:49:11,775 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:11,775 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 20 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1165 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 5722 SdHoareTripleChecker+Invalid, 1165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1165 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:11,775 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 5722 Invalid, 1165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1165 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:49:11,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4275 states. [2025-03-16 22:49:11,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4275 to 4275. [2025-03-16 22:49:11,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4275 states, 4274 states have (on average 1.4569489939167057) internal successors, (6227), 4274 states have internal predecessors, (6227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4275 states to 4275 states and 6227 transitions. [2025-03-16 22:49:11,804 INFO L78 Accepts]: Start accepts. Automaton has 4275 states and 6227 transitions. Word has length 204 [2025-03-16 22:49:11,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:11,804 INFO L471 AbstractCegarLoop]: Abstraction has 4275 states and 6227 transitions. [2025-03-16 22:49:11,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.8) internal successors, (204), 5 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:11,804 INFO L276 IsEmpty]: Start isEmpty. Operand 4275 states and 6227 transitions. [2025-03-16 22:49:11,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:11,808 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:11,808 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:11,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-03-16 22:49:11,808 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:11,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:11,808 INFO L85 PathProgramCache]: Analyzing trace with hash 74212572, now seen corresponding path program 1 times [2025-03-16 22:49:11,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:11,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122415816] [2025-03-16 22:49:11,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:11,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:11,842 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:11,862 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:11,862 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:11,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:12,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:12,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:12,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1122415816] [2025-03-16 22:49:12,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1122415816] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:12,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:12,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:49:12,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770155173] [2025-03-16 22:49:12,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:12,091 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:12,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:12,092 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:12,092 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:12,092 INFO L87 Difference]: Start difference. First operand 4275 states and 6227 transitions. Second operand has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:12,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:12,475 INFO L93 Difference]: Finished difference Result 5644 states and 8230 transitions. [2025-03-16 22:49:12,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:12,475 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:12,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:12,478 INFO L225 Difference]: With dead ends: 5644 [2025-03-16 22:49:12,479 INFO L226 Difference]: Without dead ends: 4319 [2025-03-16 22:49:12,480 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:12,480 INFO L435 NwaCegarLoop]: 1433 mSDtfsCounter, 20 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1166 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 5722 SdHoareTripleChecker+Invalid, 1167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1166 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:12,480 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 5722 Invalid, 1167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1166 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:12,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4319 states. [2025-03-16 22:49:12,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4319 to 4319. [2025-03-16 22:49:12,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4319 states, 4318 states have (on average 1.4569245020842982) internal successors, (6291), 4318 states have internal predecessors, (6291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:12,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4319 states to 4319 states and 6291 transitions. [2025-03-16 22:49:12,510 INFO L78 Accepts]: Start accepts. Automaton has 4319 states and 6291 transitions. Word has length 205 [2025-03-16 22:49:12,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:12,510 INFO L471 AbstractCegarLoop]: Abstraction has 4319 states and 6291 transitions. [2025-03-16 22:49:12,511 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:12,511 INFO L276 IsEmpty]: Start isEmpty. Operand 4319 states and 6291 transitions. [2025-03-16 22:49:12,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:12,514 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:12,514 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:12,514 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-16 22:49:12,514 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:12,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:12,515 INFO L85 PathProgramCache]: Analyzing trace with hash 316108763, now seen corresponding path program 1 times [2025-03-16 22:49:12,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:12,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249835013] [2025-03-16 22:49:12,515 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:12,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:12,552 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:12,732 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:12,733 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:12,733 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:13,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:13,753 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:13,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249835013] [2025-03-16 22:49:13,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [249835013] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:13,754 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:13,754 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-16 22:49:13,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280142475] [2025-03-16 22:49:13,754 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:13,754 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-03-16 22:49:13,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:13,754 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-16 22:49:13,754 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-16 22:49:13,755 INFO L87 Difference]: Start difference. First operand 4319 states and 6291 transitions. Second operand has 11 states, 11 states have (on average 18.636363636363637) internal successors, (205), 10 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:14,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:14,649 INFO L93 Difference]: Finished difference Result 6845 states and 9934 transitions. [2025-03-16 22:49:14,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-16 22:49:14,649 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 18.636363636363637) internal successors, (205), 10 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:14,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:14,654 INFO L225 Difference]: With dead ends: 6845 [2025-03-16 22:49:14,654 INFO L226 Difference]: Without dead ends: 5404 [2025-03-16 22:49:14,656 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2025-03-16 22:49:14,656 INFO L435 NwaCegarLoop]: 1405 mSDtfsCounter, 2322 mSDsluCounter, 10094 mSDsCounter, 0 mSdLazyCounter, 2676 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2322 SdHoareTripleChecker+Valid, 11499 SdHoareTripleChecker+Invalid, 2677 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2676 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:14,656 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2322 Valid, 11499 Invalid, 2677 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2676 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-16 22:49:14,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5404 states. [2025-03-16 22:49:14,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5404 to 5055. [2025-03-16 22:49:14,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5055 states, 5054 states have (on average 1.4469726948951325) internal successors, (7313), 5054 states have internal predecessors, (7313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:14,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5055 states to 5055 states and 7313 transitions. [2025-03-16 22:49:14,699 INFO L78 Accepts]: Start accepts. Automaton has 5055 states and 7313 transitions. Word has length 205 [2025-03-16 22:49:14,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:14,700 INFO L471 AbstractCegarLoop]: Abstraction has 5055 states and 7313 transitions. [2025-03-16 22:49:14,700 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 18.636363636363637) internal successors, (205), 10 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:14,700 INFO L276 IsEmpty]: Start isEmpty. Operand 5055 states and 7313 transitions. [2025-03-16 22:49:14,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:14,704 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:14,704 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:14,704 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2025-03-16 22:49:14,704 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:14,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:14,704 INFO L85 PathProgramCache]: Analyzing trace with hash 801403574, now seen corresponding path program 1 times [2025-03-16 22:49:14,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:14,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488604213] [2025-03-16 22:49:14,704 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:14,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:14,737 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:14,763 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:14,763 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:14,763 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:14,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:14,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:14,949 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488604213] [2025-03-16 22:49:14,949 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [488604213] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:14,949 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:14,949 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:14,949 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281420929] [2025-03-16 22:49:14,949 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:14,950 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:14,950 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:14,950 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:14,950 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:14,950 INFO L87 Difference]: Start difference. First operand 5055 states and 7313 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:15,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:15,260 INFO L93 Difference]: Finished difference Result 7028 states and 10169 transitions. [2025-03-16 22:49:15,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:15,261 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:15,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:15,264 INFO L225 Difference]: With dead ends: 7028 [2025-03-16 22:49:15,264 INFO L226 Difference]: Without dead ends: 5071 [2025-03-16 22:49:15,266 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:15,267 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 2860 mSDsCounter, 0 mSdLazyCounter, 872 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4294 SdHoareTripleChecker+Invalid, 873 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 872 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:15,267 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4294 Invalid, 873 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 872 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 22:49:15,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5071 states. [2025-03-16 22:49:15,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5071 to 5071. [2025-03-16 22:49:15,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5071 states, 5070 states have (on average 1.4455621301775148) internal successors, (7329), 5070 states have internal predecessors, (7329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:15,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5071 states to 5071 states and 7329 transitions. [2025-03-16 22:49:15,298 INFO L78 Accepts]: Start accepts. Automaton has 5071 states and 7329 transitions. Word has length 205 [2025-03-16 22:49:15,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:15,298 INFO L471 AbstractCegarLoop]: Abstraction has 5071 states and 7329 transitions. [2025-03-16 22:49:15,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:15,299 INFO L276 IsEmpty]: Start isEmpty. Operand 5071 states and 7329 transitions. [2025-03-16 22:49:15,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:15,303 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:15,303 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:15,303 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-03-16 22:49:15,303 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:15,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:15,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1923347108, now seen corresponding path program 1 times [2025-03-16 22:49:15,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:15,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739035910] [2025-03-16 22:49:15,304 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:15,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:15,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:15,498 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:15,498 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:15,498 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:16,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:16,102 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:16,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739035910] [2025-03-16 22:49:16,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1739035910] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:16,102 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:16,102 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2025-03-16 22:49:16,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258789273] [2025-03-16 22:49:16,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:16,103 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2025-03-16 22:49:16,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:16,103 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-03-16 22:49:16,103 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-03-16 22:49:16,103 INFO L87 Difference]: Start difference. First operand 5071 states and 7329 transitions. Second operand has 15 states, 15 states have (on average 13.666666666666666) internal successors, (205), 15 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:17,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:17,386 INFO L93 Difference]: Finished difference Result 7322 states and 10561 transitions. [2025-03-16 22:49:17,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-16 22:49:17,386 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 13.666666666666666) internal successors, (205), 15 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:17,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:17,391 INFO L225 Difference]: With dead ends: 7322 [2025-03-16 22:49:17,391 INFO L226 Difference]: Without dead ends: 5375 [2025-03-16 22:49:17,394 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-03-16 22:49:17,394 INFO L435 NwaCegarLoop]: 1420 mSDtfsCounter, 71 mSDsluCounter, 18433 mSDsCounter, 0 mSdLazyCounter, 4305 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 19853 SdHoareTripleChecker+Invalid, 4305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4305 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:17,394 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 19853 Invalid, 4305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4305 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-16 22:49:17,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5375 states. [2025-03-16 22:49:17,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5375 to 5315. [2025-03-16 22:49:17,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5315 states, 5314 states have (on average 1.4420398946179902) internal successors, (7663), 5314 states have internal predecessors, (7663), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:17,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5315 states to 5315 states and 7663 transitions. [2025-03-16 22:49:17,427 INFO L78 Accepts]: Start accepts. Automaton has 5315 states and 7663 transitions. Word has length 205 [2025-03-16 22:49:17,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:17,427 INFO L471 AbstractCegarLoop]: Abstraction has 5315 states and 7663 transitions. [2025-03-16 22:49:17,427 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 13.666666666666666) internal successors, (205), 15 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:17,427 INFO L276 IsEmpty]: Start isEmpty. Operand 5315 states and 7663 transitions. [2025-03-16 22:49:17,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:17,431 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:17,431 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:17,431 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-03-16 22:49:17,431 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:17,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:17,432 INFO L85 PathProgramCache]: Analyzing trace with hash -881404699, now seen corresponding path program 1 times [2025-03-16 22:49:17,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:17,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347532115] [2025-03-16 22:49:17,432 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:17,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:17,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:17,616 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:17,616 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:17,616 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:17,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:17,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:17,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347532115] [2025-03-16 22:49:17,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1347532115] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:17,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:17,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:17,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990739001] [2025-03-16 22:49:17,864 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:17,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:17,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:17,865 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:17,865 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:17,865 INFO L87 Difference]: Start difference. First operand 5315 states and 7663 transitions. Second operand has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:18,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:18,715 INFO L93 Difference]: Finished difference Result 8310 states and 11944 transitions. [2025-03-16 22:49:18,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:18,715 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:18,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:18,721 INFO L225 Difference]: With dead ends: 8310 [2025-03-16 22:49:18,721 INFO L226 Difference]: Without dead ends: 6226 [2025-03-16 22:49:18,724 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:18,724 INFO L435 NwaCegarLoop]: 1308 mSDtfsCounter, 2450 mSDsluCounter, 3771 mSDsCounter, 0 mSdLazyCounter, 2379 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2450 SdHoareTripleChecker+Valid, 5079 SdHoareTripleChecker+Invalid, 2379 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2379 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:18,724 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2450 Valid, 5079 Invalid, 2379 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2379 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-16 22:49:18,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6226 states. [2025-03-16 22:49:18,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6226 to 5581. [2025-03-16 22:49:18,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5581 states, 5580 states have (on average 1.4378136200716847) internal successors, (8023), 5580 states have internal predecessors, (8023), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:18,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5581 states to 5581 states and 8023 transitions. [2025-03-16 22:49:18,766 INFO L78 Accepts]: Start accepts. Automaton has 5581 states and 8023 transitions. Word has length 205 [2025-03-16 22:49:18,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:18,766 INFO L471 AbstractCegarLoop]: Abstraction has 5581 states and 8023 transitions. [2025-03-16 22:49:18,766 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 5 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:18,766 INFO L276 IsEmpty]: Start isEmpty. Operand 5581 states and 8023 transitions. [2025-03-16 22:49:18,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2025-03-16 22:49:18,771 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:18,771 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:18,771 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-03-16 22:49:18,771 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:18,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:18,772 INFO L85 PathProgramCache]: Analyzing trace with hash 131546750, now seen corresponding path program 1 times [2025-03-16 22:49:18,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:18,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166912209] [2025-03-16 22:49:18,772 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:18,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:18,808 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 205 statements into 1 equivalence classes. [2025-03-16 22:49:18,957 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 205 of 205 statements. [2025-03-16 22:49:18,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:18,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:19,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:19,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:19,174 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166912209] [2025-03-16 22:49:19,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1166912209] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:19,174 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:19,174 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:49:19,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82082635] [2025-03-16 22:49:19,174 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:19,174 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:49:19,174 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:19,174 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:49:19,174 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:19,175 INFO L87 Difference]: Start difference. First operand 5581 states and 8023 transitions. Second operand has 7 states, 7 states have (on average 29.285714285714285) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:20,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:20,352 INFO L93 Difference]: Finished difference Result 11900 states and 17035 transitions. [2025-03-16 22:49:20,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-16 22:49:20,352 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.285714285714285) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 205 [2025-03-16 22:49:20,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:20,361 INFO L225 Difference]: With dead ends: 11900 [2025-03-16 22:49:20,361 INFO L226 Difference]: Without dead ends: 9897 [2025-03-16 22:49:20,364 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:20,364 INFO L435 NwaCegarLoop]: 1946 mSDtfsCounter, 831 mSDsluCounter, 8523 mSDsCounter, 0 mSdLazyCounter, 3078 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 831 SdHoareTripleChecker+Valid, 10469 SdHoareTripleChecker+Invalid, 3091 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 3078 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:20,364 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [831 Valid, 10469 Invalid, 3091 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 3078 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-16 22:49:20,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9897 states. [2025-03-16 22:49:20,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9897 to 8955. [2025-03-16 22:49:20,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8955 states, 8954 states have (on average 1.4258431985704714) internal successors, (12767), 8954 states have internal predecessors, (12767), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:20,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8955 states to 8955 states and 12767 transitions. [2025-03-16 22:49:20,435 INFO L78 Accepts]: Start accepts. Automaton has 8955 states and 12767 transitions. Word has length 205 [2025-03-16 22:49:20,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:20,435 INFO L471 AbstractCegarLoop]: Abstraction has 8955 states and 12767 transitions. [2025-03-16 22:49:20,435 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.285714285714285) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:20,435 INFO L276 IsEmpty]: Start isEmpty. Operand 8955 states and 12767 transitions. [2025-03-16 22:49:20,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:20,444 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:20,444 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:20,444 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-03-16 22:49:20,444 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:20,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:20,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1510078093, now seen corresponding path program 1 times [2025-03-16 22:49:20,445 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:20,445 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002211406] [2025-03-16 22:49:20,445 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:20,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:20,491 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:20,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:20,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:20,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:20,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:20,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:20,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002211406] [2025-03-16 22:49:20,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002211406] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:20,876 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:20,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:20,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603563281] [2025-03-16 22:49:20,876 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:20,876 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:20,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:20,876 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:20,877 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:20,877 INFO L87 Difference]: Start difference. First operand 8955 states and 12767 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:21,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:21,720 INFO L93 Difference]: Finished difference Result 11567 states and 16518 transitions. [2025-03-16 22:49:21,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:21,720 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:21,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:21,728 INFO L225 Difference]: With dead ends: 11567 [2025-03-16 22:49:21,728 INFO L226 Difference]: Without dead ends: 9576 [2025-03-16 22:49:21,731 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:21,731 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 2153 mSDsluCounter, 3500 mSDsCounter, 0 mSdLazyCounter, 2245 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2153 SdHoareTripleChecker+Valid, 4672 SdHoareTripleChecker+Invalid, 2246 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2245 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:21,731 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2153 Valid, 4672 Invalid, 2246 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2245 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-16 22:49:21,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9576 states. [2025-03-16 22:49:21,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9576 to 9157. [2025-03-16 22:49:21,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9157 states, 9156 states have (on average 1.423219746614242) internal successors, (13031), 9156 states have internal predecessors, (13031), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:21,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9157 states to 9157 states and 13031 transitions. [2025-03-16 22:49:21,794 INFO L78 Accepts]: Start accepts. Automaton has 9157 states and 13031 transitions. Word has length 206 [2025-03-16 22:49:21,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:21,794 INFO L471 AbstractCegarLoop]: Abstraction has 9157 states and 13031 transitions. [2025-03-16 22:49:21,794 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:21,795 INFO L276 IsEmpty]: Start isEmpty. Operand 9157 states and 13031 transitions. [2025-03-16 22:49:21,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:21,802 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:21,802 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:21,802 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2025-03-16 22:49:21,802 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:21,802 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:21,802 INFO L85 PathProgramCache]: Analyzing trace with hash -200034029, now seen corresponding path program 1 times [2025-03-16 22:49:21,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:21,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700154210] [2025-03-16 22:49:21,802 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:21,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:21,839 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:21,970 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:21,970 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:21,970 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:22,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:22,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:22,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700154210] [2025-03-16 22:49:22,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700154210] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:22,802 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:22,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-03-16 22:49:22,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1099602531] [2025-03-16 22:49:22,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:22,802 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2025-03-16 22:49:22,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:22,803 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-03-16 22:49:22,803 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=272, Unknown=0, NotChecked=0, Total=306 [2025-03-16 22:49:22,803 INFO L87 Difference]: Start difference. First operand 9157 states and 13031 transitions. Second operand has 18 states, 18 states have (on average 11.444444444444445) internal successors, (206), 18 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:24,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:24,537 INFO L93 Difference]: Finished difference Result 11747 states and 16731 transitions. [2025-03-16 22:49:24,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-03-16 22:49:24,538 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 11.444444444444445) internal successors, (206), 18 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:24,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:24,545 INFO L225 Difference]: With dead ends: 11747 [2025-03-16 22:49:24,545 INFO L226 Difference]: Without dead ends: 9801 [2025-03-16 22:49:24,547 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=374, Unknown=0, NotChecked=0, Total=420 [2025-03-16 22:49:24,547 INFO L435 NwaCegarLoop]: 1420 mSDtfsCounter, 109 mSDsluCounter, 22677 mSDsCounter, 0 mSdLazyCounter, 5377 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 24097 SdHoareTripleChecker+Invalid, 5377 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:24,548 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 24097 Invalid, 5377 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5377 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2025-03-16 22:49:24,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9801 states. [2025-03-16 22:49:24,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9801 to 9693. [2025-03-16 22:49:24,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9693 states, 9692 states have (on average 1.4223070573669006) internal successors, (13785), 9692 states have internal predecessors, (13785), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:24,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9693 states to 9693 states and 13785 transitions. [2025-03-16 22:49:24,612 INFO L78 Accepts]: Start accepts. Automaton has 9693 states and 13785 transitions. Word has length 206 [2025-03-16 22:49:24,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:24,613 INFO L471 AbstractCegarLoop]: Abstraction has 9693 states and 13785 transitions. [2025-03-16 22:49:24,613 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 11.444444444444445) internal successors, (206), 18 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:24,613 INFO L276 IsEmpty]: Start isEmpty. Operand 9693 states and 13785 transitions. [2025-03-16 22:49:24,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:24,620 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:24,621 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:24,621 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2025-03-16 22:49:24,621 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:24,621 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:24,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1433612122, now seen corresponding path program 1 times [2025-03-16 22:49:24,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:24,621 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254052540] [2025-03-16 22:49:24,621 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:24,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:24,657 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:24,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:24,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:24,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:25,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:25,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:25,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254052540] [2025-03-16 22:49:25,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [254052540] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:25,457 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:25,457 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2025-03-16 22:49:25,457 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137650057] [2025-03-16 22:49:25,457 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:25,457 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2025-03-16 22:49:25,458 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:25,458 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2025-03-16 22:49:25,458 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=342, Unknown=0, NotChecked=0, Total=380 [2025-03-16 22:49:25,458 INFO L87 Difference]: Start difference. First operand 9693 states and 13785 transitions. Second operand has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:27,233 INFO L93 Difference]: Finished difference Result 11932 states and 16992 transitions. [2025-03-16 22:49:27,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2025-03-16 22:49:27,233 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:27,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:27,240 INFO L225 Difference]: With dead ends: 11932 [2025-03-16 22:49:27,240 INFO L226 Difference]: Without dead ends: 9903 [2025-03-16 22:49:27,243 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=416, Unknown=0, NotChecked=0, Total=462 [2025-03-16 22:49:27,243 INFO L435 NwaCegarLoop]: 1415 mSDtfsCounter, 116 mSDsluCounter, 24010 mSDsCounter, 0 mSdLazyCounter, 5814 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 25425 SdHoareTripleChecker+Invalid, 5814 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5814 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:27,243 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [116 Valid, 25425 Invalid, 5814 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5814 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2025-03-16 22:49:27,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9903 states. [2025-03-16 22:49:27,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9903 to 9859. [2025-03-16 22:49:27,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9859 states, 9858 states have (on average 1.4224994927977277) internal successors, (14023), 9858 states have internal predecessors, (14023), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9859 states to 9859 states and 14023 transitions. [2025-03-16 22:49:27,307 INFO L78 Accepts]: Start accepts. Automaton has 9859 states and 14023 transitions. Word has length 206 [2025-03-16 22:49:27,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:27,308 INFO L471 AbstractCegarLoop]: Abstraction has 9859 states and 14023 transitions. [2025-03-16 22:49:27,308 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 10.3) internal successors, (206), 20 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,308 INFO L276 IsEmpty]: Start isEmpty. Operand 9859 states and 14023 transitions. [2025-03-16 22:49:27,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:27,315 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:27,315 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:27,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2025-03-16 22:49:27,316 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:27,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:27,316 INFO L85 PathProgramCache]: Analyzing trace with hash 1274339667, now seen corresponding path program 1 times [2025-03-16 22:49:27,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:27,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545528911] [2025-03-16 22:49:27,316 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:27,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:27,349 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:27,368 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:27,368 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:27,368 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:27,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:27,521 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:27,521 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545528911] [2025-03-16 22:49:27,521 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1545528911] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:27,521 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:27,521 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:27,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589692786] [2025-03-16 22:49:27,521 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:27,521 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:27,521 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:27,522 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:27,522 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:27,522 INFO L87 Difference]: Start difference. First operand 9859 states and 14023 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:27,911 INFO L93 Difference]: Finished difference Result 12858 states and 18315 transitions. [2025-03-16 22:49:27,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 22:49:27,911 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:27,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:27,919 INFO L225 Difference]: With dead ends: 12858 [2025-03-16 22:49:27,919 INFO L226 Difference]: Without dead ends: 9931 [2025-03-16 22:49:27,922 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:27,922 INFO L435 NwaCegarLoop]: 1434 mSDtfsCounter, 0 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1164 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5723 SdHoareTripleChecker+Invalid, 1165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:27,922 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5723 Invalid, 1165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1164 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:27,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9931 states. [2025-03-16 22:49:27,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9931 to 9931. [2025-03-16 22:49:27,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9931 states, 9930 states have (on average 1.419436052366566) internal successors, (14095), 9930 states have internal predecessors, (14095), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9931 states to 9931 states and 14095 transitions. [2025-03-16 22:49:27,983 INFO L78 Accepts]: Start accepts. Automaton has 9931 states and 14095 transitions. Word has length 206 [2025-03-16 22:49:27,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:27,984 INFO L471 AbstractCegarLoop]: Abstraction has 9931 states and 14095 transitions. [2025-03-16 22:49:27,984 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:27,984 INFO L276 IsEmpty]: Start isEmpty. Operand 9931 states and 14095 transitions. [2025-03-16 22:49:27,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:27,990 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:27,990 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:27,990 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2025-03-16 22:49:27,990 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:27,990 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:27,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1050026102, now seen corresponding path program 1 times [2025-03-16 22:49:27,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:27,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981349323] [2025-03-16 22:49:27,991 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:27,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:28,025 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:28,126 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:28,126 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:28,126 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:28,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:28,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:28,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981349323] [2025-03-16 22:49:28,363 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1981349323] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:28,364 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:28,364 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:28,364 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963942279] [2025-03-16 22:49:28,364 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:28,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 22:49:28,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:28,364 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 22:49:28,364 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 22:49:28,364 INFO L87 Difference]: Start difference. First operand 9931 states and 14095 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:28,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:28,829 INFO L93 Difference]: Finished difference Result 12888 states and 18323 transitions. [2025-03-16 22:49:28,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 22:49:28,829 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:28,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:28,834 INFO L225 Difference]: With dead ends: 12888 [2025-03-16 22:49:28,834 INFO L226 Difference]: Without dead ends: 10384 [2025-03-16 22:49:28,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:28,836 INFO L435 NwaCegarLoop]: 1436 mSDtfsCounter, 459 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 1198 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 459 SdHoareTripleChecker+Valid, 5725 SdHoareTripleChecker+Invalid, 1198 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1198 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:28,836 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [459 Valid, 5725 Invalid, 1198 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1198 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:28,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10384 states. [2025-03-16 22:49:28,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10384 to 9893. [2025-03-16 22:49:28,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9893 states, 9892 states have (on average 1.4196320258794985) internal successors, (14043), 9892 states have internal predecessors, (14043), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:28,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9893 states to 9893 states and 14043 transitions. [2025-03-16 22:49:28,896 INFO L78 Accepts]: Start accepts. Automaton has 9893 states and 14043 transitions. Word has length 206 [2025-03-16 22:49:28,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:28,896 INFO L471 AbstractCegarLoop]: Abstraction has 9893 states and 14043 transitions. [2025-03-16 22:49:28,896 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:28,896 INFO L276 IsEmpty]: Start isEmpty. Operand 9893 states and 14043 transitions. [2025-03-16 22:49:28,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:28,903 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:28,903 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:28,903 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2025-03-16 22:49:28,903 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:28,903 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:28,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1018925550, now seen corresponding path program 1 times [2025-03-16 22:49:28,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:28,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814871740] [2025-03-16 22:49:28,904 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:28,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:28,939 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:28,992 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:28,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:28,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:29,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:29,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:29,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814871740] [2025-03-16 22:49:29,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814871740] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:29,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:29,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:29,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946670691] [2025-03-16 22:49:29,310 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:29,310 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:29,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:29,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:29,310 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:29,310 INFO L87 Difference]: Start difference. First operand 9893 states and 14043 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:29,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:29,805 INFO L93 Difference]: Finished difference Result 21880 states and 30817 transitions. [2025-03-16 22:49:29,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:29,805 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:29,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:29,820 INFO L225 Difference]: With dead ends: 21880 [2025-03-16 22:49:29,820 INFO L226 Difference]: Without dead ends: 17311 [2025-03-16 22:49:29,826 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:29,826 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2305 mSDsluCounter, 4221 mSDsCounter, 0 mSdLazyCounter, 1256 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2305 SdHoareTripleChecker+Valid, 5631 SdHoareTripleChecker+Invalid, 1256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:29,826 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2305 Valid, 5631 Invalid, 1256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:29,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17311 states. [2025-03-16 22:49:29,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17311 to 14941. [2025-03-16 22:49:29,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14941 states, 14940 states have (on average 1.418942436412316) internal successors, (21199), 14940 states have internal predecessors, (21199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:29,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14941 states to 14941 states and 21199 transitions. [2025-03-16 22:49:29,938 INFO L78 Accepts]: Start accepts. Automaton has 14941 states and 21199 transitions. Word has length 206 [2025-03-16 22:49:29,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:29,938 INFO L471 AbstractCegarLoop]: Abstraction has 14941 states and 21199 transitions. [2025-03-16 22:49:29,939 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:29,939 INFO L276 IsEmpty]: Start isEmpty. Operand 14941 states and 21199 transitions. [2025-03-16 22:49:29,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:29,953 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:29,953 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:29,953 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2025-03-16 22:49:29,953 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:29,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:29,953 INFO L85 PathProgramCache]: Analyzing trace with hash 1810442551, now seen corresponding path program 1 times [2025-03-16 22:49:29,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:29,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34836123] [2025-03-16 22:49:29,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:29,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:29,991 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:30,060 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:30,060 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:30,060 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:30,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:30,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:30,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34836123] [2025-03-16 22:49:30,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34836123] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:30,446 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:30,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:30,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612055344] [2025-03-16 22:49:30,447 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:30,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:30,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:30,447 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:30,447 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:30,447 INFO L87 Difference]: Start difference. First operand 14941 states and 21199 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:30,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:30,987 INFO L93 Difference]: Finished difference Result 34542 states and 48579 transitions. [2025-03-16 22:49:30,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:30,988 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:30,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:31,016 INFO L225 Difference]: With dead ends: 34542 [2025-03-16 22:49:31,016 INFO L226 Difference]: Without dead ends: 26769 [2025-03-16 22:49:31,028 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:31,028 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2006 mSDsluCounter, 4221 mSDsCounter, 0 mSdLazyCounter, 1256 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2006 SdHoareTripleChecker+Valid, 5631 SdHoareTripleChecker+Invalid, 1256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:31,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2006 Valid, 5631 Invalid, 1256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1256 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:49:31,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26769 states. [2025-03-16 22:49:31,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26769 to 14941. [2025-03-16 22:49:31,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14941 states, 14940 states have (on average 1.418942436412316) internal successors, (21199), 14940 states have internal predecessors, (21199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:31,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14941 states to 14941 states and 21199 transitions. [2025-03-16 22:49:31,166 INFO L78 Accepts]: Start accepts. Automaton has 14941 states and 21199 transitions. Word has length 206 [2025-03-16 22:49:31,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:31,166 INFO L471 AbstractCegarLoop]: Abstraction has 14941 states and 21199 transitions. [2025-03-16 22:49:31,166 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:31,167 INFO L276 IsEmpty]: Start isEmpty. Operand 14941 states and 21199 transitions. [2025-03-16 22:49:31,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:31,177 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:31,177 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:31,177 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2025-03-16 22:49:31,177 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:31,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:31,178 INFO L85 PathProgramCache]: Analyzing trace with hash 479095009, now seen corresponding path program 1 times [2025-03-16 22:49:31,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:31,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965892696] [2025-03-16 22:49:31,178 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:31,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:31,211 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:31,345 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:31,345 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:31,345 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:31,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:31,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:31,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1965892696] [2025-03-16 22:49:31,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1965892696] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:31,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:31,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:31,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068934125] [2025-03-16 22:49:31,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:31,565 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:31,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:31,565 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:31,565 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:31,565 INFO L87 Difference]: Start difference. First operand 14941 states and 21199 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:32,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:32,652 INFO L93 Difference]: Finished difference Result 17908 states and 25459 transitions. [2025-03-16 22:49:32,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:32,653 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:32,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:32,667 INFO L225 Difference]: With dead ends: 17908 [2025-03-16 22:49:32,667 INFO L226 Difference]: Without dead ends: 15638 [2025-03-16 22:49:32,673 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:32,674 INFO L435 NwaCegarLoop]: 1829 mSDtfsCounter, 483 mSDsluCounter, 5863 mSDsCounter, 0 mSdLazyCounter, 3082 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 7692 SdHoareTripleChecker+Invalid, 3083 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3082 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:32,674 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 7692 Invalid, 3083 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3082 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 22:49:32,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15638 states. [2025-03-16 22:49:32,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15638 to 13737. [2025-03-16 22:49:32,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13737 states, 13736 states have (on average 1.4236313337216076) internal successors, (19555), 13736 states have internal predecessors, (19555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:32,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13737 states to 13737 states and 19555 transitions. [2025-03-16 22:49:32,777 INFO L78 Accepts]: Start accepts. Automaton has 13737 states and 19555 transitions. Word has length 206 [2025-03-16 22:49:32,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:32,777 INFO L471 AbstractCegarLoop]: Abstraction has 13737 states and 19555 transitions. [2025-03-16 22:49:32,777 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:32,777 INFO L276 IsEmpty]: Start isEmpty. Operand 13737 states and 19555 transitions. [2025-03-16 22:49:32,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:32,814 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:32,814 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:32,815 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2025-03-16 22:49:32,815 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:32,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:32,815 INFO L85 PathProgramCache]: Analyzing trace with hash -1558166841, now seen corresponding path program 1 times [2025-03-16 22:49:32,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:32,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403462236] [2025-03-16 22:49:32,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:32,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:32,849 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:33,009 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:33,009 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:33,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:33,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:33,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:33,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403462236] [2025-03-16 22:49:33,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1403462236] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:33,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:33,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:33,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589512147] [2025-03-16 22:49:33,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:33,359 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:33,359 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:33,360 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:33,360 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:33,360 INFO L87 Difference]: Start difference. First operand 13737 states and 19555 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:34,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:34,371 INFO L93 Difference]: Finished difference Result 19969 states and 28264 transitions. [2025-03-16 22:49:34,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:34,371 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:34,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:34,384 INFO L225 Difference]: With dead ends: 19969 [2025-03-16 22:49:34,384 INFO L226 Difference]: Without dead ends: 16616 [2025-03-16 22:49:34,389 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:34,389 INFO L435 NwaCegarLoop]: 1432 mSDtfsCounter, 1983 mSDsluCounter, 4008 mSDsCounter, 0 mSdLazyCounter, 2525 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1983 SdHoareTripleChecker+Valid, 5440 SdHoareTripleChecker+Invalid, 2526 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2525 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:34,390 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1983 Valid, 5440 Invalid, 2526 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2525 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-16 22:49:34,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16616 states. [2025-03-16 22:49:34,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16616 to 14761. [2025-03-16 22:49:34,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14761 states, 14760 states have (on average 1.4170054200542006) internal successors, (20915), 14760 states have internal predecessors, (20915), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:34,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14761 states to 14761 states and 20915 transitions. [2025-03-16 22:49:34,494 INFO L78 Accepts]: Start accepts. Automaton has 14761 states and 20915 transitions. Word has length 206 [2025-03-16 22:49:34,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:34,494 INFO L471 AbstractCegarLoop]: Abstraction has 14761 states and 20915 transitions. [2025-03-16 22:49:34,494 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:34,494 INFO L276 IsEmpty]: Start isEmpty. Operand 14761 states and 20915 transitions. [2025-03-16 22:49:34,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:34,504 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:34,504 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:34,504 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2025-03-16 22:49:34,504 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:34,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:34,505 INFO L85 PathProgramCache]: Analyzing trace with hash 2042686966, now seen corresponding path program 1 times [2025-03-16 22:49:34,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:34,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72381103] [2025-03-16 22:49:34,505 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:34,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:34,539 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:34,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:34,725 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:34,725 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:35,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:35,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:35,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72381103] [2025-03-16 22:49:35,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72381103] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:35,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:35,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:35,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521889968] [2025-03-16 22:49:35,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:35,127 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:35,127 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:35,128 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:35,128 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:35,128 INFO L87 Difference]: Start difference. First operand 14761 states and 20915 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:36,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:36,207 INFO L93 Difference]: Finished difference Result 20432 states and 28854 transitions. [2025-03-16 22:49:36,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:36,207 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:36,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:36,223 INFO L225 Difference]: With dead ends: 20432 [2025-03-16 22:49:36,223 INFO L226 Difference]: Without dead ends: 18038 [2025-03-16 22:49:36,229 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:36,230 INFO L435 NwaCegarLoop]: 1401 mSDtfsCounter, 1916 mSDsluCounter, 3945 mSDsCounter, 0 mSdLazyCounter, 2462 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1916 SdHoareTripleChecker+Valid, 5346 SdHoareTripleChecker+Invalid, 2463 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2462 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:36,230 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1916 Valid, 5346 Invalid, 2463 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2462 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-16 22:49:36,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18038 states. [2025-03-16 22:49:36,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18038 to 14761. [2025-03-16 22:49:36,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14761 states, 14760 states have (on average 1.4170054200542006) internal successors, (20915), 14760 states have internal predecessors, (20915), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:36,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14761 states to 14761 states and 20915 transitions. [2025-03-16 22:49:36,357 INFO L78 Accepts]: Start accepts. Automaton has 14761 states and 20915 transitions. Word has length 206 [2025-03-16 22:49:36,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:36,357 INFO L471 AbstractCegarLoop]: Abstraction has 14761 states and 20915 transitions. [2025-03-16 22:49:36,357 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:36,357 INFO L276 IsEmpty]: Start isEmpty. Operand 14761 states and 20915 transitions. [2025-03-16 22:49:36,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2025-03-16 22:49:36,369 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:36,369 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:36,369 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2025-03-16 22:49:36,369 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:36,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:36,370 INFO L85 PathProgramCache]: Analyzing trace with hash -1692057685, now seen corresponding path program 1 times [2025-03-16 22:49:36,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:36,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225252623] [2025-03-16 22:49:36,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:36,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:36,406 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-16 22:49:36,461 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-16 22:49:36,461 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:36,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:36,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:36,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:36,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225252623] [2025-03-16 22:49:36,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225252623] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:36,853 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:36,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:36,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691883620] [2025-03-16 22:49:36,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:36,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:36,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:36,854 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:36,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:36,854 INFO L87 Difference]: Start difference. First operand 14761 states and 20915 transitions. Second operand has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:37,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:37,459 INFO L93 Difference]: Finished difference Result 34742 states and 48855 transitions. [2025-03-16 22:49:37,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:37,460 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 206 [2025-03-16 22:49:37,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:37,483 INFO L225 Difference]: With dead ends: 34742 [2025-03-16 22:49:37,483 INFO L226 Difference]: Without dead ends: 25519 [2025-03-16 22:49:37,489 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:37,489 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2330 mSDsluCounter, 4221 mSDsCounter, 0 mSdLazyCounter, 1256 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2330 SdHoareTripleChecker+Valid, 5631 SdHoareTripleChecker+Invalid, 1256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:37,489 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2330 Valid, 5631 Invalid, 1256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1256 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 22:49:37,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25519 states. [2025-03-16 22:49:37,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25519 to 17473. [2025-03-16 22:49:37,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17473 states, 17472 states have (on average 1.4292010073260073) internal successors, (24971), 17472 states have internal predecessors, (24971), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:37,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17473 states to 17473 states and 24971 transitions. [2025-03-16 22:49:37,704 INFO L78 Accepts]: Start accepts. Automaton has 17473 states and 24971 transitions. Word has length 206 [2025-03-16 22:49:37,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:37,704 INFO L471 AbstractCegarLoop]: Abstraction has 17473 states and 24971 transitions. [2025-03-16 22:49:37,704 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.333333333333336) internal successors, (206), 5 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:37,705 INFO L276 IsEmpty]: Start isEmpty. Operand 17473 states and 24971 transitions. [2025-03-16 22:49:37,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2025-03-16 22:49:37,722 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:37,722 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:37,722 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2025-03-16 22:49:37,722 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:37,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:37,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1639706557, now seen corresponding path program 1 times [2025-03-16 22:49:37,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:37,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941378048] [2025-03-16 22:49:37,723 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:37,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:37,771 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-16 22:49:37,838 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-16 22:49:37,838 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:37,838 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:38,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:38,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:38,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941378048] [2025-03-16 22:49:38,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941378048] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:38,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:38,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 22:49:38,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159186195] [2025-03-16 22:49:38,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:38,284 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 22:49:38,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:38,284 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 22:49:38,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:38,284 INFO L87 Difference]: Start difference. First operand 17473 states and 24971 transitions. Second operand has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 6 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:38,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:38,944 INFO L93 Difference]: Finished difference Result 36919 states and 52483 transitions. [2025-03-16 22:49:38,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:38,944 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 6 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2025-03-16 22:49:38,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:38,970 INFO L225 Difference]: With dead ends: 36919 [2025-03-16 22:49:38,970 INFO L226 Difference]: Without dead ends: 32467 [2025-03-16 22:49:38,982 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-03-16 22:49:38,982 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2006 mSDsluCounter, 5626 mSDsCounter, 0 mSdLazyCounter, 1573 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2006 SdHoareTripleChecker+Valid, 7036 SdHoareTripleChecker+Invalid, 1574 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1573 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:38,982 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2006 Valid, 7036 Invalid, 1574 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1573 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-16 22:49:38,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32467 states. [2025-03-16 22:49:39,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32467 to 17617. [2025-03-16 22:49:39,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17617 states, 17616 states have (on average 1.4297797456857402) internal successors, (25187), 17616 states have internal predecessors, (25187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:39,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17617 states to 17617 states and 25187 transitions. [2025-03-16 22:49:39,145 INFO L78 Accepts]: Start accepts. Automaton has 17617 states and 25187 transitions. Word has length 207 [2025-03-16 22:49:39,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:39,145 INFO L471 AbstractCegarLoop]: Abstraction has 17617 states and 25187 transitions. [2025-03-16 22:49:39,145 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 29.571428571428573) internal successors, (207), 6 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:39,145 INFO L276 IsEmpty]: Start isEmpty. Operand 17617 states and 25187 transitions. [2025-03-16 22:49:39,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2025-03-16 22:49:39,157 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:39,158 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:39,158 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2025-03-16 22:49:39,158 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:39,158 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:39,158 INFO L85 PathProgramCache]: Analyzing trace with hash 840424273, now seen corresponding path program 1 times [2025-03-16 22:49:39,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:39,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607520578] [2025-03-16 22:49:39,158 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:39,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:39,193 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-16 22:49:39,251 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-16 22:49:39,251 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:39,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 22:49:39,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 22:49:39,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 22:49:39,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607520578] [2025-03-16 22:49:39,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607520578] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 22:49:39,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 22:49:39,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 22:49:39,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138737726] [2025-03-16 22:49:39,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 22:49:39,641 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 22:49:39,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 22:49:39,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 22:49:39,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-16 22:49:39,642 INFO L87 Difference]: Start difference. First operand 17617 states and 25187 transitions. Second operand has 6 states, 6 states have (on average 34.5) internal successors, (207), 5 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:40,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 22:49:40,171 INFO L93 Difference]: Finished difference Result 35047 states and 49807 transitions. [2025-03-16 22:49:40,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 22:49:40,171 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 34.5) internal successors, (207), 5 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 207 [2025-03-16 22:49:40,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 22:49:40,198 INFO L225 Difference]: With dead ends: 35047 [2025-03-16 22:49:40,198 INFO L226 Difference]: Without dead ends: 31487 [2025-03-16 22:49:40,208 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-03-16 22:49:40,209 INFO L435 NwaCegarLoop]: 1410 mSDtfsCounter, 2301 mSDsluCounter, 4221 mSDsCounter, 0 mSdLazyCounter, 1256 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2301 SdHoareTripleChecker+Valid, 5631 SdHoareTripleChecker+Invalid, 1256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-16 22:49:40,209 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2301 Valid, 5631 Invalid, 1256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-16 22:49:40,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31487 states. [2025-03-16 22:49:40,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31487 to 30649. [2025-03-16 22:49:40,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30649 states, 30648 states have (on average 1.4245301487862176) internal successors, (43659), 30648 states have internal predecessors, (43659), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:40,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30649 states to 30649 states and 43659 transitions. [2025-03-16 22:49:40,451 INFO L78 Accepts]: Start accepts. Automaton has 30649 states and 43659 transitions. Word has length 207 [2025-03-16 22:49:40,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 22:49:40,451 INFO L471 AbstractCegarLoop]: Abstraction has 30649 states and 43659 transitions. [2025-03-16 22:49:40,451 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.5) internal successors, (207), 5 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-16 22:49:40,451 INFO L276 IsEmpty]: Start isEmpty. Operand 30649 states and 43659 transitions. [2025-03-16 22:49:40,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2025-03-16 22:49:40,475 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 22:49:40,475 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:40,476 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2025-03-16 22:49:40,476 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 22:49:40,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 22:49:40,476 INFO L85 PathProgramCache]: Analyzing trace with hash -2088481187, now seen corresponding path program 1 times [2025-03-16 22:49:40,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 22:49:40,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425941908] [2025-03-16 22:49:40,476 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 22:49:40,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 22:49:40,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-16 22:49:40,736 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-16 22:49:40,736 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:40,736 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 22:49:40,736 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-16 22:49:40,754 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-16 22:49:40,968 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-16 22:49:40,968 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 22:49:40,968 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 22:49:41,059 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-16 22:49:41,059 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-16 22:49:41,060 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-16 22:49:41,061 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2025-03-16 22:49:41,063 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 22:49:41,145 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-03-16 22:49:41,167 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-16 22:49:41,170 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 10:49:41 BoogieIcfgContainer [2025-03-16 22:49:41,170 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-16 22:49:41,170 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-16 22:49:41,170 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-16 22:49:41,171 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-16 22:49:41,171 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 10:48:34" (3/4) ... [2025-03-16 22:49:41,173 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-16 22:49:41,173 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-16 22:49:41,173 INFO L158 Benchmark]: Toolchain (without parser) took 72058.44ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 119.0MB in the beginning and 1.1GB in the end (delta: -955.7MB). Peak memory consumption was 971.4MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 201.3MB. Free memory is still 119.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: CACSL2BoogieTranslator took 616.41ms. Allocated memory is still 167.8MB. Free memory was 119.0MB in the beginning and 38.1MB in the end (delta: 80.9MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: Boogie Procedure Inliner took 349.69ms. Allocated memory is still 167.8MB. Free memory was 38.1MB in the beginning and 56.3MB in the end (delta: -18.2MB). Peak memory consumption was 41.4MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: Boogie Preprocessor took 496.51ms. Allocated memory was 167.8MB in the beginning and 184.5MB in the end (delta: 16.8MB). Free memory was 56.3MB in the beginning and 54.3MB in the end (delta: 2.0MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: IcfgBuilder took 3533.46ms. Allocated memory was 184.5MB in the beginning and 553.6MB in the end (delta: 369.1MB). Free memory was 54.3MB in the beginning and 239.4MB in the end (delta: -185.2MB). Peak memory consumption was 271.7MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: TraceAbstraction took 67054.74ms. Allocated memory was 553.6MB in the beginning and 2.1GB in the end (delta: 1.5GB). Free memory was 239.4MB in the beginning and 1.1GB in the end (delta: -835.5MB). Peak memory consumption was 695.5MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,174 INFO L158 Benchmark]: Witness Printer took 2.75ms. Allocated memory is still 2.1GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 181.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-16 22:49:41,175 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 201.3MB. Free memory is still 119.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 616.41ms. Allocated memory is still 167.8MB. Free memory was 119.0MB in the beginning and 38.1MB in the end (delta: 80.9MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 349.69ms. Allocated memory is still 167.8MB. Free memory was 38.1MB in the beginning and 56.3MB in the end (delta: -18.2MB). Peak memory consumption was 41.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 496.51ms. Allocated memory was 167.8MB in the beginning and 184.5MB in the end (delta: 16.8MB). Free memory was 56.3MB in the beginning and 54.3MB in the end (delta: 2.0MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * IcfgBuilder took 3533.46ms. Allocated memory was 184.5MB in the beginning and 553.6MB in the end (delta: 369.1MB). Free memory was 54.3MB in the beginning and 239.4MB in the end (delta: -185.2MB). Peak memory consumption was 271.7MB. Max. memory is 16.1GB. * TraceAbstraction took 67054.74ms. Allocated memory was 553.6MB in the beginning and 2.1GB in the end (delta: 1.5GB). Free memory was 239.4MB in the beginning and 1.1GB in the end (delta: -835.5MB). Peak memory consumption was 695.5MB. Max. memory is 16.1GB. * Witness Printer took 2.75ms. Allocated memory is still 2.1GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 181.3kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 412, overapproximation of bitwiseAnd at line 528. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 2); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (2 - 1); [L32] const SORT_25 mask_SORT_25 = (SORT_25)-1 >> (sizeof(SORT_25) * 8 - 4); [L33] const SORT_25 msb_SORT_25 = (SORT_25)1 << (4 - 1); [L35] const SORT_187 mask_SORT_187 = (SORT_187)-1 >> (sizeof(SORT_187) * 8 - 32); [L36] const SORT_187 msb_SORT_187 = (SORT_187)1 << (32 - 1); [L38] const SORT_195 mask_SORT_195 = (SORT_195)-1 >> (sizeof(SORT_195) * 8 - 3); [L39] const SORT_195 msb_SORT_195 = (SORT_195)1 << (3 - 1); [L41] const SORT_1 var_11 = 0; [L42] const SORT_3 var_14 = 2; [L43] const SORT_1 var_28 = 1; [L44] const SORT_187 var_189 = 1; [L45] const SORT_3 var_274 = 0; [L46] const SORT_3 var_275 = 3; [L47] const SORT_187 var_284 = 0; [L48] const SORT_187 var_495 = 2; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_3 input_5; [L53] SORT_1 input_6; [L54] SORT_3 input_7; [L55] SORT_1 input_8; [L56] SORT_1 input_9; [L57] SORT_1 input_181; [L58] SORT_3 input_273; [L59] SORT_3 input_289; [L60] SORT_3 input_290; [L61] SORT_3 input_291; [L62] SORT_3 input_292; [L63] SORT_3 input_319; [L64] SORT_3 input_320; [L65] SORT_3 input_321; [L66] SORT_3 input_330; [L67] SORT_3 input_384; [L68] SORT_3 input_396; [L69] SORT_3 input_397; [L70] SORT_3 input_398; [L71] SORT_3 input_399; [L72] SORT_3 input_408; [L73] SORT_3 input_429; [L74] SORT_3 input_430; [L75] SORT_3 input_431; [L76] SORT_3 input_440; [L77] SORT_3 input_442; [L78] SORT_3 input_488; [L79] SORT_3 input_502; [L80] SORT_3 input_503; [L81] SORT_3 input_504; [L82] SORT_3 input_505; [L83] SORT_3 input_514; [L84] SORT_3 input_516; [L85] SORT_3 input_538; [L86] SORT_3 input_539; [L87] SORT_3 input_540; [L88] SORT_3 input_549; [L89] SORT_3 input_551; [L90] SORT_3 input_553; [L91] SORT_3 input_599; [L92] SORT_3 input_610; [L93] SORT_3 input_611; [L94] SORT_3 input_612; [L95] SORT_3 input_620; [L96] SORT_3 input_622; [L97] SORT_3 input_624; [L98] SORT_3 input_644; [L99] SORT_3 input_645; [L100] SORT_3 input_653; [L101] SORT_3 input_655; [L102] SORT_3 input_657; [L103] SORT_3 input_659; [L105] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L105] SORT_1 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, state_10=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L106] SORT_3 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, state_10=0, state_13=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L107] SORT_3 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L108] SORT_3 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L109] SORT_3 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_25 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_25=15, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L110] SORT_25 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_25; [L111] EXPR __VERIFIER_nondet_uchar() & mask_SORT_25 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L111] SORT_25 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_25; [L112] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L112] SORT_3 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L113] SORT_3 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L114] SORT_3 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L115] SORT_3 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L116] SORT_3 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L117] SORT_3 state_57 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L118] SORT_3 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L119] SORT_3 state_63 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L120] SORT_3 state_74 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L121] SORT_3 state_76 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L122] SORT_3 state_79 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L123] SORT_3 state_82 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L124] SORT_3 state_148 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L125] SORT_3 state_149 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L126] SORT_3 state_150 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L127] SORT_3 state_151 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L128] SORT_3 state_152 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L129] SORT_3 state_153 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L130] SORT_3 state_154 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L131] SORT_3 state_155 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L132] SORT_3 state_156 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L133] SORT_3 state_157 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L134] SORT_3 state_158 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L135] SORT_3 state_159 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L136] SORT_3 state_160 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L137] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L137] SORT_3 state_161 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L138] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L138] SORT_3 state_162 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L139] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L139] SORT_3 state_163 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L143] input_2 = __VERIFIER_nondet_uchar() [L144] EXPR input_2 & mask_SORT_1 VAL [mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L144] input_2 = input_2 & mask_SORT_1 [L145] input_4 = __VERIFIER_nondet_uchar() [L146] input_5 = __VERIFIER_nondet_uchar() [L147] input_6 = __VERIFIER_nondet_uchar() [L148] input_7 = __VERIFIER_nondet_uchar() [L149] input_8 = __VERIFIER_nondet_uchar() [L150] input_9 = __VERIFIER_nondet_uchar() [L151] EXPR input_9 & mask_SORT_1 VAL [input_2=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L151] input_9 = input_9 & mask_SORT_1 [L152] input_181 = __VERIFIER_nondet_uchar() [L153] input_273 = __VERIFIER_nondet_uchar() [L154] input_289 = __VERIFIER_nondet_uchar() [L155] input_290 = __VERIFIER_nondet_uchar() [L156] input_291 = __VERIFIER_nondet_uchar() [L157] input_292 = __VERIFIER_nondet_uchar() [L158] input_319 = __VERIFIER_nondet_uchar() [L159] input_320 = __VERIFIER_nondet_uchar() [L160] input_321 = __VERIFIER_nondet_uchar() [L161] input_330 = __VERIFIER_nondet_uchar() [L162] input_384 = __VERIFIER_nondet_uchar() [L163] input_396 = __VERIFIER_nondet_uchar() [L164] input_397 = __VERIFIER_nondet_uchar() [L165] input_398 = __VERIFIER_nondet_uchar() [L166] input_399 = __VERIFIER_nondet_uchar() [L167] input_408 = __VERIFIER_nondet_uchar() [L168] input_429 = __VERIFIER_nondet_uchar() [L169] input_430 = __VERIFIER_nondet_uchar() [L170] input_431 = __VERIFIER_nondet_uchar() [L171] input_440 = __VERIFIER_nondet_uchar() [L172] input_442 = __VERIFIER_nondet_uchar() [L173] input_488 = __VERIFIER_nondet_uchar() [L174] input_502 = __VERIFIER_nondet_uchar() [L175] input_503 = __VERIFIER_nondet_uchar() [L176] input_504 = __VERIFIER_nondet_uchar() [L177] input_505 = __VERIFIER_nondet_uchar() [L178] input_514 = __VERIFIER_nondet_uchar() [L179] input_516 = __VERIFIER_nondet_uchar() [L180] input_538 = __VERIFIER_nondet_uchar() [L181] input_539 = __VERIFIER_nondet_uchar() [L182] input_540 = __VERIFIER_nondet_uchar() [L183] input_549 = __VERIFIER_nondet_uchar() [L184] input_551 = __VERIFIER_nondet_uchar() [L185] input_553 = __VERIFIER_nondet_uchar() [L186] input_599 = __VERIFIER_nondet_uchar() [L187] input_610 = __VERIFIER_nondet_uchar() [L188] input_611 = __VERIFIER_nondet_uchar() [L189] input_612 = __VERIFIER_nondet_uchar() [L190] input_620 = __VERIFIER_nondet_uchar() [L191] input_622 = __VERIFIER_nondet_uchar() [L192] input_624 = __VERIFIER_nondet_uchar() [L193] input_644 = __VERIFIER_nondet_uchar() [L194] input_645 = __VERIFIER_nondet_uchar() [L195] input_653 = __VERIFIER_nondet_uchar() [L196] input_655 = __VERIFIER_nondet_uchar() [L197] input_657 = __VERIFIER_nondet_uchar() [L198] input_659 = __VERIFIER_nondet_uchar() [L201] SORT_1 var_12_arg_0 = state_10; [L202] SORT_1 var_12_arg_1 = var_11; [L203] SORT_1 var_12 = var_12_arg_0 == var_12_arg_1; [L204] SORT_3 var_15_arg_0 = state_13; [L205] SORT_3 var_15_arg_1 = var_14; [L206] SORT_1 var_15 = var_15_arg_0 >= var_15_arg_1; [L207] SORT_3 var_17_arg_0 = state_16; [L208] SORT_3 var_17_arg_1 = var_14; [L209] SORT_1 var_17 = var_17_arg_0 >= var_17_arg_1; [L210] SORT_1 var_18_arg_0 = var_15; [L211] SORT_1 var_18_arg_1 = var_17; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_18_arg_0=0, var_18_arg_1=0, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L212] EXPR var_18_arg_0 & var_18_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L212] SORT_1 var_18 = var_18_arg_0 & var_18_arg_1; [L213] SORT_3 var_20_arg_0 = state_19; [L214] SORT_3 var_20_arg_1 = var_14; [L215] SORT_1 var_20 = var_20_arg_0 >= var_20_arg_1; [L216] SORT_1 var_21_arg_0 = var_18; [L217] SORT_1 var_21_arg_1 = var_20; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_21_arg_0=0, var_21_arg_1=0, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L218] EXPR var_21_arg_0 & var_21_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L218] SORT_1 var_21 = var_21_arg_0 & var_21_arg_1; [L219] SORT_3 var_23_arg_0 = state_22; [L220] SORT_3 var_23_arg_1 = var_14; [L221] SORT_1 var_23 = var_23_arg_0 >= var_23_arg_1; [L222] SORT_1 var_24_arg_0 = var_21; [L223] SORT_1 var_24_arg_1 = var_23; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_24_arg_0=0, var_24_arg_1=0, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L224] EXPR var_24_arg_0 & var_24_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L224] SORT_1 var_24 = var_24_arg_0 & var_24_arg_1; [L225] SORT_25 var_27_arg_0 = state_26; [L226] SORT_1 var_27 = var_27_arg_0 >> 3; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_24=0, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_495=2] [L227] EXPR var_27 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_24=0, var_274=0, var_275=3, var_284=0, var_28=1, var_495=2] [L227] var_27 = var_27 & mask_SORT_1 [L228] SORT_1 var_29_arg_0 = var_27; [L229] SORT_1 var_29_arg_1 = var_28; [L230] SORT_1 var_29 = var_29_arg_0 == var_29_arg_1; [L231] SORT_1 var_30_arg_0 = var_24; [L232] SORT_1 var_30_arg_1 = var_29; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_30_arg_0=0, var_30_arg_1=0, var_495=2] [L233] EXPR var_30_arg_0 & var_30_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_495=2] [L233] SORT_1 var_30 = var_30_arg_0 & var_30_arg_1; [L234] SORT_1 var_31_arg_0 = var_30; [L235] SORT_1 var_31 = ~var_31_arg_0; [L236] SORT_25 var_33_arg_0 = state_32; [L237] SORT_1 var_33 = var_33_arg_0 >> 3; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_31=-1, var_33=0, var_495=2] [L238] EXPR var_33 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_31=-1, var_495=2] [L238] var_33 = var_33 & mask_SORT_1 [L239] SORT_1 var_34_arg_0 = var_33; [L240] SORT_1 var_34_arg_1 = var_28; [L241] SORT_1 var_34 = var_34_arg_0 == var_34_arg_1; [L242] SORT_1 var_35_arg_0 = var_31; [L243] SORT_1 var_35_arg_1 = var_34; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35_arg_0=-1, var_35_arg_1=0, var_495=2] [L244] EXPR var_35_arg_0 | var_35_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_495=2] [L244] SORT_1 var_35 = var_35_arg_0 | var_35_arg_1; [L245] SORT_3 var_37_arg_0 = state_36; [L246] SORT_3 var_37_arg_1 = var_14; [L247] SORT_1 var_37 = var_37_arg_0 >= var_37_arg_1; [L248] SORT_3 var_39_arg_0 = state_38; [L249] SORT_3 var_39_arg_1 = var_14; [L250] SORT_1 var_39 = var_39_arg_0 >= var_39_arg_1; [L251] SORT_1 var_40_arg_0 = var_37; [L252] SORT_1 var_40_arg_1 = var_39; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_40_arg_0=0, var_40_arg_1=0, var_495=2] [L253] EXPR var_40_arg_0 & var_40_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_495=2] [L253] SORT_1 var_40 = var_40_arg_0 & var_40_arg_1; [L254] SORT_3 var_42_arg_0 = state_41; [L255] SORT_3 var_42_arg_1 = var_14; [L256] SORT_1 var_42 = var_42_arg_0 >= var_42_arg_1; [L257] SORT_1 var_43_arg_0 = var_40; [L258] SORT_1 var_43_arg_1 = var_42; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_43_arg_0=0, var_43_arg_1=0, var_495=2] [L259] EXPR var_43_arg_0 & var_43_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_495=2] [L259] SORT_1 var_43 = var_43_arg_0 & var_43_arg_1; [L260] SORT_3 var_45_arg_0 = state_44; [L261] SORT_3 var_45_arg_1 = var_14; [L262] SORT_1 var_45 = var_45_arg_0 >= var_45_arg_1; [L263] SORT_1 var_46_arg_0 = var_43; [L264] SORT_1 var_46_arg_1 = var_45; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_46_arg_0=0, var_46_arg_1=0, var_495=2] [L265] EXPR var_46_arg_0 & var_46_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_495=2] [L265] SORT_1 var_46 = var_46_arg_0 & var_46_arg_1; [L266] SORT_25 var_47_arg_0 = state_26; [L267] SORT_1 var_47 = var_47_arg_0 >> 2; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_46=0, var_47=0, var_495=2] [L268] EXPR var_47 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_46=0, var_495=2] [L268] var_47 = var_47 & mask_SORT_1 [L269] SORT_1 var_48_arg_0 = var_47; [L270] SORT_1 var_48_arg_1 = var_28; [L271] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L272] SORT_1 var_49_arg_0 = var_46; [L273] SORT_1 var_49_arg_1 = var_48; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2, var_49_arg_0=0, var_49_arg_1=0] [L274] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2] [L274] SORT_1 var_49 = var_49_arg_0 & var_49_arg_1; [L275] SORT_1 var_50_arg_0 = var_49; [L276] SORT_1 var_50 = ~var_50_arg_0; [L277] SORT_25 var_51_arg_0 = state_32; [L278] SORT_1 var_51 = var_51_arg_0 >> 2; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2, var_50=-1, var_51=0] [L279] EXPR var_51 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2, var_50=-1] [L279] var_51 = var_51 & mask_SORT_1 [L280] SORT_1 var_52_arg_0 = var_51; [L281] SORT_1 var_52_arg_1 = var_28; [L282] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L283] SORT_1 var_53_arg_0 = var_50; [L284] SORT_1 var_53_arg_1 = var_52; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2, var_51=0, var_53_arg_0=-1, var_53_arg_1=0] [L285] EXPR var_53_arg_0 | var_53_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_35=255, var_47=0, var_495=2, var_51=0] [L285] SORT_1 var_53 = var_53_arg_0 | var_53_arg_1; [L286] SORT_1 var_54_arg_0 = var_35; [L287] SORT_1 var_54_arg_1 = var_53; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54_arg_0=255, var_54_arg_1=255] [L288] EXPR var_54_arg_0 & var_54_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0] [L288] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L289] SORT_3 var_56_arg_0 = state_55; [L290] SORT_3 var_56_arg_1 = var_14; [L291] SORT_1 var_56 = var_56_arg_0 >= var_56_arg_1; [L292] SORT_3 var_58_arg_0 = state_57; [L293] SORT_3 var_58_arg_1 = var_14; [L294] SORT_1 var_58 = var_58_arg_0 >= var_58_arg_1; [L295] SORT_1 var_59_arg_0 = var_56; [L296] SORT_1 var_59_arg_1 = var_58; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_59_arg_0=0, var_59_arg_1=0] [L297] EXPR var_59_arg_0 & var_59_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255] [L297] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L298] SORT_3 var_61_arg_0 = state_60; [L299] SORT_3 var_61_arg_1 = var_14; [L300] SORT_1 var_61 = var_61_arg_0 >= var_61_arg_1; [L301] SORT_1 var_62_arg_0 = var_59; [L302] SORT_1 var_62_arg_1 = var_61; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_62_arg_0=0, var_62_arg_1=0] [L303] EXPR var_62_arg_0 & var_62_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255] [L303] SORT_1 var_62 = var_62_arg_0 & var_62_arg_1; [L304] SORT_3 var_64_arg_0 = state_63; [L305] SORT_3 var_64_arg_1 = var_14; [L306] SORT_1 var_64 = var_64_arg_0 >= var_64_arg_1; [L307] SORT_1 var_65_arg_0 = var_62; [L308] SORT_1 var_65_arg_1 = var_64; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_65_arg_0=0, var_65_arg_1=0] [L309] EXPR var_65_arg_0 & var_65_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255] [L309] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L310] SORT_25 var_66_arg_0 = state_26; [L311] SORT_1 var_66 = var_66_arg_0 >> 1; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_65=0, var_66=0] [L312] EXPR var_66 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_65=0] [L312] var_66 = var_66 & mask_SORT_1 [L313] SORT_1 var_67_arg_0 = var_66; [L314] SORT_1 var_67_arg_1 = var_28; [L315] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L316] SORT_1 var_68_arg_0 = var_65; [L317] SORT_1 var_68_arg_1 = var_67; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0, var_68_arg_0=0, var_68_arg_1=0] [L318] EXPR var_68_arg_0 & var_68_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0] [L318] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L319] SORT_1 var_69_arg_0 = var_68; [L320] SORT_1 var_69 = ~var_69_arg_0; [L321] SORT_25 var_70_arg_0 = state_32; [L322] SORT_1 var_70 = var_70_arg_0 >> 1; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0, var_69=-1, var_70=0] [L323] EXPR var_70 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0, var_69=-1] [L323] var_70 = var_70 & mask_SORT_1 [L324] SORT_1 var_71_arg_0 = var_70; [L325] SORT_1 var_71_arg_1 = var_28; [L326] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L327] SORT_1 var_72_arg_0 = var_69; [L328] SORT_1 var_72_arg_1 = var_71; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0, var_70=0, var_72_arg_0=-1, var_72_arg_1=0] [L329] EXPR var_72_arg_0 | var_72_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_54=255, var_66=0, var_70=0] [L329] SORT_1 var_72 = var_72_arg_0 | var_72_arg_1; [L330] SORT_1 var_73_arg_0 = var_54; [L331] SORT_1 var_73_arg_1 = var_72; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73_arg_0=255, var_73_arg_1=255] [L332] EXPR var_73_arg_0 & var_73_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0] [L332] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L333] SORT_3 var_75_arg_0 = state_74; [L334] SORT_3 var_75_arg_1 = var_14; [L335] SORT_1 var_75 = var_75_arg_0 >= var_75_arg_1; [L336] SORT_3 var_77_arg_0 = state_76; [L337] SORT_3 var_77_arg_1 = var_14; [L338] SORT_1 var_77 = var_77_arg_0 >= var_77_arg_1; [L339] SORT_1 var_78_arg_0 = var_75; [L340] SORT_1 var_78_arg_1 = var_77; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_78_arg_0=0, var_78_arg_1=0] [L341] EXPR var_78_arg_0 & var_78_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255] [L341] SORT_1 var_78 = var_78_arg_0 & var_78_arg_1; [L342] SORT_3 var_80_arg_0 = state_79; [L343] SORT_3 var_80_arg_1 = var_14; [L344] SORT_1 var_80 = var_80_arg_0 >= var_80_arg_1; [L345] SORT_1 var_81_arg_0 = var_78; [L346] SORT_1 var_81_arg_1 = var_80; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_81_arg_0=0, var_81_arg_1=0] [L347] EXPR var_81_arg_0 & var_81_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255] [L347] SORT_1 var_81 = var_81_arg_0 & var_81_arg_1; [L348] SORT_3 var_83_arg_0 = state_82; [L349] SORT_3 var_83_arg_1 = var_14; [L350] SORT_1 var_83 = var_83_arg_0 >= var_83_arg_1; [L351] SORT_1 var_84_arg_0 = var_81; [L352] SORT_1 var_84_arg_1 = var_83; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_84_arg_0=0, var_84_arg_1=0] [L353] EXPR var_84_arg_0 & var_84_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_26=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255] [L353] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L354] SORT_25 var_85_arg_0 = state_26; [L355] SORT_1 var_85 = var_85_arg_0 >> 0; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_84=0, var_85=0] [L356] EXPR var_85 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_84=0] [L356] var_85 = var_85 & mask_SORT_1 [L357] SORT_1 var_86_arg_0 = var_85; [L358] SORT_1 var_86_arg_1 = var_28; [L359] SORT_1 var_86 = var_86_arg_0 == var_86_arg_1; [L360] SORT_1 var_87_arg_0 = var_84; [L361] SORT_1 var_87_arg_1 = var_86; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0, var_87_arg_0=0, var_87_arg_1=0] [L362] EXPR var_87_arg_0 & var_87_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0] [L362] SORT_1 var_87 = var_87_arg_0 & var_87_arg_1; [L363] SORT_1 var_88_arg_0 = var_87; [L364] SORT_1 var_88 = ~var_88_arg_0; [L365] SORT_25 var_89_arg_0 = state_32; [L366] SORT_1 var_89 = var_89_arg_0 >> 0; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0, var_88=-1, var_89=0] [L367] EXPR var_89 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0, var_88=-1] [L367] var_89 = var_89 & mask_SORT_1 [L368] SORT_1 var_90_arg_0 = var_89; [L369] SORT_1 var_90_arg_1 = var_28; [L370] SORT_1 var_90 = var_90_arg_0 == var_90_arg_1; [L371] SORT_1 var_91_arg_0 = var_88; [L372] SORT_1 var_91_arg_1 = var_90; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0, var_89=0, var_91_arg_0=-1, var_91_arg_1=0] [L373] EXPR var_91_arg_0 | var_91_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_73=255, var_85=0, var_89=0] [L373] SORT_1 var_91 = var_91_arg_0 | var_91_arg_1; [L374] SORT_1 var_92_arg_0 = var_73; [L375] SORT_1 var_92_arg_1 = var_91; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92_arg_0=255, var_92_arg_1=255] [L376] EXPR var_92_arg_0 & var_92_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_13=0, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_16=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L376] SORT_1 var_92 = var_92_arg_0 & var_92_arg_1; [L377] SORT_3 var_93_arg_0 = state_13; [L378] SORT_3 var_93_arg_1 = var_14; [L379] SORT_1 var_93 = var_93_arg_0 >= var_93_arg_1; [L380] SORT_3 var_94_arg_0 = state_16; [L381] SORT_3 var_94_arg_1 = var_14; [L382] SORT_1 var_94 = var_94_arg_0 >= var_94_arg_1; [L383] SORT_1 var_95_arg_0 = var_93; [L384] SORT_1 var_95_arg_1 = var_94; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255, var_95_arg_0=0, var_95_arg_1=0] [L385] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_19=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L385] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L386] SORT_3 var_96_arg_0 = state_19; [L387] SORT_3 var_96_arg_1 = var_14; [L388] SORT_1 var_96 = var_96_arg_0 >= var_96_arg_1; [L389] SORT_1 var_97_arg_0 = var_95; [L390] SORT_1 var_97_arg_1 = var_96; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255, var_97_arg_0=0, var_97_arg_1=0] [L391] EXPR var_97_arg_0 | var_97_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_22=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L391] SORT_1 var_97 = var_97_arg_0 | var_97_arg_1; [L392] SORT_3 var_98_arg_0 = state_22; [L393] SORT_3 var_98_arg_1 = var_14; [L394] SORT_1 var_98 = var_98_arg_0 >= var_98_arg_1; [L395] SORT_1 var_99_arg_0 = var_97; [L396] SORT_1 var_99_arg_1 = var_98; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255, var_99_arg_0=0, var_99_arg_1=0] [L397] EXPR var_99_arg_0 | var_99_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_27=0, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L397] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L398] SORT_1 var_100_arg_0 = var_27; [L399] SORT_1 var_100_arg_1 = var_28; [L400] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L401] SORT_1 var_101_arg_0 = var_99; [L402] SORT_1 var_101_arg_1 = var_100; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_101_arg_0=0, var_101_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L403] EXPR var_101_arg_0 | var_101_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L403] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L404] SORT_1 var_102_arg_0 = var_33; [L405] SORT_1 var_102_arg_1 = var_11; [L406] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L407] SORT_1 var_103_arg_0 = var_101; [L408] SORT_1 var_103_arg_1 = var_102; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_103_arg_0=0, var_103_arg_1=1, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L409] EXPR var_103_arg_0 | var_103_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0, var_92=255] [L409] SORT_1 var_103 = var_103_arg_0 | var_103_arg_1; [L410] SORT_1 var_104_arg_0 = var_92; [L411] SORT_1 var_104_arg_1 = var_103; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104_arg_0=255, var_104_arg_1=1, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L412] EXPR var_104_arg_0 & var_104_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_36=0, state_38=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L412] SORT_1 var_104 = var_104_arg_0 & var_104_arg_1; [L413] SORT_3 var_105_arg_0 = state_36; [L414] SORT_3 var_105_arg_1 = var_14; [L415] SORT_1 var_105 = var_105_arg_0 >= var_105_arg_1; [L416] SORT_3 var_106_arg_0 = state_38; [L417] SORT_3 var_106_arg_1 = var_14; [L418] SORT_1 var_106 = var_106_arg_0 >= var_106_arg_1; [L419] SORT_1 var_107_arg_0 = var_105; [L420] SORT_1 var_107_arg_1 = var_106; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_107_arg_0=0, var_107_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L421] EXPR var_107_arg_0 | var_107_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_41=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L421] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L422] SORT_3 var_108_arg_0 = state_41; [L423] SORT_3 var_108_arg_1 = var_14; [L424] SORT_1 var_108 = var_108_arg_0 >= var_108_arg_1; [L425] SORT_1 var_109_arg_0 = var_107; [L426] SORT_1 var_109_arg_1 = var_108; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_109_arg_0=0, var_109_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L427] EXPR var_109_arg_0 | var_109_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_44=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L427] SORT_1 var_109 = var_109_arg_0 | var_109_arg_1; [L428] SORT_3 var_110_arg_0 = state_44; [L429] SORT_3 var_110_arg_1 = var_14; [L430] SORT_1 var_110 = var_110_arg_0 >= var_110_arg_1; [L431] SORT_1 var_111_arg_0 = var_109; [L432] SORT_1 var_111_arg_1 = var_110; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_111_arg_0=0, var_111_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L433] EXPR var_111_arg_0 | var_111_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_47=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L433] SORT_1 var_111 = var_111_arg_0 | var_111_arg_1; [L434] SORT_1 var_112_arg_0 = var_47; [L435] SORT_1 var_112_arg_1 = var_28; [L436] SORT_1 var_112 = var_112_arg_0 == var_112_arg_1; [L437] SORT_1 var_113_arg_0 = var_111; [L438] SORT_1 var_113_arg_1 = var_112; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_113_arg_0=0, var_113_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L439] EXPR var_113_arg_0 | var_113_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L439] SORT_1 var_113 = var_113_arg_0 | var_113_arg_1; [L440] SORT_1 var_114_arg_0 = var_51; [L441] SORT_1 var_114_arg_1 = var_11; [L442] SORT_1 var_114 = var_114_arg_0 == var_114_arg_1; [L443] SORT_1 var_115_arg_0 = var_113; [L444] SORT_1 var_115_arg_1 = var_114; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_115_arg_0=0, var_115_arg_1=1, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L445] EXPR var_115_arg_0 | var_115_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_104=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L445] SORT_1 var_115 = var_115_arg_0 | var_115_arg_1; [L446] SORT_1 var_116_arg_0 = var_104; [L447] SORT_1 var_116_arg_1 = var_115; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116_arg_0=0, var_116_arg_1=1, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L448] EXPR var_116_arg_0 & var_116_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_55=0, state_57=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L448] SORT_1 var_116 = var_116_arg_0 & var_116_arg_1; [L449] SORT_3 var_117_arg_0 = state_55; [L450] SORT_3 var_117_arg_1 = var_14; [L451] SORT_1 var_117 = var_117_arg_0 >= var_117_arg_1; [L452] SORT_3 var_118_arg_0 = state_57; [L453] SORT_3 var_118_arg_1 = var_14; [L454] SORT_1 var_118 = var_118_arg_0 >= var_118_arg_1; [L455] SORT_1 var_119_arg_0 = var_117; [L456] SORT_1 var_119_arg_1 = var_118; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_119_arg_0=0, var_119_arg_1=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L457] EXPR var_119_arg_0 | var_119_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_60=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L457] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L458] SORT_3 var_120_arg_0 = state_60; [L459] SORT_3 var_120_arg_1 = var_14; [L460] SORT_1 var_120 = var_120_arg_0 >= var_120_arg_1; [L461] SORT_1 var_121_arg_0 = var_119; [L462] SORT_1 var_121_arg_1 = var_120; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_121_arg_0=0, var_121_arg_1=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L463] EXPR var_121_arg_0 | var_121_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_63=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L463] SORT_1 var_121 = var_121_arg_0 | var_121_arg_1; [L464] SORT_3 var_122_arg_0 = state_63; [L465] SORT_3 var_122_arg_1 = var_14; [L466] SORT_1 var_122 = var_122_arg_0 >= var_122_arg_1; [L467] SORT_1 var_123_arg_0 = var_121; [L468] SORT_1 var_123_arg_1 = var_122; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_123_arg_0=0, var_123_arg_1=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L469] EXPR var_123_arg_0 | var_123_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_66=0, var_70=0, var_85=0, var_89=0] [L469] SORT_1 var_123 = var_123_arg_0 | var_123_arg_1; [L470] SORT_1 var_124_arg_0 = var_66; [L471] SORT_1 var_124_arg_1 = var_28; [L472] SORT_1 var_124 = var_124_arg_0 == var_124_arg_1; [L473] SORT_1 var_125_arg_0 = var_123; [L474] SORT_1 var_125_arg_1 = var_124; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_125_arg_0=0, var_125_arg_1=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L475] EXPR var_125_arg_0 | var_125_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L475] SORT_1 var_125 = var_125_arg_0 | var_125_arg_1; [L476] SORT_1 var_126_arg_0 = var_70; [L477] SORT_1 var_126_arg_1 = var_11; [L478] SORT_1 var_126 = var_126_arg_0 == var_126_arg_1; [L479] SORT_1 var_127_arg_0 = var_125; [L480] SORT_1 var_127_arg_1 = var_126; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_127_arg_0=0, var_127_arg_1=1, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L481] EXPR var_127_arg_0 | var_127_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_116=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L481] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L482] SORT_1 var_128_arg_0 = var_116; [L483] SORT_1 var_128_arg_1 = var_127; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_128_arg_0=0, var_128_arg_1=1, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L484] EXPR var_128_arg_0 & var_128_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_74=0, state_76=0, state_79=0, state_82=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L484] SORT_1 var_128 = var_128_arg_0 & var_128_arg_1; [L485] SORT_3 var_129_arg_0 = state_74; [L486] SORT_3 var_129_arg_1 = var_14; [L487] SORT_1 var_129 = var_129_arg_0 >= var_129_arg_1; [L488] SORT_3 var_130_arg_0 = state_76; [L489] SORT_3 var_130_arg_1 = var_14; [L490] SORT_1 var_130 = var_130_arg_0 >= var_130_arg_1; [L491] SORT_1 var_131_arg_0 = var_129; [L492] SORT_1 var_131_arg_1 = var_130; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_79=0, state_82=0, var_11=0, var_128=0, var_12=1, var_131_arg_0=0, var_131_arg_1=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L493] EXPR var_131_arg_0 | var_131_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_79=0, state_82=0, var_11=0, var_128=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L493] SORT_1 var_131 = var_131_arg_0 | var_131_arg_1; [L494] SORT_3 var_132_arg_0 = state_79; [L495] SORT_3 var_132_arg_1 = var_14; [L496] SORT_1 var_132 = var_132_arg_0 >= var_132_arg_1; [L497] SORT_1 var_133_arg_0 = var_131; [L498] SORT_1 var_133_arg_1 = var_132; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_82=0, var_11=0, var_128=0, var_12=1, var_133_arg_0=0, var_133_arg_1=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L499] EXPR var_133_arg_0 | var_133_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, state_82=0, var_11=0, var_128=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L499] SORT_1 var_133 = var_133_arg_0 | var_133_arg_1; [L500] SORT_3 var_134_arg_0 = state_82; [L501] SORT_3 var_134_arg_1 = var_14; [L502] SORT_1 var_134 = var_134_arg_0 >= var_134_arg_1; [L503] SORT_1 var_135_arg_0 = var_133; [L504] SORT_1 var_135_arg_1 = var_134; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_135_arg_0=0, var_135_arg_1=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L505] EXPR var_135_arg_0 | var_135_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_85=0, var_89=0] [L505] SORT_1 var_135 = var_135_arg_0 | var_135_arg_1; [L506] SORT_1 var_136_arg_0 = var_85; [L507] SORT_1 var_136_arg_1 = var_28; [L508] SORT_1 var_136 = var_136_arg_0 == var_136_arg_1; [L509] SORT_1 var_137_arg_0 = var_135; [L510] SORT_1 var_137_arg_1 = var_136; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_137_arg_0=0, var_137_arg_1=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L511] EXPR var_137_arg_0 | var_137_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L511] SORT_1 var_137 = var_137_arg_0 | var_137_arg_1; [L512] SORT_1 var_138_arg_0 = var_89; [L513] SORT_1 var_138_arg_1 = var_11; [L514] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L515] SORT_1 var_139_arg_0 = var_137; [L516] SORT_1 var_139_arg_1 = var_138; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_139_arg_0=0, var_139_arg_1=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L517] EXPR var_139_arg_0 | var_139_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_128=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L517] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L518] SORT_1 var_140_arg_0 = var_128; [L519] SORT_1 var_140_arg_1 = var_139; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_12=1, var_140_arg_0=0, var_140_arg_1=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L520] EXPR var_140_arg_0 & var_140_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_12=1, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L520] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L521] SORT_1 var_141_arg_0 = var_12; [L522] SORT_1 var_141_arg_1 = var_140; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_141_arg_0=1, var_141_arg_1=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L523] EXPR var_141_arg_0 | var_141_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L523] SORT_1 var_141 = var_141_arg_0 | var_141_arg_1; [L524] SORT_1 var_144_arg_0 = var_141; [L525] SORT_1 var_144 = ~var_144_arg_0; [L526] SORT_1 var_145_arg_0 = var_28; [L527] SORT_1 var_145_arg_1 = var_144; VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_145_arg_0=1, var_145_arg_1=-2, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L528] EXPR var_145_arg_0 & var_145_arg_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L528] SORT_1 var_145 = var_145_arg_0 & var_145_arg_1; [L529] EXPR var_145 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_195=7, mask_SORT_1=1, mask_SORT_3=3, state_148=0, state_149=0, state_150=0, state_151=0, state_152=0, state_153=0, state_154=0, state_155=0, state_156=0, state_157=0, state_158=0, state_159=0, state_160=0, state_161=0, state_162=0, state_163=0, state_32=0, var_11=0, var_14=2, var_189=1, var_274=0, var_275=3, var_284=0, var_28=1, var_33=0, var_495=2, var_51=0, var_70=0, var_89=0] [L529] var_145 = var_145 & mask_SORT_1 [L530] SORT_1 bad_146_arg_0 = var_145; [L531] CALL __VERIFIER_assert(!(bad_146_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 1152 locations, 1725 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 66.9s, OverallIterations: 54, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 35.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 46327 SdHoareTripleChecker+Valid, 32.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 46327 mSDsluCounter, 375852 SdHoareTripleChecker+Invalid, 26.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 300422 mSDsCounter, 33 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 90990 IncrementalHoareTripleChecker+Invalid, 91023 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 33 mSolverCounterUnsat, 75430 mSDtfsCounter, 90990 mSolverCounterSat, 0.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 401 GetRequests, 118 SyntacticMatches, 1 SemanticMatches, 282 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=30649occurred in iteration=53, InterpolantAutomatonStates: 343, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.4s AutomataMinimizationTime, 53 MinimizatonAttempts, 50262 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 5.5s SatisfiabilityAnalysisTime, 20.6s InterpolantComputationTime, 10952 NumberOfCodeBlocks, 10952 NumberOfCodeBlocksAsserted, 54 NumberOfCheckSat, 10692 ConstructedInterpolants, 0 QuantifiedInterpolants, 27326 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 53 InterpolantComputations, 53 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-03-16 22:49:41,200 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4fbb35f76027517819b7c383b61e34fa76a9ce203f76a516ef6e2a6ae9cf5da8 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 22:49:43,115 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 22:49:43,202 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-03-16 22:49:43,207 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 22:49:43,208 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 22:49:43,230 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 22:49:43,231 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 22:49:43,231 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 22:49:43,232 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 22:49:43,232 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 22:49:43,232 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 22:49:43,232 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 22:49:43,233 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 22:49:43,233 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-03-16 22:49:43,233 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 22:49:43,234 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 22:49:43,234 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 22:49:43,234 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 22:49:43,235 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4fbb35f76027517819b7c383b61e34fa76a9ce203f76a516ef6e2a6ae9cf5da8 [2025-03-16 22:49:43,486 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 22:49:43,491 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 22:49:43,493 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 22:49:43,494 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 22:49:43,495 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 22:49:43,495 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p2.c