./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 19:04:21,946 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 19:04:21,995 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-16 19:04:22,001 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 19:04:22,001 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 19:04:22,022 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 19:04:22,026 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 19:04:22,026 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 19:04:22,027 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 19:04:22,027 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 19:04:22,027 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 19:04:22,027 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-16 19:04:22,027 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 19:04:22,028 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:22,028 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 19:04:22,028 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 19:04:22,029 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 [2025-03-16 19:04:22,283 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 19:04:22,290 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 19:04:22,291 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 19:04:22,293 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 19:04:22,293 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 19:04:22,294 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:23,529 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/77efecf8f/35eaac9d1ef94907a90911fb51d7f3ac/FLAG72c48673d [2025-03-16 19:04:23,791 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 19:04:23,794 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:23,807 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/77efecf8f/35eaac9d1ef94907a90911fb51d7f3ac/FLAG72c48673d [2025-03-16 19:04:23,823 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/77efecf8f/35eaac9d1ef94907a90911fb51d7f3ac [2025-03-16 19:04:23,826 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 19:04:23,828 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 19:04:23,829 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:23,830 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 19:04:23,834 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 19:04:23,836 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:23" (1/1) ... [2025-03-16 19:04:23,837 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f209f2e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:23, skipping insertion in model container [2025-03-16 19:04:23,837 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:23" (1/1) ... [2025-03-16 19:04:23,864 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 19:04:24,037 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2025-03-16 19:04:24,044 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:24,056 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 19:04:24,097 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2025-03-16 19:04:24,097 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:24,113 INFO L204 MainTranslator]: Completed translation [2025-03-16 19:04:24,113 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24 WrapperNode [2025-03-16 19:04:24,113 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:24,114 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:24,114 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 19:04:24,114 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 19:04:24,119 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,129 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,156 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 507 [2025-03-16 19:04:24,160 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:24,160 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 19:04:24,160 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 19:04:24,160 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 19:04:24,166 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,167 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,170 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,182 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 19:04:24,182 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,183 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,193 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,195 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,196 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,197 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,204 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 19:04:24,206 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 19:04:24,206 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 19:04:24,206 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 19:04:24,208 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (1/1) ... [2025-03-16 19:04:24,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:24,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:24,242 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 19:04:24,244 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 19:04:24,263 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-03-16 19:04:24,264 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-03-16 19:04:24,264 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 19:04:24,264 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-03-16 19:04:24,264 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-03-16 19:04:24,264 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-03-16 19:04:24,264 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-03-16 19:04:24,264 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-03-16 19:04:24,265 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-03-16 19:04:24,265 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-03-16 19:04:24,265 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-03-16 19:04:24,265 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-16 19:04:24,265 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-03-16 19:04:24,265 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-03-16 19:04:24,265 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 19:04:24,265 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 19:04:24,265 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-03-16 19:04:24,265 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-03-16 19:04:24,351 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 19:04:24,353 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 19:04:24,832 INFO L? ?]: Removed 102 outVars from TransFormulas that were not future-live. [2025-03-16 19:04:24,832 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 19:04:24,845 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 19:04:24,847 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 19:04:24,848 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:24 BoogieIcfgContainer [2025-03-16 19:04:24,848 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 19:04:24,850 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 19:04:24,851 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 19:04:24,854 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 19:04:24,854 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 07:04:23" (1/3) ... [2025-03-16 19:04:24,855 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fc10cb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:24, skipping insertion in model container [2025-03-16 19:04:24,855 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:24" (2/3) ... [2025-03-16 19:04:24,855 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fc10cb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:24, skipping insertion in model container [2025-03-16 19:04:24,855 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:24" (3/3) ... [2025-03-16 19:04:24,857 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:24,867 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 19:04:24,869 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c that has 8 procedures, 172 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 19:04:24,918 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 19:04:24,929 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3b2f328, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 19:04:24,930 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 19:04:24,934 INFO L276 IsEmpty]: Start isEmpty. Operand has 172 states, 132 states have (on average 1.5833333333333333) internal successors, (209), 133 states have internal predecessors, (209), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:24,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:24,939 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:24,939 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:24,940 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:24,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:24,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1170918584, now seen corresponding path program 1 times [2025-03-16 19:04:24,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:24,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007418536] [2025-03-16 19:04:24,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:24,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:25,017 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:25,059 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:25,060 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:25,060 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:25,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:25,158 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:25,158 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007418536] [2025-03-16 19:04:25,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1007418536] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:25,159 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:25,159 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-16 19:04:25,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824393171] [2025-03-16 19:04:25,161 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:25,163 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-03-16 19:04:25,163 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:25,179 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-16 19:04:25,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:25,181 INFO L87 Difference]: Start difference. First operand has 172 states, 132 states have (on average 1.5833333333333333) internal successors, (209), 133 states have internal predecessors, (209), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:25,208 INFO L93 Difference]: Finished difference Result 329 states and 543 transitions. [2025-03-16 19:04:25,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-16 19:04:25,210 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:25,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:25,218 INFO L225 Difference]: With dead ends: 329 [2025-03-16 19:04:25,218 INFO L226 Difference]: Without dead ends: 170 [2025-03-16 19:04:25,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:25,222 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:25,223 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 269 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:25,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2025-03-16 19:04:25,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2025-03-16 19:04:25,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 131 states have (on average 1.5648854961832062) internal successors, (205), 131 states have internal predecessors, (205), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:25,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 267 transitions. [2025-03-16 19:04:25,260 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 267 transitions. Word has length 23 [2025-03-16 19:04:25,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:25,260 INFO L471 AbstractCegarLoop]: Abstraction has 170 states and 267 transitions. [2025-03-16 19:04:25,261 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,261 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 267 transitions. [2025-03-16 19:04:25,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:25,262 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:25,262 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:25,262 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-16 19:04:25,262 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:25,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:25,262 INFO L85 PathProgramCache]: Analyzing trace with hash 2126976359, now seen corresponding path program 1 times [2025-03-16 19:04:25,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:25,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808668444] [2025-03-16 19:04:25,263 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:25,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:25,277 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:25,305 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:25,305 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:25,305 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:25,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:25,504 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:25,504 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808668444] [2025-03-16 19:04:25,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1808668444] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:25,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:25,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 19:04:25,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280326224] [2025-03-16 19:04:25,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:25,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 19:04:25,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:25,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 19:04:25,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:25,507 INFO L87 Difference]: Start difference. First operand 170 states and 267 transitions. Second operand has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:25,627 INFO L93 Difference]: Finished difference Result 434 states and 690 transitions. [2025-03-16 19:04:25,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 19:04:25,628 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:25,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:25,631 INFO L225 Difference]: With dead ends: 434 [2025-03-16 19:04:25,631 INFO L226 Difference]: Without dead ends: 277 [2025-03-16 19:04:25,633 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:25,635 INFO L435 NwaCegarLoop]: 261 mSDtfsCounter, 128 mSDsluCounter, 1021 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 1282 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:25,635 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 1282 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:25,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2025-03-16 19:04:25,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 170. [2025-03-16 19:04:25,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 131 states have (on average 1.4732824427480915) internal successors, (193), 131 states have internal predecessors, (193), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:25,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 255 transitions. [2025-03-16 19:04:25,661 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 255 transitions. Word has length 23 [2025-03-16 19:04:25,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:25,662 INFO L471 AbstractCegarLoop]: Abstraction has 170 states and 255 transitions. [2025-03-16 19:04:25,662 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,662 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 255 transitions. [2025-03-16 19:04:25,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2025-03-16 19:04:25,663 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:25,663 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:25,663 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-16 19:04:25,663 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:25,664 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:25,664 INFO L85 PathProgramCache]: Analyzing trace with hash -33538668, now seen corresponding path program 1 times [2025-03-16 19:04:25,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:25,664 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649838923] [2025-03-16 19:04:25,664 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:25,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:25,679 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-16 19:04:25,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-16 19:04:25,725 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:25,725 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:25,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:25,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:25,926 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649838923] [2025-03-16 19:04:25,926 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [649838923] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:25,926 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:25,926 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:25,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391600272] [2025-03-16 19:04:25,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:25,928 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:25,928 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:25,928 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:25,928 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:25,929 INFO L87 Difference]: Start difference. First operand 170 states and 255 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:25,973 INFO L93 Difference]: Finished difference Result 328 states and 501 transitions. [2025-03-16 19:04:25,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:25,973 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2025-03-16 19:04:25,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:25,976 INFO L225 Difference]: With dead ends: 328 [2025-03-16 19:04:25,977 INFO L226 Difference]: Without dead ends: 174 [2025-03-16 19:04:25,977 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:25,979 INFO L435 NwaCegarLoop]: 249 mSDtfsCounter, 3 mSDsluCounter, 488 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 737 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:25,979 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 737 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:25,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2025-03-16 19:04:25,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2025-03-16 19:04:25,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 134 states have (on average 1.462686567164179) internal successors, (196), 134 states have internal predecessors, (196), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:25,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 258 transitions. [2025-03-16 19:04:25,996 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 258 transitions. Word has length 34 [2025-03-16 19:04:25,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:25,996 INFO L471 AbstractCegarLoop]: Abstraction has 174 states and 258 transitions. [2025-03-16 19:04:25,996 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:25,996 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 258 transitions. [2025-03-16 19:04:25,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-16 19:04:25,997 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:25,997 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:25,998 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-16 19:04:25,998 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:25,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:25,999 INFO L85 PathProgramCache]: Analyzing trace with hash 260093486, now seen corresponding path program 1 times [2025-03-16 19:04:25,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:25,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834283555] [2025-03-16 19:04:25,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:25,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:26,013 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-16 19:04:26,029 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-16 19:04:26,030 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:26,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:26,082 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:26,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:26,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834283555] [2025-03-16 19:04:26,082 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1834283555] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:26,082 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:26,082 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:26,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955480436] [2025-03-16 19:04:26,082 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:26,082 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:26,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:26,083 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:26,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:26,083 INFO L87 Difference]: Start difference. First operand 174 states and 258 transitions. Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:26,119 INFO L93 Difference]: Finished difference Result 479 states and 720 transitions. [2025-03-16 19:04:26,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:26,120 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 48 [2025-03-16 19:04:26,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:26,123 INFO L225 Difference]: With dead ends: 479 [2025-03-16 19:04:26,123 INFO L226 Difference]: Without dead ends: 321 [2025-03-16 19:04:26,123 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:26,125 INFO L435 NwaCegarLoop]: 263 mSDtfsCounter, 211 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 510 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:26,126 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 510 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:26,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2025-03-16 19:04:26,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 317. [2025-03-16 19:04:26,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 317 states, 240 states have (on average 1.4791666666666667) internal successors, (355), 241 states have internal predecessors, (355), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-03-16 19:04:26,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 475 transitions. [2025-03-16 19:04:26,147 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 475 transitions. Word has length 48 [2025-03-16 19:04:26,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:26,148 INFO L471 AbstractCegarLoop]: Abstraction has 317 states and 475 transitions. [2025-03-16 19:04:26,148 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,148 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 475 transitions. [2025-03-16 19:04:26,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:26,151 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:26,151 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:26,151 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-16 19:04:26,151 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:26,151 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:26,151 INFO L85 PathProgramCache]: Analyzing trace with hash 1198765330, now seen corresponding path program 1 times [2025-03-16 19:04:26,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:26,152 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787021979] [2025-03-16 19:04:26,152 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:26,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:26,167 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:26,179 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:26,180 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:26,180 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:26,227 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:26,227 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:26,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787021979] [2025-03-16 19:04:26,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787021979] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:26,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:26,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:26,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84505019] [2025-03-16 19:04:26,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:26,228 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:26,228 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:26,229 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:26,229 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:26,229 INFO L87 Difference]: Start difference. First operand 317 states and 475 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:26,289 INFO L93 Difference]: Finished difference Result 894 states and 1350 transitions. [2025-03-16 19:04:26,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:26,290 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:26,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:26,295 INFO L225 Difference]: With dead ends: 894 [2025-03-16 19:04:26,295 INFO L226 Difference]: Without dead ends: 593 [2025-03-16 19:04:26,296 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:26,297 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 212 mSDsluCounter, 249 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 531 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:26,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 531 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:26,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 593 states. [2025-03-16 19:04:26,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 593 to 587. [2025-03-16 19:04:26,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 587 states, 438 states have (on average 1.4885844748858448) internal successors, (652), 441 states have internal predecessors, (652), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-03-16 19:04:26,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 587 states to 587 states and 886 transitions. [2025-03-16 19:04:26,344 INFO L78 Accepts]: Start accepts. Automaton has 587 states and 886 transitions. Word has length 49 [2025-03-16 19:04:26,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:26,345 INFO L471 AbstractCegarLoop]: Abstraction has 587 states and 886 transitions. [2025-03-16 19:04:26,346 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,346 INFO L276 IsEmpty]: Start isEmpty. Operand 587 states and 886 transitions. [2025-03-16 19:04:26,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:26,351 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:26,351 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:26,351 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-16 19:04:26,352 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:26,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:26,352 INFO L85 PathProgramCache]: Analyzing trace with hash -1588650157, now seen corresponding path program 1 times [2025-03-16 19:04:26,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:26,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770592335] [2025-03-16 19:04:26,352 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:26,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:26,365 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:26,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:26,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:26,388 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:26,459 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:26,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:26,459 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770592335] [2025-03-16 19:04:26,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1770592335] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:26,459 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:26,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:26,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376676701] [2025-03-16 19:04:26,459 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:26,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:26,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:26,460 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:26,460 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:26,460 INFO L87 Difference]: Start difference. First operand 587 states and 886 transitions. Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:26,614 INFO L93 Difference]: Finished difference Result 1249 states and 1886 transitions. [2025-03-16 19:04:26,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:26,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:26,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:26,621 INFO L225 Difference]: With dead ends: 1249 [2025-03-16 19:04:26,622 INFO L226 Difference]: Without dead ends: 678 [2025-03-16 19:04:26,625 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:26,626 INFO L435 NwaCegarLoop]: 222 mSDtfsCounter, 351 mSDsluCounter, 434 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 656 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:26,626 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 656 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:26,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2025-03-16 19:04:26,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 670. [2025-03-16 19:04:26,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 670 states, 508 states have (on average 1.4744094488188977) internal successors, (749), 511 states have internal predecessors, (749), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:26,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 670 states to 670 states and 997 transitions. [2025-03-16 19:04:26,677 INFO L78 Accepts]: Start accepts. Automaton has 670 states and 997 transitions. Word has length 49 [2025-03-16 19:04:26,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:26,677 INFO L471 AbstractCegarLoop]: Abstraction has 670 states and 997 transitions. [2025-03-16 19:04:26,678 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,678 INFO L276 IsEmpty]: Start isEmpty. Operand 670 states and 997 transitions. [2025-03-16 19:04:26,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2025-03-16 19:04:26,680 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:26,680 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:26,680 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-16 19:04:26,680 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:26,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:26,681 INFO L85 PathProgramCache]: Analyzing trace with hash 66344539, now seen corresponding path program 1 times [2025-03-16 19:04:26,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:26,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531068615] [2025-03-16 19:04:26,681 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:26,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:26,704 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-16 19:04:26,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-16 19:04:26,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:26,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:26,821 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:26,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:26,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531068615] [2025-03-16 19:04:26,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1531068615] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:26,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:26,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:26,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [690682123] [2025-03-16 19:04:26,823 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:26,823 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:26,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:26,823 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:26,823 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:26,824 INFO L87 Difference]: Start difference. First operand 670 states and 997 transitions. Second operand has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:26,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:26,969 INFO L93 Difference]: Finished difference Result 1253 states and 1886 transitions. [2025-03-16 19:04:26,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:26,969 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 50 [2025-03-16 19:04:26,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:26,973 INFO L225 Difference]: With dead ends: 1253 [2025-03-16 19:04:26,973 INFO L226 Difference]: Without dead ends: 682 [2025-03-16 19:04:26,975 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:26,976 INFO L435 NwaCegarLoop]: 222 mSDtfsCounter, 351 mSDsluCounter, 434 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 656 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:26,976 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 656 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:26,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2025-03-16 19:04:27,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 678. [2025-03-16 19:04:27,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 678 states, 516 states have (on average 1.4670542635658914) internal successors, (757), 519 states have internal predecessors, (757), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:27,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 678 states and 1005 transitions. [2025-03-16 19:04:27,018 INFO L78 Accepts]: Start accepts. Automaton has 678 states and 1005 transitions. Word has length 50 [2025-03-16 19:04:27,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:27,019 INFO L471 AbstractCegarLoop]: Abstraction has 678 states and 1005 transitions. [2025-03-16 19:04:27,019 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:27,019 INFO L276 IsEmpty]: Start isEmpty. Operand 678 states and 1005 transitions. [2025-03-16 19:04:27,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2025-03-16 19:04:27,020 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:27,020 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:27,021 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-16 19:04:27,021 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:27,021 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:27,021 INFO L85 PathProgramCache]: Analyzing trace with hash -1487794156, now seen corresponding path program 1 times [2025-03-16 19:04:27,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:27,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500682953] [2025-03-16 19:04:27,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:27,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:27,031 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 52 statements into 1 equivalence classes. [2025-03-16 19:04:27,042 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 52 of 52 statements. [2025-03-16 19:04:27,043 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:27,043 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:27,126 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:27,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:27,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500682953] [2025-03-16 19:04:27,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500682953] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:27,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:27,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:27,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1671366298] [2025-03-16 19:04:27,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:27,127 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:27,127 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:27,128 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:27,128 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:27,128 INFO L87 Difference]: Start difference. First operand 678 states and 1005 transitions. Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:27,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:27,269 INFO L93 Difference]: Finished difference Result 1249 states and 1874 transitions. [2025-03-16 19:04:27,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:27,270 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 52 [2025-03-16 19:04:27,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:27,274 INFO L225 Difference]: With dead ends: 1249 [2025-03-16 19:04:27,274 INFO L226 Difference]: Without dead ends: 678 [2025-03-16 19:04:27,277 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:27,278 INFO L435 NwaCegarLoop]: 223 mSDtfsCounter, 59 mSDsluCounter, 427 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 650 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:27,278 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 650 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:27,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2025-03-16 19:04:27,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 678. [2025-03-16 19:04:27,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 678 states, 516 states have (on average 1.4593023255813953) internal successors, (753), 519 states have internal predecessors, (753), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:27,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 678 states and 1001 transitions. [2025-03-16 19:04:27,328 INFO L78 Accepts]: Start accepts. Automaton has 678 states and 1001 transitions. Word has length 52 [2025-03-16 19:04:27,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:27,330 INFO L471 AbstractCegarLoop]: Abstraction has 678 states and 1001 transitions. [2025-03-16 19:04:27,330 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:27,330 INFO L276 IsEmpty]: Start isEmpty. Operand 678 states and 1001 transitions. [2025-03-16 19:04:27,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2025-03-16 19:04:27,331 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:27,331 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:27,331 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-16 19:04:27,331 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:27,331 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:27,332 INFO L85 PathProgramCache]: Analyzing trace with hash -1093225206, now seen corresponding path program 1 times [2025-03-16 19:04:27,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:27,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317747409] [2025-03-16 19:04:27,332 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:27,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:27,343 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 53 statements into 1 equivalence classes. [2025-03-16 19:04:27,359 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 53 of 53 statements. [2025-03-16 19:04:27,360 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:27,360 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:27,513 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:27,513 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:27,513 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317747409] [2025-03-16 19:04:27,513 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [317747409] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:27,513 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:27,513 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:27,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138739301] [2025-03-16 19:04:27,513 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:27,515 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:27,515 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:27,515 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:27,515 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:27,515 INFO L87 Difference]: Start difference. First operand 678 states and 1001 transitions. Second operand has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:27,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:27,587 INFO L93 Difference]: Finished difference Result 1269 states and 1898 transitions. [2025-03-16 19:04:27,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:27,587 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 53 [2025-03-16 19:04:27,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:27,593 INFO L225 Difference]: With dead ends: 1269 [2025-03-16 19:04:27,594 INFO L226 Difference]: Without dead ends: 698 [2025-03-16 19:04:27,596 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:27,597 INFO L435 NwaCegarLoop]: 251 mSDtfsCounter, 4 mSDsluCounter, 498 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 749 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:27,597 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 749 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:27,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states. [2025-03-16 19:04:27,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 698. [2025-03-16 19:04:27,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 532 states have (on average 1.4454887218045114) internal successors, (769), 535 states have internal predecessors, (769), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:27,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1017 transitions. [2025-03-16 19:04:27,650 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1017 transitions. Word has length 53 [2025-03-16 19:04:27,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:27,650 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1017 transitions. [2025-03-16 19:04:27,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:27,651 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1017 transitions. [2025-03-16 19:04:27,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2025-03-16 19:04:27,651 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:27,651 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:27,652 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-16 19:04:27,652 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:27,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:27,652 INFO L85 PathProgramCache]: Analyzing trace with hash -1384605492, now seen corresponding path program 1 times [2025-03-16 19:04:27,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:27,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959018549] [2025-03-16 19:04:27,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:27,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:27,665 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 61 statements into 1 equivalence classes. [2025-03-16 19:04:27,678 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 61 of 61 statements. [2025-03-16 19:04:27,678 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:27,678 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:27,830 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:27,831 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:27,831 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959018549] [2025-03-16 19:04:27,831 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959018549] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:27,831 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:27,831 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:27,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720626562] [2025-03-16 19:04:27,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:27,831 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:27,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:27,831 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:27,831 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:27,832 INFO L87 Difference]: Start difference. First operand 698 states and 1017 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:27,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:27,899 INFO L93 Difference]: Finished difference Result 1309 states and 1942 transitions. [2025-03-16 19:04:27,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:27,900 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 61 [2025-03-16 19:04:27,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:27,904 INFO L225 Difference]: With dead ends: 1309 [2025-03-16 19:04:27,904 INFO L226 Difference]: Without dead ends: 718 [2025-03-16 19:04:27,906 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:27,906 INFO L435 NwaCegarLoop]: 248 mSDtfsCounter, 4 mSDsluCounter, 487 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 735 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:27,907 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 735 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:27,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2025-03-16 19:04:27,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 718. [2025-03-16 19:04:27,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 548 states have (on average 1.4324817518248176) internal successors, (785), 551 states have internal predecessors, (785), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:27,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1033 transitions. [2025-03-16 19:04:27,949 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1033 transitions. Word has length 61 [2025-03-16 19:04:27,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:27,950 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1033 transitions. [2025-03-16 19:04:27,950 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:27,950 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1033 transitions. [2025-03-16 19:04:27,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-03-16 19:04:27,952 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:27,952 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:27,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-16 19:04:27,952 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:27,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:27,953 INFO L85 PathProgramCache]: Analyzing trace with hash -101167918, now seen corresponding path program 1 times [2025-03-16 19:04:27,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:27,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671135398] [2025-03-16 19:04:27,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:27,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:27,963 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-03-16 19:04:27,978 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-03-16 19:04:27,978 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:27,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:28,077 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:28,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:28,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671135398] [2025-03-16 19:04:28,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [671135398] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:28,077 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:28,077 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:28,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464830239] [2025-03-16 19:04:28,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:28,078 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:28,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:28,078 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:28,078 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:28,078 INFO L87 Difference]: Start difference. First operand 718 states and 1033 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:28,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:28,127 INFO L93 Difference]: Finished difference Result 1345 states and 1958 transitions. [2025-03-16 19:04:28,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:28,128 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 69 [2025-03-16 19:04:28,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:28,133 INFO L225 Difference]: With dead ends: 1345 [2025-03-16 19:04:28,133 INFO L226 Difference]: Without dead ends: 734 [2025-03-16 19:04:28,134 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:28,135 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 3 mSDsluCounter, 492 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 745 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:28,135 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 745 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:28,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 734 states. [2025-03-16 19:04:28,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 734 to 734. [2025-03-16 19:04:28,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 734 states, 560 states have (on average 1.4232142857142858) internal successors, (797), 563 states have internal predecessors, (797), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:28,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1045 transitions. [2025-03-16 19:04:28,167 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1045 transitions. Word has length 69 [2025-03-16 19:04:28,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:28,168 INFO L471 AbstractCegarLoop]: Abstraction has 734 states and 1045 transitions. [2025-03-16 19:04:28,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:28,168 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1045 transitions. [2025-03-16 19:04:28,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-03-16 19:04:28,169 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:28,169 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:28,169 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-16 19:04:28,169 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:28,169 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:28,169 INFO L85 PathProgramCache]: Analyzing trace with hash -733096181, now seen corresponding path program 1 times [2025-03-16 19:04:28,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:28,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80032426] [2025-03-16 19:04:28,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:28,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:28,179 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-03-16 19:04:28,190 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-03-16 19:04:28,190 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:28,190 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:28,294 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:28,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:28,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80032426] [2025-03-16 19:04:28,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80032426] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:28,294 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:28,294 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:28,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [719635370] [2025-03-16 19:04:28,294 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:28,295 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:28,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:28,295 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:28,295 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:28,295 INFO L87 Difference]: Start difference. First operand 734 states and 1045 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:28,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:28,360 INFO L93 Difference]: Finished difference Result 1381 states and 1998 transitions. [2025-03-16 19:04:28,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:28,362 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 69 [2025-03-16 19:04:28,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:28,366 INFO L225 Difference]: With dead ends: 1381 [2025-03-16 19:04:28,366 INFO L226 Difference]: Without dead ends: 754 [2025-03-16 19:04:28,367 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:28,368 INFO L435 NwaCegarLoop]: 248 mSDtfsCounter, 4 mSDsluCounter, 487 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 735 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:28,368 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 735 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:28,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2025-03-16 19:04:28,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 754. [2025-03-16 19:04:28,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 754 states, 576 states have (on average 1.4114583333333333) internal successors, (813), 579 states have internal predecessors, (813), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:28,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 754 states to 754 states and 1061 transitions. [2025-03-16 19:04:28,400 INFO L78 Accepts]: Start accepts. Automaton has 754 states and 1061 transitions. Word has length 69 [2025-03-16 19:04:28,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:28,401 INFO L471 AbstractCegarLoop]: Abstraction has 754 states and 1061 transitions. [2025-03-16 19:04:28,401 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:28,401 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 1061 transitions. [2025-03-16 19:04:28,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2025-03-16 19:04:28,402 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:28,402 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:28,402 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-16 19:04:28,402 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:28,403 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:28,403 INFO L85 PathProgramCache]: Analyzing trace with hash -954100695, now seen corresponding path program 1 times [2025-03-16 19:04:28,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:28,403 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797198411] [2025-03-16 19:04:28,403 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:28,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:28,415 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-03-16 19:04:28,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-03-16 19:04:28,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:28,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:28,542 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:04:28,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:28,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1797198411] [2025-03-16 19:04:28,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1797198411] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:28,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:28,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:28,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774199837] [2025-03-16 19:04:28,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:28,542 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:28,542 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:28,543 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:28,543 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:28,543 INFO L87 Difference]: Start difference. First operand 754 states and 1061 transitions. Second operand has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:28,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:28,605 INFO L93 Difference]: Finished difference Result 1425 states and 2026 transitions. [2025-03-16 19:04:28,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:28,605 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 77 [2025-03-16 19:04:28,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:28,610 INFO L225 Difference]: With dead ends: 1425 [2025-03-16 19:04:28,610 INFO L226 Difference]: Without dead ends: 778 [2025-03-16 19:04:28,611 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:28,612 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 5 mSDsluCounter, 495 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 747 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:28,612 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 747 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:28,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 778 states. [2025-03-16 19:04:28,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 778 to 778. [2025-03-16 19:04:28,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 778 states, 596 states have (on average 1.3976510067114094) internal successors, (833), 599 states have internal predecessors, (833), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:28,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 778 states to 778 states and 1081 transitions. [2025-03-16 19:04:28,644 INFO L78 Accepts]: Start accepts. Automaton has 778 states and 1081 transitions. Word has length 77 [2025-03-16 19:04:28,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:28,644 INFO L471 AbstractCegarLoop]: Abstraction has 778 states and 1081 transitions. [2025-03-16 19:04:28,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:28,644 INFO L276 IsEmpty]: Start isEmpty. Operand 778 states and 1081 transitions. [2025-03-16 19:04:28,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2025-03-16 19:04:28,645 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:28,646 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:28,646 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-16 19:04:28,646 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:28,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:28,646 INFO L85 PathProgramCache]: Analyzing trace with hash 1739702213, now seen corresponding path program 1 times [2025-03-16 19:04:28,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:28,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243255349] [2025-03-16 19:04:28,646 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:28,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:28,654 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-16 19:04:28,707 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-16 19:04:28,708 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:28,708 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:29,050 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:29,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:29,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243255349] [2025-03-16 19:04:29,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243255349] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:29,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:29,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:29,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216369045] [2025-03-16 19:04:29,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:29,050 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:29,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:29,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:29,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:29,051 INFO L87 Difference]: Start difference. First operand 778 states and 1081 transitions. Second operand has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:29,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:29,279 INFO L93 Difference]: Finished difference Result 2009 states and 2779 transitions. [2025-03-16 19:04:29,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:29,280 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 80 [2025-03-16 19:04:29,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:29,286 INFO L225 Difference]: With dead ends: 2009 [2025-03-16 19:04:29,286 INFO L226 Difference]: Without dead ends: 1338 [2025-03-16 19:04:29,288 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:29,288 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 195 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1435 SdHoareTripleChecker+Invalid, 102 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:29,289 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1435 Invalid, 102 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:29,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1338 states. [2025-03-16 19:04:29,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1338 to 1054. [2025-03-16 19:04:29,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1054 states, 799 states have (on average 1.3854818523153942) internal successors, (1107), 804 states have internal predecessors, (1107), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:29,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1451 transitions. [2025-03-16 19:04:29,347 INFO L78 Accepts]: Start accepts. Automaton has 1054 states and 1451 transitions. Word has length 80 [2025-03-16 19:04:29,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:29,347 INFO L471 AbstractCegarLoop]: Abstraction has 1054 states and 1451 transitions. [2025-03-16 19:04:29,347 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:29,347 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 1451 transitions. [2025-03-16 19:04:29,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-16 19:04:29,349 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:29,349 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:29,350 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-16 19:04:29,350 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:29,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:29,350 INFO L85 PathProgramCache]: Analyzing trace with hash -2104176953, now seen corresponding path program 1 times [2025-03-16 19:04:29,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:29,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550016374] [2025-03-16 19:04:29,351 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:29,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:29,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-16 19:04:29,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-16 19:04:29,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:29,388 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:29,500 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:29,500 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:29,500 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550016374] [2025-03-16 19:04:29,500 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [550016374] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:29,500 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:29,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:29,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546700520] [2025-03-16 19:04:29,501 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:29,501 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:29,501 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:29,501 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:29,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:29,502 INFO L87 Difference]: Start difference. First operand 1054 states and 1451 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:29,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:29,590 INFO L93 Difference]: Finished difference Result 1965 states and 2726 transitions. [2025-03-16 19:04:29,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:29,590 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 84 [2025-03-16 19:04:29,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:29,596 INFO L225 Difference]: With dead ends: 1965 [2025-03-16 19:04:29,597 INFO L226 Difference]: Without dead ends: 1078 [2025-03-16 19:04:29,599 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:29,599 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 3 mSDsluCounter, 492 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 745 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:29,600 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 745 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:29,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1078 states. [2025-03-16 19:04:29,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1078 to 1078. [2025-03-16 19:04:29,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1078 states, 817 states have (on average 1.3769889840881273) internal successors, (1125), 822 states have internal predecessors, (1125), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:29,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1078 states to 1078 states and 1469 transitions. [2025-03-16 19:04:29,659 INFO L78 Accepts]: Start accepts. Automaton has 1078 states and 1469 transitions. Word has length 84 [2025-03-16 19:04:29,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:29,660 INFO L471 AbstractCegarLoop]: Abstraction has 1078 states and 1469 transitions. [2025-03-16 19:04:29,660 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:29,660 INFO L276 IsEmpty]: Start isEmpty. Operand 1078 states and 1469 transitions. [2025-03-16 19:04:29,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2025-03-16 19:04:29,661 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:29,661 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:29,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-16 19:04:29,662 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:29,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:29,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1640046479, now seen corresponding path program 1 times [2025-03-16 19:04:29,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:29,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518026641] [2025-03-16 19:04:29,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:29,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:29,671 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-03-16 19:04:29,683 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-03-16 19:04:29,683 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:29,683 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:29,909 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:29,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:29,910 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518026641] [2025-03-16 19:04:29,910 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1518026641] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:29,910 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [927465091] [2025-03-16 19:04:29,910 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:29,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:29,912 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:29,914 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:29,915 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-16 19:04:29,991 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-03-16 19:04:30,044 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-03-16 19:04:30,045 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:30,045 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:30,048 INFO L256 TraceCheckSpWp]: Trace formula consists of 421 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-03-16 19:04:30,053 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:30,177 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:30,177 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-16 19:04:30,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [927465091] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:30,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-16 19:04:30,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-03-16 19:04:30,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802572483] [2025-03-16 19:04:30,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:30,178 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:30,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:30,179 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:30,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-03-16 19:04:30,179 INFO L87 Difference]: Start difference. First operand 1078 states and 1469 transitions. Second operand has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:30,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:30,357 INFO L93 Difference]: Finished difference Result 2315 states and 3279 transitions. [2025-03-16 19:04:30,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 19:04:30,358 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 83 [2025-03-16 19:04:30,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:30,368 INFO L225 Difference]: With dead ends: 2315 [2025-03-16 19:04:30,368 INFO L226 Difference]: Without dead ends: 1492 [2025-03-16 19:04:30,371 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-03-16 19:04:30,373 INFO L435 NwaCegarLoop]: 427 mSDtfsCounter, 134 mSDsluCounter, 2367 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 2794 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:30,373 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 2794 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:30,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1492 states. [2025-03-16 19:04:30,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1492 to 1086. [2025-03-16 19:04:30,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1086 states, 821 states have (on average 1.3678440925700366) internal successors, (1123), 828 states have internal predecessors, (1123), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-03-16 19:04:30,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1471 transitions. [2025-03-16 19:04:30,458 INFO L78 Accepts]: Start accepts. Automaton has 1086 states and 1471 transitions. Word has length 83 [2025-03-16 19:04:30,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:30,458 INFO L471 AbstractCegarLoop]: Abstraction has 1086 states and 1471 transitions. [2025-03-16 19:04:30,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:30,459 INFO L276 IsEmpty]: Start isEmpty. Operand 1086 states and 1471 transitions. [2025-03-16 19:04:30,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2025-03-16 19:04:30,461 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:30,461 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:30,470 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-03-16 19:04:30,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-03-16 19:04:30,662 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:30,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:30,662 INFO L85 PathProgramCache]: Analyzing trace with hash -705511587, now seen corresponding path program 1 times [2025-03-16 19:04:30,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:30,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255564409] [2025-03-16 19:04:30,663 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:30,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:30,675 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 86 statements into 1 equivalence classes. [2025-03-16 19:04:30,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 86 of 86 statements. [2025-03-16 19:04:30,686 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:30,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:30,768 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-16 19:04:30,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:30,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255564409] [2025-03-16 19:04:30,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255564409] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:30,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:30,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:30,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126821405] [2025-03-16 19:04:30,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:30,769 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:30,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:30,770 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:30,770 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:30,770 INFO L87 Difference]: Start difference. First operand 1086 states and 1471 transitions. Second operand has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:30,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:30,921 INFO L93 Difference]: Finished difference Result 1962 states and 2668 transitions. [2025-03-16 19:04:30,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-16 19:04:30,922 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 86 [2025-03-16 19:04:30,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:30,927 INFO L225 Difference]: With dead ends: 1962 [2025-03-16 19:04:30,928 INFO L226 Difference]: Without dead ends: 1125 [2025-03-16 19:04:30,930 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-16 19:04:30,930 INFO L435 NwaCegarLoop]: 253 mSDtfsCounter, 248 mSDsluCounter, 1201 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 249 SdHoareTripleChecker+Valid, 1454 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:30,930 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [249 Valid, 1454 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:30,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1125 states. [2025-03-16 19:04:30,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1125 to 1083. [2025-03-16 19:04:30,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1083 states, 829 states have (on average 1.3630880579010856) internal successors, (1130), 841 states have internal predecessors, (1130), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-03-16 19:04:30,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1083 states to 1083 states and 1454 transitions. [2025-03-16 19:04:30,987 INFO L78 Accepts]: Start accepts. Automaton has 1083 states and 1454 transitions. Word has length 86 [2025-03-16 19:04:30,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:30,987 INFO L471 AbstractCegarLoop]: Abstraction has 1083 states and 1454 transitions. [2025-03-16 19:04:30,987 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:30,987 INFO L276 IsEmpty]: Start isEmpty. Operand 1083 states and 1454 transitions. [2025-03-16 19:04:30,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2025-03-16 19:04:30,988 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:30,988 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:30,988 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-16 19:04:30,988 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:30,989 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:30,989 INFO L85 PathProgramCache]: Analyzing trace with hash 1495518446, now seen corresponding path program 1 times [2025-03-16 19:04:30,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:30,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277141550] [2025-03-16 19:04:30,989 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:30,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:30,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 88 statements into 1 equivalence classes. [2025-03-16 19:04:31,025 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 88 of 88 statements. [2025-03-16 19:04:31,025 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:31,025 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:31,320 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:31,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:31,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277141550] [2025-03-16 19:04:31,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1277141550] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:31,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:31,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:31,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [530859871] [2025-03-16 19:04:31,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:31,322 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:31,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:31,322 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:31,322 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:31,322 INFO L87 Difference]: Start difference. First operand 1083 states and 1454 transitions. Second operand has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:31,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:31,514 INFO L93 Difference]: Finished difference Result 1935 states and 2607 transitions. [2025-03-16 19:04:31,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:31,515 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 88 [2025-03-16 19:04:31,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:31,521 INFO L225 Difference]: With dead ends: 1935 [2025-03-16 19:04:31,521 INFO L226 Difference]: Without dead ends: 1081 [2025-03-16 19:04:31,523 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:31,523 INFO L435 NwaCegarLoop]: 279 mSDtfsCounter, 148 mSDsluCounter, 1277 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 1556 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:31,524 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 1556 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:31,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1081 states. [2025-03-16 19:04:31,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1081 to 976. [2025-03-16 19:04:31,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 976 states, 749 states have (on average 1.3658210947930574) internal successors, (1023), 759 states have internal predecessors, (1023), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-03-16 19:04:31,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 976 states to 976 states and 1313 transitions. [2025-03-16 19:04:31,579 INFO L78 Accepts]: Start accepts. Automaton has 976 states and 1313 transitions. Word has length 88 [2025-03-16 19:04:31,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:31,579 INFO L471 AbstractCegarLoop]: Abstraction has 976 states and 1313 transitions. [2025-03-16 19:04:31,579 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:31,579 INFO L276 IsEmpty]: Start isEmpty. Operand 976 states and 1313 transitions. [2025-03-16 19:04:31,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2025-03-16 19:04:31,580 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:31,580 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:31,580 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-16 19:04:31,580 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:31,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:31,581 INFO L85 PathProgramCache]: Analyzing trace with hash -330171601, now seen corresponding path program 1 times [2025-03-16 19:04:31,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:31,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669610831] [2025-03-16 19:04:31,581 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:31,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:31,609 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-16 19:04:31,627 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-16 19:04:31,630 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:31,630 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:31,934 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:31,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:31,935 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669610831] [2025-03-16 19:04:31,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669610831] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:31,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:31,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 19:04:31,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [127027414] [2025-03-16 19:04:31,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:31,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:31,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:31,937 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:31,937 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 19:04:31,937 INFO L87 Difference]: Start difference. First operand 976 states and 1313 transitions. Second operand has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:32,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,318 INFO L93 Difference]: Finished difference Result 1867 states and 2495 transitions. [2025-03-16 19:04:32,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:32,319 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) Word has length 89 [2025-03-16 19:04:32,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,324 INFO L225 Difference]: With dead ends: 1867 [2025-03-16 19:04:32,324 INFO L226 Difference]: Without dead ends: 1040 [2025-03-16 19:04:32,325 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:32,326 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 653 mSDsluCounter, 943 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 659 SdHoareTripleChecker+Valid, 1214 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,326 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [659 Valid, 1214 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 19:04:32,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2025-03-16 19:04:32,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 992. [2025-03-16 19:04:32,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 992 states, 757 states have (on average 1.3421400264200793) internal successors, (1016), 768 states have internal predecessors, (1016), 148 states have call successors, (148), 86 states have call predecessors, (148), 86 states have return successors, (148), 137 states have call predecessors, (148), 148 states have call successors, (148) [2025-03-16 19:04:32,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 992 states to 992 states and 1312 transitions. [2025-03-16 19:04:32,394 INFO L78 Accepts]: Start accepts. Automaton has 992 states and 1312 transitions. Word has length 89 [2025-03-16 19:04:32,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,394 INFO L471 AbstractCegarLoop]: Abstraction has 992 states and 1312 transitions. [2025-03-16 19:04:32,394 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:32,394 INFO L276 IsEmpty]: Start isEmpty. Operand 992 states and 1312 transitions. [2025-03-16 19:04:32,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2025-03-16 19:04:32,395 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,395 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,395 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-16 19:04:32,395 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,395 INFO L85 PathProgramCache]: Analyzing trace with hash -263125667, now seen corresponding path program 1 times [2025-03-16 19:04:32,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319805524] [2025-03-16 19:04:32,396 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,404 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-03-16 19:04:32,414 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-03-16 19:04:32,414 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,469 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:32,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319805524] [2025-03-16 19:04:32,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319805524] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,470 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:32,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118911953] [2025-03-16 19:04:32,470 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,470 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:32,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,471 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:32,471 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:32,471 INFO L87 Difference]: Start difference. First operand 992 states and 1312 transitions. Second operand has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:32,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,612 INFO L93 Difference]: Finished difference Result 2626 states and 3491 transitions. [2025-03-16 19:04:32,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:32,613 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 90 [2025-03-16 19:04:32,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,623 INFO L225 Difference]: With dead ends: 2626 [2025-03-16 19:04:32,623 INFO L226 Difference]: Without dead ends: 1834 [2025-03-16 19:04:32,625 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:32,627 INFO L435 NwaCegarLoop]: 457 mSDtfsCounter, 199 mSDsluCounter, 683 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1140 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,627 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1140 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:32,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1834 states. [2025-03-16 19:04:32,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1834 to 1723. [2025-03-16 19:04:32,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1723 states, 1298 states have (on average 1.3320493066255779) internal successors, (1729), 1317 states have internal predecessors, (1729), 272 states have call successors, (272), 152 states have call predecessors, (272), 152 states have return successors, (272), 253 states have call predecessors, (272), 272 states have call successors, (272) [2025-03-16 19:04:32,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1723 states to 1723 states and 2273 transitions. [2025-03-16 19:04:32,742 INFO L78 Accepts]: Start accepts. Automaton has 1723 states and 2273 transitions. Word has length 90 [2025-03-16 19:04:32,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,742 INFO L471 AbstractCegarLoop]: Abstraction has 1723 states and 2273 transitions. [2025-03-16 19:04:32,743 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:32,743 INFO L276 IsEmpty]: Start isEmpty. Operand 1723 states and 2273 transitions. [2025-03-16 19:04:32,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-16 19:04:32,744 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,744 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,744 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-16 19:04:32,745 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,745 INFO L85 PathProgramCache]: Analyzing trace with hash 701043962, now seen corresponding path program 1 times [2025-03-16 19:04:32,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880294255] [2025-03-16 19:04:32,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-16 19:04:32,766 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-16 19:04:32,766 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,766 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,824 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:32,825 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880294255] [2025-03-16 19:04:32,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1880294255] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,825 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,825 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:32,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1344085952] [2025-03-16 19:04:32,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,826 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:32,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,826 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:32,826 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:32,826 INFO L87 Difference]: Start difference. First operand 1723 states and 2273 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:33,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:33,011 INFO L93 Difference]: Finished difference Result 4005 states and 5307 transitions. [2025-03-16 19:04:33,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:33,012 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 92 [2025-03-16 19:04:33,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:33,024 INFO L225 Difference]: With dead ends: 4005 [2025-03-16 19:04:33,024 INFO L226 Difference]: Without dead ends: 2564 [2025-03-16 19:04:33,028 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:33,029 INFO L435 NwaCegarLoop]: 475 mSDtfsCounter, 200 mSDsluCounter, 699 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1174 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:33,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1174 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:33,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2564 states. [2025-03-16 19:04:33,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2564 to 2451. [2025-03-16 19:04:33,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2451 states, 1836 states have (on average 1.3251633986928104) internal successors, (2433), 1863 states have internal predecessors, (2433), 396 states have call successors, (396), 218 states have call predecessors, (396), 218 states have return successors, (396), 369 states have call predecessors, (396), 396 states have call successors, (396) [2025-03-16 19:04:33,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2451 states to 2451 states and 3225 transitions. [2025-03-16 19:04:33,179 INFO L78 Accepts]: Start accepts. Automaton has 2451 states and 3225 transitions. Word has length 92 [2025-03-16 19:04:33,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:33,179 INFO L471 AbstractCegarLoop]: Abstraction has 2451 states and 3225 transitions. [2025-03-16 19:04:33,179 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:33,179 INFO L276 IsEmpty]: Start isEmpty. Operand 2451 states and 3225 transitions. [2025-03-16 19:04:33,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-16 19:04:33,181 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:33,181 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:33,181 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-16 19:04:33,181 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:33,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:33,181 INFO L85 PathProgramCache]: Analyzing trace with hash -588791102, now seen corresponding path program 1 times [2025-03-16 19:04:33,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:33,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1928191448] [2025-03-16 19:04:33,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:33,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:33,191 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-16 19:04:33,206 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-16 19:04:33,206 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:33,206 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:33,494 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:33,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:33,494 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1928191448] [2025-03-16 19:04:33,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1928191448] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:33,494 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:33,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:33,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809252339] [2025-03-16 19:04:33,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:33,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:33,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:33,495 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:33,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:33,495 INFO L87 Difference]: Start difference. First operand 2451 states and 3225 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:34,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,007 INFO L93 Difference]: Finished difference Result 4784 states and 6292 transitions. [2025-03-16 19:04:34,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:34,008 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 92 [2025-03-16 19:04:34,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,021 INFO L225 Difference]: With dead ends: 4784 [2025-03-16 19:04:34,021 INFO L226 Difference]: Without dead ends: 2705 [2025-03-16 19:04:34,026 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:34,027 INFO L435 NwaCegarLoop]: 309 mSDtfsCounter, 483 mSDsluCounter, 1105 mSDsCounter, 0 mSdLazyCounter, 183 mSolverCounterSat, 109 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 486 SdHoareTripleChecker+Valid, 1414 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 109 IncrementalHoareTripleChecker+Valid, 183 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,028 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [486 Valid, 1414 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [109 Valid, 183 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 19:04:34,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2705 states. [2025-03-16 19:04:34,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2705 to 2462. [2025-03-16 19:04:34,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2462 states, 1836 states have (on average 1.3229847494553377) internal successors, (2429), 1864 states have internal predecessors, (2429), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2025-03-16 19:04:34,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2462 states to 2462 states and 3235 transitions. [2025-03-16 19:04:34,193 INFO L78 Accepts]: Start accepts. Automaton has 2462 states and 3235 transitions. Word has length 92 [2025-03-16 19:04:34,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,193 INFO L471 AbstractCegarLoop]: Abstraction has 2462 states and 3235 transitions. [2025-03-16 19:04:34,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:34,194 INFO L276 IsEmpty]: Start isEmpty. Operand 2462 states and 3235 transitions. [2025-03-16 19:04:34,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-16 19:04:34,195 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,195 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-16 19:04:34,195 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1375869853, now seen corresponding path program 1 times [2025-03-16 19:04:34,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566474840] [2025-03-16 19:04:34,196 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,204 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:34,232 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:34,232 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,233 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:04:34,233 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-16 19:04:34,239 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:34,268 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:34,269 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:04:34,306 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-16 19:04:34,307 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-16 19:04:34,307 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-16 19:04:34,309 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-16 19:04:34,310 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,427 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-16 19:04:34,432 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 07:04:34 BoogieIcfgContainer [2025-03-16 19:04:34,432 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-16 19:04:34,433 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-16 19:04:34,433 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-16 19:04:34,433 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-16 19:04:34,434 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:24" (3/4) ... [2025-03-16 19:04:34,434 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-16 19:04:34,535 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 82. [2025-03-16 19:04:34,602 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-16 19:04:34,603 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-16 19:04:34,603 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-16 19:04:34,603 INFO L158 Benchmark]: Toolchain (without parser) took 10775.55ms. Allocated memory was 167.8MB in the beginning and 536.9MB in the end (delta: 369.1MB). Free memory was 122.4MB in the beginning and 452.1MB in the end (delta: -329.7MB). Peak memory consumption was 43.8MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,603 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 201.3MB. Free memory is still 114.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:04:34,603 INFO L158 Benchmark]: CACSL2BoogieTranslator took 284.43ms. Allocated memory is still 167.8MB. Free memory was 121.2MB in the beginning and 104.1MB in the end (delta: 17.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,604 INFO L158 Benchmark]: Boogie Procedure Inliner took 45.71ms. Allocated memory is still 167.8MB. Free memory was 104.1MB in the beginning and 100.4MB in the end (delta: 3.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,604 INFO L158 Benchmark]: Boogie Preprocessor took 44.96ms. Allocated memory is still 167.8MB. Free memory was 100.4MB in the beginning and 96.9MB in the end (delta: 3.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:04:34,604 INFO L158 Benchmark]: IcfgBuilder took 642.53ms. Allocated memory is still 167.8MB. Free memory was 96.9MB in the beginning and 55.0MB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,604 INFO L158 Benchmark]: TraceAbstraction took 9582.29ms. Allocated memory was 167.8MB in the beginning and 536.9MB in the end (delta: 369.1MB). Free memory was 53.8MB in the beginning and 477.2MB in the end (delta: -423.4MB). Peak memory consumption was 245.1MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,604 INFO L158 Benchmark]: Witness Printer took 169.74ms. Allocated memory is still 536.9MB. Free memory was 477.2MB in the beginning and 452.1MB in the end (delta: 25.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-03-16 19:04:34,605 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 201.3MB. Free memory is still 114.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 284.43ms. Allocated memory is still 167.8MB. Free memory was 121.2MB in the beginning and 104.1MB in the end (delta: 17.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 45.71ms. Allocated memory is still 167.8MB. Free memory was 104.1MB in the beginning and 100.4MB in the end (delta: 3.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 44.96ms. Allocated memory is still 167.8MB. Free memory was 100.4MB in the beginning and 96.9MB in the end (delta: 3.5MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 642.53ms. Allocated memory is still 167.8MB. Free memory was 96.9MB in the beginning and 55.0MB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 9582.29ms. Allocated memory was 167.8MB in the beginning and 536.9MB in the end (delta: 369.1MB). Free memory was 53.8MB in the beginning and 477.2MB in the end (delta: -423.4MB). Peak memory consumption was 245.1MB. Max. memory is 16.1GB. * Witness Printer took 169.74ms. Allocated memory is still 536.9MB. Free memory was 477.2MB in the beginning and 452.1MB in the end (delta: 25.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE i2 < 10 [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L462] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L464] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L617] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L619] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 172 locations, 302 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.4s, OverallIterations: 23, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3666 SdHoareTripleChecker+Valid, 1.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3598 mSDsluCounter, 21928 SdHoareTripleChecker+Invalid, 1.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 15706 mSDsCounter, 304 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1303 IncrementalHoareTripleChecker+Invalid, 1607 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 304 mSolverCounterUnsat, 6222 mSDtfsCounter, 1303 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 250 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2462occurred in iteration=22, InterpolantAutomatonStates: 117, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.2s AutomataMinimizationTime, 22 MinimizatonAttempts, 1481 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 3.4s InterpolantComputationTime, 1618 NumberOfCodeBlocks, 1618 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1501 ConstructedInterpolants, 0 QuantifiedInterpolants, 3282 SizeOfPredicates, 2 NumberOfNonLiveVariables, 421 ConjunctsInSsa, 14 ConjunctsInUnsatCore, 23 InterpolantComputations, 22 PerfectInterpolantSequences, 169/172 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-16 19:04:34,623 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE