./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 19:04:28,722 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 19:04:28,773 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-16 19:04:28,777 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 19:04:28,778 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 19:04:28,798 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 19:04:28,799 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 19:04:28,800 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 19:04:28,843 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 19:04:28,843 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 19:04:28,844 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 19:04:28,844 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 19:04:28,844 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 19:04:28,844 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 19:04:28,845 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:28,845 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 19:04:28,845 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 19:04:28,846 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 19:04:28,846 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 19:04:28,846 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 [2025-03-16 19:04:29,044 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 19:04:29,050 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 19:04:29,051 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 19:04:29,051 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 19:04:29,052 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 19:04:29,052 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-16 19:04:30,180 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0fc16e916/6fed48ae0e80447db86d00022898c732/FLAG953fd9b38 [2025-03-16 19:04:30,483 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 19:04:30,484 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-16 19:04:30,495 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0fc16e916/6fed48ae0e80447db86d00022898c732/FLAG953fd9b38 [2025-03-16 19:04:30,515 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0fc16e916/6fed48ae0e80447db86d00022898c732 [2025-03-16 19:04:30,517 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 19:04:30,520 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 19:04:30,521 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:30,522 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 19:04:30,526 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 19:04:30,527 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,529 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7798a5d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30, skipping insertion in model container [2025-03-16 19:04:30,529 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,556 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 19:04:30,768 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-03-16 19:04:30,770 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:30,779 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 19:04:30,822 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-03-16 19:04:30,822 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:30,835 INFO L204 MainTranslator]: Completed translation [2025-03-16 19:04:30,836 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30 WrapperNode [2025-03-16 19:04:30,836 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:30,836 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:30,836 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 19:04:30,836 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 19:04:30,841 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,848 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,871 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 504 [2025-03-16 19:04:30,871 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:30,872 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 19:04:30,872 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 19:04:30,872 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 19:04:30,879 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,879 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,884 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,906 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 19:04:30,906 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,907 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,914 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,915 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,916 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,917 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,919 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 19:04:30,919 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 19:04:30,919 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 19:04:30,919 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 19:04:30,920 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (1/1) ... [2025-03-16 19:04:30,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:30,934 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:30,946 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 19:04:30,948 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 19:04:30,966 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-03-16 19:04:30,966 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-03-16 19:04:30,966 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 19:04:30,966 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-03-16 19:04:30,966 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-03-16 19:04:30,966 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-03-16 19:04:30,966 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-03-16 19:04:30,966 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-03-16 19:04:30,967 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-03-16 19:04:30,967 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-03-16 19:04:30,967 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-03-16 19:04:30,967 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-16 19:04:30,967 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-03-16 19:04:30,967 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-03-16 19:04:30,967 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 19:04:30,967 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 19:04:30,967 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-03-16 19:04:30,967 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-03-16 19:04:31,059 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 19:04:31,061 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 19:04:31,501 INFO L? ?]: Removed 101 outVars from TransFormulas that were not future-live. [2025-03-16 19:04:31,501 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 19:04:31,509 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 19:04:31,509 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 19:04:31,510 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:31 BoogieIcfgContainer [2025-03-16 19:04:31,510 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 19:04:31,511 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 19:04:31,512 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 19:04:31,514 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 19:04:31,515 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 07:04:30" (1/3) ... [2025-03-16 19:04:31,515 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@53598d80 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:31, skipping insertion in model container [2025-03-16 19:04:31,515 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:30" (2/3) ... [2025-03-16 19:04:31,515 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@53598d80 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:31, skipping insertion in model container [2025-03-16 19:04:31,515 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:31" (3/3) ... [2025-03-16 19:04:31,516 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-16 19:04:31,526 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 19:04:31,527 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c that has 8 procedures, 171 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 19:04:31,572 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 19:04:31,581 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@54dfc08f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 19:04:31,582 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 19:04:31,587 INFO L276 IsEmpty]: Start isEmpty. Operand has 171 states, 131 states have (on average 1.5877862595419847) internal successors, (208), 133 states have internal predecessors, (208), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:31,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:31,592 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:31,592 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:31,593 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:31,596 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:31,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1121965192, now seen corresponding path program 1 times [2025-03-16 19:04:31,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:31,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625320279] [2025-03-16 19:04:31,602 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:31,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:31,661 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:31,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:31,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:31,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:31,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:31,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:31,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625320279] [2025-03-16 19:04:31,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [625320279] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:31,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:31,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-16 19:04:31,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237288873] [2025-03-16 19:04:31,772 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:31,775 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-03-16 19:04:31,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:31,810 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-16 19:04:31,811 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:31,812 INFO L87 Difference]: Start difference. First operand has 171 states, 131 states have (on average 1.5877862595419847) internal successors, (208), 133 states have internal predecessors, (208), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:31,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:31,851 INFO L93 Difference]: Finished difference Result 325 states and 540 transitions. [2025-03-16 19:04:31,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-16 19:04:31,854 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:31,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:31,860 INFO L225 Difference]: With dead ends: 325 [2025-03-16 19:04:31,861 INFO L226 Difference]: Without dead ends: 169 [2025-03-16 19:04:31,867 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:31,868 INFO L435 NwaCegarLoop]: 266 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 266 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:31,873 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:31,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2025-03-16 19:04:31,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2025-03-16 19:04:31,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 130 states have (on average 1.5692307692307692) internal successors, (204), 131 states have internal predecessors, (204), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:31,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 266 transitions. [2025-03-16 19:04:31,904 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 266 transitions. Word has length 23 [2025-03-16 19:04:31,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:31,904 INFO L471 AbstractCegarLoop]: Abstraction has 169 states and 266 transitions. [2025-03-16 19:04:31,904 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:31,904 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 266 transitions. [2025-03-16 19:04:31,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:31,905 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:31,905 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:31,905 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-16 19:04:31,905 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:31,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:31,906 INFO L85 PathProgramCache]: Analyzing trace with hash 124892839, now seen corresponding path program 1 times [2025-03-16 19:04:31,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:31,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243996131] [2025-03-16 19:04:31,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:31,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:31,923 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:31,958 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:31,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:31,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:32,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243996131] [2025-03-16 19:04:32,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [243996131] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 19:04:32,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647684495] [2025-03-16 19:04:32,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,151 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 19:04:32,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,151 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 19:04:32,152 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:32,152 INFO L87 Difference]: Start difference. First operand 169 states and 266 transitions. Second operand has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:32,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,233 INFO L93 Difference]: Finished difference Result 325 states and 507 transitions. [2025-03-16 19:04:32,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 19:04:32,233 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:32,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,235 INFO L225 Difference]: With dead ends: 325 [2025-03-16 19:04:32,235 INFO L226 Difference]: Without dead ends: 169 [2025-03-16 19:04:32,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:32,236 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 0 mSDsluCounter, 1026 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1288 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,236 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1288 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:32,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2025-03-16 19:04:32,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2025-03-16 19:04:32,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 130 states have (on average 1.476923076923077) internal successors, (192), 131 states have internal predecessors, (192), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:32,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 254 transitions. [2025-03-16 19:04:32,255 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 254 transitions. Word has length 23 [2025-03-16 19:04:32,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,255 INFO L471 AbstractCegarLoop]: Abstraction has 169 states and 254 transitions. [2025-03-16 19:04:32,255 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:32,255 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 254 transitions. [2025-03-16 19:04:32,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2025-03-16 19:04:32,256 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,256 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,256 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-16 19:04:32,256 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,256 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1483767637, now seen corresponding path program 1 times [2025-03-16 19:04:32,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084447504] [2025-03-16 19:04:32,257 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,272 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-16 19:04:32,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-16 19:04:32,309 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,309 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:32,496 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,496 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084447504] [2025-03-16 19:04:32,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084447504] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,497 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:32,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511820590] [2025-03-16 19:04:32,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:32,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:32,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:32,500 INFO L87 Difference]: Start difference. First operand 169 states and 254 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:32,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,552 INFO L93 Difference]: Finished difference Result 326 states and 499 transitions. [2025-03-16 19:04:32,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:32,553 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2025-03-16 19:04:32,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,554 INFO L225 Difference]: With dead ends: 326 [2025-03-16 19:04:32,554 INFO L226 Difference]: Without dead ends: 173 [2025-03-16 19:04:32,555 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:32,555 INFO L435 NwaCegarLoop]: 248 mSDtfsCounter, 3 mSDsluCounter, 486 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 734 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,555 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 734 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:32,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2025-03-16 19:04:32,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2025-03-16 19:04:32,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 133 states have (on average 1.4661654135338347) internal successors, (195), 134 states have internal predecessors, (195), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:32,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 257 transitions. [2025-03-16 19:04:32,571 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 257 transitions. Word has length 34 [2025-03-16 19:04:32,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,571 INFO L471 AbstractCegarLoop]: Abstraction has 173 states and 257 transitions. [2025-03-16 19:04:32,571 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:32,573 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 257 transitions. [2025-03-16 19:04:32,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-16 19:04:32,574 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,574 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,574 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-16 19:04:32,574 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,575 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,575 INFO L85 PathProgramCache]: Analyzing trace with hash 1488564047, now seen corresponding path program 1 times [2025-03-16 19:04:32,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576115114] [2025-03-16 19:04:32,575 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,589 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-16 19:04:32,605 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-16 19:04:32,605 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,606 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,650 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:32,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,651 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576115114] [2025-03-16 19:04:32,651 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1576115114] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,651 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:32,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112944812] [2025-03-16 19:04:32,651 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,651 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:32,651 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,652 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:32,652 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:32,652 INFO L87 Difference]: Start difference. First operand 173 states and 257 transitions. Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:32,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,687 INFO L93 Difference]: Finished difference Result 476 states and 717 transitions. [2025-03-16 19:04:32,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:32,687 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 48 [2025-03-16 19:04:32,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,689 INFO L225 Difference]: With dead ends: 476 [2025-03-16 19:04:32,689 INFO L226 Difference]: Without dead ends: 319 [2025-03-16 19:04:32,690 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:32,690 INFO L435 NwaCegarLoop]: 262 mSDtfsCounter, 210 mSDsluCounter, 246 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 508 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,690 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [210 Valid, 508 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:32,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2025-03-16 19:04:32,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 316. [2025-03-16 19:04:32,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 239 states have (on average 1.4811715481171548) internal successors, (354), 241 states have internal predecessors, (354), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-03-16 19:04:32,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 474 transitions. [2025-03-16 19:04:32,719 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 474 transitions. Word has length 48 [2025-03-16 19:04:32,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,719 INFO L471 AbstractCegarLoop]: Abstraction has 316 states and 474 transitions. [2025-03-16 19:04:32,719 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:32,719 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 474 transitions. [2025-03-16 19:04:32,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:32,722 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,722 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,722 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-16 19:04:32,722 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1859972046, now seen corresponding path program 1 times [2025-03-16 19:04:32,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057815695] [2025-03-16 19:04:32,723 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,736 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:32,750 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:32,750 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,750 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:32,795 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:32,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:32,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057815695] [2025-03-16 19:04:32,795 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057815695] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:32,796 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:32,796 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:32,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864618701] [2025-03-16 19:04:32,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:32,796 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:32,796 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:32,797 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:32,797 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:32,797 INFO L87 Difference]: Start difference. First operand 316 states and 474 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:32,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:32,839 INFO L93 Difference]: Finished difference Result 891 states and 1347 transitions. [2025-03-16 19:04:32,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:32,840 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:32,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:32,855 INFO L225 Difference]: With dead ends: 891 [2025-03-16 19:04:32,855 INFO L226 Difference]: Without dead ends: 591 [2025-03-16 19:04:32,856 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:32,859 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 211 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 529 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:32,859 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 529 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:32,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 591 states. [2025-03-16 19:04:32,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 591 to 585. [2025-03-16 19:04:32,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 585 states, 436 states have (on average 1.4908256880733946) internal successors, (650), 440 states have internal predecessors, (650), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-03-16 19:04:32,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 884 transitions. [2025-03-16 19:04:32,901 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 884 transitions. Word has length 49 [2025-03-16 19:04:32,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:32,901 INFO L471 AbstractCegarLoop]: Abstraction has 585 states and 884 transitions. [2025-03-16 19:04:32,901 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:32,901 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 884 transitions. [2025-03-16 19:04:32,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:32,904 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:32,904 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:32,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-16 19:04:32,905 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:32,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:32,905 INFO L85 PathProgramCache]: Analyzing trace with hash -352420237, now seen corresponding path program 1 times [2025-03-16 19:04:32,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:32,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707994916] [2025-03-16 19:04:32,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:32,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:32,918 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:32,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:32,943 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:32,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:33,020 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:33,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:33,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1707994916] [2025-03-16 19:04:33,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1707994916] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:33,021 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:33,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:33,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617505724] [2025-03-16 19:04:33,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:33,021 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:33,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:33,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:33,022 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:33,022 INFO L87 Difference]: Start difference. First operand 585 states and 884 transitions. Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:33,173 INFO L93 Difference]: Finished difference Result 1245 states and 1882 transitions. [2025-03-16 19:04:33,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:33,174 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:33,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:33,180 INFO L225 Difference]: With dead ends: 1245 [2025-03-16 19:04:33,180 INFO L226 Difference]: Without dead ends: 676 [2025-03-16 19:04:33,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:33,183 INFO L435 NwaCegarLoop]: 221 mSDtfsCounter, 350 mSDsluCounter, 432 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 350 SdHoareTripleChecker+Valid, 653 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:33,183 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [350 Valid, 653 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:33,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 676 states. [2025-03-16 19:04:33,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 676 to 668. [2025-03-16 19:04:33,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 668 states, 506 states have (on average 1.476284584980237) internal successors, (747), 509 states have internal predecessors, (747), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:33,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 668 states to 668 states and 995 transitions. [2025-03-16 19:04:33,239 INFO L78 Accepts]: Start accepts. Automaton has 668 states and 995 transitions. Word has length 49 [2025-03-16 19:04:33,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:33,239 INFO L471 AbstractCegarLoop]: Abstraction has 668 states and 995 transitions. [2025-03-16 19:04:33,239 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,239 INFO L276 IsEmpty]: Start isEmpty. Operand 668 states and 995 transitions. [2025-03-16 19:04:33,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2025-03-16 19:04:33,240 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:33,241 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:33,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-16 19:04:33,241 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:33,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:33,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1543114588, now seen corresponding path program 1 times [2025-03-16 19:04:33,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:33,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557709732] [2025-03-16 19:04:33,241 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:33,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:33,252 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-16 19:04:33,272 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-16 19:04:33,272 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:33,272 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:33,346 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:33,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:33,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557709732] [2025-03-16 19:04:33,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [557709732] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:33,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:33,347 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:33,347 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1413877332] [2025-03-16 19:04:33,347 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:33,348 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:33,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:33,348 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:33,348 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:33,348 INFO L87 Difference]: Start difference. First operand 668 states and 995 transitions. Second operand has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:33,481 INFO L93 Difference]: Finished difference Result 1249 states and 1882 transitions. [2025-03-16 19:04:33,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:33,482 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 50 [2025-03-16 19:04:33,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:33,487 INFO L225 Difference]: With dead ends: 1249 [2025-03-16 19:04:33,487 INFO L226 Difference]: Without dead ends: 680 [2025-03-16 19:04:33,489 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:33,489 INFO L435 NwaCegarLoop]: 221 mSDtfsCounter, 350 mSDsluCounter, 432 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 350 SdHoareTripleChecker+Valid, 653 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:33,490 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [350 Valid, 653 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:33,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 680 states. [2025-03-16 19:04:33,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 680 to 676. [2025-03-16 19:04:33,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 676 states, 514 states have (on average 1.4688715953307394) internal successors, (755), 517 states have internal predecessors, (755), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:33,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 1003 transitions. [2025-03-16 19:04:33,529 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 1003 transitions. Word has length 50 [2025-03-16 19:04:33,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:33,530 INFO L471 AbstractCegarLoop]: Abstraction has 676 states and 1003 transitions. [2025-03-16 19:04:33,530 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,530 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 1003 transitions. [2025-03-16 19:04:33,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2025-03-16 19:04:33,531 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:33,531 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:33,531 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-16 19:04:33,531 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:33,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:33,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1913384715, now seen corresponding path program 1 times [2025-03-16 19:04:33,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:33,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414699698] [2025-03-16 19:04:33,532 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:33,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:33,544 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 52 statements into 1 equivalence classes. [2025-03-16 19:04:33,561 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 52 of 52 statements. [2025-03-16 19:04:33,562 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:33,562 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:33,644 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:33,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:33,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414699698] [2025-03-16 19:04:33,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [414699698] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:33,645 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:33,645 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:33,645 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765344086] [2025-03-16 19:04:33,645 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:33,645 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:33,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:33,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:33,646 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:33,646 INFO L87 Difference]: Start difference. First operand 676 states and 1003 transitions. Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:33,762 INFO L93 Difference]: Finished difference Result 1245 states and 1870 transitions. [2025-03-16 19:04:33,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:33,762 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 52 [2025-03-16 19:04:33,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:33,766 INFO L225 Difference]: With dead ends: 1245 [2025-03-16 19:04:33,768 INFO L226 Difference]: Without dead ends: 676 [2025-03-16 19:04:33,769 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:33,770 INFO L435 NwaCegarLoop]: 222 mSDtfsCounter, 59 mSDsluCounter, 425 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 647 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:33,770 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 647 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:33,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 676 states. [2025-03-16 19:04:33,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 676 to 676. [2025-03-16 19:04:33,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 676 states, 514 states have (on average 1.461089494163424) internal successors, (751), 517 states have internal predecessors, (751), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:33,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 999 transitions. [2025-03-16 19:04:33,808 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 999 transitions. Word has length 52 [2025-03-16 19:04:33,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:33,808 INFO L471 AbstractCegarLoop]: Abstraction has 676 states and 999 transitions. [2025-03-16 19:04:33,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:33,808 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 999 transitions. [2025-03-16 19:04:33,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2025-03-16 19:04:33,808 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:33,809 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:33,809 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-16 19:04:33,809 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:33,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:33,809 INFO L85 PathProgramCache]: Analyzing trace with hash 406717546, now seen corresponding path program 1 times [2025-03-16 19:04:33,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:33,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719103013] [2025-03-16 19:04:33,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:33,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:33,820 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 53 statements into 1 equivalence classes. [2025-03-16 19:04:33,832 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 53 of 53 statements. [2025-03-16 19:04:33,832 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:33,832 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:33,973 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:33,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:33,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719103013] [2025-03-16 19:04:33,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719103013] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:33,973 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:33,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:33,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526074377] [2025-03-16 19:04:33,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:33,974 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:33,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:33,974 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:33,974 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:33,974 INFO L87 Difference]: Start difference. First operand 676 states and 999 transitions. Second operand has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:34,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,033 INFO L93 Difference]: Finished difference Result 1265 states and 1894 transitions. [2025-03-16 19:04:34,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:34,033 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 53 [2025-03-16 19:04:34,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,037 INFO L225 Difference]: With dead ends: 1265 [2025-03-16 19:04:34,038 INFO L226 Difference]: Without dead ends: 696 [2025-03-16 19:04:34,039 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:34,040 INFO L435 NwaCegarLoop]: 250 mSDtfsCounter, 4 mSDsluCounter, 496 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 746 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,040 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 746 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2025-03-16 19:04:34,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 696. [2025-03-16 19:04:34,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 696 states, 530 states have (on average 1.4471698113207547) internal successors, (767), 533 states have internal predecessors, (767), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:34,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 696 states to 696 states and 1015 transitions. [2025-03-16 19:04:34,079 INFO L78 Accepts]: Start accepts. Automaton has 696 states and 1015 transitions. Word has length 53 [2025-03-16 19:04:34,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,079 INFO L471 AbstractCegarLoop]: Abstraction has 696 states and 1015 transitions. [2025-03-16 19:04:34,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:34,079 INFO L276 IsEmpty]: Start isEmpty. Operand 696 states and 1015 transitions. [2025-03-16 19:04:34,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2025-03-16 19:04:34,080 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,080 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,080 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-16 19:04:34,080 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1247248620, now seen corresponding path program 1 times [2025-03-16 19:04:34,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052743421] [2025-03-16 19:04:34,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,090 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 61 statements into 1 equivalence classes. [2025-03-16 19:04:34,100 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 61 of 61 statements. [2025-03-16 19:04:34,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,100 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:34,211 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:34,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:34,212 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052743421] [2025-03-16 19:04:34,212 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052743421] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:34,212 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:34,212 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:34,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427103723] [2025-03-16 19:04:34,212 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:34,212 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:34,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:34,212 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:34,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:34,213 INFO L87 Difference]: Start difference. First operand 696 states and 1015 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:34,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,270 INFO L93 Difference]: Finished difference Result 1305 states and 1938 transitions. [2025-03-16 19:04:34,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:34,271 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 61 [2025-03-16 19:04:34,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,274 INFO L225 Difference]: With dead ends: 1305 [2025-03-16 19:04:34,274 INFO L226 Difference]: Without dead ends: 716 [2025-03-16 19:04:34,276 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:34,277 INFO L435 NwaCegarLoop]: 247 mSDtfsCounter, 4 mSDsluCounter, 485 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 732 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,277 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 732 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states. [2025-03-16 19:04:34,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 716. [2025-03-16 19:04:34,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 716 states, 546 states have (on average 1.434065934065934) internal successors, (783), 549 states have internal predecessors, (783), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:34,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 716 states to 716 states and 1031 transitions. [2025-03-16 19:04:34,311 INFO L78 Accepts]: Start accepts. Automaton has 716 states and 1031 transitions. Word has length 61 [2025-03-16 19:04:34,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,311 INFO L471 AbstractCegarLoop]: Abstraction has 716 states and 1031 transitions. [2025-03-16 19:04:34,311 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 3 states have internal predecessors, (48), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:34,311 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 1031 transitions. [2025-03-16 19:04:34,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-03-16 19:04:34,312 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,312 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,312 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-16 19:04:34,312 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,312 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,313 INFO L85 PathProgramCache]: Analyzing trace with hash 1217007026, now seen corresponding path program 1 times [2025-03-16 19:04:34,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608325699] [2025-03-16 19:04:34,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,321 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-03-16 19:04:34,332 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-03-16 19:04:34,332 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,332 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:34,420 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:34,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:34,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608325699] [2025-03-16 19:04:34,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [608325699] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:34,420 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:34,420 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:34,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672629290] [2025-03-16 19:04:34,421 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:34,421 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:34,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:34,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:34,421 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:34,421 INFO L87 Difference]: Start difference. First operand 716 states and 1031 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:34,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,487 INFO L93 Difference]: Finished difference Result 1341 states and 1954 transitions. [2025-03-16 19:04:34,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:34,487 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 69 [2025-03-16 19:04:34,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,491 INFO L225 Difference]: With dead ends: 1341 [2025-03-16 19:04:34,491 INFO L226 Difference]: Without dead ends: 732 [2025-03-16 19:04:34,493 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:34,493 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 3 mSDsluCounter, 490 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 742 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,494 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 742 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 732 states. [2025-03-16 19:04:34,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 732 to 732. [2025-03-16 19:04:34,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 732 states, 558 states have (on average 1.424731182795699) internal successors, (795), 561 states have internal predecessors, (795), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:34,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 732 states to 732 states and 1043 transitions. [2025-03-16 19:04:34,526 INFO L78 Accepts]: Start accepts. Automaton has 732 states and 1043 transitions. Word has length 69 [2025-03-16 19:04:34,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,527 INFO L471 AbstractCegarLoop]: Abstraction has 732 states and 1043 transitions. [2025-03-16 19:04:34,527 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:34,527 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 1043 transitions. [2025-03-16 19:04:34,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-03-16 19:04:34,528 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,528 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,528 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-16 19:04:34,528 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,529 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,529 INFO L85 PathProgramCache]: Analyzing trace with hash 585078763, now seen corresponding path program 1 times [2025-03-16 19:04:34,529 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,529 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201921491] [2025-03-16 19:04:34,529 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,538 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-03-16 19:04:34,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-03-16 19:04:34,548 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,548 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:34,640 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:34,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:34,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201921491] [2025-03-16 19:04:34,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201921491] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:34,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:34,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:34,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534380477] [2025-03-16 19:04:34,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:34,641 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:34,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:34,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:34,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:34,642 INFO L87 Difference]: Start difference. First operand 732 states and 1043 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:34,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,709 INFO L93 Difference]: Finished difference Result 1377 states and 1994 transitions. [2025-03-16 19:04:34,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:34,709 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 69 [2025-03-16 19:04:34,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,713 INFO L225 Difference]: With dead ends: 1377 [2025-03-16 19:04:34,714 INFO L226 Difference]: Without dead ends: 752 [2025-03-16 19:04:34,715 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:34,715 INFO L435 NwaCegarLoop]: 247 mSDtfsCounter, 4 mSDsluCounter, 485 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 732 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,716 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 732 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 752 states. [2025-03-16 19:04:34,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 752 to 752. [2025-03-16 19:04:34,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 752 states, 574 states have (on average 1.4128919860627178) internal successors, (811), 577 states have internal predecessors, (811), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:34,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 1059 transitions. [2025-03-16 19:04:34,748 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 1059 transitions. Word has length 69 [2025-03-16 19:04:34,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,749 INFO L471 AbstractCegarLoop]: Abstraction has 752 states and 1059 transitions. [2025-03-16 19:04:34,749 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:34,749 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 1059 transitions. [2025-03-16 19:04:34,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2025-03-16 19:04:34,750 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,750 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,750 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-16 19:04:34,751 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,751 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,751 INFO L85 PathProgramCache]: Analyzing trace with hash 1205278089, now seen corresponding path program 1 times [2025-03-16 19:04:34,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,751 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270667876] [2025-03-16 19:04:34,751 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,760 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-03-16 19:04:34,770 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-03-16 19:04:34,771 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,771 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:34,895 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:04:34,896 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:34,896 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270667876] [2025-03-16 19:04:34,896 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270667876] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:34,896 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:34,896 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:34,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794554869] [2025-03-16 19:04:34,896 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:34,896 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:34,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:34,897 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:34,897 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:34,897 INFO L87 Difference]: Start difference. First operand 752 states and 1059 transitions. Second operand has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:34,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,969 INFO L93 Difference]: Finished difference Result 1421 states and 2022 transitions. [2025-03-16 19:04:34,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:34,969 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 77 [2025-03-16 19:04:34,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,974 INFO L225 Difference]: With dead ends: 1421 [2025-03-16 19:04:34,974 INFO L226 Difference]: Without dead ends: 776 [2025-03-16 19:04:34,975 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:34,976 INFO L435 NwaCegarLoop]: 251 mSDtfsCounter, 5 mSDsluCounter, 493 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 744 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,976 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 744 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 776 states. [2025-03-16 19:04:35,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 776 to 776. [2025-03-16 19:04:35,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 776 states, 594 states have (on average 1.398989898989899) internal successors, (831), 597 states have internal predecessors, (831), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:35,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1079 transitions. [2025-03-16 19:04:35,023 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1079 transitions. Word has length 77 [2025-03-16 19:04:35,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,024 INFO L471 AbstractCegarLoop]: Abstraction has 776 states and 1079 transitions. [2025-03-16 19:04:35,024 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.0) internal successors, (56), 3 states have internal predecessors, (56), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:35,024 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1079 transitions. [2025-03-16 19:04:35,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2025-03-16 19:04:35,026 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,027 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,027 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-16 19:04:35,027 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,027 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1743314406, now seen corresponding path program 1 times [2025-03-16 19:04:35,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [677388011] [2025-03-16 19:04:35,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,039 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-03-16 19:04:35,087 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-03-16 19:04:35,087 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,437 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:35,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [677388011] [2025-03-16 19:04:35,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [677388011] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:35,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978568469] [2025-03-16 19:04:35,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:35,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:35,439 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:35,439 INFO L87 Difference]: Start difference. First operand 776 states and 1079 transitions. Second operand has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:35,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,660 INFO L93 Difference]: Finished difference Result 2003 states and 2773 transitions. [2025-03-16 19:04:35,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:35,661 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 80 [2025-03-16 19:04:35,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,668 INFO L225 Difference]: With dead ends: 2003 [2025-03-16 19:04:35,668 INFO L226 Difference]: Without dead ends: 1334 [2025-03-16 19:04:35,670 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:35,671 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 194 mSDsluCounter, 1175 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 198 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 102 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,671 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [198 Valid, 1429 Invalid, 102 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:35,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1334 states. [2025-03-16 19:04:35,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1334 to 1052. [2025-03-16 19:04:35,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1052 states, 797 states have (on average 1.3864491844416562) internal successors, (1105), 802 states have internal predecessors, (1105), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:35,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1052 states to 1052 states and 1449 transitions. [2025-03-16 19:04:35,750 INFO L78 Accepts]: Start accepts. Automaton has 1052 states and 1449 transitions. Word has length 80 [2025-03-16 19:04:35,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,751 INFO L471 AbstractCegarLoop]: Abstraction has 1052 states and 1449 transitions. [2025-03-16 19:04:35,751 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:35,751 INFO L276 IsEmpty]: Start isEmpty. Operand 1052 states and 1449 transitions. [2025-03-16 19:04:35,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-16 19:04:35,752 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,752 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,752 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-16 19:04:35,752 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,753 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1008013623, now seen corresponding path program 1 times [2025-03-16 19:04:35,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062413939] [2025-03-16 19:04:35,753 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,762 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-16 19:04:35,773 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-16 19:04:35,773 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,773 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,858 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:35,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062413939] [2025-03-16 19:04:35,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2062413939] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,859 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,859 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:35,859 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712369683] [2025-03-16 19:04:35,859 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,859 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:35,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,860 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:35,860 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:35,860 INFO L87 Difference]: Start difference. First operand 1052 states and 1449 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:35,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,924 INFO L93 Difference]: Finished difference Result 1961 states and 2722 transitions. [2025-03-16 19:04:35,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:35,924 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 84 [2025-03-16 19:04:35,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,930 INFO L225 Difference]: With dead ends: 1961 [2025-03-16 19:04:35,930 INFO L226 Difference]: Without dead ends: 1076 [2025-03-16 19:04:35,932 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:35,933 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 3 mSDsluCounter, 490 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 742 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,933 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 742 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:35,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1076 states. [2025-03-16 19:04:35,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1076 to 1076. [2025-03-16 19:04:35,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1076 states, 815 states have (on average 1.377914110429448) internal successors, (1123), 820 states have internal predecessors, (1123), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:35,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1076 states to 1076 states and 1467 transitions. [2025-03-16 19:04:35,985 INFO L78 Accepts]: Start accepts. Automaton has 1076 states and 1467 transitions. Word has length 84 [2025-03-16 19:04:35,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,985 INFO L471 AbstractCegarLoop]: Abstraction has 1076 states and 1467 transitions. [2025-03-16 19:04:35,985 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:35,985 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 1467 transitions. [2025-03-16 19:04:35,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2025-03-16 19:04:35,986 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,986 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,987 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-16 19:04:35,987 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,987 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,987 INFO L85 PathProgramCache]: Analyzing trace with hash -1432969679, now seen corresponding path program 1 times [2025-03-16 19:04:35,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993307385] [2025-03-16 19:04:35,987 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,995 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-03-16 19:04:36,023 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-03-16 19:04:36,023 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,024 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:36,218 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:36,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:36,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993307385] [2025-03-16 19:04:36,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1993307385] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:36,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [688839557] [2025-03-16 19:04:36,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:36,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:36,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:36,222 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:36,222 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-16 19:04:36,293 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-03-16 19:04:36,338 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-03-16 19:04:36,338 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:36,341 INFO L256 TraceCheckSpWp]: Trace formula consists of 420 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-03-16 19:04:36,349 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:36,447 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:36,447 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-16 19:04:36,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [688839557] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:36,448 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-16 19:04:36,448 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-03-16 19:04:36,448 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800486905] [2025-03-16 19:04:36,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:36,449 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:36,449 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:36,449 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:36,449 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-03-16 19:04:36,450 INFO L87 Difference]: Start difference. First operand 1076 states and 1467 transitions. Second operand has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:36,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:36,642 INFO L93 Difference]: Finished difference Result 2309 states and 3273 transitions. [2025-03-16 19:04:36,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 19:04:36,642 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 83 [2025-03-16 19:04:36,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:36,650 INFO L225 Difference]: With dead ends: 2309 [2025-03-16 19:04:36,650 INFO L226 Difference]: Without dead ends: 1488 [2025-03-16 19:04:36,652 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-03-16 19:04:36,653 INFO L435 NwaCegarLoop]: 425 mSDtfsCounter, 133 mSDsluCounter, 2356 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 159 SdHoareTripleChecker+Valid, 2781 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:36,653 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [159 Valid, 2781 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:36,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states. [2025-03-16 19:04:36,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1084. [2025-03-16 19:04:36,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1084 states, 819 states have (on average 1.3687423687423688) internal successors, (1121), 826 states have internal predecessors, (1121), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-03-16 19:04:36,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1084 states to 1084 states and 1469 transitions. [2025-03-16 19:04:36,745 INFO L78 Accepts]: Start accepts. Automaton has 1084 states and 1469 transitions. Word has length 83 [2025-03-16 19:04:36,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:36,746 INFO L471 AbstractCegarLoop]: Abstraction has 1084 states and 1469 transitions. [2025-03-16 19:04:36,746 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 8.428571428571429) internal successors, (59), 7 states have internal predecessors, (59), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:36,746 INFO L276 IsEmpty]: Start isEmpty. Operand 1084 states and 1469 transitions. [2025-03-16 19:04:36,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2025-03-16 19:04:36,748 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:36,748 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:36,755 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2025-03-16 19:04:36,948 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-03-16 19:04:36,949 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:36,950 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:36,950 INFO L85 PathProgramCache]: Analyzing trace with hash -918282914, now seen corresponding path program 1 times [2025-03-16 19:04:36,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:36,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [677160361] [2025-03-16 19:04:36,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:36,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:36,961 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 86 statements into 1 equivalence classes. [2025-03-16 19:04:36,974 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 86 of 86 statements. [2025-03-16 19:04:36,974 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,974 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:37,066 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-16 19:04:37,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:37,066 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [677160361] [2025-03-16 19:04:37,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [677160361] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:37,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:37,066 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:37,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979349583] [2025-03-16 19:04:37,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:37,067 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:37,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:37,067 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:37,067 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:37,067 INFO L87 Difference]: Start difference. First operand 1084 states and 1469 transitions. Second operand has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:37,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,214 INFO L93 Difference]: Finished difference Result 1956 states and 2662 transitions. [2025-03-16 19:04:37,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-16 19:04:37,214 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 86 [2025-03-16 19:04:37,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,220 INFO L225 Difference]: With dead ends: 1956 [2025-03-16 19:04:37,220 INFO L226 Difference]: Without dead ends: 1121 [2025-03-16 19:04:37,222 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-16 19:04:37,222 INFO L435 NwaCegarLoop]: 252 mSDtfsCounter, 247 mSDsluCounter, 1196 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 248 SdHoareTripleChecker+Valid, 1448 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,222 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [248 Valid, 1448 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:37,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1121 states. [2025-03-16 19:04:37,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1121 to 1079. [2025-03-16 19:04:37,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1079 states, 825 states have (on average 1.3648484848484848) internal successors, (1126), 837 states have internal predecessors, (1126), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-03-16 19:04:37,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1079 states to 1079 states and 1450 transitions. [2025-03-16 19:04:37,285 INFO L78 Accepts]: Start accepts. Automaton has 1079 states and 1450 transitions. Word has length 86 [2025-03-16 19:04:37,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,285 INFO L471 AbstractCegarLoop]: Abstraction has 1079 states and 1450 transitions. [2025-03-16 19:04:37,286 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.857142857142858) internal successors, (62), 6 states have internal predecessors, (62), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:37,286 INFO L276 IsEmpty]: Start isEmpty. Operand 1079 states and 1450 transitions. [2025-03-16 19:04:37,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2025-03-16 19:04:37,287 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,287 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,287 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-16 19:04:37,287 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,287 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,287 INFO L85 PathProgramCache]: Analyzing trace with hash 1554635343, now seen corresponding path program 1 times [2025-03-16 19:04:37,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812525556] [2025-03-16 19:04:37,287 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 88 statements into 1 equivalence classes. [2025-03-16 19:04:37,353 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 88 of 88 statements. [2025-03-16 19:04:37,353 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,353 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:37,696 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:37,696 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:37,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812525556] [2025-03-16 19:04:37,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1812525556] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:37,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:37,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:37,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317601692] [2025-03-16 19:04:37,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:37,697 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:37,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:37,697 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:37,697 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:37,698 INFO L87 Difference]: Start difference. First operand 1079 states and 1450 transitions. Second operand has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:37,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,889 INFO L93 Difference]: Finished difference Result 1927 states and 2599 transitions. [2025-03-16 19:04:37,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:37,890 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 88 [2025-03-16 19:04:37,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,897 INFO L225 Difference]: With dead ends: 1927 [2025-03-16 19:04:37,897 INFO L226 Difference]: Without dead ends: 1077 [2025-03-16 19:04:37,899 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:37,899 INFO L435 NwaCegarLoop]: 278 mSDtfsCounter, 147 mSDsluCounter, 1272 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 149 SdHoareTripleChecker+Valid, 1550 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,899 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [149 Valid, 1550 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:37,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1077 states. [2025-03-16 19:04:37,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1077 to 973. [2025-03-16 19:04:37,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 973 states, 746 states have (on average 1.3672922252010724) internal successors, (1020), 756 states have internal predecessors, (1020), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-03-16 19:04:37,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 973 states to 973 states and 1310 transitions. [2025-03-16 19:04:37,951 INFO L78 Accepts]: Start accepts. Automaton has 973 states and 1310 transitions. Word has length 88 [2025-03-16 19:04:37,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,951 INFO L471 AbstractCegarLoop]: Abstraction has 973 states and 1310 transitions. [2025-03-16 19:04:37,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.714285714285714) internal successors, (61), 6 states have internal predecessors, (61), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:37,951 INFO L276 IsEmpty]: Start isEmpty. Operand 973 states and 1310 transitions. [2025-03-16 19:04:37,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2025-03-16 19:04:37,952 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,952 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-16 19:04:37,952 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,953 INFO L85 PathProgramCache]: Analyzing trace with hash 476401327, now seen corresponding path program 1 times [2025-03-16 19:04:37,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697775903] [2025-03-16 19:04:37,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,962 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-16 19:04:37,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-16 19:04:37,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:38,290 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:38,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:38,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697775903] [2025-03-16 19:04:38,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1697775903] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:38,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:38,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 19:04:38,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869518191] [2025-03-16 19:04:38,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:38,290 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:38,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:38,291 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:38,291 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 19:04:38,291 INFO L87 Difference]: Start difference. First operand 973 states and 1310 transitions. Second operand has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:38,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:38,650 INFO L93 Difference]: Finished difference Result 1875 states and 2519 transitions. [2025-03-16 19:04:38,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:38,650 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 89 [2025-03-16 19:04:38,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:38,655 INFO L225 Difference]: With dead ends: 1875 [2025-03-16 19:04:38,655 INFO L226 Difference]: Without dead ends: 1061 [2025-03-16 19:04:38,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:38,657 INFO L435 NwaCegarLoop]: 307 mSDtfsCounter, 662 mSDsluCounter, 1098 mSDsCounter, 0 mSdLazyCounter, 183 mSolverCounterSat, 109 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 668 SdHoareTripleChecker+Valid, 1405 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 109 IncrementalHoareTripleChecker+Valid, 183 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:38,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [668 Valid, 1405 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [109 Valid, 183 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-16 19:04:38,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1061 states. [2025-03-16 19:04:38,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1061 to 1011. [2025-03-16 19:04:38,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 769 states have (on average 1.3446033810143043) internal successors, (1034), 780 states have internal predecessors, (1034), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2025-03-16 19:04:38,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1342 transitions. [2025-03-16 19:04:38,709 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1342 transitions. Word has length 89 [2025-03-16 19:04:38,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:38,709 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1342 transitions. [2025-03-16 19:04:38,710 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:38,710 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1342 transitions. [2025-03-16 19:04:38,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2025-03-16 19:04:38,710 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:38,711 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:38,711 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-16 19:04:38,711 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:38,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:38,711 INFO L85 PathProgramCache]: Analyzing trace with hash -1101957363, now seen corresponding path program 1 times [2025-03-16 19:04:38,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:38,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509297955] [2025-03-16 19:04:38,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:38,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:38,720 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 91 statements into 1 equivalence classes. [2025-03-16 19:04:38,741 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 91 of 91 statements. [2025-03-16 19:04:38,741 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:38,741 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:39,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:39,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509297955] [2025-03-16 19:04:39,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509297955] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:39,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:39,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 19:04:39,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711987832] [2025-03-16 19:04:39,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:39,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:39,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:39,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:39,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 19:04:39,089 INFO L87 Difference]: Start difference. First operand 1011 states and 1342 transitions. Second operand has 8 states, 8 states have (on average 8.5) internal successors, (68), 7 states have internal predecessors, (68), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:39,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:39,453 INFO L93 Difference]: Finished difference Result 1957 states and 2582 transitions. [2025-03-16 19:04:39,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:39,453 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.5) internal successors, (68), 7 states have internal predecessors, (68), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) Word has length 91 [2025-03-16 19:04:39,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:39,459 INFO L225 Difference]: With dead ends: 1957 [2025-03-16 19:04:39,459 INFO L226 Difference]: Without dead ends: 1118 [2025-03-16 19:04:39,461 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:39,461 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 409 mSDsluCounter, 1124 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 1393 SdHoareTripleChecker+Invalid, 250 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:39,461 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 1393 Invalid, 250 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 249 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-16 19:04:39,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1118 states. [2025-03-16 19:04:39,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1118 to 1033. [2025-03-16 19:04:39,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1033 states, 783 states have (on average 1.3282247765006385) internal successors, (1040), 795 states have internal predecessors, (1040), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2025-03-16 19:04:39,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1033 states to 1033 states and 1354 transitions. [2025-03-16 19:04:39,524 INFO L78 Accepts]: Start accepts. Automaton has 1033 states and 1354 transitions. Word has length 91 [2025-03-16 19:04:39,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:39,524 INFO L471 AbstractCegarLoop]: Abstraction has 1033 states and 1354 transitions. [2025-03-16 19:04:39,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.5) internal successors, (68), 7 states have internal predecessors, (68), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:39,524 INFO L276 IsEmpty]: Start isEmpty. Operand 1033 states and 1354 transitions. [2025-03-16 19:04:39,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-16 19:04:39,525 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:39,526 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:39,526 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-16 19:04:39,526 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:39,526 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:39,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1424391039, now seen corresponding path program 1 times [2025-03-16 19:04:39,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:39,526 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426438072] [2025-03-16 19:04:39,526 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:39,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:39,536 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-16 19:04:39,544 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-16 19:04:39,544 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:39,544 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,591 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:39,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:39,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426438072] [2025-03-16 19:04:39,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [426438072] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:39,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:39,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:39,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039074815] [2025-03-16 19:04:39,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:39,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:39,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:39,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:39,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:39,592 INFO L87 Difference]: Start difference. First operand 1033 states and 1354 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:39,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:39,730 INFO L93 Difference]: Finished difference Result 2702 states and 3565 transitions. [2025-03-16 19:04:39,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:39,730 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 92 [2025-03-16 19:04:39,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:39,738 INFO L225 Difference]: With dead ends: 2702 [2025-03-16 19:04:39,738 INFO L226 Difference]: Without dead ends: 1919 [2025-03-16 19:04:39,740 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:39,741 INFO L435 NwaCegarLoop]: 455 mSDtfsCounter, 196 mSDsluCounter, 680 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 1135 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:39,741 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 1135 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:39,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1919 states. [2025-03-16 19:04:39,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1919 to 1746. [2025-03-16 19:04:39,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1746 states, 1308 states have (on average 1.3264525993883791) internal successors, (1735), 1328 states have internal predecessors, (1735), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2025-03-16 19:04:39,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1746 states to 1746 states and 2295 transitions. [2025-03-16 19:04:39,853 INFO L78 Accepts]: Start accepts. Automaton has 1746 states and 2295 transitions. Word has length 92 [2025-03-16 19:04:39,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:39,853 INFO L471 AbstractCegarLoop]: Abstraction has 1746 states and 2295 transitions. [2025-03-16 19:04:39,853 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:39,853 INFO L276 IsEmpty]: Start isEmpty. Operand 1746 states and 2295 transitions. [2025-03-16 19:04:39,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-16 19:04:39,854 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:39,854 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:39,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-16 19:04:39,855 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:39,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:39,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1529710524, now seen corresponding path program 1 times [2025-03-16 19:04:39,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:39,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739719352] [2025-03-16 19:04:39,856 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:39,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:39,868 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:39,876 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:39,876 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:39,876 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,921 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:39,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:39,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739719352] [2025-03-16 19:04:39,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [739719352] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:39,921 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:39,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:39,921 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611348525] [2025-03-16 19:04:39,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:39,922 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:39,922 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:39,922 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:39,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:39,922 INFO L87 Difference]: Start difference. First operand 1746 states and 2295 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:40,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:40,100 INFO L93 Difference]: Finished difference Result 4060 states and 5358 transitions. [2025-03-16 19:04:40,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:40,102 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 94 [2025-03-16 19:04:40,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:40,112 INFO L225 Difference]: With dead ends: 4060 [2025-03-16 19:04:40,112 INFO L226 Difference]: Without dead ends: 2632 [2025-03-16 19:04:40,115 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:40,116 INFO L435 NwaCegarLoop]: 473 mSDtfsCounter, 197 mSDsluCounter, 696 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 197 SdHoareTripleChecker+Valid, 1169 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:40,116 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [197 Valid, 1169 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:40,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2632 states. [2025-03-16 19:04:40,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2632 to 2457. [2025-03-16 19:04:40,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2457 states, 1831 states have (on average 1.3238667394866193) internal successors, (2424), 1859 states have internal predecessors, (2424), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2025-03-16 19:04:40,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2457 states to 2457 states and 3230 transitions. [2025-03-16 19:04:40,255 INFO L78 Accepts]: Start accepts. Automaton has 2457 states and 3230 transitions. Word has length 94 [2025-03-16 19:04:40,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:40,255 INFO L471 AbstractCegarLoop]: Abstraction has 2457 states and 3230 transitions. [2025-03-16 19:04:40,256 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:40,256 INFO L276 IsEmpty]: Start isEmpty. Operand 2457 states and 3230 transitions. [2025-03-16 19:04:40,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-16 19:04:40,257 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:40,257 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:40,257 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-16 19:04:40,257 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:40,258 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:40,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1911139460, now seen corresponding path program 1 times [2025-03-16 19:04:40,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:40,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758092473] [2025-03-16 19:04:40,259 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:40,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:40,268 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:40,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:40,298 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:40,298 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:04:40,298 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-16 19:04:40,304 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:40,354 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:40,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:40,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:04:40,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-16 19:04:40,387 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-16 19:04:40,388 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-16 19:04:40,389 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-16 19:04:40,391 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:40,497 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-16 19:04:40,499 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 07:04:40 BoogieIcfgContainer [2025-03-16 19:04:40,499 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-16 19:04:40,499 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-16 19:04:40,499 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-16 19:04:40,500 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-16 19:04:40,500 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:31" (3/4) ... [2025-03-16 19:04:40,500 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-16 19:04:40,590 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 82. [2025-03-16 19:04:40,662 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-16 19:04:40,662 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-16 19:04:40,662 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-16 19:04:40,663 INFO L158 Benchmark]: Toolchain (without parser) took 10143.50ms. Allocated memory was 167.8MB in the beginning and 528.5MB in the end (delta: 360.7MB). Free memory was 121.5MB in the beginning and 430.9MB in the end (delta: -309.4MB). Peak memory consumption was 47.1MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,665 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 201.3MB. Free memory is still 119.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:04:40,665 INFO L158 Benchmark]: CACSL2BoogieTranslator took 314.72ms. Allocated memory is still 167.8MB. Free memory was 121.5MB in the beginning and 103.4MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,665 INFO L158 Benchmark]: Boogie Procedure Inliner took 34.93ms. Allocated memory is still 167.8MB. Free memory was 103.4MB in the beginning and 100.0MB in the end (delta: 3.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,665 INFO L158 Benchmark]: Boogie Preprocessor took 47.08ms. Allocated memory is still 167.8MB. Free memory was 100.0MB in the beginning and 96.3MB in the end (delta: 3.7MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:04:40,666 INFO L158 Benchmark]: IcfgBuilder took 590.39ms. Allocated memory is still 167.8MB. Free memory was 96.3MB in the beginning and 55.4MB in the end (delta: 40.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,666 INFO L158 Benchmark]: TraceAbstraction took 8987.53ms. Allocated memory was 167.8MB in the beginning and 528.5MB in the end (delta: 360.7MB). Free memory was 54.9MB in the beginning and 456.0MB in the end (delta: -401.1MB). Peak memory consumption was 181.3MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,666 INFO L158 Benchmark]: Witness Printer took 162.96ms. Allocated memory is still 528.5MB. Free memory was 456.0MB in the beginning and 430.9MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-03-16 19:04:40,667 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 201.3MB. Free memory is still 119.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 314.72ms. Allocated memory is still 167.8MB. Free memory was 121.5MB in the beginning and 103.4MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 34.93ms. Allocated memory is still 167.8MB. Free memory was 103.4MB in the beginning and 100.0MB in the end (delta: 3.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 47.08ms. Allocated memory is still 167.8MB. Free memory was 100.0MB in the beginning and 96.3MB in the end (delta: 3.7MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 590.39ms. Allocated memory is still 167.8MB. Free memory was 96.3MB in the beginning and 55.4MB in the end (delta: 40.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 8987.53ms. Allocated memory was 167.8MB in the beginning and 528.5MB in the end (delta: 360.7MB). Free memory was 54.9MB in the beginning and 456.0MB in the end (delta: -401.1MB). Peak memory consumption was 181.3MB. Max. memory is 16.1GB. * Witness Printer took 162.96ms. Allocated memory is still 528.5MB. Free memory was 456.0MB in the beginning and 430.9MB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE 1 [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2=-1, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=-1, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L462] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L464] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L616] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L618] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 171 locations, 301 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 8.8s, OverallIterations: 23, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3436 SdHoareTripleChecker+Valid, 1.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3391 mSDsluCounter, 22026 SdHoareTripleChecker+Invalid, 1.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 15831 mSDsCounter, 199 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1361 IncrementalHoareTripleChecker+Invalid, 1560 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 199 mSolverCounterUnsat, 6195 mSDtfsCounter, 1361 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 249 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2457occurred in iteration=22, InterpolantAutomatonStates: 117, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 22 MinimizatonAttempts, 1336 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 3.3s InterpolantComputationTime, 1621 NumberOfCodeBlocks, 1621 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1504 ConstructedInterpolants, 0 QuantifiedInterpolants, 3330 SizeOfPredicates, 2 NumberOfNonLiveVariables, 420 ConjunctsInSsa, 14 ConjunctsInUnsatCore, 23 InterpolantComputations, 22 PerfectInterpolantSequences, 169/172 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-16 19:04:40,689 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE