./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-16 19:04:31,460 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-16 19:04:31,505 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-16 19:04:31,509 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-16 19:04:31,509 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-16 19:04:31,524 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-16 19:04:31,525 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-16 19:04:31,525 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-16 19:04:31,525 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-16 19:04:31,525 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-16 19:04:31,525 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-16 19:04:31,526 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * Use SBE=true [2025-03-16 19:04:31,526 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-16 19:04:31,526 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-16 19:04:31,527 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-16 19:04:31,527 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:31,528 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-16 19:04:31,528 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-16 19:04:31,529 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d [2025-03-16 19:04:31,744 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-16 19:04:31,750 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-16 19:04:31,755 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-16 19:04:31,756 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-16 19:04:31,756 INFO L274 PluginConnector]: CDTParser initialized [2025-03-16 19:04:31,758 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:32,886 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/822d87f4e/2b394a2a74b246beab576ece62f6b1fc/FLAGcf46c372a [2025-03-16 19:04:33,151 INFO L384 CDTParser]: Found 1 translation units. [2025-03-16 19:04:33,151 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:33,159 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/822d87f4e/2b394a2a74b246beab576ece62f6b1fc/FLAGcf46c372a [2025-03-16 19:04:33,476 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/822d87f4e/2b394a2a74b246beab576ece62f6b1fc [2025-03-16 19:04:33,478 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-16 19:04:33,479 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-16 19:04:33,481 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:33,481 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-16 19:04:33,484 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-16 19:04:33,484 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,485 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@43e35fb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33, skipping insertion in model container [2025-03-16 19:04:33,485 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,506 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-16 19:04:33,713 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2025-03-16 19:04:33,715 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:33,730 INFO L200 MainTranslator]: Completed pre-run [2025-03-16 19:04:33,780 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2025-03-16 19:04:33,781 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-16 19:04:33,795 INFO L204 MainTranslator]: Completed translation [2025-03-16 19:04:33,796 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33 WrapperNode [2025-03-16 19:04:33,796 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-16 19:04:33,797 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:33,797 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-16 19:04:33,797 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-16 19:04:33,802 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,815 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,860 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 502 [2025-03-16 19:04:33,860 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-16 19:04:33,861 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-16 19:04:33,861 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-16 19:04:33,861 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-16 19:04:33,870 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,870 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,873 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,884 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-16 19:04:33,885 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,885 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,892 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,893 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,894 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,895 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,897 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-16 19:04:33,899 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-16 19:04:33,899 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-16 19:04:33,900 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-16 19:04:33,900 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (1/1) ... [2025-03-16 19:04:33,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-16 19:04:33,920 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:33,934 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-16 19:04:33,937 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-16 19:04:33,957 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-03-16 19:04:33,957 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-03-16 19:04:33,957 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-16 19:04:33,957 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-03-16 19:04:33,958 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-03-16 19:04:33,958 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-03-16 19:04:33,958 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-03-16 19:04:33,958 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-03-16 19:04:33,958 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-03-16 19:04:33,959 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-03-16 19:04:33,959 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-03-16 19:04:33,959 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-16 19:04:33,959 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-03-16 19:04:33,959 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-03-16 19:04:33,959 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-16 19:04:33,959 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-16 19:04:33,959 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-03-16 19:04:33,959 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-03-16 19:04:34,045 INFO L256 CfgBuilder]: Building ICFG [2025-03-16 19:04:34,047 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-16 19:04:34,502 INFO L? ?]: Removed 101 outVars from TransFormulas that were not future-live. [2025-03-16 19:04:34,502 INFO L307 CfgBuilder]: Performing block encoding [2025-03-16 19:04:34,516 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-16 19:04:34,518 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-16 19:04:34,519 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:34 BoogieIcfgContainer [2025-03-16 19:04:34,519 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-16 19:04:34,521 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-16 19:04:34,521 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-16 19:04:34,525 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-16 19:04:34,525 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.03 07:04:33" (1/3) ... [2025-03-16 19:04:34,526 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13729be6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:34, skipping insertion in model container [2025-03-16 19:04:34,526 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.03 07:04:33" (2/3) ... [2025-03-16 19:04:34,526 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13729be6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 07:04:34, skipping insertion in model container [2025-03-16 19:04:34,526 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:34" (3/3) ... [2025-03-16 19:04:34,527 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2025-03-16 19:04:34,539 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-16 19:04:34,541 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c that has 8 procedures, 170 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-16 19:04:34,614 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-16 19:04:34,622 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6214ef1e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-16 19:04:34,622 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-16 19:04:34,627 INFO L276 IsEmpty]: Start isEmpty. Operand has 170 states, 130 states have (on average 1.5769230769230769) internal successors, (205), 131 states have internal predecessors, (205), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:34,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:34,633 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,633 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,634 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1703565704, now seen corresponding path program 1 times [2025-03-16 19:04:34,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045011522] [2025-03-16 19:04:34,647 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:34,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:34,758 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:34,758 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:34,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:34,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:34,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045011522] [2025-03-16 19:04:34,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1045011522] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:34,853 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:34,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-16 19:04:34,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884413979] [2025-03-16 19:04:34,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:34,858 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-03-16 19:04:34,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:34,875 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-16 19:04:34,876 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:34,878 INFO L87 Difference]: Start difference. First operand has 170 states, 130 states have (on average 1.5769230769230769) internal successors, (205), 131 states have internal predecessors, (205), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:34,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:34,909 INFO L93 Difference]: Finished difference Result 325 states and 535 transitions. [2025-03-16 19:04:34,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-16 19:04:34,910 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:34,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:34,919 INFO L225 Difference]: With dead ends: 325 [2025-03-16 19:04:34,919 INFO L226 Difference]: Without dead ends: 168 [2025-03-16 19:04:34,926 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-16 19:04:34,931 INFO L435 NwaCegarLoop]: 265 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 265 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:34,931 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 265 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:34,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2025-03-16 19:04:34,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2025-03-16 19:04:34,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 129 states have (on average 1.558139534883721) internal successors, (201), 129 states have internal predecessors, (201), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:34,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 263 transitions. [2025-03-16 19:04:34,973 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 263 transitions. Word has length 23 [2025-03-16 19:04:34,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:34,974 INFO L471 AbstractCegarLoop]: Abstraction has 168 states and 263 transitions. [2025-03-16 19:04:34,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:34,974 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 263 transitions. [2025-03-16 19:04:34,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-16 19:04:34,975 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:34,975 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:34,976 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-16 19:04:34,976 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:34,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:34,977 INFO L85 PathProgramCache]: Analyzing trace with hash 706493351, now seen corresponding path program 1 times [2025-03-16 19:04:34,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:34,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175682624] [2025-03-16 19:04:34,977 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:34,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:34,993 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-16 19:04:35,035 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-16 19:04:35,036 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,036 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:35,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,200 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175682624] [2025-03-16 19:04:35,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1175682624] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,200 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,200 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-16 19:04:35,200 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [904482992] [2025-03-16 19:04:35,200 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,201 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-16 19:04:35,201 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,201 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-16 19:04:35,201 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:35,201 INFO L87 Difference]: Start difference. First operand 168 states and 263 transitions. Second operand has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:35,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,297 INFO L93 Difference]: Finished difference Result 428 states and 678 transitions. [2025-03-16 19:04:35,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-16 19:04:35,298 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2025-03-16 19:04:35,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,300 INFO L225 Difference]: With dead ends: 428 [2025-03-16 19:04:35,300 INFO L226 Difference]: Without dead ends: 273 [2025-03-16 19:04:35,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-16 19:04:35,302 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 124 mSDsluCounter, 1005 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 1262 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,302 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 1262 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:35,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2025-03-16 19:04:35,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 168. [2025-03-16 19:04:35,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 129 states have (on average 1.4651162790697674) internal successors, (189), 129 states have internal predecessors, (189), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:35,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 251 transitions. [2025-03-16 19:04:35,317 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 251 transitions. Word has length 23 [2025-03-16 19:04:35,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,317 INFO L471 AbstractCegarLoop]: Abstraction has 168 states and 251 transitions. [2025-03-16 19:04:35,317 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.8) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:35,317 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 251 transitions. [2025-03-16 19:04:35,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2025-03-16 19:04:35,318 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,318 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,318 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-16 19:04:35,318 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1036941735, now seen corresponding path program 1 times [2025-03-16 19:04:35,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638402444] [2025-03-16 19:04:35,319 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,349 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-16 19:04:35,390 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-16 19:04:35,390 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,390 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-16 19:04:35,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,561 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638402444] [2025-03-16 19:04:35,561 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [638402444] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,561 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,561 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:35,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799816381] [2025-03-16 19:04:35,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,562 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:35,562 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,562 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:35,562 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:35,562 INFO L87 Difference]: Start difference. First operand 168 states and 251 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:35,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,627 INFO L93 Difference]: Finished difference Result 324 states and 493 transitions. [2025-03-16 19:04:35,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:35,627 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2025-03-16 19:04:35,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,629 INFO L225 Difference]: With dead ends: 324 [2025-03-16 19:04:35,629 INFO L226 Difference]: Without dead ends: 172 [2025-03-16 19:04:35,630 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:35,630 INFO L435 NwaCegarLoop]: 245 mSDtfsCounter, 3 mSDsluCounter, 480 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 725 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,630 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 725 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:35,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2025-03-16 19:04:35,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2025-03-16 19:04:35,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 132 states have (on average 1.4545454545454546) internal successors, (192), 132 states have internal predecessors, (192), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-03-16 19:04:35,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 254 transitions. [2025-03-16 19:04:35,648 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 254 transitions. Word has length 34 [2025-03-16 19:04:35,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,648 INFO L471 AbstractCegarLoop]: Abstraction has 172 states and 254 transitions. [2025-03-16 19:04:35,648 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-16 19:04:35,648 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 254 transitions. [2025-03-16 19:04:35,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-03-16 19:04:35,649 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,649 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,649 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-16 19:04:35,649 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,650 INFO L85 PathProgramCache]: Analyzing trace with hash 974213752, now seen corresponding path program 1 times [2025-03-16 19:04:35,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352191467] [2025-03-16 19:04:35,650 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,664 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-16 19:04:35,682 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-16 19:04:35,684 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,684 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,755 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:35,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,755 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352191467] [2025-03-16 19:04:35,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1352191467] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,755 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:35,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175838004] [2025-03-16 19:04:35,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,755 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:35,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,756 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:35,756 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:35,756 INFO L87 Difference]: Start difference. First operand 172 states and 254 transitions. Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:35,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,790 INFO L93 Difference]: Finished difference Result 473 states and 708 transitions. [2025-03-16 19:04:35,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:35,791 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 48 [2025-03-16 19:04:35,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,794 INFO L225 Difference]: With dead ends: 473 [2025-03-16 19:04:35,794 INFO L226 Difference]: Without dead ends: 317 [2025-03-16 19:04:35,794 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:35,795 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 207 mSDsluCounter, 243 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 502 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,795 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [207 Valid, 502 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:35,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2025-03-16 19:04:35,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 313. [2025-03-16 19:04:35,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 313 states, 236 states have (on average 1.4703389830508475) internal successors, (347), 237 states have internal predecessors, (347), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-03-16 19:04:35,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 467 transitions. [2025-03-16 19:04:35,814 INFO L78 Accepts]: Start accepts. Automaton has 313 states and 467 transitions. Word has length 48 [2025-03-16 19:04:35,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,814 INFO L471 AbstractCegarLoop]: Abstraction has 313 states and 467 transitions. [2025-03-16 19:04:35,814 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:35,814 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 467 transitions. [2025-03-16 19:04:35,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:35,815 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,816 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-16 19:04:35,817 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1261287922, now seen corresponding path program 1 times [2025-03-16 19:04:35,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316444187] [2025-03-16 19:04:35,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:35,833 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:35,849 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:35,849 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:35,849 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:35,889 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:35,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:35,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316444187] [2025-03-16 19:04:35,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316444187] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:35,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:35,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:35,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915121860] [2025-03-16 19:04:35,889 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:35,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:35,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:35,890 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:35,890 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:35,890 INFO L87 Difference]: Start difference. First operand 313 states and 467 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:35,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:35,930 INFO L93 Difference]: Finished difference Result 882 states and 1326 transitions. [2025-03-16 19:04:35,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:35,930 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:35,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:35,934 INFO L225 Difference]: With dead ends: 882 [2025-03-16 19:04:35,935 INFO L226 Difference]: Without dead ends: 585 [2025-03-16 19:04:35,936 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:35,936 INFO L435 NwaCegarLoop]: 278 mSDtfsCounter, 208 mSDsluCounter, 245 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 523 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:35,936 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 523 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:35,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 585 states. [2025-03-16 19:04:35,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 585 to 579. [2025-03-16 19:04:35,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 579 states, 430 states have (on average 1.4790697674418605) internal successors, (636), 433 states have internal predecessors, (636), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-03-16 19:04:35,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 870 transitions. [2025-03-16 19:04:35,983 INFO L78 Accepts]: Start accepts. Automaton has 579 states and 870 transitions. Word has length 49 [2025-03-16 19:04:35,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:35,984 INFO L471 AbstractCegarLoop]: Abstraction has 579 states and 870 transitions. [2025-03-16 19:04:35,984 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:35,984 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 870 transitions. [2025-03-16 19:04:35,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-16 19:04:35,986 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:35,986 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:35,986 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-16 19:04:35,986 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:35,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:35,986 INFO L85 PathProgramCache]: Analyzing trace with hash -1526127565, now seen corresponding path program 1 times [2025-03-16 19:04:35,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:35,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757587782] [2025-03-16 19:04:35,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:35,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:36,000 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-16 19:04:36,036 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-16 19:04:36,039 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,039 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:36,154 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:36,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:36,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757587782] [2025-03-16 19:04:36,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1757587782] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:36,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:36,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:36,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901671842] [2025-03-16 19:04:36,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:36,155 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:36,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:36,155 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:36,155 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:36,156 INFO L87 Difference]: Start difference. First operand 579 states and 870 transitions. Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:36,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:36,324 INFO L93 Difference]: Finished difference Result 1229 states and 1846 transitions. [2025-03-16 19:04:36,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:36,325 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 49 [2025-03-16 19:04:36,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:36,330 INFO L225 Difference]: With dead ends: 1229 [2025-03-16 19:04:36,331 INFO L226 Difference]: Without dead ends: 666 [2025-03-16 19:04:36,332 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:36,333 INFO L435 NwaCegarLoop]: 220 mSDtfsCounter, 338 mSDsluCounter, 432 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 338 SdHoareTripleChecker+Valid, 652 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:36,333 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [338 Valid, 652 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:36,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 666 states. [2025-03-16 19:04:36,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 666 to 662. [2025-03-16 19:04:36,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 662 states, 500 states have (on average 1.466) internal successors, (733), 503 states have internal predecessors, (733), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:36,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 981 transitions. [2025-03-16 19:04:36,379 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 981 transitions. Word has length 49 [2025-03-16 19:04:36,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:36,380 INFO L471 AbstractCegarLoop]: Abstraction has 662 states and 981 transitions. [2025-03-16 19:04:36,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:36,381 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 981 transitions. [2025-03-16 19:04:36,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2025-03-16 19:04:36,382 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:36,382 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:36,382 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-16 19:04:36,382 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:36,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:36,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1331567776, now seen corresponding path program 1 times [2025-03-16 19:04:36,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:36,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259628687] [2025-03-16 19:04:36,383 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:36,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:36,402 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-16 19:04:36,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-16 19:04:36,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:36,519 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:36,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:36,519 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259628687] [2025-03-16 19:04:36,519 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1259628687] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:36,519 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:36,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-16 19:04:36,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [114047677] [2025-03-16 19:04:36,519 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:36,520 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-16 19:04:36,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:36,520 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-16 19:04:36,520 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:36,520 INFO L87 Difference]: Start difference. First operand 662 states and 981 transitions. Second operand has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:36,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:36,682 INFO L93 Difference]: Finished difference Result 1229 states and 1838 transitions. [2025-03-16 19:04:36,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:36,683 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 50 [2025-03-16 19:04:36,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:36,687 INFO L225 Difference]: With dead ends: 1229 [2025-03-16 19:04:36,688 INFO L226 Difference]: Without dead ends: 666 [2025-03-16 19:04:36,690 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:36,691 INFO L435 NwaCegarLoop]: 221 mSDtfsCounter, 335 mSDsluCounter, 434 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 335 SdHoareTripleChecker+Valid, 655 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:36,691 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [335 Valid, 655 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:36,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 666 states. [2025-03-16 19:04:36,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 666 to 662. [2025-03-16 19:04:36,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 662 states, 500 states have (on average 1.458) internal successors, (729), 503 states have internal predecessors, (729), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:36,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 977 transitions. [2025-03-16 19:04:36,747 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 977 transitions. Word has length 50 [2025-03-16 19:04:36,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:36,747 INFO L471 AbstractCegarLoop]: Abstraction has 662 states and 977 transitions. [2025-03-16 19:04:36,748 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.8) internal successors, (39), 5 states have internal predecessors, (39), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-16 19:04:36,748 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 977 transitions. [2025-03-16 19:04:36,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2025-03-16 19:04:36,749 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:36,749 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:36,749 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-16 19:04:36,749 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:36,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:36,750 INFO L85 PathProgramCache]: Analyzing trace with hash -1576463186, now seen corresponding path program 1 times [2025-03-16 19:04:36,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:36,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255145541] [2025-03-16 19:04:36,750 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:36,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:36,764 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 51 statements into 1 equivalence classes. [2025-03-16 19:04:36,786 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 51 of 51 statements. [2025-03-16 19:04:36,786 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:36,786 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:36,978 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:36,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:36,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255145541] [2025-03-16 19:04:36,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255145541] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:36,979 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:36,979 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:36,979 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422920577] [2025-03-16 19:04:36,979 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:36,979 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:36,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:36,979 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:36,980 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:36,980 INFO L87 Difference]: Start difference. First operand 662 states and 977 transitions. Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:37,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,039 INFO L93 Difference]: Finished difference Result 1245 states and 1858 transitions. [2025-03-16 19:04:37,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:37,040 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 51 [2025-03-16 19:04:37,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,044 INFO L225 Difference]: With dead ends: 1245 [2025-03-16 19:04:37,046 INFO L226 Difference]: Without dead ends: 682 [2025-03-16 19:04:37,048 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:37,048 INFO L435 NwaCegarLoop]: 247 mSDtfsCounter, 4 mSDsluCounter, 490 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 737 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,049 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 737 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:37,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2025-03-16 19:04:37,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 682. [2025-03-16 19:04:37,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 682 states, 516 states have (on average 1.443798449612403) internal successors, (745), 519 states have internal predecessors, (745), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:37,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 682 states to 682 states and 993 transitions. [2025-03-16 19:04:37,099 INFO L78 Accepts]: Start accepts. Automaton has 682 states and 993 transitions. Word has length 51 [2025-03-16 19:04:37,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,100 INFO L471 AbstractCegarLoop]: Abstraction has 682 states and 993 transitions. [2025-03-16 19:04:37,100 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.0) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-03-16 19:04:37,100 INFO L276 IsEmpty]: Start isEmpty. Operand 682 states and 993 transitions. [2025-03-16 19:04:37,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2025-03-16 19:04:37,101 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,101 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-16 19:04:37,101 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1168465008, now seen corresponding path program 1 times [2025-03-16 19:04:37,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711087414] [2025-03-16 19:04:37,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,120 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-03-16 19:04:37,137 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-03-16 19:04:37,138 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:37,296 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:37,297 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:37,297 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711087414] [2025-03-16 19:04:37,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711087414] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:37,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:37,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:37,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678299684] [2025-03-16 19:04:37,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:37,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:37,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:37,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:37,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:37,298 INFO L87 Difference]: Start difference. First operand 682 states and 993 transitions. Second operand has 4 states, 4 states have (on average 11.5) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:37,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,367 INFO L93 Difference]: Finished difference Result 1285 states and 1902 transitions. [2025-03-16 19:04:37,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:37,368 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.5) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 59 [2025-03-16 19:04:37,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,372 INFO L225 Difference]: With dead ends: 1285 [2025-03-16 19:04:37,373 INFO L226 Difference]: Without dead ends: 702 [2025-03-16 19:04:37,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:37,375 INFO L435 NwaCegarLoop]: 244 mSDtfsCounter, 4 mSDsluCounter, 479 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 723 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 723 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:37,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 702 states. [2025-03-16 19:04:37,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 702 to 702. [2025-03-16 19:04:37,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 702 states, 532 states have (on average 1.4304511278195489) internal successors, (761), 535 states have internal predecessors, (761), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:37,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 702 states to 702 states and 1009 transitions. [2025-03-16 19:04:37,414 INFO L78 Accepts]: Start accepts. Automaton has 702 states and 1009 transitions. Word has length 59 [2025-03-16 19:04:37,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,414 INFO L471 AbstractCegarLoop]: Abstraction has 702 states and 1009 transitions. [2025-03-16 19:04:37,414 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.5) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-03-16 19:04:37,414 INFO L276 IsEmpty]: Start isEmpty. Operand 702 states and 1009 transitions. [2025-03-16 19:04:37,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2025-03-16 19:04:37,415 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,415 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,415 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-16 19:04:37,416 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1346167478, now seen corresponding path program 1 times [2025-03-16 19:04:37,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765030917] [2025-03-16 19:04:37,416 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,429 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 67 statements into 1 equivalence classes. [2025-03-16 19:04:37,442 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 67 of 67 statements. [2025-03-16 19:04:37,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,443 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:37,553 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:37,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:37,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765030917] [2025-03-16 19:04:37,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1765030917] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:37,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:37,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:37,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326319806] [2025-03-16 19:04:37,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:37,554 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:37,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:37,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:37,554 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:37,554 INFO L87 Difference]: Start difference. First operand 702 states and 1009 transitions. Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:37,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,608 INFO L93 Difference]: Finished difference Result 1321 states and 1918 transitions. [2025-03-16 19:04:37,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:37,609 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 67 [2025-03-16 19:04:37,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,613 INFO L225 Difference]: With dead ends: 1321 [2025-03-16 19:04:37,613 INFO L226 Difference]: Without dead ends: 718 [2025-03-16 19:04:37,614 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:37,615 INFO L435 NwaCegarLoop]: 249 mSDtfsCounter, 3 mSDsluCounter, 484 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 733 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,615 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 733 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:37,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2025-03-16 19:04:37,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 718. [2025-03-16 19:04:37,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 544 states have (on average 1.4209558823529411) internal successors, (773), 547 states have internal predecessors, (773), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:37,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1021 transitions. [2025-03-16 19:04:37,650 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1021 transitions. Word has length 67 [2025-03-16 19:04:37,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,650 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1021 transitions. [2025-03-16 19:04:37,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:37,651 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1021 transitions. [2025-03-16 19:04:37,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2025-03-16 19:04:37,652 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,653 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,653 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-16 19:04:37,653 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,653 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,653 INFO L85 PathProgramCache]: Analyzing trace with hash 714239215, now seen corresponding path program 1 times [2025-03-16 19:04:37,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521627527] [2025-03-16 19:04:37,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,662 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 67 statements into 1 equivalence classes. [2025-03-16 19:04:37,673 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 67 of 67 statements. [2025-03-16 19:04:37,673 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,673 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:37,792 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-16 19:04:37,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:37,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521627527] [2025-03-16 19:04:37,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521627527] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:37,792 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:37,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:37,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000790675] [2025-03-16 19:04:37,793 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:37,793 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:37,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:37,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:37,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:37,794 INFO L87 Difference]: Start difference. First operand 718 states and 1021 transitions. Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:37,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:37,859 INFO L93 Difference]: Finished difference Result 1357 states and 1958 transitions. [2025-03-16 19:04:37,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:37,859 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 67 [2025-03-16 19:04:37,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:37,867 INFO L225 Difference]: With dead ends: 1357 [2025-03-16 19:04:37,867 INFO L226 Difference]: Without dead ends: 738 [2025-03-16 19:04:37,869 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:37,869 INFO L435 NwaCegarLoop]: 244 mSDtfsCounter, 4 mSDsluCounter, 479 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 723 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:37,869 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 723 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:37,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2025-03-16 19:04:37,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 738. [2025-03-16 19:04:37,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 738 states, 560 states have (on average 1.4089285714285715) internal successors, (789), 563 states have internal predecessors, (789), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:37,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1037 transitions. [2025-03-16 19:04:37,903 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1037 transitions. Word has length 67 [2025-03-16 19:04:37,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:37,903 INFO L471 AbstractCegarLoop]: Abstraction has 738 states and 1037 transitions. [2025-03-16 19:04:37,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 3 states have internal predecessors, (52), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-03-16 19:04:37,903 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1037 transitions. [2025-03-16 19:04:37,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2025-03-16 19:04:37,905 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:37,905 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:37,905 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-16 19:04:37,906 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:37,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:37,906 INFO L85 PathProgramCache]: Analyzing trace with hash 2095569901, now seen corresponding path program 1 times [2025-03-16 19:04:37,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:37,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [468820651] [2025-03-16 19:04:37,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:37,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:37,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 75 statements into 1 equivalence classes. [2025-03-16 19:04:37,930 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 75 of 75 statements. [2025-03-16 19:04:37,930 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:37,930 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:38,056 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:04:38,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:38,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [468820651] [2025-03-16 19:04:38,056 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [468820651] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:38,056 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:38,056 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:38,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626258291] [2025-03-16 19:04:38,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:38,056 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:38,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:38,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:38,057 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:38,057 INFO L87 Difference]: Start difference. First operand 738 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:38,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:38,121 INFO L93 Difference]: Finished difference Result 1401 states and 1986 transitions. [2025-03-16 19:04:38,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:38,122 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 75 [2025-03-16 19:04:38,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:38,126 INFO L225 Difference]: With dead ends: 1401 [2025-03-16 19:04:38,127 INFO L226 Difference]: Without dead ends: 762 [2025-03-16 19:04:38,128 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:38,128 INFO L435 NwaCegarLoop]: 248 mSDtfsCounter, 5 mSDsluCounter, 487 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 735 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:38,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 735 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:38,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 762 states. [2025-03-16 19:04:38,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 762 to 762. [2025-03-16 19:04:38,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 762 states, 580 states have (on average 1.3948275862068966) internal successors, (809), 583 states have internal predecessors, (809), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-03-16 19:04:38,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 762 states to 762 states and 1057 transitions. [2025-03-16 19:04:38,163 INFO L78 Accepts]: Start accepts. Automaton has 762 states and 1057 transitions. Word has length 75 [2025-03-16 19:04:38,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:38,163 INFO L471 AbstractCegarLoop]: Abstraction has 762 states and 1057 transitions. [2025-03-16 19:04:38,163 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.5) internal successors, (54), 3 states have internal predecessors, (54), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-03-16 19:04:38,164 INFO L276 IsEmpty]: Start isEmpty. Operand 762 states and 1057 transitions. [2025-03-16 19:04:38,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2025-03-16 19:04:38,165 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:38,165 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:38,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-16 19:04:38,165 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:38,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:38,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1119349781, now seen corresponding path program 1 times [2025-03-16 19:04:38,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:38,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322997189] [2025-03-16 19:04:38,166 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:38,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:38,192 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-03-16 19:04:38,235 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-03-16 19:04:38,235 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:38,235 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:38,591 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:38,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:38,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322997189] [2025-03-16 19:04:38,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322997189] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:38,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:38,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:38,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826640182] [2025-03-16 19:04:38,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:38,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:38,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:38,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:38,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:38,592 INFO L87 Difference]: Start difference. First operand 762 states and 1057 transitions. Second operand has 7 states, 7 states have (on average 8.142857142857142) internal successors, (57), 6 states have internal predecessors, (57), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:38,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:38,862 INFO L93 Difference]: Finished difference Result 1985 states and 2739 transitions. [2025-03-16 19:04:38,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:38,863 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.142857142857142) internal successors, (57), 6 states have internal predecessors, (57), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 78 [2025-03-16 19:04:38,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:38,869 INFO L225 Difference]: With dead ends: 1985 [2025-03-16 19:04:38,869 INFO L226 Difference]: Without dead ends: 1322 [2025-03-16 19:04:38,871 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:38,872 INFO L435 NwaCegarLoop]: 251 mSDtfsCounter, 195 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1411 SdHoareTripleChecker+Invalid, 102 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:38,872 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1411 Invalid, 102 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:38,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1322 states. [2025-03-16 19:04:38,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1322 to 1038. [2025-03-16 19:04:38,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 783 states have (on average 1.3831417624521072) internal successors, (1083), 788 states have internal predecessors, (1083), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:38,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1427 transitions. [2025-03-16 19:04:38,951 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1427 transitions. Word has length 78 [2025-03-16 19:04:38,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:38,951 INFO L471 AbstractCegarLoop]: Abstraction has 1038 states and 1427 transitions. [2025-03-16 19:04:38,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.142857142857142) internal successors, (57), 6 states have internal predecessors, (57), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-03-16 19:04:38,951 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1427 transitions. [2025-03-16 19:04:38,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2025-03-16 19:04:38,952 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:38,952 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:38,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-16 19:04:38,953 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:38,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:38,953 INFO L85 PathProgramCache]: Analyzing trace with hash 115731341, now seen corresponding path program 1 times [2025-03-16 19:04:38,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:38,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833084736] [2025-03-16 19:04:38,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:38,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:38,964 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-03-16 19:04:38,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-03-16 19:04:38,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:38,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,072 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-16 19:04:39,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:39,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833084736] [2025-03-16 19:04:39,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833084736] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:39,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:39,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:39,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443035843] [2025-03-16 19:04:39,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:39,073 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:39,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:39,074 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:39,074 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:39,074 INFO L87 Difference]: Start difference. First operand 1038 states and 1427 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:39,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:39,151 INFO L93 Difference]: Finished difference Result 1941 states and 2686 transitions. [2025-03-16 19:04:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:39,154 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 82 [2025-03-16 19:04:39,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:39,161 INFO L225 Difference]: With dead ends: 1941 [2025-03-16 19:04:39,161 INFO L226 Difference]: Without dead ends: 1062 [2025-03-16 19:04:39,163 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:39,164 INFO L435 NwaCegarLoop]: 249 mSDtfsCounter, 3 mSDsluCounter, 484 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 733 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:39,164 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 733 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:39,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1062 states. [2025-03-16 19:04:39,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1062 to 1062. [2025-03-16 19:04:39,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1062 states, 801 states have (on average 1.3745318352059925) internal successors, (1101), 806 states have internal predecessors, (1101), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-03-16 19:04:39,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1062 states to 1062 states and 1445 transitions. [2025-03-16 19:04:39,220 INFO L78 Accepts]: Start accepts. Automaton has 1062 states and 1445 transitions. Word has length 82 [2025-03-16 19:04:39,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:39,221 INFO L471 AbstractCegarLoop]: Abstraction has 1062 states and 1445 transitions. [2025-03-16 19:04:39,221 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:39,221 INFO L276 IsEmpty]: Start isEmpty. Operand 1062 states and 1445 transitions. [2025-03-16 19:04:39,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2025-03-16 19:04:39,222 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:39,222 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:39,222 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-16 19:04:39,222 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:39,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:39,223 INFO L85 PathProgramCache]: Analyzing trace with hash -589245355, now seen corresponding path program 1 times [2025-03-16 19:04:39,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:39,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127063482] [2025-03-16 19:04:39,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:39,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:39,231 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-16 19:04:39,242 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-16 19:04:39,242 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:39,242 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,511 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:39,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:39,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127063482] [2025-03-16 19:04:39,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127063482] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:39,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [548074253] [2025-03-16 19:04:39,511 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:39,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:39,512 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:39,514 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:39,515 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-16 19:04:39,588 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-16 19:04:39,634 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-16 19:04:39,635 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:39,635 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:39,641 INFO L256 TraceCheckSpWp]: Trace formula consists of 418 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-03-16 19:04:39,645 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:39,741 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:39,741 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-16 19:04:39,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [548074253] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:39,742 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-16 19:04:39,742 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-03-16 19:04:39,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210930447] [2025-03-16 19:04:39,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:39,742 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:39,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:39,743 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:39,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-03-16 19:04:39,747 INFO L87 Difference]: Start difference. First operand 1062 states and 1445 transitions. Second operand has 8 states, 7 states have (on average 8.142857142857142) internal successors, (57), 7 states have internal predecessors, (57), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:39,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:39,913 INFO L93 Difference]: Finished difference Result 2283 states and 3223 transitions. [2025-03-16 19:04:39,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 19:04:39,913 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 8.142857142857142) internal successors, (57), 7 states have internal predecessors, (57), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 81 [2025-03-16 19:04:39,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:39,920 INFO L225 Difference]: With dead ends: 2283 [2025-03-16 19:04:39,920 INFO L226 Difference]: Without dead ends: 1468 [2025-03-16 19:04:39,923 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-03-16 19:04:39,923 INFO L435 NwaCegarLoop]: 419 mSDtfsCounter, 130 mSDsluCounter, 2323 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 2742 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:39,924 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 2742 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:39,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1468 states. [2025-03-16 19:04:39,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1468 to 1070. [2025-03-16 19:04:39,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1070 states, 805 states have (on average 1.3652173913043477) internal successors, (1099), 812 states have internal predecessors, (1099), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-03-16 19:04:39,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1070 states to 1070 states and 1447 transitions. [2025-03-16 19:04:39,994 INFO L78 Accepts]: Start accepts. Automaton has 1070 states and 1447 transitions. Word has length 81 [2025-03-16 19:04:39,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:39,994 INFO L471 AbstractCegarLoop]: Abstraction has 1070 states and 1447 transitions. [2025-03-16 19:04:39,994 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 8.142857142857142) internal successors, (57), 7 states have internal predecessors, (57), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-03-16 19:04:39,994 INFO L276 IsEmpty]: Start isEmpty. Operand 1070 states and 1447 transitions. [2025-03-16 19:04:39,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-16 19:04:39,995 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:39,995 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:40,003 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2025-03-16 19:04:40,196 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2025-03-16 19:04:40,196 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:40,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:40,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1716107170, now seen corresponding path program 1 times [2025-03-16 19:04:40,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:40,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624910695] [2025-03-16 19:04:40,197 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:40,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:40,208 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-16 19:04:40,221 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-16 19:04:40,222 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:40,222 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:40,319 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-16 19:04:40,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:40,319 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624910695] [2025-03-16 19:04:40,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1624910695] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:40,323 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:40,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:40,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675909112] [2025-03-16 19:04:40,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:40,324 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:40,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:40,324 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:40,325 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:40,325 INFO L87 Difference]: Start difference. First operand 1070 states and 1447 transitions. Second operand has 7 states, 7 states have (on average 8.571428571428571) internal successors, (60), 6 states have internal predecessors, (60), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:40,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:40,498 INFO L93 Difference]: Finished difference Result 1930 states and 2612 transitions. [2025-03-16 19:04:40,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-16 19:04:40,499 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.571428571428571) internal successors, (60), 6 states have internal predecessors, (60), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 84 [2025-03-16 19:04:40,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:40,504 INFO L225 Difference]: With dead ends: 1930 [2025-03-16 19:04:40,504 INFO L226 Difference]: Without dead ends: 1101 [2025-03-16 19:04:40,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-16 19:04:40,507 INFO L435 NwaCegarLoop]: 249 mSDtfsCounter, 242 mSDsluCounter, 1181 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 243 SdHoareTripleChecker+Valid, 1430 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:40,507 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [243 Valid, 1430 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:40,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2025-03-16 19:04:40,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 1067. [2025-03-16 19:04:40,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1067 states, 813 states have (on average 1.3603936039360394) internal successors, (1106), 825 states have internal predecessors, (1106), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-03-16 19:04:40,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1067 states to 1067 states and 1430 transitions. [2025-03-16 19:04:40,562 INFO L78 Accepts]: Start accepts. Automaton has 1067 states and 1430 transitions. Word has length 84 [2025-03-16 19:04:40,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:40,562 INFO L471 AbstractCegarLoop]: Abstraction has 1067 states and 1430 transitions. [2025-03-16 19:04:40,562 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.571428571428571) internal successors, (60), 6 states have internal predecessors, (60), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-03-16 19:04:40,562 INFO L276 IsEmpty]: Start isEmpty. Operand 1067 states and 1430 transitions. [2025-03-16 19:04:40,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2025-03-16 19:04:40,564 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:40,564 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:40,564 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-16 19:04:40,564 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:40,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:40,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1447525900, now seen corresponding path program 1 times [2025-03-16 19:04:40,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:40,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112813710] [2025-03-16 19:04:40,565 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:40,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:40,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 86 statements into 1 equivalence classes. [2025-03-16 19:04:40,635 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 86 of 86 statements. [2025-03-16 19:04:40,636 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:40,636 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:40,959 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-16 19:04:40,959 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:40,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112813710] [2025-03-16 19:04:40,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2112813710] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:40,959 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:40,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:40,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008368573] [2025-03-16 19:04:40,960 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:40,960 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:40,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:40,960 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:40,961 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:40,961 INFO L87 Difference]: Start difference. First operand 1067 states and 1430 transitions. Second operand has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:41,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:41,140 INFO L93 Difference]: Finished difference Result 1911 states and 2567 transitions. [2025-03-16 19:04:41,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:41,140 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 86 [2025-03-16 19:04:41,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:41,145 INFO L225 Difference]: With dead ends: 1911 [2025-03-16 19:04:41,146 INFO L226 Difference]: Without dead ends: 1065 [2025-03-16 19:04:41,147 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-03-16 19:04:41,148 INFO L435 NwaCegarLoop]: 275 mSDtfsCounter, 148 mSDsluCounter, 1257 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 1532 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:41,148 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 1532 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:41,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1065 states. [2025-03-16 19:04:41,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1065 to 960. [2025-03-16 19:04:41,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 960 states, 733 states have (on average 1.3628922237380627) internal successors, (999), 743 states have internal predecessors, (999), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-03-16 19:04:41,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 960 states to 960 states and 1289 transitions. [2025-03-16 19:04:41,196 INFO L78 Accepts]: Start accepts. Automaton has 960 states and 1289 transitions. Word has length 86 [2025-03-16 19:04:41,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:41,197 INFO L471 AbstractCegarLoop]: Abstraction has 960 states and 1289 transitions. [2025-03-16 19:04:41,197 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 8.428571428571429) internal successors, (59), 6 states have internal predecessors, (59), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:41,197 INFO L276 IsEmpty]: Start isEmpty. Operand 960 states and 1289 transitions. [2025-03-16 19:04:41,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2025-03-16 19:04:41,198 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:41,198 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:41,198 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-16 19:04:41,198 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:41,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:41,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1407805000, now seen corresponding path program 1 times [2025-03-16 19:04:41,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:41,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846737481] [2025-03-16 19:04:41,199 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:41,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:41,207 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 87 statements into 1 equivalence classes. [2025-03-16 19:04:41,223 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 87 of 87 statements. [2025-03-16 19:04:41,223 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:41,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:41,601 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:41,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:41,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846737481] [2025-03-16 19:04:41,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1846737481] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:41,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:41,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 19:04:41,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506981615] [2025-03-16 19:04:41,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:41,603 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:41,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:41,604 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:41,604 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 19:04:41,604 INFO L87 Difference]: Start difference. First operand 960 states and 1289 transitions. Second operand has 8 states, 8 states have (on average 8.0) internal successors, (64), 7 states have internal predecessors, (64), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:42,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:42,025 INFO L93 Difference]: Finished difference Result 1858 states and 2486 transitions. [2025-03-16 19:04:42,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:42,026 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 7 states have internal predecessors, (64), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 87 [2025-03-16 19:04:42,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:42,030 INFO L225 Difference]: With dead ends: 1858 [2025-03-16 19:04:42,031 INFO L226 Difference]: Without dead ends: 1049 [2025-03-16 19:04:42,032 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:42,033 INFO L435 NwaCegarLoop]: 305 mSDtfsCounter, 547 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 183 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 553 SdHoareTripleChecker+Valid, 1394 SdHoareTripleChecker+Invalid, 238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 183 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:42,033 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [553 Valid, 1394 Invalid, 238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 183 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-16 19:04:42,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1049 states. [2025-03-16 19:04:42,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1049 to 998. [2025-03-16 19:04:42,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 998 states, 756 states have (on average 1.33994708994709) internal successors, (1013), 767 states have internal predecessors, (1013), 154 states have call successors, (154), 87 states have call predecessors, (154), 87 states have return successors, (154), 143 states have call predecessors, (154), 154 states have call successors, (154) [2025-03-16 19:04:42,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 998 states to 998 states and 1321 transitions. [2025-03-16 19:04:42,093 INFO L78 Accepts]: Start accepts. Automaton has 998 states and 1321 transitions. Word has length 87 [2025-03-16 19:04:42,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:42,093 INFO L471 AbstractCegarLoop]: Abstraction has 998 states and 1321 transitions. [2025-03-16 19:04:42,093 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.0) internal successors, (64), 7 states have internal predecessors, (64), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-03-16 19:04:42,093 INFO L276 IsEmpty]: Start isEmpty. Operand 998 states and 1321 transitions. [2025-03-16 19:04:42,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2025-03-16 19:04:42,094 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:42,094 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:42,094 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-16 19:04:42,094 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:42,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:42,095 INFO L85 PathProgramCache]: Analyzing trace with hash 1065373270, now seen corresponding path program 1 times [2025-03-16 19:04:42,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:42,095 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013167289] [2025-03-16 19:04:42,095 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:42,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:42,103 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-16 19:04:42,124 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-16 19:04:42,124 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:42,124 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:42,459 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-03-16 19:04:42,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:42,459 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013167289] [2025-03-16 19:04:42,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013167289] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:42,459 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:42,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-16 19:04:42,460 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705517936] [2025-03-16 19:04:42,460 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:42,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-16 19:04:42,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:42,460 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-16 19:04:42,460 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-16 19:04:42,460 INFO L87 Difference]: Start difference. First operand 998 states and 1321 transitions. Second operand has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:42,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:42,830 INFO L93 Difference]: Finished difference Result 1942 states and 2551 transitions. [2025-03-16 19:04:42,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-16 19:04:42,830 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) Word has length 89 [2025-03-16 19:04:42,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:42,836 INFO L225 Difference]: With dead ends: 1942 [2025-03-16 19:04:42,836 INFO L226 Difference]: Without dead ends: 1108 [2025-03-16 19:04:42,838 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:04:42,839 INFO L435 NwaCegarLoop]: 267 mSDtfsCounter, 405 mSDsluCounter, 1112 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 411 SdHoareTripleChecker+Valid, 1379 SdHoareTripleChecker+Invalid, 250 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:42,839 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [411 Valid, 1379 Invalid, 250 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 249 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-16 19:04:42,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2025-03-16 19:04:42,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1020. [2025-03-16 19:04:42,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 770 states have (on average 1.3233766233766233) internal successors, (1019), 782 states have internal predecessors, (1019), 157 states have call successors, (157), 92 states have call predecessors, (157), 92 states have return successors, (157), 145 states have call predecessors, (157), 157 states have call successors, (157) [2025-03-16 19:04:42,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1333 transitions. [2025-03-16 19:04:42,909 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1333 transitions. Word has length 89 [2025-03-16 19:04:42,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:42,909 INFO L471 AbstractCegarLoop]: Abstraction has 1020 states and 1333 transitions. [2025-03-16 19:04:42,909 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 8.25) internal successors, (66), 7 states have internal predecessors, (66), 4 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2025-03-16 19:04:42,909 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1333 transitions. [2025-03-16 19:04:42,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2025-03-16 19:04:42,910 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:42,910 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:42,911 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-16 19:04:42,911 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:42,911 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:42,911 INFO L85 PathProgramCache]: Analyzing trace with hash 1640388969, now seen corresponding path program 1 times [2025-03-16 19:04:42,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:42,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1927476545] [2025-03-16 19:04:42,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:42,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:42,920 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-03-16 19:04:42,929 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-03-16 19:04:42,929 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:42,929 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:42,977 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:42,977 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:42,977 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1927476545] [2025-03-16 19:04:42,977 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1927476545] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:42,977 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:42,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:42,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777911959] [2025-03-16 19:04:42,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:42,978 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:42,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:42,978 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:42,979 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:42,979 INFO L87 Difference]: Start difference. First operand 1020 states and 1333 transitions. Second operand has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:43,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:43,143 INFO L93 Difference]: Finished difference Result 2679 states and 3522 transitions. [2025-03-16 19:04:43,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:43,144 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 90 [2025-03-16 19:04:43,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:43,152 INFO L225 Difference]: With dead ends: 2679 [2025-03-16 19:04:43,152 INFO L226 Difference]: Without dead ends: 1901 [2025-03-16 19:04:43,154 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:43,157 INFO L435 NwaCegarLoop]: 440 mSDtfsCounter, 195 mSDsluCounter, 662 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:43,157 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [195 Valid, 1102 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:43,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1901 states. [2025-03-16 19:04:43,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1901 to 1728. [2025-03-16 19:04:43,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1728 states, 1290 states have (on average 1.321705426356589) internal successors, (1705), 1310 states have internal predecessors, (1705), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2025-03-16 19:04:43,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1728 states to 1728 states and 2265 transitions. [2025-03-16 19:04:43,270 INFO L78 Accepts]: Start accepts. Automaton has 1728 states and 2265 transitions. Word has length 90 [2025-03-16 19:04:43,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:43,270 INFO L471 AbstractCegarLoop]: Abstraction has 1728 states and 2265 transitions. [2025-03-16 19:04:43,270 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:43,270 INFO L276 IsEmpty]: Start isEmpty. Operand 1728 states and 2265 transitions. [2025-03-16 19:04:43,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-16 19:04:43,272 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:43,272 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:43,272 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-16 19:04:43,272 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:43,272 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:43,272 INFO L85 PathProgramCache]: Analyzing trace with hash -824297202, now seen corresponding path program 1 times [2025-03-16 19:04:43,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:43,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039413361] [2025-03-16 19:04:43,272 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:43,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:43,281 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-16 19:04:43,289 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-16 19:04:43,290 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:43,290 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:43,340 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:43,341 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:43,341 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1039413361] [2025-03-16 19:04:43,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1039413361] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:43,341 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:43,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:43,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116914642] [2025-03-16 19:04:43,341 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:43,341 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:43,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:43,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:43,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:43,342 INFO L87 Difference]: Start difference. First operand 1728 states and 2265 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:43,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:43,547 INFO L93 Difference]: Finished difference Result 4406 states and 5803 transitions. [2025-03-16 19:04:43,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:43,549 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 92 [2025-03-16 19:04:43,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:43,563 INFO L225 Difference]: With dead ends: 4406 [2025-03-16 19:04:43,563 INFO L226 Difference]: Without dead ends: 2988 [2025-03-16 19:04:43,568 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:43,569 INFO L435 NwaCegarLoop]: 456 mSDtfsCounter, 202 mSDsluCounter, 684 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 1140 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:43,569 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 1140 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:43,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2988 states. [2025-03-16 19:04:43,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2988 to 2729. [2025-03-16 19:04:43,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2729 states, 2016 states have (on average 1.3095238095238095) internal successors, (2640), 2047 states have internal predecessors, (2640), 460 states have call successors, (460), 252 states have call predecessors, (460), 252 states have return successors, (460), 429 states have call predecessors, (460), 460 states have call successors, (460) [2025-03-16 19:04:43,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2729 states to 2729 states and 3560 transitions. [2025-03-16 19:04:43,760 INFO L78 Accepts]: Start accepts. Automaton has 2729 states and 3560 transitions. Word has length 92 [2025-03-16 19:04:43,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:43,760 INFO L471 AbstractCegarLoop]: Abstraction has 2729 states and 3560 transitions. [2025-03-16 19:04:43,760 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:43,760 INFO L276 IsEmpty]: Start isEmpty. Operand 2729 states and 3560 transitions. [2025-03-16 19:04:43,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-03-16 19:04:43,762 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:43,762 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:43,762 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-16 19:04:43,762 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:43,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:43,763 INFO L85 PathProgramCache]: Analyzing trace with hash -1062670234, now seen corresponding path program 1 times [2025-03-16 19:04:43,763 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:43,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605532120] [2025-03-16 19:04:43,763 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:43,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:43,774 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-03-16 19:04:43,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-03-16 19:04:43,786 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:43,786 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:43,851 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:43,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:43,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605532120] [2025-03-16 19:04:43,852 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605532120] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:43,852 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:43,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:43,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179393468] [2025-03-16 19:04:43,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:43,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:43,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:43,853 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:43,853 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:43,853 INFO L87 Difference]: Start difference. First operand 2729 states and 3560 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:44,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:44,133 INFO L93 Difference]: Finished difference Result 6402 states and 8383 transitions. [2025-03-16 19:04:44,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-16 19:04:44,134 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 92 [2025-03-16 19:04:44,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:44,153 INFO L225 Difference]: With dead ends: 6402 [2025-03-16 19:04:44,154 INFO L226 Difference]: Without dead ends: 4095 [2025-03-16 19:04:44,161 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:44,163 INFO L435 NwaCegarLoop]: 467 mSDtfsCounter, 196 mSDsluCounter, 687 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 1154 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:44,163 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 1154 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:44,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4095 states. [2025-03-16 19:04:44,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4095 to 3920. [2025-03-16 19:04:44,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3920 states, 2883 states have (on average 1.3048907388137356) internal successors, (3762), 2927 states have internal predecessors, (3762), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2025-03-16 19:04:44,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3920 states to 3920 states and 5106 transitions. [2025-03-16 19:04:44,425 INFO L78 Accepts]: Start accepts. Automaton has 3920 states and 5106 transitions. Word has length 92 [2025-03-16 19:04:44,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:44,426 INFO L471 AbstractCegarLoop]: Abstraction has 3920 states and 5106 transitions. [2025-03-16 19:04:44,426 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 4 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:44,426 INFO L276 IsEmpty]: Start isEmpty. Operand 3920 states and 5106 transitions. [2025-03-16 19:04:44,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-03-16 19:04:44,428 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:44,428 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:44,428 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-16 19:04:44,428 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:44,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:44,429 INFO L85 PathProgramCache]: Analyzing trace with hash -271097397, now seen corresponding path program 1 times [2025-03-16 19:04:44,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:44,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054727308] [2025-03-16 19:04:44,429 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:44,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:44,440 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-03-16 19:04:44,445 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-03-16 19:04:44,445 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:44,445 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:44,469 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:44,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:44,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054727308] [2025-03-16 19:04:44,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2054727308] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:44,470 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:44,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-16 19:04:44,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504771795] [2025-03-16 19:04:44,470 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:44,470 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-16 19:04:44,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:44,470 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-16 19:04:44,470 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:44,471 INFO L87 Difference]: Start difference. First operand 3920 states and 5106 transitions. Second operand has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:44,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:44,716 INFO L93 Difference]: Finished difference Result 7550 states and 9874 transitions. [2025-03-16 19:04:44,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-16 19:04:44,717 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 93 [2025-03-16 19:04:44,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:44,737 INFO L225 Difference]: With dead ends: 7550 [2025-03-16 19:04:44,738 INFO L226 Difference]: Without dead ends: 3953 [2025-03-16 19:04:44,746 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-16 19:04:44,747 INFO L435 NwaCegarLoop]: 250 mSDtfsCounter, 6 mSDsluCounter, 218 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 468 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:44,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 468 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:44,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3953 states. [2025-03-16 19:04:44,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3953 to 3926. [2025-03-16 19:04:44,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3926 states, 2889 states have (on average 1.304257528556594) internal successors, (3768), 2933 states have internal predecessors, (3768), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2025-03-16 19:04:44,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3926 states to 3926 states and 5112 transitions. [2025-03-16 19:04:45,001 INFO L78 Accepts]: Start accepts. Automaton has 3926 states and 5112 transitions. Word has length 93 [2025-03-16 19:04:45,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:45,002 INFO L471 AbstractCegarLoop]: Abstraction has 3926 states and 5112 transitions. [2025-03-16 19:04:45,002 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:45,003 INFO L276 IsEmpty]: Start isEmpty. Operand 3926 states and 5112 transitions. [2025-03-16 19:04:45,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-03-16 19:04:45,004 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:45,004 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:45,005 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-16 19:04:45,005 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:45,005 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:45,005 INFO L85 PathProgramCache]: Analyzing trace with hash -1277329465, now seen corresponding path program 1 times [2025-03-16 19:04:45,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:45,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246257280] [2025-03-16 19:04:45,005 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:45,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:45,013 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-03-16 19:04:45,025 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-03-16 19:04:45,027 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:45,028 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:45,097 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:45,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:45,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246257280] [2025-03-16 19:04:45,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1246257280] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:45,097 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:45,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:45,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241861356] [2025-03-16 19:04:45,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:45,098 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:45,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:45,098 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:45,098 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:45,098 INFO L87 Difference]: Start difference. First operand 3926 states and 5112 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:45,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:45,346 INFO L93 Difference]: Finished difference Result 7515 states and 9801 transitions. [2025-03-16 19:04:45,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:45,347 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 94 [2025-03-16 19:04:45,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:45,367 INFO L225 Difference]: With dead ends: 7515 [2025-03-16 19:04:45,367 INFO L226 Difference]: Without dead ends: 3652 [2025-03-16 19:04:45,376 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:45,376 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 75 mSDsluCounter, 459 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 713 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:45,376 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 713 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:45,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3652 states. [2025-03-16 19:04:45,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3652 to 3589. [2025-03-16 19:04:45,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3589 states, 2635 states have (on average 1.3123339658444022) internal successors, (3458), 2669 states have internal predecessors, (3458), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2025-03-16 19:04:45,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3589 states to 3589 states and 4698 transitions. [2025-03-16 19:04:45,703 INFO L78 Accepts]: Start accepts. Automaton has 3589 states and 4698 transitions. Word has length 94 [2025-03-16 19:04:45,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:45,704 INFO L471 AbstractCegarLoop]: Abstraction has 3589 states and 4698 transitions. [2025-03-16 19:04:45,704 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 4 states have internal predecessors, (70), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:45,705 INFO L276 IsEmpty]: Start isEmpty. Operand 3589 states and 4698 transitions. [2025-03-16 19:04:45,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-03-16 19:04:45,706 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:45,706 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:45,706 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-16 19:04:45,707 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:45,707 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:45,707 INFO L85 PathProgramCache]: Analyzing trace with hash -1154905600, now seen corresponding path program 1 times [2025-03-16 19:04:45,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:45,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319699598] [2025-03-16 19:04:45,707 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:45,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:45,719 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-03-16 19:04:45,732 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-03-16 19:04:45,732 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:45,732 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:45,826 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-16 19:04:45,827 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:45,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319699598] [2025-03-16 19:04:45,827 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319699598] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:45,827 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:45,827 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-16 19:04:45,827 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [113426276] [2025-03-16 19:04:45,827 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:45,828 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-16 19:04:45,828 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:45,828 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-16 19:04:45,828 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-16 19:04:45,828 INFO L87 Difference]: Start difference. First operand 3589 states and 4698 transitions. Second operand has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:46,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:46,038 INFO L93 Difference]: Finished difference Result 6999 states and 9177 transitions. [2025-03-16 19:04:46,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-16 19:04:46,039 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 95 [2025-03-16 19:04:46,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:46,052 INFO L225 Difference]: With dead ends: 6999 [2025-03-16 19:04:46,053 INFO L226 Difference]: Without dead ends: 3515 [2025-03-16 19:04:46,060 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-16 19:04:46,061 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 57 mSDsluCounter, 464 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 723 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:46,061 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 723 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-16 19:04:46,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3515 states. [2025-03-16 19:04:46,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3515 to 2700. [2025-03-16 19:04:46,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2700 states, 1980 states have (on average 1.3045454545454545) internal successors, (2583), 1999 states have internal predecessors, (2583), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2025-03-16 19:04:46,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2700 states to 2700 states and 3521 transitions. [2025-03-16 19:04:46,240 INFO L78 Accepts]: Start accepts. Automaton has 2700 states and 3521 transitions. Word has length 95 [2025-03-16 19:04:46,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:46,240 INFO L471 AbstractCegarLoop]: Abstraction has 2700 states and 3521 transitions. [2025-03-16 19:04:46,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-03-16 19:04:46,240 INFO L276 IsEmpty]: Start isEmpty. Operand 2700 states and 3521 transitions. [2025-03-16 19:04:46,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2025-03-16 19:04:46,243 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:46,244 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:46,244 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-16 19:04:46,244 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:46,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:46,244 INFO L85 PathProgramCache]: Analyzing trace with hash 417095039, now seen corresponding path program 1 times [2025-03-16 19:04:46,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:46,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558072716] [2025-03-16 19:04:46,245 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:46,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:46,256 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 139 statements into 1 equivalence classes. [2025-03-16 19:04:46,283 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 139 of 139 statements. [2025-03-16 19:04:46,283 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:46,283 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:46,491 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 8 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:04:46,491 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:46,491 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558072716] [2025-03-16 19:04:46,491 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1558072716] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:46,491 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2139279056] [2025-03-16 19:04:46,492 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:46,492 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:46,492 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:46,494 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:46,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-03-16 19:04:46,583 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 139 statements into 1 equivalence classes. [2025-03-16 19:04:46,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 139 of 139 statements. [2025-03-16 19:04:46,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:46,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:46,647 INFO L256 TraceCheckSpWp]: Trace formula consists of 649 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-03-16 19:04:46,650 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:46,858 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:04:46,858 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:04:47,101 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 7 proven. 15 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:04:47,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2139279056] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:04:47,101 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:04:47,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 11, 8] total 22 [2025-03-16 19:04:47,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712588804] [2025-03-16 19:04:47,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:04:47,102 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2025-03-16 19:04:47,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:47,103 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-16 19:04:47,103 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=401, Unknown=0, NotChecked=0, Total=462 [2025-03-16 19:04:47,103 INFO L87 Difference]: Start difference. First operand 2700 states and 3521 transitions. Second operand has 22 states, 22 states have (on average 9.909090909090908) internal successors, (218), 20 states have internal predecessors, (218), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2025-03-16 19:04:50,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:50,425 INFO L93 Difference]: Finished difference Result 11224 states and 14575 transitions. [2025-03-16 19:04:50,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2025-03-16 19:04:50,425 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 9.909090909090908) internal successors, (218), 20 states have internal predecessors, (218), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) Word has length 139 [2025-03-16 19:04:50,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:50,452 INFO L225 Difference]: With dead ends: 11224 [2025-03-16 19:04:50,453 INFO L226 Difference]: Without dead ends: 8779 [2025-03-16 19:04:50,460 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 288 SyntacticMatches, 0 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1846 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1180, Invalid=5300, Unknown=0, NotChecked=0, Total=6480 [2025-03-16 19:04:50,460 INFO L435 NwaCegarLoop]: 348 mSDtfsCounter, 4416 mSDsluCounter, 3705 mSDsCounter, 0 mSdLazyCounter, 1710 mSolverCounterSat, 1743 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4416 SdHoareTripleChecker+Valid, 4053 SdHoareTripleChecker+Invalid, 3453 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1743 IncrementalHoareTripleChecker+Valid, 1710 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:50,462 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4416 Valid, 4053 Invalid, 3453 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1743 Valid, 1710 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2025-03-16 19:04:50,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8779 states. [2025-03-16 19:04:50,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8779 to 7299. [2025-03-16 19:04:50,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7299 states, 5342 states have (on average 1.2967053538000748) internal successors, (6927), 5394 states have internal predecessors, (6927), 1259 states have call successors, (1259), 697 states have call predecessors, (1259), 697 states have return successors, (1259), 1207 states have call predecessors, (1259), 1259 states have call successors, (1259) [2025-03-16 19:04:50,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7299 states to 7299 states and 9445 transitions. [2025-03-16 19:04:50,982 INFO L78 Accepts]: Start accepts. Automaton has 7299 states and 9445 transitions. Word has length 139 [2025-03-16 19:04:50,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:50,982 INFO L471 AbstractCegarLoop]: Abstraction has 7299 states and 9445 transitions. [2025-03-16 19:04:50,983 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 9.909090909090908) internal successors, (218), 20 states have internal predecessors, (218), 9 states have call successors, (41), 4 states have call predecessors, (41), 7 states have return successors, (40), 11 states have call predecessors, (40), 9 states have call successors, (40) [2025-03-16 19:04:50,983 INFO L276 IsEmpty]: Start isEmpty. Operand 7299 states and 9445 transitions. [2025-03-16 19:04:50,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2025-03-16 19:04:50,992 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:50,992 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:51,000 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-03-16 19:04:51,198 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2025-03-16 19:04:51,199 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:51,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:51,199 INFO L85 PathProgramCache]: Analyzing trace with hash -588891710, now seen corresponding path program 1 times [2025-03-16 19:04:51,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:51,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442385097] [2025-03-16 19:04:51,200 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:51,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:51,211 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-16 19:04:51,224 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-16 19:04:51,224 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:51,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:51,317 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2025-03-16 19:04:51,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:51,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442385097] [2025-03-16 19:04:51,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [442385097] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:51,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-16 19:04:51,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-16 19:04:51,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120488445] [2025-03-16 19:04:51,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:51,319 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-16 19:04:51,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:51,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-16 19:04:51,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-16 19:04:51,319 INFO L87 Difference]: Start difference. First operand 7299 states and 9445 transitions. Second operand has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 6 states have internal predecessors, (83), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2025-03-16 19:04:52,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:52,365 INFO L93 Difference]: Finished difference Result 21201 states and 27535 transitions. [2025-03-16 19:04:52,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-16 19:04:52,365 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 6 states have internal predecessors, (83), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 142 [2025-03-16 19:04:52,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:52,419 INFO L225 Difference]: With dead ends: 21201 [2025-03-16 19:04:52,419 INFO L226 Difference]: Without dead ends: 14366 [2025-03-16 19:04:52,436 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-03-16 19:04:52,436 INFO L435 NwaCegarLoop]: 388 mSDtfsCounter, 217 mSDsluCounter, 1704 mSDsCounter, 0 mSdLazyCounter, 121 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 2092 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 121 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:52,436 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [222 Valid, 2092 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 121 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:04:52,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14366 states. [2025-03-16 19:04:53,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14366 to 12130. [2025-03-16 19:04:53,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12130 states, 8809 states have (on average 1.2960608468611647) internal successors, (11417), 8899 states have internal predecessors, (11417), 2161 states have call successors, (2161), 1159 states have call predecessors, (2161), 1159 states have return successors, (2161), 2071 states have call predecessors, (2161), 2161 states have call successors, (2161) [2025-03-16 19:04:53,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12130 states to 12130 states and 15739 transitions. [2025-03-16 19:04:53,308 INFO L78 Accepts]: Start accepts. Automaton has 12130 states and 15739 transitions. Word has length 142 [2025-03-16 19:04:53,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:53,309 INFO L471 AbstractCegarLoop]: Abstraction has 12130 states and 15739 transitions. [2025-03-16 19:04:53,309 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 6 states have internal predecessors, (83), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2025-03-16 19:04:53,310 INFO L276 IsEmpty]: Start isEmpty. Operand 12130 states and 15739 transitions. [2025-03-16 19:04:53,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2025-03-16 19:04:53,326 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:53,326 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:53,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-16 19:04:53,327 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:53,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:53,327 INFO L85 PathProgramCache]: Analyzing trace with hash 353326768, now seen corresponding path program 1 times [2025-03-16 19:04:53,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:53,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436522769] [2025-03-16 19:04:53,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:53,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:53,340 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-16 19:04:53,392 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-16 19:04:53,393 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:53,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:53,926 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 19 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2025-03-16 19:04:53,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:53,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436522769] [2025-03-16 19:04:53,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1436522769] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:53,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2027470072] [2025-03-16 19:04:53,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:53,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:53,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:53,929 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:53,931 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-03-16 19:04:54,012 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-16 19:04:54,072 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-16 19:04:54,073 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:54,073 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:54,076 INFO L256 TraceCheckSpWp]: Trace formula consists of 683 conjuncts, 29 conjuncts are in the unsatisfiable core [2025-03-16 19:04:54,080 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:54,224 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 61 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-03-16 19:04:54,225 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-16 19:04:54,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2027470072] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-16 19:04:54,225 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-16 19:04:54,225 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [8] total 15 [2025-03-16 19:04:54,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621409221] [2025-03-16 19:04:54,226 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-16 19:04:54,226 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-16 19:04:54,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:54,226 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-16 19:04:54,226 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2025-03-16 19:04:54,227 INFO L87 Difference]: Start difference. First operand 12130 states and 15739 transitions. Second operand has 9 states, 8 states have (on average 12.875) internal successors, (103), 9 states have internal predecessors, (103), 4 states have call successors, (15), 3 states have call predecessors, (15), 5 states have return successors, (14), 3 states have call predecessors, (14), 4 states have call successors, (14) [2025-03-16 19:04:55,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:04:55,324 INFO L93 Difference]: Finished difference Result 20851 states and 27106 transitions. [2025-03-16 19:04:55,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 19:04:55,326 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 12.875) internal successors, (103), 9 states have internal predecessors, (103), 4 states have call successors, (15), 3 states have call predecessors, (15), 5 states have return successors, (14), 3 states have call predecessors, (14), 4 states have call successors, (14) Word has length 142 [2025-03-16 19:04:55,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:04:55,367 INFO L225 Difference]: With dead ends: 20851 [2025-03-16 19:04:55,367 INFO L226 Difference]: Without dead ends: 8845 [2025-03-16 19:04:55,392 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2025-03-16 19:04:55,392 INFO L435 NwaCegarLoop]: 236 mSDtfsCounter, 238 mSDsluCounter, 1215 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 241 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 298 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-16 19:04:55,393 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [241 Valid, 1451 Invalid, 298 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-16 19:04:55,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8845 states. [2025-03-16 19:04:56,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8845 to 7377. [2025-03-16 19:04:56,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7377 states, 5376 states have (on average 1.2972470238095237) internal successors, (6974), 5425 states have internal predecessors, (6974), 1305 states have call successors, (1305), 695 states have call predecessors, (1305), 695 states have return successors, (1305), 1256 states have call predecessors, (1305), 1305 states have call successors, (1305) [2025-03-16 19:04:56,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7377 states to 7377 states and 9584 transitions. [2025-03-16 19:04:56,337 INFO L78 Accepts]: Start accepts. Automaton has 7377 states and 9584 transitions. Word has length 142 [2025-03-16 19:04:56,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:04:56,337 INFO L471 AbstractCegarLoop]: Abstraction has 7377 states and 9584 transitions. [2025-03-16 19:04:56,338 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 12.875) internal successors, (103), 9 states have internal predecessors, (103), 4 states have call successors, (15), 3 states have call predecessors, (15), 5 states have return successors, (14), 3 states have call predecessors, (14), 4 states have call successors, (14) [2025-03-16 19:04:56,338 INFO L276 IsEmpty]: Start isEmpty. Operand 7377 states and 9584 transitions. [2025-03-16 19:04:56,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2025-03-16 19:04:56,347 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:04:56,347 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:04:56,355 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-03-16 19:04:56,548 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:56,548 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:04:56,549 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:04:56,549 INFO L85 PathProgramCache]: Analyzing trace with hash 1436264086, now seen corresponding path program 1 times [2025-03-16 19:04:56,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:04:56,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638195173] [2025-03-16 19:04:56,549 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:56,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:04:56,564 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-16 19:04:56,629 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-16 19:04:56,630 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:56,630 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:57,343 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 20 proven. 3 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:04:57,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:04:57,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638195173] [2025-03-16 19:04:57,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [638195173] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:04:57,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2139107298] [2025-03-16 19:04:57,344 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:04:57,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:04:57,344 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:04:57,346 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:04:57,348 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-03-16 19:04:57,429 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-16 19:04:57,490 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-16 19:04:57,490 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:04:57,490 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:04:57,493 INFO L256 TraceCheckSpWp]: Trace formula consists of 700 conjuncts, 39 conjuncts are in the unsatisfiable core [2025-03-16 19:04:57,499 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:04:57,868 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 59 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:04:57,868 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:04:58,419 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 20 proven. 3 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:04:58,419 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2139107298] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:04:58,419 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:04:58,419 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 9] total 25 [2025-03-16 19:04:58,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329063264] [2025-03-16 19:04:58,420 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:04:58,421 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2025-03-16 19:04:58,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:04:58,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-16 19:04:58,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=499, Unknown=0, NotChecked=0, Total=600 [2025-03-16 19:04:58,422 INFO L87 Difference]: Start difference. First operand 7377 states and 9584 transitions. Second operand has 25 states, 25 states have (on average 7.88) internal successors, (197), 25 states have internal predecessors, (197), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2025-03-16 19:05:00,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:00,134 INFO L93 Difference]: Finished difference Result 15158 states and 19743 transitions. [2025-03-16 19:05:00,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-16 19:05:00,134 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 7.88) internal successors, (197), 25 states have internal predecessors, (197), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) Word has length 143 [2025-03-16 19:05:00,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:00,164 INFO L225 Difference]: With dead ends: 15158 [2025-03-16 19:05:00,164 INFO L226 Difference]: Without dead ends: 8068 [2025-03-16 19:05:00,174 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 314 GetRequests, 276 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=285, Invalid=1197, Unknown=0, NotChecked=0, Total=1482 [2025-03-16 19:05:00,175 INFO L435 NwaCegarLoop]: 423 mSDtfsCounter, 878 mSDsluCounter, 3112 mSDsCounter, 0 mSdLazyCounter, 1636 mSolverCounterSat, 300 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 878 SdHoareTripleChecker+Valid, 3535 SdHoareTripleChecker+Invalid, 1936 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 300 IncrementalHoareTripleChecker+Valid, 1636 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:00,175 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [878 Valid, 3535 Invalid, 1936 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [300 Valid, 1636 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-16 19:05:00,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8068 states. [2025-03-16 19:05:00,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8068 to 7929. [2025-03-16 19:05:00,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7929 states, 5776 states have (on average 1.2962257617728532) internal successors, (7487), 5830 states have internal predecessors, (7487), 1403 states have call successors, (1403), 749 states have call predecessors, (1403), 749 states have return successors, (1403), 1349 states have call predecessors, (1403), 1403 states have call successors, (1403) [2025-03-16 19:05:00,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7929 states to 7929 states and 10293 transitions. [2025-03-16 19:05:00,781 INFO L78 Accepts]: Start accepts. Automaton has 7929 states and 10293 transitions. Word has length 143 [2025-03-16 19:05:00,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:00,781 INFO L471 AbstractCegarLoop]: Abstraction has 7929 states and 10293 transitions. [2025-03-16 19:05:00,781 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 7.88) internal successors, (197), 25 states have internal predecessors, (197), 8 states have call successors, (30), 5 states have call predecessors, (30), 6 states have return successors, (29), 8 states have call predecessors, (29), 8 states have call successors, (29) [2025-03-16 19:05:00,781 INFO L276 IsEmpty]: Start isEmpty. Operand 7929 states and 10293 transitions. [2025-03-16 19:05:00,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2025-03-16 19:05:00,788 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:00,788 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:00,795 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2025-03-16 19:05:00,988 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2025-03-16 19:05:00,988 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:00,989 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:00,989 INFO L85 PathProgramCache]: Analyzing trace with hash 367267460, now seen corresponding path program 1 times [2025-03-16 19:05:00,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:00,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1396655360] [2025-03-16 19:05:00,989 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:00,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:00,999 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-16 19:05:01,022 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-16 19:05:01,023 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:01,023 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:01,496 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 21 proven. 2 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:05:01,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:05:01,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1396655360] [2025-03-16 19:05:01,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1396655360] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:05:01,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [781856725] [2025-03-16 19:05:01,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:01,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:01,497 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:05:01,503 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:05:01,504 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-16 19:05:01,586 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-16 19:05:01,646 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-16 19:05:01,646 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:01,646 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:01,649 INFO L256 TraceCheckSpWp]: Trace formula consists of 685 conjuncts, 66 conjuncts are in the unsatisfiable core [2025-03-16 19:05:01,654 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:05:02,116 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 60 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:05:02,117 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:05:02,826 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:05:02,826 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [781856725] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:05:02,826 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:05:02,826 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 18] total 35 [2025-03-16 19:05:02,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63519049] [2025-03-16 19:05:02,826 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:05:02,826 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2025-03-16 19:05:02,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:05:02,827 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-03-16 19:05:02,827 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=1045, Unknown=0, NotChecked=0, Total=1190 [2025-03-16 19:05:02,827 INFO L87 Difference]: Start difference. First operand 7929 states and 10293 transitions. Second operand has 35 states, 35 states have (on average 6.3428571428571425) internal successors, (222), 34 states have internal predecessors, (222), 11 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 12 states have call predecessors, (41), 11 states have call successors, (41) [2025-03-16 19:05:08,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:08,578 INFO L93 Difference]: Finished difference Result 18602 states and 24296 transitions. [2025-03-16 19:05:08,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2025-03-16 19:05:08,579 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 6.3428571428571425) internal successors, (222), 34 states have internal predecessors, (222), 11 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 12 states have call predecessors, (41), 11 states have call successors, (41) Word has length 144 [2025-03-16 19:05:08,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:08,619 INFO L225 Difference]: With dead ends: 18602 [2025-03-16 19:05:08,619 INFO L226 Difference]: Without dead ends: 10960 [2025-03-16 19:05:08,633 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 382 GetRequests, 281 SyntacticMatches, 0 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3017 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1309, Invalid=9197, Unknown=0, NotChecked=0, Total=10506 [2025-03-16 19:05:08,634 INFO L435 NwaCegarLoop]: 637 mSDtfsCounter, 2222 mSDsluCounter, 9603 mSDsCounter, 0 mSdLazyCounter, 4766 mSolverCounterSat, 771 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2222 SdHoareTripleChecker+Valid, 10240 SdHoareTripleChecker+Invalid, 5537 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 771 IncrementalHoareTripleChecker+Valid, 4766 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:08,635 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2222 Valid, 10240 Invalid, 5537 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [771 Valid, 4766 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2025-03-16 19:05:08,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10960 states. [2025-03-16 19:05:09,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10960 to 9358. [2025-03-16 19:05:09,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9358 states, 6825 states have (on average 1.2953846153846154) internal successors, (8841), 6889 states have internal predecessors, (8841), 1646 states have call successors, (1646), 886 states have call predecessors, (1646), 886 states have return successors, (1646), 1582 states have call predecessors, (1646), 1646 states have call successors, (1646) [2025-03-16 19:05:09,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9358 states to 9358 states and 12133 transitions. [2025-03-16 19:05:09,680 INFO L78 Accepts]: Start accepts. Automaton has 9358 states and 12133 transitions. Word has length 144 [2025-03-16 19:05:09,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:09,681 INFO L471 AbstractCegarLoop]: Abstraction has 9358 states and 12133 transitions. [2025-03-16 19:05:09,681 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 6.3428571428571425) internal successors, (222), 34 states have internal predecessors, (222), 11 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 12 states have call predecessors, (41), 11 states have call successors, (41) [2025-03-16 19:05:09,681 INFO L276 IsEmpty]: Start isEmpty. Operand 9358 states and 12133 transitions. [2025-03-16 19:05:09,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2025-03-16 19:05:09,688 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:09,688 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:09,696 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-03-16 19:05:09,889 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:09,889 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:09,889 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:09,890 INFO L85 PathProgramCache]: Analyzing trace with hash -669031918, now seen corresponding path program 1 times [2025-03-16 19:05:09,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:09,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10486404] [2025-03-16 19:05:09,890 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:09,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:09,900 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-16 19:05:09,938 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-16 19:05:09,938 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:09,938 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:10,805 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 13 proven. 10 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:05:10,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:05:10,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10486404] [2025-03-16 19:05:10,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10486404] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:05:10,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [380371384] [2025-03-16 19:05:10,805 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:10,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:10,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:05:10,807 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:05:10,809 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-16 19:05:10,892 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-16 19:05:10,950 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-16 19:05:10,950 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:10,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:10,953 INFO L256 TraceCheckSpWp]: Trace formula consists of 701 conjuncts, 47 conjuncts are in the unsatisfiable core [2025-03-16 19:05:10,957 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:05:11,455 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 57 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-16 19:05:11,456 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:05:12,447 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2025-03-16 19:05:12,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [380371384] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:05:12,447 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:05:12,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 16] total 40 [2025-03-16 19:05:12,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755109799] [2025-03-16 19:05:12,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:05:12,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2025-03-16 19:05:12,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:05:12,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2025-03-16 19:05:12,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=1379, Unknown=0, NotChecked=0, Total=1560 [2025-03-16 19:05:12,449 INFO L87 Difference]: Start difference. First operand 9358 states and 12133 transitions. Second operand has 40 states, 40 states have (on average 6.075) internal successors, (243), 39 states have internal predecessors, (243), 12 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 13 states have call predecessors, (41), 12 states have call successors, (41) [2025-03-16 19:05:22,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:22,511 INFO L93 Difference]: Finished difference Result 24794 states and 32408 transitions. [2025-03-16 19:05:22,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 157 states. [2025-03-16 19:05:22,512 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 40 states have (on average 6.075) internal successors, (243), 39 states have internal predecessors, (243), 12 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 13 states have call predecessors, (41), 12 states have call successors, (41) Word has length 144 [2025-03-16 19:05:22,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:22,569 INFO L225 Difference]: With dead ends: 24794 [2025-03-16 19:05:22,569 INFO L226 Difference]: Without dead ends: 15880 [2025-03-16 19:05:22,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 483 GetRequests, 291 SyntacticMatches, 0 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13999 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=4715, Invalid=32727, Unknown=0, NotChecked=0, Total=37442 [2025-03-16 19:05:22,595 INFO L435 NwaCegarLoop]: 818 mSDtfsCounter, 6352 mSDsluCounter, 9728 mSDsCounter, 0 mSdLazyCounter, 5966 mSolverCounterSat, 2307 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6352 SdHoareTripleChecker+Valid, 10546 SdHoareTripleChecker+Invalid, 8273 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2307 IncrementalHoareTripleChecker+Valid, 5966 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:22,595 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6352 Valid, 10546 Invalid, 8273 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2307 Valid, 5966 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2025-03-16 19:05:22,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15880 states. [2025-03-16 19:05:23,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15880 to 10404. [2025-03-16 19:05:23,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10404 states, 7595 states have (on average 1.2947992100065833) internal successors, (9834), 7667 states have internal predecessors, (9834), 1823 states have call successors, (1823), 985 states have call predecessors, (1823), 985 states have return successors, (1823), 1751 states have call predecessors, (1823), 1823 states have call successors, (1823) [2025-03-16 19:05:23,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10404 states to 10404 states and 13480 transitions. [2025-03-16 19:05:23,962 INFO L78 Accepts]: Start accepts. Automaton has 10404 states and 13480 transitions. Word has length 144 [2025-03-16 19:05:23,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:23,962 INFO L471 AbstractCegarLoop]: Abstraction has 10404 states and 13480 transitions. [2025-03-16 19:05:23,962 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 6.075) internal successors, (243), 39 states have internal predecessors, (243), 12 states have call successors, (42), 5 states have call predecessors, (42), 7 states have return successors, (41), 13 states have call predecessors, (41), 12 states have call successors, (41) [2025-03-16 19:05:23,962 INFO L276 IsEmpty]: Start isEmpty. Operand 10404 states and 13480 transitions. [2025-03-16 19:05:23,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2025-03-16 19:05:23,968 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:23,968 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:23,976 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-03-16 19:05:24,169 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:24,169 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:24,169 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:24,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1030265497, now seen corresponding path program 1 times [2025-03-16 19:05:24,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:24,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84250527] [2025-03-16 19:05:24,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:24,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:24,180 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-16 19:05:24,210 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-16 19:05:24,210 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:24,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:24,677 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 21 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2025-03-16 19:05:24,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:05:24,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84250527] [2025-03-16 19:05:24,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84250527] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:05:24,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [363467379] [2025-03-16 19:05:24,678 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:24,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:24,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:05:24,680 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:05:24,681 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-16 19:05:24,776 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-16 19:05:24,836 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-16 19:05:24,836 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:24,836 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:24,839 INFO L256 TraceCheckSpWp]: Trace formula consists of 687 conjuncts, 28 conjuncts are in the unsatisfiable core [2025-03-16 19:05:24,842 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:05:24,960 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 59 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-03-16 19:05:24,960 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:05:25,113 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2025-03-16 19:05:25,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [363467379] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:05:25,113 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:05:25,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 9] total 21 [2025-03-16 19:05:25,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068976752] [2025-03-16 19:05:25,113 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:05:25,113 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2025-03-16 19:05:25,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:05:25,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-03-16 19:05:25,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2025-03-16 19:05:25,114 INFO L87 Difference]: Start difference. First operand 10404 states and 13480 transitions. Second operand has 21 states, 21 states have (on average 7.285714285714286) internal successors, (153), 16 states have internal predecessors, (153), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) [2025-03-16 19:05:28,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:28,141 INFO L93 Difference]: Finished difference Result 27851 states and 35961 transitions. [2025-03-16 19:05:28,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-16 19:05:28,141 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 7.285714285714286) internal successors, (153), 16 states have internal predecessors, (153), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) Word has length 146 [2025-03-16 19:05:28,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:28,202 INFO L225 Difference]: With dead ends: 27851 [2025-03-16 19:05:28,202 INFO L226 Difference]: Without dead ends: 17707 [2025-03-16 19:05:28,223 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 317 GetRequests, 286 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=165, Invalid=891, Unknown=0, NotChecked=0, Total=1056 [2025-03-16 19:05:28,224 INFO L435 NwaCegarLoop]: 272 mSDtfsCounter, 410 mSDsluCounter, 3008 mSDsCounter, 0 mSdLazyCounter, 1263 mSolverCounterSat, 107 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 413 SdHoareTripleChecker+Valid, 3280 SdHoareTripleChecker+Invalid, 1370 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 107 IncrementalHoareTripleChecker+Valid, 1263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:28,224 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [413 Valid, 3280 Invalid, 1370 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [107 Valid, 1263 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 19:05:28,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17707 states. [2025-03-16 19:05:29,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17707 to 11858. [2025-03-16 19:05:29,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11858 states, 8642 states have (on average 1.294144873871789) internal successors, (11184), 8729 states have internal predecessors, (11184), 2076 states have call successors, (2076), 1139 states have call predecessors, (2076), 1139 states have return successors, (2076), 1989 states have call predecessors, (2076), 2076 states have call successors, (2076) [2025-03-16 19:05:29,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11858 states to 11858 states and 15336 transitions. [2025-03-16 19:05:29,828 INFO L78 Accepts]: Start accepts. Automaton has 11858 states and 15336 transitions. Word has length 146 [2025-03-16 19:05:29,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:29,828 INFO L471 AbstractCegarLoop]: Abstraction has 11858 states and 15336 transitions. [2025-03-16 19:05:29,828 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 7.285714285714286) internal successors, (153), 16 states have internal predecessors, (153), 4 states have call successors, (24), 4 states have call predecessors, (24), 8 states have return successors, (27), 8 states have call predecessors, (27), 4 states have call successors, (27) [2025-03-16 19:05:29,828 INFO L276 IsEmpty]: Start isEmpty. Operand 11858 states and 15336 transitions. [2025-03-16 19:05:29,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2025-03-16 19:05:29,834 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:29,834 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:29,841 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-03-16 19:05:30,034 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:30,034 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:30,035 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:30,035 INFO L85 PathProgramCache]: Analyzing trace with hash 203028255, now seen corresponding path program 1 times [2025-03-16 19:05:30,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:30,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765727765] [2025-03-16 19:05:30,035 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:30,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:30,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-16 19:05:30,091 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-16 19:05:30,091 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:30,091 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:30,199 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2025-03-16 19:05:30,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:05:30,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765727765] [2025-03-16 19:05:30,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [765727765] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:05:30,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1651272583] [2025-03-16 19:05:30,199 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:30,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:30,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:05:30,201 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:05:30,203 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-16 19:05:30,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-16 19:05:30,355 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-16 19:05:30,355 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:30,356 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:30,359 INFO L256 TraceCheckSpWp]: Trace formula consists of 706 conjuncts, 11 conjuncts are in the unsatisfiable core [2025-03-16 19:05:30,362 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:05:30,410 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 41 proven. 4 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2025-03-16 19:05:30,410 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:05:30,484 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 18 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2025-03-16 19:05:30,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1651272583] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:05:30,484 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:05:30,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 9 [2025-03-16 19:05:30,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070538319] [2025-03-16 19:05:30,485 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:05:30,485 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-16 19:05:30,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:05:30,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-16 19:05:30,486 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2025-03-16 19:05:30,486 INFO L87 Difference]: Start difference. First operand 11858 states and 15336 transitions. Second operand has 9 states, 9 states have (on average 14.555555555555555) internal successors, (131), 8 states have internal predecessors, (131), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) [2025-03-16 19:05:32,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:32,484 INFO L93 Difference]: Finished difference Result 23710 states and 30646 transitions. [2025-03-16 19:05:32,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-16 19:05:32,485 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 14.555555555555555) internal successors, (131), 8 states have internal predecessors, (131), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) Word has length 154 [2025-03-16 19:05:32,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:32,529 INFO L225 Difference]: With dead ends: 23710 [2025-03-16 19:05:32,530 INFO L226 Difference]: Without dead ends: 12048 [2025-03-16 19:05:32,549 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 317 GetRequests, 307 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2025-03-16 19:05:32,550 INFO L435 NwaCegarLoop]: 247 mSDtfsCounter, 74 mSDsluCounter, 1248 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 1495 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:32,550 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 1495 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-16 19:05:32,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12048 states. [2025-03-16 19:05:34,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12048 to 11858. [2025-03-16 19:05:34,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11858 states, 8642 states have (on average 1.293682018051377) internal successors, (11180), 8729 states have internal predecessors, (11180), 2076 states have call successors, (2076), 1139 states have call predecessors, (2076), 1139 states have return successors, (2076), 1989 states have call predecessors, (2076), 2076 states have call successors, (2076) [2025-03-16 19:05:34,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11858 states to 11858 states and 15332 transitions. [2025-03-16 19:05:34,165 INFO L78 Accepts]: Start accepts. Automaton has 11858 states and 15332 transitions. Word has length 154 [2025-03-16 19:05:34,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:34,166 INFO L471 AbstractCegarLoop]: Abstraction has 11858 states and 15332 transitions. [2025-03-16 19:05:34,166 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 14.555555555555555) internal successors, (131), 8 states have internal predecessors, (131), 3 states have call successors, (28), 4 states have call predecessors, (28), 7 states have return successors, (29), 4 states have call predecessors, (29), 3 states have call successors, (29) [2025-03-16 19:05:34,166 INFO L276 IsEmpty]: Start isEmpty. Operand 11858 states and 15332 transitions. [2025-03-16 19:05:34,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2025-03-16 19:05:34,171 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:34,171 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:34,178 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-16 19:05:34,371 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2025-03-16 19:05:34,371 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:34,372 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:34,372 INFO L85 PathProgramCache]: Analyzing trace with hash 38258935, now seen corresponding path program 1 times [2025-03-16 19:05:34,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:34,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740830407] [2025-03-16 19:05:34,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:34,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:34,381 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 162 statements into 1 equivalence classes. [2025-03-16 19:05:34,415 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 162 of 162 statements. [2025-03-16 19:05:34,415 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:34,415 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:34,792 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 21 proven. 8 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2025-03-16 19:05:34,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-16 19:05:34,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740830407] [2025-03-16 19:05:34,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [740830407] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-16 19:05:34,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1456133281] [2025-03-16 19:05:34,793 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:34,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:34,793 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-16 19:05:34,794 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-16 19:05:34,795 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-16 19:05:34,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 162 statements into 1 equivalence classes. [2025-03-16 19:05:34,942 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 162 of 162 statements. [2025-03-16 19:05:34,942 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:34,942 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-16 19:05:34,945 INFO L256 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 28 conjuncts are in the unsatisfiable core [2025-03-16 19:05:34,948 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-16 19:05:35,069 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 69 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-03-16 19:05:35,069 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-16 19:05:35,208 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 23 proven. 8 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2025-03-16 19:05:35,209 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1456133281] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-16 19:05:35,209 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-16 19:05:35,209 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 9] total 21 [2025-03-16 19:05:35,209 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620482505] [2025-03-16 19:05:35,209 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-16 19:05:35,209 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2025-03-16 19:05:35,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-16 19:05:35,210 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-03-16 19:05:35,210 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=357, Unknown=0, NotChecked=0, Total=420 [2025-03-16 19:05:35,210 INFO L87 Difference]: Start difference. First operand 11858 states and 15332 transitions. Second operand has 21 states, 21 states have (on average 7.666666666666667) internal successors, (161), 16 states have internal predecessors, (161), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2025-03-16 19:05:38,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-16 19:05:38,476 INFO L93 Difference]: Finished difference Result 33329 states and 44309 transitions. [2025-03-16 19:05:38,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-03-16 19:05:38,477 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 7.666666666666667) internal successors, (161), 16 states have internal predecessors, (161), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) Word has length 162 [2025-03-16 19:05:38,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-16 19:05:38,544 INFO L225 Difference]: With dead ends: 33329 [2025-03-16 19:05:38,545 INFO L226 Difference]: Without dead ends: 21667 [2025-03-16 19:05:38,563 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 352 GetRequests, 318 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=187, Invalid=1073, Unknown=0, NotChecked=0, Total=1260 [2025-03-16 19:05:38,563 INFO L435 NwaCegarLoop]: 359 mSDtfsCounter, 466 mSDsluCounter, 3720 mSDsCounter, 0 mSdLazyCounter, 1267 mSolverCounterSat, 103 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 471 SdHoareTripleChecker+Valid, 4079 SdHoareTripleChecker+Invalid, 1370 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 103 IncrementalHoareTripleChecker+Valid, 1267 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-16 19:05:38,563 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [471 Valid, 4079 Invalid, 1370 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [103 Valid, 1267 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-16 19:05:38,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21667 states. [2025-03-16 19:05:40,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21667 to 14146. [2025-03-16 19:05:40,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14146 states, 10282 states have (on average 1.2907994553588795) internal successors, (13272), 10393 states have internal predecessors, (13272), 2492 states have call successors, (2492), 1371 states have call predecessors, (2492), 1371 states have return successors, (2492), 2381 states have call predecessors, (2492), 2492 states have call successors, (2492) [2025-03-16 19:05:40,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14146 states to 14146 states and 18256 transitions. [2025-03-16 19:05:40,533 INFO L78 Accepts]: Start accepts. Automaton has 14146 states and 18256 transitions. Word has length 162 [2025-03-16 19:05:40,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-16 19:05:40,533 INFO L471 AbstractCegarLoop]: Abstraction has 14146 states and 18256 transitions. [2025-03-16 19:05:40,533 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 7.666666666666667) internal successors, (161), 16 states have internal predecessors, (161), 4 states have call successors, (29), 4 states have call predecessors, (29), 9 states have return successors, (32), 9 states have call predecessors, (32), 4 states have call successors, (32) [2025-03-16 19:05:40,533 INFO L276 IsEmpty]: Start isEmpty. Operand 14146 states and 18256 transitions. [2025-03-16 19:05:40,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-03-16 19:05:40,539 INFO L210 NwaCegarLoop]: Found error trace [2025-03-16 19:05:40,539 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:40,546 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-03-16 19:05:40,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-16 19:05:40,740 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-16 19:05:40,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-16 19:05:40,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1842687966, now seen corresponding path program 1 times [2025-03-16 19:05:40,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-16 19:05:40,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845457580] [2025-03-16 19:05:40,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-16 19:05:40,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-16 19:05:40,749 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-03-16 19:05:40,792 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-03-16 19:05:40,792 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:40,792 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:05:40,792 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-16 19:05:40,798 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-03-16 19:05:40,905 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-03-16 19:05:40,905 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-16 19:05:40,905 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-16 19:05:40,969 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-16 19:05:40,969 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-16 19:05:40,970 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-16 19:05:40,971 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-16 19:05:40,973 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-16 19:05:41,112 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-16 19:05:41,114 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 07:05:41 BoogieIcfgContainer [2025-03-16 19:05:41,115 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-16 19:05:41,116 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-16 19:05:41,116 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-16 19:05:41,116 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-16 19:05:41,116 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.03 07:04:34" (3/4) ... [2025-03-16 19:05:41,117 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-16 19:05:41,271 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 144. [2025-03-16 19:05:41,371 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-16 19:05:41,372 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-16 19:05:41,373 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-16 19:05:41,374 INFO L158 Benchmark]: Toolchain (without parser) took 67894.88ms. Allocated memory was 142.6MB in the beginning and 3.8GB in the end (delta: 3.6GB). Free memory was 105.3MB in the beginning and 3.5GB in the end (delta: -3.4GB). Peak memory consumption was 242.8MB. Max. memory is 16.1GB. [2025-03-16 19:05:41,374 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory is still 126.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:05:41,374 INFO L158 Benchmark]: CACSL2BoogieTranslator took 315.70ms. Allocated memory is still 142.6MB. Free memory was 104.2MB in the beginning and 86.7MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-16 19:05:41,374 INFO L158 Benchmark]: Boogie Procedure Inliner took 63.30ms. Allocated memory is still 142.6MB. Free memory was 86.7MB in the beginning and 83.9MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-16 19:05:41,374 INFO L158 Benchmark]: Boogie Preprocessor took 36.54ms. Allocated memory is still 142.6MB. Free memory was 82.8MB in the beginning and 79.4MB in the end (delta: 3.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-16 19:05:41,374 INFO L158 Benchmark]: IcfgBuilder took 619.89ms. Allocated memory is still 142.6MB. Free memory was 79.4MB in the beginning and 38.6MB in the end (delta: 40.8MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-16 19:05:41,375 INFO L158 Benchmark]: TraceAbstraction took 66594.41ms. Allocated memory was 142.6MB in the beginning and 3.8GB in the end (delta: 3.6GB). Free memory was 37.5MB in the beginning and 3.5GB in the end (delta: -3.5GB). Peak memory consumption was 2.0GB. Max. memory is 16.1GB. [2025-03-16 19:05:41,375 INFO L158 Benchmark]: Witness Printer took 257.57ms. Allocated memory is still 3.8GB. Free memory was 3.5GB in the beginning and 3.5GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-16 19:05:41,377 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory is still 126.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 315.70ms. Allocated memory is still 142.6MB. Free memory was 104.2MB in the beginning and 86.7MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 63.30ms. Allocated memory is still 142.6MB. Free memory was 86.7MB in the beginning and 83.9MB in the end (delta: 2.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 36.54ms. Allocated memory is still 142.6MB. Free memory was 82.8MB in the beginning and 79.4MB in the end (delta: 3.3MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 619.89ms. Allocated memory is still 142.6MB. Free memory was 79.4MB in the beginning and 38.6MB in the end (delta: 40.8MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 66594.41ms. Allocated memory was 142.6MB in the beginning and 3.8GB in the end (delta: 3.6GB). Free memory was 37.5MB in the beginning and 3.5GB in the end (delta: -3.5GB). Peak memory consumption was 2.0GB. Max. memory is 16.1GB. * Witness Printer took 257.57ms. Allocated memory is still 3.8GB. Free memory was 3.5GB in the beginning and 3.5GB in the end (delta: 41.9MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L555] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L555] RET, EXPR init() [L555] i2 = init() [L556] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L556] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L452] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L496] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=2, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=2, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L510] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L529] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L609] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L597] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=-1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val [L333] RET write_side2_failed_history(side2Failed) [L334] COND TRUE \read(side2Failed) [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=-1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L480] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L482] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L609] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L611] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=-1, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 170 locations, 298 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 66.4s, OverallIterations: 35, TraceHistogramMax: 5, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 36.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18998 SdHoareTripleChecker+Valid, 11.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 18909 mSDsluCounter, 64927 SdHoareTripleChecker+Invalid, 9.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 54081 mSDsCounter, 5491 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 18478 IncrementalHoareTripleChecker+Invalid, 23969 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 5491 mSolverCounterUnsat, 10846 mSDtfsCounter, 18478 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 2961 GetRequests, 2336 SyntacticMatches, 1 SemanticMatches, 624 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19639 ImplicationChecksByTransitivity, 11.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14146occurred in iteration=34, InterpolantAutomatonStates: 500, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 12.5s AutomataMinimizationTime, 34 MinimizatonAttempts, 28556 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.5s SatisfiabilityAnalysisTime, 12.5s InterpolantComputationTime, 4478 NumberOfCodeBlocks, 4478 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 5291 ConstructedInterpolants, 0 QuantifiedInterpolants, 15613 SizeOfPredicates, 48 NumberOfNonLiveVariables, 5953 ConjunctsInSsa, 285 ConjunctsInUnsatCore, 50 InterpolantComputations, 27 PerfectInterpolantSequences, 1974/2180 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-16 19:05:41,404 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE