./Ultimate.py --spec ../sv-benchmarks/c/properties/valid-memsafety.prp --file ../sv-benchmarks/c/forester-heap/dll-rb-cnstr_1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/forester-heap/dll-rb-cnstr_1-1.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2f8161fc7f730bddeac54a8f174c52e5ef9cd819e9497e3a4087e68b96d46105 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 12:10:37,206 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 12:10:37,267 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2025-03-17 12:10:37,271 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 12:10:37,272 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 12:10:37,292 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 12:10:37,292 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 12:10:37,292 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 12:10:37,293 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 12:10:37,293 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 12:10:37,293 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-17 12:10:37,293 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-17 12:10:37,293 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 12:10:37,293 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 12:10:37,294 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2025-03-17 12:10:37,294 INFO L153 SettingsManager]: * Bitprecise bitfields=true [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 12:10:37,295 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-17 12:10:37,295 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-17 12:10:37,296 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-17 12:10:37,296 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2f8161fc7f730bddeac54a8f174c52e5ef9cd819e9497e3a4087e68b96d46105 [2025-03-17 12:10:37,538 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 12:10:37,547 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 12:10:37,549 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 12:10:37,550 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 12:10:37,550 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 12:10:37,552 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/forester-heap/dll-rb-cnstr_1-1.i [2025-03-17 12:10:38,720 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18a216825/90bf6a0c36f343c3bd31a4f72f3713be/FLAGb99f4cffc [2025-03-17 12:10:39,014 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 12:10:39,015 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/forester-heap/dll-rb-cnstr_1-1.i [2025-03-17 12:10:39,031 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18a216825/90bf6a0c36f343c3bd31a4f72f3713be/FLAGb99f4cffc [2025-03-17 12:10:39,047 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18a216825/90bf6a0c36f343c3bd31a4f72f3713be [2025-03-17 12:10:39,049 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 12:10:39,051 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 12:10:39,052 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 12:10:39,053 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 12:10:39,056 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 12:10:39,057 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,058 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@39ef5cbc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39, skipping insertion in model container [2025-03-17 12:10:39,059 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,090 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 12:10:39,319 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 12:10:39,328 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 12:10:39,373 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 12:10:39,396 INFO L204 MainTranslator]: Completed translation [2025-03-17 12:10:39,397 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39 WrapperNode [2025-03-17 12:10:39,397 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 12:10:39,398 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 12:10:39,398 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 12:10:39,398 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 12:10:39,403 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,417 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,435 INFO L138 Inliner]: procedures = 119, calls = 46, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 146 [2025-03-17 12:10:39,436 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 12:10:39,437 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 12:10:39,437 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 12:10:39,437 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 12:10:39,443 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,444 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,447 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,467 INFO L175 MemorySlicer]: Split 29 memory accesses to 2 slices as follows [2, 27]. 93 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 12 writes are split as follows [0, 12]. [2025-03-17 12:10:39,467 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,467 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,480 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,481 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,486 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,486 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,488 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 12:10:39,489 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 12:10:39,489 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 12:10:39,489 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 12:10:39,492 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (1/1) ... [2025-03-17 12:10:39,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-17 12:10:39,507 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:39,519 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-17 12:10:39,523 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-17 12:10:39,541 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2025-03-17 12:10:39,542 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 12:10:39,542 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 12:10:39,543 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-17 12:10:39,543 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 12:10:39,543 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 12:10:39,621 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 12:10:39,623 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 12:10:39,948 INFO L? ?]: Removed 121 outVars from TransFormulas that were not future-live. [2025-03-17 12:10:39,948 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 12:10:39,959 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 12:10:39,959 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 12:10:39,960 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 12:10:39 BoogieIcfgContainer [2025-03-17 12:10:39,960 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 12:10:39,961 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-17 12:10:39,961 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-17 12:10:39,964 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-17 12:10:39,965 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 17.03 12:10:39" (1/3) ... [2025-03-17 12:10:39,965 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a79e151 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.03 12:10:39, skipping insertion in model container [2025-03-17 12:10:39,965 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:10:39" (2/3) ... [2025-03-17 12:10:39,966 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a79e151 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.03 12:10:39, skipping insertion in model container [2025-03-17 12:10:39,966 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 12:10:39" (3/3) ... [2025-03-17 12:10:39,967 INFO L128 eAbstractionObserver]: Analyzing ICFG dll-rb-cnstr_1-1.i [2025-03-17 12:10:39,978 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:None NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-17 12:10:39,979 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG dll-rb-cnstr_1-1.i that has 2 procedures, 159 locations, 1 initial locations, 10 loop locations, and 65 error locations. [2025-03-17 12:10:40,015 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-17 12:10:40,025 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=None, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6e4ef3b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-17 12:10:40,027 INFO L334 AbstractCegarLoop]: Starting to check reachability of 65 error locations. [2025-03-17 12:10:40,030 INFO L276 IsEmpty]: Start isEmpty. Operand has 159 states, 85 states have (on average 2.1058823529411765) internal successors, (179), 150 states have internal predecessors, (179), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) [2025-03-17 12:10:40,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2025-03-17 12:10:40,035 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:40,035 INFO L218 NwaCegarLoop]: trace histogram [1, 1] [2025-03-17 12:10:40,036 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr62REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:40,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:40,040 INFO L85 PathProgramCache]: Analyzing trace with hash 6911, now seen corresponding path program 1 times [2025-03-17 12:10:40,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:40,047 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127279937] [2025-03-17 12:10:40,047 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:40,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:40,113 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 12:10:40,122 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 12:10:40,122 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:40,122 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:40,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:40,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:40,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1127279937] [2025-03-17 12:10:40,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1127279937] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:40,186 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:40,187 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-03-17 12:10:40,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118034873] [2025-03-17 12:10:40,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:40,190 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:10:40,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:40,208 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:10:40,209 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:40,210 INFO L87 Difference]: Start difference. First operand has 159 states, 85 states have (on average 2.1058823529411765) internal successors, (179), 150 states have internal predecessors, (179), 7 states have call successors, (7), 1 states have call predecessors, (7), 1 states have return successors, (7), 7 states have call predecessors, (7), 7 states have call successors, (7) Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:40,375 INFO L93 Difference]: Finished difference Result 145 states and 158 transitions. [2025-03-17 12:10:40,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:10:40,377 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2025-03-17 12:10:40,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:40,401 INFO L225 Difference]: With dead ends: 145 [2025-03-17 12:10:40,401 INFO L226 Difference]: Without dead ends: 143 [2025-03-17 12:10:40,402 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:40,405 INFO L435 NwaCegarLoop]: 90 mSDtfsCounter, 117 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:40,405 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [117 Valid, 98 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:40,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2025-03-17 12:10:40,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2025-03-17 12:10:40,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 78 states have (on average 1.9102564102564104) internal successors, (149), 141 states have internal predecessors, (149), 7 states have call successors, (7), 1 states have call predecessors, (7), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 156 transitions. [2025-03-17 12:10:40,438 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 156 transitions. Word has length 2 [2025-03-17 12:10:40,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:40,439 INFO L471 AbstractCegarLoop]: Abstraction has 143 states and 156 transitions. [2025-03-17 12:10:40,439 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,440 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 156 transitions. [2025-03-17 12:10:40,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2025-03-17 12:10:40,440 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:40,440 INFO L218 NwaCegarLoop]: trace histogram [1, 1] [2025-03-17 12:10:40,440 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-17 12:10:40,440 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr63REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:40,442 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:40,442 INFO L85 PathProgramCache]: Analyzing trace with hash 6912, now seen corresponding path program 1 times [2025-03-17 12:10:40,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:40,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078773605] [2025-03-17 12:10:40,442 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:40,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:40,451 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-17 12:10:40,456 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-17 12:10:40,456 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:40,456 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:40,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:40,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:40,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078773605] [2025-03-17 12:10:40,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078773605] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:40,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:40,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-03-17 12:10:40,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643975869] [2025-03-17 12:10:40,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:40,530 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:10:40,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:40,531 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:10:40,531 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:40,531 INFO L87 Difference]: Start difference. First operand 143 states and 156 transitions. Second operand has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:40,655 INFO L93 Difference]: Finished difference Result 147 states and 160 transitions. [2025-03-17 12:10:40,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:10:40,656 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2 [2025-03-17 12:10:40,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:40,656 INFO L225 Difference]: With dead ends: 147 [2025-03-17 12:10:40,656 INFO L226 Difference]: Without dead ends: 147 [2025-03-17 12:10:40,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:40,657 INFO L435 NwaCegarLoop]: 95 mSDtfsCounter, 111 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:40,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 109 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:40,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2025-03-17 12:10:40,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2025-03-17 12:10:40,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 85 states have (on average 1.8) internal successors, (153), 145 states have internal predecessors, (153), 7 states have call successors, (7), 1 states have call predecessors, (7), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 160 transitions. [2025-03-17 12:10:40,670 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 160 transitions. Word has length 2 [2025-03-17 12:10:40,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:40,672 INFO L471 AbstractCegarLoop]: Abstraction has 147 states and 160 transitions. [2025-03-17 12:10:40,672 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.0) internal successors, (2), 2 states have internal predecessors, (2), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,672 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 160 transitions. [2025-03-17 12:10:40,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2025-03-17 12:10:40,672 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:40,672 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:40,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-17 12:10:40,672 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr56REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:40,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:40,673 INFO L85 PathProgramCache]: Analyzing trace with hash 464296084, now seen corresponding path program 1 times [2025-03-17 12:10:40,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:40,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369377497] [2025-03-17 12:10:40,673 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:40,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:40,684 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-17 12:10:40,698 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-17 12:10:40,698 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:40,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:40,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:40,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:40,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369377497] [2025-03-17 12:10:40,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369377497] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:40,818 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:40,818 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 12:10:40,818 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347866933] [2025-03-17 12:10:40,818 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:40,819 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:10:40,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:40,819 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:10:40,819 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:10:40,819 INFO L87 Difference]: Start difference. First operand 147 states and 160 transitions. Second operand has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:40,968 INFO L93 Difference]: Finished difference Result 134 states and 149 transitions. [2025-03-17 12:10:40,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:40,969 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2025-03-17 12:10:40,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:40,970 INFO L225 Difference]: With dead ends: 134 [2025-03-17 12:10:40,970 INFO L226 Difference]: Without dead ends: 134 [2025-03-17 12:10:40,970 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:40,971 INFO L435 NwaCegarLoop]: 64 mSDtfsCounter, 154 mSDsluCounter, 15 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 186 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:40,971 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 79 Invalid, 186 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:40,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2025-03-17 12:10:40,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2025-03-17 12:10:40,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 87 states have (on average 1.632183908045977) internal successors, (142), 132 states have internal predecessors, (142), 7 states have call successors, (7), 1 states have call predecessors, (7), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 149 transitions. [2025-03-17 12:10:40,976 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 149 transitions. Word has length 8 [2025-03-17 12:10:40,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:40,976 INFO L471 AbstractCegarLoop]: Abstraction has 134 states and 149 transitions. [2025-03-17 12:10:40,976 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:40,976 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 149 transitions. [2025-03-17 12:10:40,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2025-03-17 12:10:40,977 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:40,977 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:40,977 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-17 12:10:40,977 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr57REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:40,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:40,977 INFO L85 PathProgramCache]: Analyzing trace with hash 464296085, now seen corresponding path program 1 times [2025-03-17 12:10:40,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:40,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133870151] [2025-03-17 12:10:40,978 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:40,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:40,986 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-17 12:10:40,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-17 12:10:40,991 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:40,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:41,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:41,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:41,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [133870151] [2025-03-17 12:10:41,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [133870151] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:41,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:41,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:41,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964009106] [2025-03-17 12:10:41,154 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:41,155 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:10:41,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:41,155 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:10:41,155 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:41,155 INFO L87 Difference]: Start difference. First operand 134 states and 149 transitions. Second operand has 6 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:41,353 INFO L93 Difference]: Finished difference Result 147 states and 163 transitions. [2025-03-17 12:10:41,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:41,354 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2025-03-17 12:10:41,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:41,355 INFO L225 Difference]: With dead ends: 147 [2025-03-17 12:10:41,355 INFO L226 Difference]: Without dead ends: 147 [2025-03-17 12:10:41,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-17 12:10:41,356 INFO L435 NwaCegarLoop]: 70 mSDtfsCounter, 149 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 149 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 227 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:41,356 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [149 Valid, 129 Invalid, 227 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 212 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:41,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2025-03-17 12:10:41,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2025-03-17 12:10:41,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 98 states have (on average 1.5816326530612246) internal successors, (155), 142 states have internal predecessors, (155), 7 states have call successors, (7), 1 states have call predecessors, (7), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 162 transitions. [2025-03-17 12:10:41,362 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 162 transitions. Word has length 8 [2025-03-17 12:10:41,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:41,362 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 162 transitions. [2025-03-17 12:10:41,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,362 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 162 transitions. [2025-03-17 12:10:41,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2025-03-17 12:10:41,362 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:41,362 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:41,363 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-17 12:10:41,363 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:41,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:41,363 INFO L85 PathProgramCache]: Analyzing trace with hash -971229904, now seen corresponding path program 1 times [2025-03-17 12:10:41,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:41,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586815999] [2025-03-17 12:10:41,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:41,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:41,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-17 12:10:41,375 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 12:10:41,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:41,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:41,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:41,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:41,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1586815999] [2025-03-17 12:10:41,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1586815999] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:41,404 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:41,404 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 12:10:41,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272157259] [2025-03-17 12:10:41,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:41,404 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:10:41,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:41,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:10:41,405 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:10:41,405 INFO L87 Difference]: Start difference. First operand 144 states and 162 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:41,522 INFO L93 Difference]: Finished difference Result 150 states and 165 transitions. [2025-03-17 12:10:41,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:41,522 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2025-03-17 12:10:41,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:41,523 INFO L225 Difference]: With dead ends: 150 [2025-03-17 12:10:41,523 INFO L226 Difference]: Without dead ends: 150 [2025-03-17 12:10:41,524 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:41,524 INFO L435 NwaCegarLoop]: 106 mSDtfsCounter, 131 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 182 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:41,525 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 182 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:41,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2025-03-17 12:10:41,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 143. [2025-03-17 12:10:41,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 98 states have (on average 1.5510204081632653) internal successors, (152), 141 states have internal predecessors, (152), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 158 transitions. [2025-03-17 12:10:41,529 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 158 transitions. Word has length 12 [2025-03-17 12:10:41,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:41,530 INFO L471 AbstractCegarLoop]: Abstraction has 143 states and 158 transitions. [2025-03-17 12:10:41,530 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,530 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 158 transitions. [2025-03-17 12:10:41,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2025-03-17 12:10:41,530 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:41,530 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:41,530 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-17 12:10:41,531 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr52REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:41,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:41,531 INFO L85 PathProgramCache]: Analyzing trace with hash 2050080273, now seen corresponding path program 1 times [2025-03-17 12:10:41,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:41,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209506210] [2025-03-17 12:10:41,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:41,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:41,539 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-17 12:10:41,543 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-17 12:10:41,543 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:41,543 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:41,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:41,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:41,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209506210] [2025-03-17 12:10:41,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1209506210] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:41,625 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:41,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:41,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28167262] [2025-03-17 12:10:41,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:41,625 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:41,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:41,625 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:41,625 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:41,625 INFO L87 Difference]: Start difference. First operand 143 states and 158 transitions. Second operand has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:41,759 INFO L93 Difference]: Finished difference Result 142 states and 156 transitions. [2025-03-17 12:10:41,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:41,760 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2025-03-17 12:10:41,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:41,761 INFO L225 Difference]: With dead ends: 142 [2025-03-17 12:10:41,761 INFO L226 Difference]: Without dead ends: 142 [2025-03-17 12:10:41,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:41,762 INFO L435 NwaCegarLoop]: 123 mSDtfsCounter, 4 mSDsluCounter, 218 mSDsCounter, 0 mSdLazyCounter, 170 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 341 SdHoareTripleChecker+Invalid, 171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 170 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:41,763 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 341 Invalid, 171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 170 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:41,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2025-03-17 12:10:41,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2025-03-17 12:10:41,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 98 states have (on average 1.530612244897959) internal successors, (150), 140 states have internal predecessors, (150), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 156 transitions. [2025-03-17 12:10:41,771 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 156 transitions. Word has length 11 [2025-03-17 12:10:41,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:41,771 INFO L471 AbstractCegarLoop]: Abstraction has 142 states and 156 transitions. [2025-03-17 12:10:41,772 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:41,772 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 156 transitions. [2025-03-17 12:10:41,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2025-03-17 12:10:41,772 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:41,772 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:41,772 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-17 12:10:41,772 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr53REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:41,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:41,773 INFO L85 PathProgramCache]: Analyzing trace with hash 2050080274, now seen corresponding path program 1 times [2025-03-17 12:10:41,773 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:41,773 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177238617] [2025-03-17 12:10:41,773 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:41,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:41,780 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-17 12:10:41,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-17 12:10:41,785 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:41,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:41,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:41,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:41,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177238617] [2025-03-17 12:10:41,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177238617] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:41,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:41,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:41,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423400407] [2025-03-17 12:10:41,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:41,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:41,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:41,933 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:41,933 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:41,934 INFO L87 Difference]: Start difference. First operand 142 states and 156 transitions. Second operand has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:42,068 INFO L93 Difference]: Finished difference Result 141 states and 154 transitions. [2025-03-17 12:10:42,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:42,068 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2025-03-17 12:10:42,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:42,069 INFO L225 Difference]: With dead ends: 141 [2025-03-17 12:10:42,069 INFO L226 Difference]: Without dead ends: 141 [2025-03-17 12:10:42,070 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:42,070 INFO L435 NwaCegarLoop]: 124 mSDtfsCounter, 2 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 184 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 184 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 184 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:42,070 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 326 Invalid, 184 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 184 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:42,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2025-03-17 12:10:42,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2025-03-17 12:10:42,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 98 states have (on average 1.510204081632653) internal successors, (148), 139 states have internal predecessors, (148), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 154 transitions. [2025-03-17 12:10:42,075 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 154 transitions. Word has length 11 [2025-03-17 12:10:42,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:42,075 INFO L471 AbstractCegarLoop]: Abstraction has 141 states and 154 transitions. [2025-03-17 12:10:42,075 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,075 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 154 transitions. [2025-03-17 12:10:42,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2025-03-17 12:10:42,075 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:42,076 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:42,076 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-17 12:10:42,076 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:42,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:42,076 INFO L85 PathProgramCache]: Analyzing trace with hash -815716134, now seen corresponding path program 1 times [2025-03-17 12:10:42,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:42,077 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406502839] [2025-03-17 12:10:42,077 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:42,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:42,085 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 15 statements into 1 equivalence classes. [2025-03-17 12:10:42,088 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 12:10:42,088 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:42,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:42,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:42,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:42,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406502839] [2025-03-17 12:10:42,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1406502839] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:42,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:42,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:10:42,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468933095] [2025-03-17 12:10:42,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:42,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:10:42,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:42,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:10:42,165 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:42,165 INFO L87 Difference]: Start difference. First operand 141 states and 154 transitions. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:42,347 INFO L93 Difference]: Finished difference Result 181 states and 200 transitions. [2025-03-17 12:10:42,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 12:10:42,347 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2025-03-17 12:10:42,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:42,348 INFO L225 Difference]: With dead ends: 181 [2025-03-17 12:10:42,348 INFO L226 Difference]: Without dead ends: 181 [2025-03-17 12:10:42,348 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2025-03-17 12:10:42,348 INFO L435 NwaCegarLoop]: 99 mSDtfsCounter, 204 mSDsluCounter, 227 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 326 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:42,348 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 326 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:42,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2025-03-17 12:10:42,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 146. [2025-03-17 12:10:42,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 103 states have (on average 1.4854368932038835) internal successors, (153), 144 states have internal predecessors, (153), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 159 transitions. [2025-03-17 12:10:42,352 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 159 transitions. Word has length 15 [2025-03-17 12:10:42,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:42,352 INFO L471 AbstractCegarLoop]: Abstraction has 146 states and 159 transitions. [2025-03-17 12:10:42,352 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,352 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 159 transitions. [2025-03-17 12:10:42,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2025-03-17 12:10:42,353 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:42,353 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:42,353 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-17 12:10:42,355 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr48REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:42,355 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:42,355 INFO L85 PathProgramCache]: Analyzing trace with hash 1884215819, now seen corresponding path program 1 times [2025-03-17 12:10:42,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:42,355 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791396808] [2025-03-17 12:10:42,355 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:42,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:42,365 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 15 statements into 1 equivalence classes. [2025-03-17 12:10:42,371 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 12:10:42,372 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:42,372 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:42,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:42,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:42,523 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791396808] [2025-03-17 12:10:42,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [791396808] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:42,523 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:42,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-17 12:10:42,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871085061] [2025-03-17 12:10:42,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:42,524 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-17 12:10:42,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:42,524 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 12:10:42,524 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-17 12:10:42,524 INFO L87 Difference]: Start difference. First operand 146 states and 159 transitions. Second operand has 9 states, 8 states have (on average 1.875) internal successors, (15), 9 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:42,807 INFO L93 Difference]: Finished difference Result 145 states and 158 transitions. [2025-03-17 12:10:42,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-17 12:10:42,808 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 1.875) internal successors, (15), 9 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2025-03-17 12:10:42,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:42,808 INFO L225 Difference]: With dead ends: 145 [2025-03-17 12:10:42,809 INFO L226 Difference]: Without dead ends: 145 [2025-03-17 12:10:42,809 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=135, Unknown=0, NotChecked=0, Total=182 [2025-03-17 12:10:42,809 INFO L435 NwaCegarLoop]: 63 mSDtfsCounter, 147 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 402 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 147 SdHoareTripleChecker+Valid, 207 SdHoareTripleChecker+Invalid, 414 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 402 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:42,809 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [147 Valid, 207 Invalid, 414 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 402 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:42,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2025-03-17 12:10:42,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2025-03-17 12:10:42,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 103 states have (on average 1.4757281553398058) internal successors, (152), 143 states have internal predecessors, (152), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 158 transitions. [2025-03-17 12:10:42,813 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 158 transitions. Word has length 15 [2025-03-17 12:10:42,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:42,813 INFO L471 AbstractCegarLoop]: Abstraction has 145 states and 158 transitions. [2025-03-17 12:10:42,813 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 1.875) internal successors, (15), 9 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:42,814 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 158 transitions. [2025-03-17 12:10:42,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2025-03-17 12:10:42,814 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:42,814 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:42,815 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-17 12:10:42,815 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr49REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:42,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:42,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1884215820, now seen corresponding path program 1 times [2025-03-17 12:10:42,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:42,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898116744] [2025-03-17 12:10:42,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:42,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:42,824 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 15 statements into 1 equivalence classes. [2025-03-17 12:10:42,832 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 15 of 15 statements. [2025-03-17 12:10:42,832 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:42,832 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:43,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:43,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:43,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898116744] [2025-03-17 12:10:43,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898116744] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:43,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:43,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 12:10:43,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436081102] [2025-03-17 12:10:43,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:43,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-17 12:10:43,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:43,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 12:10:43,045 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:10:43,045 INFO L87 Difference]: Start difference. First operand 145 states and 158 transitions. Second operand has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:43,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:43,460 INFO L93 Difference]: Finished difference Result 159 states and 176 transitions. [2025-03-17 12:10:43,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-17 12:10:43,460 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2025-03-17 12:10:43,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:43,461 INFO L225 Difference]: With dead ends: 159 [2025-03-17 12:10:43,461 INFO L226 Difference]: Without dead ends: 159 [2025-03-17 12:10:43,461 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2025-03-17 12:10:43,462 INFO L435 NwaCegarLoop]: 66 mSDtfsCounter, 193 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 465 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 262 SdHoareTripleChecker+Invalid, 490 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 465 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:43,462 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 262 Invalid, 490 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 465 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-17 12:10:43,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2025-03-17 12:10:43,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 149. [2025-03-17 12:10:43,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 113 states have (on average 1.415929203539823) internal successors, (160), 147 states have internal predecessors, (160), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:43,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 166 transitions. [2025-03-17 12:10:43,465 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 166 transitions. Word has length 15 [2025-03-17 12:10:43,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:43,465 INFO L471 AbstractCegarLoop]: Abstraction has 149 states and 166 transitions. [2025-03-17 12:10:43,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.6666666666666667) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:43,465 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 166 transitions. [2025-03-17 12:10:43,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2025-03-17 12:10:43,466 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:43,466 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:43,466 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-17 12:10:43,466 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:43,466 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:43,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1819463966, now seen corresponding path program 1 times [2025-03-17 12:10:43,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:43,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332327592] [2025-03-17 12:10:43,467 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:43,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:43,474 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-03-17 12:10:43,478 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-03-17 12:10:43,478 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:43,478 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:43,663 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:43,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:43,664 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332327592] [2025-03-17 12:10:43,664 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332327592] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:10:43,664 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1184397362] [2025-03-17 12:10:43,664 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:43,664 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:43,664 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:43,666 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:10:43,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-17 12:10:43,719 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-03-17 12:10:43,733 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-03-17 12:10:43,733 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:43,733 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:43,735 INFO L256 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 29 conjuncts are in the unsatisfiable core [2025-03-17 12:10:43,741 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:10:43,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:43,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:43,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-03-17 12:10:43,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2025-03-17 12:10:43,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-03-17 12:10:43,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 21 [2025-03-17 12:10:44,019 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:44,019 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:10:44,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2025-03-17 12:10:44,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2025-03-17 12:10:44,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2025-03-17 12:10:44,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:10:44,368 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:44,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1184397362] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:10:44,369 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:10:44,369 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 6] total 13 [2025-03-17 12:10:44,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581667862] [2025-03-17 12:10:44,369 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:10:44,369 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2025-03-17 12:10:44,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:44,370 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-17 12:10:44,370 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2025-03-17 12:10:44,370 INFO L87 Difference]: Start difference. First operand 149 states and 166 transitions. Second operand has 13 states, 13 states have (on average 4.153846153846154) internal successors, (54), 13 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:44,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:44,735 INFO L93 Difference]: Finished difference Result 187 states and 210 transitions. [2025-03-17 12:10:44,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-17 12:10:44,736 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.153846153846154) internal successors, (54), 13 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2025-03-17 12:10:44,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:44,736 INFO L225 Difference]: With dead ends: 187 [2025-03-17 12:10:44,737 INFO L226 Difference]: Without dead ends: 187 [2025-03-17 12:10:44,737 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=256, Unknown=0, NotChecked=0, Total=342 [2025-03-17 12:10:44,737 INFO L435 NwaCegarLoop]: 90 mSDtfsCounter, 201 mSDsluCounter, 494 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 584 SdHoareTripleChecker+Invalid, 470 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:44,737 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 584 Invalid, 470 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-17 12:10:44,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2025-03-17 12:10:44,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 156. [2025-03-17 12:10:44,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 120 states have (on average 1.4) internal successors, (168), 154 states have internal predecessors, (168), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:44,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 174 transitions. [2025-03-17 12:10:44,742 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 174 transitions. Word has length 20 [2025-03-17 12:10:44,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:44,742 INFO L471 AbstractCegarLoop]: Abstraction has 156 states and 174 transitions. [2025-03-17 12:10:44,742 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.153846153846154) internal successors, (54), 13 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:44,742 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 174 transitions. [2025-03-17 12:10:44,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2025-03-17 12:10:44,746 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:44,746 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:44,756 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2025-03-17 12:10:44,946 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2025-03-17 12:10:44,947 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:44,948 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:44,948 INFO L85 PathProgramCache]: Analyzing trace with hash 186040285, now seen corresponding path program 1 times [2025-03-17 12:10:44,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:44,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501631617] [2025-03-17 12:10:44,948 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:44,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:44,956 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-03-17 12:10:44,959 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-03-17 12:10:44,959 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:44,959 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:44,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:44,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:44,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501631617] [2025-03-17 12:10:44,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501631617] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:44,989 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:44,989 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:10:44,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747452415] [2025-03-17 12:10:44,989 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:44,989 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:44,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:44,990 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:44,990 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:44,990 INFO L87 Difference]: Start difference. First operand 156 states and 174 transitions. Second operand has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,108 INFO L93 Difference]: Finished difference Result 159 states and 175 transitions. [2025-03-17 12:10:45,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:45,108 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2025-03-17 12:10:45,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,109 INFO L225 Difference]: With dead ends: 159 [2025-03-17 12:10:45,109 INFO L226 Difference]: Without dead ends: 159 [2025-03-17 12:10:45,109 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:45,110 INFO L435 NwaCegarLoop]: 113 mSDtfsCounter, 18 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 171 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 171 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,110 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 327 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 171 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:45,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2025-03-17 12:10:45,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 155. [2025-03-17 12:10:45,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 119 states have (on average 1.3865546218487395) internal successors, (165), 153 states have internal predecessors, (165), 6 states have call successors, (6), 1 states have call predecessors, (6), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 171 transitions. [2025-03-17 12:10:45,113 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 171 transitions. Word has length 22 [2025-03-17 12:10:45,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,114 INFO L471 AbstractCegarLoop]: Abstraction has 155 states and 171 transitions. [2025-03-17 12:10:45,114 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,114 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 171 transitions. [2025-03-17 12:10:45,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-17 12:10:45,115 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,115 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,116 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-17 12:10:45,116 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,116 INFO L85 PathProgramCache]: Analyzing trace with hash 234467838, now seen corresponding path program 1 times [2025-03-17 12:10:45,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105703581] [2025-03-17 12:10:45,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:45,126 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-17 12:10:45,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 12:10:45,130 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:45,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:45,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:45,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:45,176 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105703581] [2025-03-17 12:10:45,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105703581] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:45,176 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:45,176 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:45,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960798674] [2025-03-17 12:10:45,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:45,176 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:10:45,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:45,176 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:10:45,176 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:10:45,176 INFO L87 Difference]: Start difference. First operand 155 states and 171 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,257 INFO L93 Difference]: Finished difference Result 158 states and 172 transitions. [2025-03-17 12:10:45,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:45,258 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2025-03-17 12:10:45,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,258 INFO L225 Difference]: With dead ends: 158 [2025-03-17 12:10:45,258 INFO L226 Difference]: Without dead ends: 158 [2025-03-17 12:10:45,259 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:45,259 INFO L435 NwaCegarLoop]: 116 mSDtfsCounter, 15 mSDsluCounter, 164 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 280 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,259 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 280 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:45,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2025-03-17 12:10:45,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 154. [2025-03-17 12:10:45,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 119 states have (on average 1.3697478991596639) internal successors, (163), 152 states have internal predecessors, (163), 5 states have call successors, (5), 1 states have call predecessors, (5), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 168 transitions. [2025-03-17 12:10:45,263 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 168 transitions. Word has length 23 [2025-03-17 12:10:45,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,263 INFO L471 AbstractCegarLoop]: Abstraction has 154 states and 168 transitions. [2025-03-17 12:10:45,263 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,263 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 168 transitions. [2025-03-17 12:10:45,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-17 12:10:45,264 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,264 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,264 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-17 12:10:45,264 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr40REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,264 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,264 INFO L85 PathProgramCache]: Analyzing trace with hash -1688317435, now seen corresponding path program 1 times [2025-03-17 12:10:45,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921402030] [2025-03-17 12:10:45,264 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:45,278 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-17 12:10:45,281 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 12:10:45,281 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:45,281 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:45,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:45,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:45,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921402030] [2025-03-17 12:10:45,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [921402030] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:45,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:45,347 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:45,347 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723942053] [2025-03-17 12:10:45,347 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:45,347 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:45,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:45,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:45,348 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:45,348 INFO L87 Difference]: Start difference. First operand 154 states and 168 transitions. Second operand has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,452 INFO L93 Difference]: Finished difference Result 153 states and 167 transitions. [2025-03-17 12:10:45,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:45,452 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2025-03-17 12:10:45,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,453 INFO L225 Difference]: With dead ends: 153 [2025-03-17 12:10:45,453 INFO L226 Difference]: Without dead ends: 153 [2025-03-17 12:10:45,453 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:45,454 INFO L435 NwaCegarLoop]: 114 mSDtfsCounter, 3 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 316 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,454 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 316 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:45,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2025-03-17 12:10:45,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2025-03-17 12:10:45,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 119 states have (on average 1.361344537815126) internal successors, (162), 151 states have internal predecessors, (162), 5 states have call successors, (5), 1 states have call predecessors, (5), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 167 transitions. [2025-03-17 12:10:45,457 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 167 transitions. Word has length 23 [2025-03-17 12:10:45,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,457 INFO L471 AbstractCegarLoop]: Abstraction has 153 states and 167 transitions. [2025-03-17 12:10:45,457 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,457 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 167 transitions. [2025-03-17 12:10:45,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2025-03-17 12:10:45,457 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,457 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,457 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-17 12:10:45,457 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr41REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,457 INFO L85 PathProgramCache]: Analyzing trace with hash -1688317434, now seen corresponding path program 1 times [2025-03-17 12:10:45,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226626262] [2025-03-17 12:10:45,458 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:45,467 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 23 statements into 1 equivalence classes. [2025-03-17 12:10:45,472 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 23 of 23 statements. [2025-03-17 12:10:45,472 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:45,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:45,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:45,596 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:45,596 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226626262] [2025-03-17 12:10:45,596 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [226626262] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:45,596 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:45,596 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:45,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339731068] [2025-03-17 12:10:45,597 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:45,597 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:45,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:45,597 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:45,597 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:45,597 INFO L87 Difference]: Start difference. First operand 153 states and 167 transitions. Second operand has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,723 INFO L93 Difference]: Finished difference Result 152 states and 166 transitions. [2025-03-17 12:10:45,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:10:45,724 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2025-03-17 12:10:45,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,726 INFO L225 Difference]: With dead ends: 152 [2025-03-17 12:10:45,726 INFO L226 Difference]: Without dead ends: 152 [2025-03-17 12:10:45,726 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:10:45,727 INFO L435 NwaCegarLoop]: 115 mSDtfsCounter, 1 mSDsluCounter, 191 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 306 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,727 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 306 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:45,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2025-03-17 12:10:45,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2025-03-17 12:10:45,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 152 states, 119 states have (on average 1.3529411764705883) internal successors, (161), 150 states have internal predecessors, (161), 5 states have call successors, (5), 1 states have call predecessors, (5), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 166 transitions. [2025-03-17 12:10:45,732 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 166 transitions. Word has length 23 [2025-03-17 12:10:45,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,733 INFO L471 AbstractCegarLoop]: Abstraction has 152 states and 166 transitions. [2025-03-17 12:10:45,733 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,733 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 166 transitions. [2025-03-17 12:10:45,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2025-03-17 12:10:45,734 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,734 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,734 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-17 12:10:45,734 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,736 INFO L85 PathProgramCache]: Analyzing trace with hash -117988225, now seen corresponding path program 1 times [2025-03-17 12:10:45,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128471646] [2025-03-17 12:10:45,736 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:45,746 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-17 12:10:45,752 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-17 12:10:45,753 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:45,753 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:45,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:45,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:45,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128471646] [2025-03-17 12:10:45,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1128471646] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:45,849 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:45,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:10:45,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540091309] [2025-03-17 12:10:45,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:45,850 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:10:45,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:45,850 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:10:45,850 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:10:45,850 INFO L87 Difference]: Start difference. First operand 152 states and 166 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,928 INFO L93 Difference]: Finished difference Result 152 states and 164 transitions. [2025-03-17 12:10:45,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:45,929 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2025-03-17 12:10:45,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,929 INFO L225 Difference]: With dead ends: 152 [2025-03-17 12:10:45,929 INFO L226 Difference]: Without dead ends: 152 [2025-03-17 12:10:45,930 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:45,930 INFO L435 NwaCegarLoop]: 107 mSDtfsCounter, 11 mSDsluCounter, 148 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 255 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,931 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 255 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:45,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2025-03-17 12:10:45,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 151. [2025-03-17 12:10:45,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 119 states have (on average 1.3361344537815125) internal successors, (159), 149 states have internal predecessors, (159), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 163 transitions. [2025-03-17 12:10:45,934 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 163 transitions. Word has length 26 [2025-03-17 12:10:45,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,934 INFO L471 AbstractCegarLoop]: Abstraction has 151 states and 163 transitions. [2025-03-17 12:10:45,934 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,934 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 163 transitions. [2025-03-17 12:10:45,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2025-03-17 12:10:45,935 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,935 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,935 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-17 12:10:45,935 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_FREE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,935 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,935 INFO L85 PathProgramCache]: Analyzing trace with hash -1466840195, now seen corresponding path program 1 times [2025-03-17 12:10:45,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,935 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273210960] [2025-03-17 12:10:45,935 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:45,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-17 12:10:45,944 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-17 12:10:45,944 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:45,944 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:45,957 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:45,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:45,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273210960] [2025-03-17 12:10:45,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [273210960] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:45,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:45,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-03-17 12:10:45,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650116787] [2025-03-17 12:10:45,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:45,958 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:10:45,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:45,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:10:45,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:45,959 INFO L87 Difference]: Start difference. First operand 151 states and 163 transitions. Second operand has 3 states, 2 states have (on average 13.0) internal successors, (26), 2 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:45,990 INFO L93 Difference]: Finished difference Result 153 states and 165 transitions. [2025-03-17 12:10:45,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:10:45,991 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 13.0) internal successors, (26), 2 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2025-03-17 12:10:45,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:45,991 INFO L225 Difference]: With dead ends: 153 [2025-03-17 12:10:45,991 INFO L226 Difference]: Without dead ends: 153 [2025-03-17 12:10:45,992 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:10:45,992 INFO L435 NwaCegarLoop]: 101 mSDtfsCounter, 64 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:45,992 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 118 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:10:45,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2025-03-17 12:10:45,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2025-03-17 12:10:45,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 121 states have (on average 1.3305785123966942) internal successors, (161), 151 states have internal predecessors, (161), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 165 transitions. [2025-03-17 12:10:45,995 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 165 transitions. Word has length 26 [2025-03-17 12:10:45,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:45,995 INFO L471 AbstractCegarLoop]: Abstraction has 153 states and 165 transitions. [2025-03-17 12:10:45,995 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 13.0) internal successors, (26), 2 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:45,995 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 165 transitions. [2025-03-17 12:10:45,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2025-03-17 12:10:45,995 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:45,995 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:45,995 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-17 12:10:45,996 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr36REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:45,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:45,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1079840255, now seen corresponding path program 1 times [2025-03-17 12:10:45,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:45,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075512888] [2025-03-17 12:10:45,996 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:45,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:46,005 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 27 statements into 1 equivalence classes. [2025-03-17 12:10:46,011 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 27 of 27 statements. [2025-03-17 12:10:46,011 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:46,011 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:46,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:46,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:46,165 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1075512888] [2025-03-17 12:10:46,165 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1075512888] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:46,165 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:46,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-17 12:10:46,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863571685] [2025-03-17 12:10:46,166 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:46,166 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-17 12:10:46,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:46,166 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-17 12:10:46,167 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-17 12:10:46,167 INFO L87 Difference]: Start difference. First operand 153 states and 165 transitions. Second operand has 8 states, 7 states have (on average 3.857142857142857) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:46,403 INFO L93 Difference]: Finished difference Result 153 states and 165 transitions. [2025-03-17 12:10:46,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 12:10:46,404 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 3.857142857142857) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2025-03-17 12:10:46,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:46,404 INFO L225 Difference]: With dead ends: 153 [2025-03-17 12:10:46,404 INFO L226 Difference]: Without dead ends: 153 [2025-03-17 12:10:46,405 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2025-03-17 12:10:46,405 INFO L435 NwaCegarLoop]: 85 mSDtfsCounter, 40 mSDsluCounter, 260 mSDsCounter, 0 mSdLazyCounter, 433 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 345 SdHoareTripleChecker+Invalid, 441 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 433 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:46,405 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 345 Invalid, 441 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 433 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:46,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2025-03-17 12:10:46,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 152. [2025-03-17 12:10:46,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 152 states, 121 states have (on average 1.322314049586777) internal successors, (160), 150 states have internal predecessors, (160), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 164 transitions. [2025-03-17 12:10:46,410 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 164 transitions. Word has length 27 [2025-03-17 12:10:46,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:46,410 INFO L471 AbstractCegarLoop]: Abstraction has 152 states and 164 transitions. [2025-03-17 12:10:46,410 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 3.857142857142857) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,410 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 164 transitions. [2025-03-17 12:10:46,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2025-03-17 12:10:46,410 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:46,410 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:46,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-17 12:10:46,410 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr37REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:46,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:46,410 INFO L85 PathProgramCache]: Analyzing trace with hash 1079840256, now seen corresponding path program 1 times [2025-03-17 12:10:46,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:46,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782485221] [2025-03-17 12:10:46,410 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:46,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:46,423 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 27 statements into 1 equivalence classes. [2025-03-17 12:10:46,430 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 27 of 27 statements. [2025-03-17 12:10:46,432 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:46,432 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:46,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:46,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:46,659 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782485221] [2025-03-17 12:10:46,659 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [782485221] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:46,659 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:46,659 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-17 12:10:46,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569590026] [2025-03-17 12:10:46,659 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:46,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-17 12:10:46,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:46,660 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 12:10:46,660 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-17 12:10:46,660 INFO L87 Difference]: Start difference. First operand 152 states and 164 transitions. Second operand has 9 states, 8 states have (on average 3.375) internal successors, (27), 9 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:46,959 INFO L93 Difference]: Finished difference Result 148 states and 160 transitions. [2025-03-17 12:10:46,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-17 12:10:46,959 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.375) internal successors, (27), 9 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2025-03-17 12:10:46,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:46,960 INFO L225 Difference]: With dead ends: 148 [2025-03-17 12:10:46,960 INFO L226 Difference]: Without dead ends: 148 [2025-03-17 12:10:46,960 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2025-03-17 12:10:46,961 INFO L435 NwaCegarLoop]: 96 mSDtfsCounter, 57 mSDsluCounter, 370 mSDsCounter, 0 mSdLazyCounter, 500 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 466 SdHoareTripleChecker+Invalid, 516 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 500 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:46,961 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 466 Invalid, 516 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 500 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-17 12:10:46,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2025-03-17 12:10:46,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 129. [2025-03-17 12:10:46,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 105 states have (on average 1.2857142857142858) internal successors, (135), 127 states have internal predecessors, (135), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 139 transitions. [2025-03-17 12:10:46,964 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 139 transitions. Word has length 27 [2025-03-17 12:10:46,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:46,964 INFO L471 AbstractCegarLoop]: Abstraction has 129 states and 139 transitions. [2025-03-17 12:10:46,964 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.375) internal successors, (27), 9 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:46,964 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 139 transitions. [2025-03-17 12:10:46,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-03-17 12:10:46,964 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:46,964 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:46,964 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-17 12:10:46,965 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:46,965 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:46,965 INFO L85 PathProgramCache]: Analyzing trace with hash -1774545760, now seen corresponding path program 1 times [2025-03-17 12:10:46,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:46,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555910661] [2025-03-17 12:10:46,965 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:46,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:46,973 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-17 12:10:46,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-17 12:10:46,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:46,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:47,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:47,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:47,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555910661] [2025-03-17 12:10:47,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [555910661] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:47,089 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:10:47,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-17 12:10:47,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965485431] [2025-03-17 12:10:47,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:47,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-17 12:10:47,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:47,090 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 12:10:47,090 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:10:47,090 INFO L87 Difference]: Start difference. First operand 129 states and 139 transitions. Second operand has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:47,428 INFO L93 Difference]: Finished difference Result 146 states and 157 transitions. [2025-03-17 12:10:47,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-03-17 12:10:47,429 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2025-03-17 12:10:47,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:47,429 INFO L225 Difference]: With dead ends: 146 [2025-03-17 12:10:47,429 INFO L226 Difference]: Without dead ends: 146 [2025-03-17 12:10:47,430 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2025-03-17 12:10:47,430 INFO L435 NwaCegarLoop]: 61 mSDtfsCounter, 158 mSDsluCounter, 284 mSDsCounter, 0 mSdLazyCounter, 518 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 158 SdHoareTripleChecker+Valid, 345 SdHoareTripleChecker+Invalid, 531 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 518 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:47,430 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [158 Valid, 345 Invalid, 531 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 518 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:47,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2025-03-17 12:10:47,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 136. [2025-03-17 12:10:47,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 112 states have (on average 1.2678571428571428) internal successors, (142), 134 states have internal predecessors, (142), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 146 transitions. [2025-03-17 12:10:47,433 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 146 transitions. Word has length 28 [2025-03-17 12:10:47,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:47,433 INFO L471 AbstractCegarLoop]: Abstraction has 136 states and 146 transitions. [2025-03-17 12:10:47,433 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,433 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 146 transitions. [2025-03-17 12:10:47,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-03-17 12:10:47,434 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:47,434 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:47,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-17 12:10:47,434 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:47,434 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:47,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1912789039, now seen corresponding path program 1 times [2025-03-17 12:10:47,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:47,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824372721] [2025-03-17 12:10:47,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:47,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:47,441 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-17 12:10:47,442 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-17 12:10:47,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:47,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:47,521 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:47,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:47,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824372721] [2025-03-17 12:10:47,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1824372721] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:10:47,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1201246665] [2025-03-17 12:10:47,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:47,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:47,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:47,524 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:10:47,528 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-03-17 12:10:47,590 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-17 12:10:47,607 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-17 12:10:47,608 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:47,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:47,609 INFO L256 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-17 12:10:47,610 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:10:47,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2025-03-17 12:10:47,641 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:47,641 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:10:47,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1201246665] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:10:47,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:10:47,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 9 [2025-03-17 12:10:47,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021680553] [2025-03-17 12:10:47,642 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:10:47,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:10:47,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:47,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:10:47,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2025-03-17 12:10:47,642 INFO L87 Difference]: Start difference. First operand 136 states and 146 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:47,698 INFO L93 Difference]: Finished difference Result 143 states and 153 transitions. [2025-03-17 12:10:47,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:47,699 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2025-03-17 12:10:47,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:47,699 INFO L225 Difference]: With dead ends: 143 [2025-03-17 12:10:47,699 INFO L226 Difference]: Without dead ends: 143 [2025-03-17 12:10:47,700 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:10:47,700 INFO L435 NwaCegarLoop]: 98 mSDtfsCounter, 5 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 263 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:47,700 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 263 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:10:47,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2025-03-17 12:10:47,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 139. [2025-03-17 12:10:47,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 115 states have (on average 1.2608695652173914) internal successors, (145), 137 states have internal predecessors, (145), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 149 transitions. [2025-03-17 12:10:47,703 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 149 transitions. Word has length 28 [2025-03-17 12:10:47,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:47,703 INFO L471 AbstractCegarLoop]: Abstraction has 139 states and 149 transitions. [2025-03-17 12:10:47,703 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:47,704 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 149 transitions. [2025-03-17 12:10:47,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2025-03-17 12:10:47,704 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:47,704 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:47,710 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2025-03-17 12:10:47,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2025-03-17 12:10:47,905 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:47,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:47,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1638981440, now seen corresponding path program 1 times [2025-03-17 12:10:47,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:47,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634918297] [2025-03-17 12:10:47,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:47,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:47,913 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes. [2025-03-17 12:10:47,916 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements. [2025-03-17 12:10:47,916 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:47,916 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:47,957 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:47,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:47,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634918297] [2025-03-17 12:10:47,957 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634918297] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:10:47,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [937846525] [2025-03-17 12:10:47,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:47,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:47,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:47,960 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:10:47,962 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-03-17 12:10:48,020 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes. [2025-03-17 12:10:48,039 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements. [2025-03-17 12:10:48,039 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:48,039 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:48,040 INFO L256 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-03-17 12:10:48,042 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:10:48,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2025-03-17 12:10:48,098 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:48,098 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:10:48,131 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:48,131 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [937846525] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:10:48,131 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:10:48,131 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 3 [2025-03-17 12:10:48,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750406644] [2025-03-17 12:10:48,131 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:10:48,131 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:10:48,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:48,132 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:10:48,132 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:48,132 INFO L87 Difference]: Start difference. First operand 139 states and 149 transitions. Second operand has 5 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:48,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:48,214 INFO L93 Difference]: Finished difference Result 166 states and 177 transitions. [2025-03-17 12:10:48,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:10:48,215 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2025-03-17 12:10:48,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:48,215 INFO L225 Difference]: With dead ends: 166 [2025-03-17 12:10:48,215 INFO L226 Difference]: Without dead ends: 165 [2025-03-17 12:10:48,215 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:10:48,217 INFO L435 NwaCegarLoop]: 96 mSDtfsCounter, 40 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 220 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:48,217 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 220 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:10:48,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2025-03-17 12:10:48,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 145. [2025-03-17 12:10:48,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 121 states have (on average 1.2479338842975207) internal successors, (151), 143 states have internal predecessors, (151), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:48,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 155 transitions. [2025-03-17 12:10:48,220 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 155 transitions. Word has length 29 [2025-03-17 12:10:48,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:48,221 INFO L471 AbstractCegarLoop]: Abstraction has 145 states and 155 transitions. [2025-03-17 12:10:48,221 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:48,221 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 155 transitions. [2025-03-17 12:10:48,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2025-03-17 12:10:48,221 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:48,221 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:48,227 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-03-17 12:10:48,423 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:48,424 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:48,424 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:48,424 INFO L85 PathProgramCache]: Analyzing trace with hash -1638980289, now seen corresponding path program 1 times [2025-03-17 12:10:48,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:48,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313656414] [2025-03-17 12:10:48,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:48,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:48,436 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes. [2025-03-17 12:10:48,439 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements. [2025-03-17 12:10:48,439 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:48,439 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:48,570 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:48,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:48,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313656414] [2025-03-17 12:10:48,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313656414] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:10:48,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [728865452] [2025-03-17 12:10:48,570 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:48,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:48,571 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:48,572 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:10:48,574 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-03-17 12:10:48,633 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes. [2025-03-17 12:10:48,646 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements. [2025-03-17 12:10:48,646 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:48,647 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:48,647 INFO L256 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-03-17 12:10:48,649 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:10:48,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:48,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:48,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2025-03-17 12:10:48,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-17 12:10:48,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-03-17 12:10:48,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 23 [2025-03-17 12:10:48,800 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:48,800 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:10:48,875 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:10:48,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [728865452] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:10:48,875 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:10:48,875 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 6] total 10 [2025-03-17 12:10:48,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391800338] [2025-03-17 12:10:48,875 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:10:48,875 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-17 12:10:48,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:48,875 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 12:10:48,875 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:10:48,876 INFO L87 Difference]: Start difference. First operand 145 states and 155 transitions. Second operand has 10 states, 10 states have (on average 6.8) internal successors, (68), 10 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:49,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:10:49,185 INFO L93 Difference]: Finished difference Result 164 states and 180 transitions. [2025-03-17 12:10:49,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-17 12:10:49,185 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 6.8) internal successors, (68), 10 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2025-03-17 12:10:49,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:10:49,186 INFO L225 Difference]: With dead ends: 164 [2025-03-17 12:10:49,186 INFO L226 Difference]: Without dead ends: 143 [2025-03-17 12:10:49,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=190, Unknown=0, NotChecked=0, Total=240 [2025-03-17 12:10:49,187 INFO L435 NwaCegarLoop]: 83 mSDtfsCounter, 19 mSDsluCounter, 378 mSDsCounter, 0 mSdLazyCounter, 424 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 461 SdHoareTripleChecker+Invalid, 430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 424 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:10:49,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 461 Invalid, 430 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 424 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:10:49,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2025-03-17 12:10:49,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 135. [2025-03-17 12:10:49,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 111 states have (on average 1.2792792792792793) internal successors, (142), 133 states have internal predecessors, (142), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:49,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 146 transitions. [2025-03-17 12:10:49,190 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 146 transitions. Word has length 29 [2025-03-17 12:10:49,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:10:49,190 INFO L471 AbstractCegarLoop]: Abstraction has 135 states and 146 transitions. [2025-03-17 12:10:49,190 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 6.8) internal successors, (68), 10 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:10:49,190 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 146 transitions. [2025-03-17 12:10:49,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2025-03-17 12:10:49,190 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:10:49,190 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:10:49,197 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2025-03-17 12:10:49,395 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:49,395 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:10:49,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:10:49,396 INFO L85 PathProgramCache]: Analyzing trace with hash -1691583871, now seen corresponding path program 1 times [2025-03-17 12:10:49,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:10:49,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629597410] [2025-03-17 12:10:49,396 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:49,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:10:49,405 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-17 12:10:49,414 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:10:49,414 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:49,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:49,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:49,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:10:49,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629597410] [2025-03-17 12:10:49,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1629597410] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:10:49,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [633206884] [2025-03-17 12:10:49,751 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:10:49,752 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:10:49,752 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:10:49,753 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:10:49,755 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-17 12:10:49,821 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-17 12:10:49,841 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:10:49,842 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:10:49,842 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:10:49,843 INFO L256 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 33 conjuncts are in the unsatisfiable core [2025-03-17 12:10:49,845 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:10:49,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:10:49,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:49,899 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2025-03-17 12:10:49,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:10:49,916 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:10:49,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-03-17 12:10:49,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:10:49,976 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:10:49,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 38 [2025-03-17 12:10:49,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:10:50,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 8 [2025-03-17 12:10:50,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:10:50,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:10:50,093 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:50,094 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:10:50,134 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_906 (Array Int Int))) (= (select (select (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:10:50,148 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_906 (Array Int Int))) (= (select (select (store |c_#memory_int#1| |c_ULTIMATE.start_main_#t~mem5#1.base| v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:10:50,178 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_904 (Array Int Int)) (v_ArrVal_903 (Array Int Int)) (v_ArrVal_906 (Array Int Int))) (= (select (select (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_#t~mem4#1.base| v_ArrVal_903) (select (select (store |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_#t~mem4#1.base| v_ArrVal_904) |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:10:50,216 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:10:50,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 39 [2025-03-17 12:10:50,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 62 [2025-03-17 12:10:50,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2025-03-17 12:10:50,244 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse2 (= |c_ULTIMATE.start_main_#t~malloc3#1.base| |c_ULTIMATE.start_main_~end~0#1.base|)) (.cse0 (select |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base|)) (.cse1 (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8))) (and (or (forall ((v_ArrVal_903 (Array Int Int)) (v_ArrVal_906 (Array Int Int)) (v_ArrVal_902 Int) (v_arrayElimCell_23 Int)) (= (select (select (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_902)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_903) v_arrayElimCell_23 v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1)) (not .cse2)) (forall ((v_ArrVal_903 (Array Int Int)) (v_ArrVal_906 (Array Int Int)) (v_ArrVal_902 Int) (v_arrayElimCell_23 Int)) (let ((.cse3 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_902)))) (or (= (select (select (store (store .cse3 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_903) v_arrayElimCell_23 v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1) (= (select (select (store .cse3 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1)))) (or .cse2 (forall ((v_ArrVal_906 (Array Int Int)) (v_ArrVal_902 Int)) (= (select (select (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_902)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_906) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1))))) is different from false [2025-03-17 12:10:53,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 8 [2025-03-17 12:10:53,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:10:53,538 INFO L173 IndexEqualityManager]: detected equality via solver [2025-03-17 12:10:53,541 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2025-03-17 12:10:53,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 1 [2025-03-17 12:10:53,546 INFO L173 IndexEqualityManager]: detected equality via solver [2025-03-17 12:10:53,549 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2025-03-17 12:10:53,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 1 [2025-03-17 12:10:59,186 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:10:59,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [633206884] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:10:59,186 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:10:59,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 13] total 24 [2025-03-17 12:10:59,186 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990059664] [2025-03-17 12:10:59,187 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:10:59,187 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2025-03-17 12:10:59,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:10:59,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-17 12:10:59,188 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=327, Unknown=23, NotChecked=164, Total=600 [2025-03-17 12:10:59,188 INFO L87 Difference]: Start difference. First operand 135 states and 146 transitions. Second operand has 25 states, 25 states have (on average 2.76) internal successors, (69), 24 states have internal predecessors, (69), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:11:00,347 INFO L93 Difference]: Finished difference Result 215 states and 235 transitions. [2025-03-17 12:11:00,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-03-17 12:11:00,348 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.76) internal successors, (69), 24 states have internal predecessors, (69), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2025-03-17 12:11:00,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:11:00,349 INFO L225 Difference]: With dead ends: 215 [2025-03-17 12:11:00,349 INFO L226 Difference]: Without dead ends: 215 [2025-03-17 12:11:00,349 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 59 SyntacticMatches, 4 SemanticMatches, 38 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 240 ImplicationChecksByTransitivity, 9.5s TimeCoverageRelationStatistics Valid=305, Invalid=947, Unknown=24, NotChecked=284, Total=1560 [2025-03-17 12:11:00,350 INFO L435 NwaCegarLoop]: 62 mSDtfsCounter, 321 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 888 mSolverCounterSat, 46 mSolverCounterUnsat, 13 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 321 SdHoareTripleChecker+Valid, 595 SdHoareTripleChecker+Invalid, 1699 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 888 IncrementalHoareTripleChecker+Invalid, 13 IncrementalHoareTripleChecker+Unknown, 752 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-17 12:11:00,350 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [321 Valid, 595 Invalid, 1699 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 888 Invalid, 13 Unknown, 752 Unchecked, 0.6s Time] [2025-03-17 12:11:00,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2025-03-17 12:11:00,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 161. [2025-03-17 12:11:00,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 137 states have (on average 1.2408759124087592) internal successors, (170), 159 states have internal predecessors, (170), 4 states have call successors, (4), 1 states have call predecessors, (4), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 174 transitions. [2025-03-17 12:11:00,353 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 174 transitions. Word has length 36 [2025-03-17 12:11:00,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:11:00,353 INFO L471 AbstractCegarLoop]: Abstraction has 161 states and 174 transitions. [2025-03-17 12:11:00,353 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.76) internal successors, (69), 24 states have internal predecessors, (69), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,353 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 174 transitions. [2025-03-17 12:11:00,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2025-03-17 12:11:00,354 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:11:00,354 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:11:00,361 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-03-17 12:11:00,554 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2025-03-17 12:11:00,556 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:11:00,556 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:11:00,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1289097365, now seen corresponding path program 1 times [2025-03-17 12:11:00,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:11:00,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489276310] [2025-03-17 12:11:00,556 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:00,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:11:00,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 38 statements into 1 equivalence classes. [2025-03-17 12:11:00,575 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 38 of 38 statements. [2025-03-17 12:11:00,575 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:00,575 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:00,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:00,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:11:00,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1489276310] [2025-03-17 12:11:00,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1489276310] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:11:00,674 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:11:00,674 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-17 12:11:00,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852708327] [2025-03-17 12:11:00,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:11:00,674 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-17 12:11:00,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:11:00,674 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 12:11:00,674 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-17 12:11:00,674 INFO L87 Difference]: Start difference. First operand 161 states and 174 transitions. Second operand has 7 states, 7 states have (on average 5.285714285714286) internal successors, (37), 6 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:11:00,804 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2025-03-17 12:11:00,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 12:11:00,804 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.285714285714286) internal successors, (37), 6 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2025-03-17 12:11:00,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:11:00,805 INFO L225 Difference]: With dead ends: 160 [2025-03-17 12:11:00,805 INFO L226 Difference]: Without dead ends: 160 [2025-03-17 12:11:00,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:11:00,805 INFO L435 NwaCegarLoop]: 53 mSDtfsCounter, 199 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 172 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 199 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 172 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:11:00,805 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 120 Invalid, 199 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 172 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:11:00,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2025-03-17 12:11:00,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 153. [2025-03-17 12:11:00,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 130 states have (on average 1.2461538461538462) internal successors, (162), 151 states have internal predecessors, (162), 3 states have call successors, (3), 1 states have call predecessors, (3), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 165 transitions. [2025-03-17 12:11:00,808 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 165 transitions. Word has length 38 [2025-03-17 12:11:00,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:11:00,808 INFO L471 AbstractCegarLoop]: Abstraction has 153 states and 165 transitions. [2025-03-17 12:11:00,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 5.285714285714286) internal successors, (37), 6 states have internal predecessors, (37), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:00,808 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 165 transitions. [2025-03-17 12:11:00,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2025-03-17 12:11:00,808 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:11:00,808 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:11:00,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-17 12:11:00,808 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:11:00,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:11:00,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1660194857, now seen corresponding path program 1 times [2025-03-17 12:11:00,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:11:00,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451080210] [2025-03-17 12:11:00,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:00,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:11:00,815 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:11:00,819 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:11:00,819 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:00,819 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:01,102 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:01,102 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:11:01,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451080210] [2025-03-17 12:11:01,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451080210] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:11:01,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1290270448] [2025-03-17 12:11:01,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:01,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:11:01,102 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:11:01,104 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:11:01,106 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-17 12:11:01,182 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:11:01,205 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:11:01,205 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:01,206 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:01,207 INFO L256 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 36 conjuncts are in the unsatisfiable core [2025-03-17 12:11:01,209 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:11:01,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:11:01,277 INFO L349 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2025-03-17 12:11:01,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2025-03-17 12:11:01,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:11:01,399 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:01,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 33 [2025-03-17 12:11:01,465 INFO L349 Elim1Store]: treesize reduction 17, result has 22.7 percent of original size [2025-03-17 12:11:01,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 24 [2025-03-17 12:11:01,494 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:01,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 33 [2025-03-17 12:11:01,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 12:11:01,679 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:01,679 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:11:01,943 WARN L851 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~end~0#1.offset_84| Int) (v_ArrVal_1077 (Array Int Int)) (v_ArrVal_1075 (Array Int Int))) (or (= 1 (select |c_#valid| (select (select (let ((.cse0 (store |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_#t~mem4#1.base| v_ArrVal_1075))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1077)) |c_ULTIMATE.start_main_~list~0#1.base|) |v_ULTIMATE.start_main_~end~0#1.offset_84|))) (< |c_ULTIMATE.start_main_~list~0#1.offset| |v_ULTIMATE.start_main_~end~0#1.offset_84|) (< |v_ULTIMATE.start_main_~end~0#1.offset_84| 0))) is different from false [2025-03-17 12:11:01,951 WARN L851 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~end~0#1.offset_84| Int) (v_ArrVal_1077 (Array Int Int)) (v_ArrVal_1075 (Array Int Int))) (or (= (select |c_#valid| (select (select (let ((.cse0 (store |c_#memory_$Pointer$#1.base| (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1075))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1077)) |c_ULTIMATE.start_main_~list~0#1.base|) |v_ULTIMATE.start_main_~end~0#1.offset_84|)) 1) (< |c_ULTIMATE.start_main_~list~0#1.offset| |v_ULTIMATE.start_main_~end~0#1.offset_84|) (< |v_ULTIMATE.start_main_~end~0#1.offset_84| 0))) is different from false [2025-03-17 12:11:01,963 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:01,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2025-03-17 12:11:01,969 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:01,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 252 treesize of output 227 [2025-03-17 12:11:01,979 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:01,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 171 treesize of output 167 [2025-03-17 12:11:01,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 159 treesize of output 151 [2025-03-17 12:11:11,424 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:11,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1290270448] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:11:11,424 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:11:11,424 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 11, 12] total 35 [2025-03-17 12:11:11,424 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651720713] [2025-03-17 12:11:11,424 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:11:11,424 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2025-03-17 12:11:11,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:11:11,425 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2025-03-17 12:11:11,425 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=172, Invalid=945, Unknown=13, NotChecked=130, Total=1260 [2025-03-17 12:11:11,426 INFO L87 Difference]: Start difference. First operand 153 states and 165 transitions. Second operand has 36 states, 35 states have (on average 3.4285714285714284) internal successors, (120), 36 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:12,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:11:12,548 INFO L93 Difference]: Finished difference Result 282 states and 308 transitions. [2025-03-17 12:11:12,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-03-17 12:11:12,549 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 3.4285714285714284) internal successors, (120), 36 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2025-03-17 12:11:12,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:11:12,553 INFO L225 Difference]: With dead ends: 282 [2025-03-17 12:11:12,553 INFO L226 Difference]: Without dead ends: 282 [2025-03-17 12:11:12,553 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 484 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=277, Invalid=1440, Unknown=13, NotChecked=162, Total=1892 [2025-03-17 12:11:12,554 INFO L435 NwaCegarLoop]: 54 mSDtfsCounter, 661 mSDsluCounter, 617 mSDsCounter, 0 mSdLazyCounter, 1318 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 661 SdHoareTripleChecker+Valid, 671 SdHoareTripleChecker+Invalid, 1864 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 1318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 477 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-17 12:11:12,554 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [661 Valid, 671 Invalid, 1864 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 1318 Invalid, 0 Unknown, 477 Unchecked, 0.9s Time] [2025-03-17 12:11:12,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2025-03-17 12:11:12,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 187. [2025-03-17 12:11:12,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 187 states, 164 states have (on average 1.2195121951219512) internal successors, (200), 185 states have internal predecessors, (200), 3 states have call successors, (3), 1 states have call predecessors, (3), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:12,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 203 transitions. [2025-03-17 12:11:12,557 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 203 transitions. Word has length 41 [2025-03-17 12:11:12,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:11:12,557 INFO L471 AbstractCegarLoop]: Abstraction has 187 states and 203 transitions. [2025-03-17 12:11:12,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 3.4285714285714284) internal successors, (120), 36 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:12,557 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 203 transitions. [2025-03-17 12:11:12,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2025-03-17 12:11:12,557 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:11:12,558 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:11:12,564 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-03-17 12:11:12,761 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2025-03-17 12:11:12,761 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:11:12,761 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:11:12,761 INFO L85 PathProgramCache]: Analyzing trace with hash -1660194856, now seen corresponding path program 1 times [2025-03-17 12:11:12,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:11:12,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016080737] [2025-03-17 12:11:12,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:12,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:11:12,773 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:11:12,778 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:11:12,778 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:12,778 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:13,175 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:13,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:11:13,176 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1016080737] [2025-03-17 12:11:13,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1016080737] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:11:13,176 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1641235975] [2025-03-17 12:11:13,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:13,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:11:13,176 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:11:13,178 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:11:13,179 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-17 12:11:13,249 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:11:13,272 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:11:13,272 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:13,272 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:13,273 INFO L256 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 45 conjuncts are in the unsatisfiable core [2025-03-17 12:11:13,275 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:11:13,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:11:13,323 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2025-03-17 12:11:13,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:11:13,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-03-17 12:11:13,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:11:13,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:11:13,412 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:13,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 38 [2025-03-17 12:11:13,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:11:13,473 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2025-03-17 12:11:13,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 15 [2025-03-17 12:11:13,489 INFO L349 Elim1Store]: treesize reduction 17, result has 22.7 percent of original size [2025-03-17 12:11:13,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 17 [2025-03-17 12:11:13,538 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:13,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 45 [2025-03-17 12:11:13,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:11:13,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2025-03-17 12:11:13,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2025-03-17 12:11:13,734 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:13,735 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:11:14,589 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 39 [2025-03-17 12:11:14,595 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 51 treesize of output 43 [2025-03-17 12:11:14,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 67 [2025-03-17 12:11:14,609 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 186 treesize of output 181 [2025-03-17 12:11:14,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 62 [2025-03-17 12:11:14,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 84 [2025-03-17 12:11:14,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 64 [2025-03-17 12:11:14,771 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 74 [2025-03-17 12:11:14,782 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 62 [2025-03-17 12:11:14,799 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 359 treesize of output 322 [2025-03-17 12:11:14,821 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 474 treesize of output 457 [2025-03-17 12:11:14,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 180 treesize of output 172 [2025-03-17 12:11:14,847 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:14,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 183 treesize of output 171 [2025-03-17 12:11:14,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 154 treesize of output 146 [2025-03-17 12:11:14,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 70 [2025-03-17 12:11:15,169 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:15,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 189 treesize of output 298 [2025-03-17 12:11:16,187 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:16,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1641235975] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:11:16,187 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:11:16,188 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 13] total 39 [2025-03-17 12:11:16,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211458324] [2025-03-17 12:11:16,188 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:11:16,188 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2025-03-17 12:11:16,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:11:16,188 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2025-03-17 12:11:16,189 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1432, Unknown=6, NotChecked=0, Total=1560 [2025-03-17 12:11:16,189 INFO L87 Difference]: Start difference. First operand 187 states and 203 transitions. Second operand has 40 states, 39 states have (on average 3.1538461538461537) internal successors, (123), 40 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:17,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:11:17,924 INFO L93 Difference]: Finished difference Result 243 states and 265 transitions. [2025-03-17 12:11:17,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-03-17 12:11:17,925 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 39 states have (on average 3.1538461538461537) internal successors, (123), 40 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2025-03-17 12:11:17,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:11:17,925 INFO L225 Difference]: With dead ends: 243 [2025-03-17 12:11:17,925 INFO L226 Difference]: Without dead ends: 243 [2025-03-17 12:11:17,926 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 551 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=375, Invalid=2811, Unknown=6, NotChecked=0, Total=3192 [2025-03-17 12:11:17,926 INFO L435 NwaCegarLoop]: 57 mSDtfsCounter, 603 mSDsluCounter, 943 mSDsCounter, 0 mSdLazyCounter, 2073 mSolverCounterSat, 89 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 603 SdHoareTripleChecker+Valid, 1000 SdHoareTripleChecker+Invalid, 2162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 89 IncrementalHoareTripleChecker+Valid, 2073 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:11:17,926 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [603 Valid, 1000 Invalid, 2162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [89 Valid, 2073 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-17 12:11:17,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2025-03-17 12:11:17,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 190. [2025-03-17 12:11:17,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 190 states, 167 states have (on average 1.215568862275449) internal successors, (203), 188 states have internal predecessors, (203), 3 states have call successors, (3), 1 states have call predecessors, (3), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:17,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 206 transitions. [2025-03-17 12:11:17,929 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 206 transitions. Word has length 41 [2025-03-17 12:11:17,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:11:17,929 INFO L471 AbstractCegarLoop]: Abstraction has 190 states and 206 transitions. [2025-03-17 12:11:17,930 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 39 states have (on average 3.1538461538461537) internal successors, (123), 40 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:11:17,930 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 206 transitions. [2025-03-17 12:11:17,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-17 12:11:17,930 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:11:17,930 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:11:17,937 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-03-17 12:11:18,130 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:11:18,135 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK === [reach_errorErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_FREE (and 62 more)] === [2025-03-17 12:11:18,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:11:18,135 INFO L85 PathProgramCache]: Analyzing trace with hash 1302016374, now seen corresponding path program 1 times [2025-03-17 12:11:18,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:11:18,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565439308] [2025-03-17 12:11:18,135 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:18,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:11:18,146 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-17 12:11:18,160 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-17 12:11:18,160 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:18,160 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:18,776 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:18,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:11:18,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565439308] [2025-03-17 12:11:18,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565439308] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:11:18,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1931473812] [2025-03-17 12:11:18,776 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:11:18,776 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:11:18,776 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:11:18,778 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:11:18,779 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-17 12:11:18,860 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-17 12:11:18,896 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-17 12:11:18,896 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:11:18,896 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:11:18,898 INFO L256 TraceCheckSpWp]: Trace formula consists of 331 conjuncts, 54 conjuncts are in the unsatisfiable core [2025-03-17 12:11:18,905 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:11:18,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:11:18,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:11:18,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2025-03-17 12:11:18,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:11:18,961 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:11:18,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-03-17 12:11:18,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:11:19,034 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:19,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 38 [2025-03-17 12:11:19,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:11:19,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 8 [2025-03-17 12:11:19,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:11:19,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:11:19,105 INFO L349 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2025-03-17 12:11:19,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2025-03-17 12:11:19,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:11:19,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:11:19,191 INFO L349 Elim1Store]: treesize reduction 19, result has 20.8 percent of original size [2025-03-17 12:11:19,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 49 treesize of output 44 [2025-03-17 12:11:19,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:11:19,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2025-03-17 12:11:19,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:11:19,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-03-17 12:11:19,275 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:11:19,275 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:11:19,321 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1339 (Array Int Int))) (= (select (select (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:11:19,346 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1339 (Array Int Int))) (= 1 (select (select (store |c_#memory_int#1| (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)))) is different from false [2025-03-17 12:11:19,353 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1337 (Array Int Int)) (v_ArrVal_1336 (Array Int Int))) (= (select (select (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_#t~mem8#1.base| v_ArrVal_1337) (select (select (store |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_#t~mem8#1.base| v_ArrVal_1336) |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:11:19,358 WARN L851 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1337 (Array Int Int)) (v_ArrVal_1336 (Array Int Int))) (= (select (select (let ((.cse0 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|))) (store (store |c_#memory_int#1| .cse0 v_ArrVal_1337) (select (select (store |c_#memory_$Pointer$#1.base| .cse0 v_ArrVal_1336) |c_ULTIMATE.start_main_~end~0#1.base|) |c_ULTIMATE.start_main_~end~0#1.offset|) v_ArrVal_1339)) |c_ULTIMATE.start_main_~list~0#1.base|) (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) 1)) is different from false [2025-03-17 12:11:19,368 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:19,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 34 [2025-03-17 12:11:19,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 52 [2025-03-17 12:11:19,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2025-03-17 12:11:19,398 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse2 (= |c_ULTIMATE.start_main_#t~malloc7#1.base| |c_ULTIMATE.start_main_~end~0#1.base|)) (.cse1 (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8))) (and (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int))) (let ((.cse0 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| v_ArrVal_1333))) (or (= (select (select (store .cse0 |c_ULTIMATE.start_main_#t~malloc7#1.base| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store .cse0 |c_ULTIMATE.start_main_#t~malloc7#1.base| v_ArrVal_1337) v_arrayElimCell_86 v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1))))) (or (not .cse2) (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1337 (Array Int Int)) (v_ArrVal_1333 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| v_ArrVal_1333) |c_ULTIMATE.start_main_#t~malloc7#1.base| v_ArrVal_1337) v_arrayElimCell_86 v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1))) (or .cse2 (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int))) (= (select (select (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| v_ArrVal_1333) |c_ULTIMATE.start_main_#t~malloc7#1.base| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse1) 1))))) is different from false [2025-03-17 12:11:23,671 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:11:23,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 183 treesize of output 152 [2025-03-17 12:11:23,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 287 treesize of output 263 [2025-03-17 12:11:23,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 249 treesize of output 243 [2025-03-17 12:11:23,827 INFO L349 Elim1Store]: treesize reduction 4, result has 96.9 percent of original size [2025-03-17 12:11:23,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 250 treesize of output 360 [2025-03-17 12:11:23,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 260 treesize of output 248 [2025-03-17 12:11:38,370 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse5 (= |c_ULTIMATE.start_main_#t~malloc3#1.base| |c_ULTIMATE.start_main_~end~0#1.base|)) (.cse2 (+ |c_ULTIMATE.start_main_~list~0#1.offset| 8)) (.cse4 (select |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base|))) (let ((.cse22 (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_arrayElimCell_86 Int)) (let ((.cse51 (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse51 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse51 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|)))) (.cse0 (not .cse5)) (.cse6 (forall ((v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= (select (select (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|))))) (and (or .cse0 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse1 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse3 (store (store .cse1 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= v_prenex_27 v_arrayElimCell_88) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store (store .cse1 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store .cse3 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse3 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (or .cse5 (and .cse6 (forall ((v_arrayElimCell_95 Int)) (or (forall ((|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int)) (let ((.cse7 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= (select (select (store (store .cse7 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse7 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_95))))) (or .cse0 (and (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_arrayElimCell_88 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int)) (let ((.cse8 (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= (select (select (store (store .cse8 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse8 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (= v_prenex_27 v_arrayElimCell_88))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_arrayElimCell_88 Int)) (or (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse9 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse9 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store (store .cse9 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (= v_prenex_27 v_arrayElimCell_88))))))) (or (and .cse6 (forall ((v_arrayElimCell_95 Int)) (or (forall ((|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int)) (let ((.cse10 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= (select (select (store (store .cse10 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse10 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_95)))) .cse5) (or .cse5 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse11 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store (store .cse11 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (= (select (select (store (store (store (store .cse11 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (let ((.cse12 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= (select (select (store (store .cse12 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= (select (select (store (store (store .cse12 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_arrayElimCell_88 Int)) (or (= v_prenex_27 v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse13 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse14 (store .cse13 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse13 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (= (select (select (store .cse14 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store .cse14 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))) (or .cse0 (and (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse15 (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store (store .cse15 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse15 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse16 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= (select (select (store (store (store .cse16 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store (store (store .cse16 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))) (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse18 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse17 (store .cse18 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse17 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store .cse17 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse18 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))) (or .cse5 .cse6) (or .cse5 (and .cse6 (forall ((v_arrayElimCell_95 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int)) (let ((.cse19 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= (select (select (store (store .cse19 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse19 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))) (or (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= (select (select (store (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))) .cse0) (or .cse0 (and (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse20 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= (select (select (store (store (store .cse20 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store (store (store .cse20 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse21 (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store (store .cse21 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse21 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))) (or (and .cse22 (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse23 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= (select (select (store (store .cse23 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store (store .cse23 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse25 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse24 (store .cse25 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse24 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse24 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse25 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))) .cse5) (or .cse0 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse26 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse27 (store (store .cse26 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store (store .cse26 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store .cse27 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse27 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (or .cse5 (and .cse22 (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse29 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse28 (store .cse29 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse28 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= (select (select (store .cse28 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88) (= (select (select (store (store (store .cse29 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))) (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse30 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= (select (select (store (store .cse30 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store (store .cse30 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88)))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))))) (or (and (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_arrayElimCell_88 Int)) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse31 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse31 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store (store .cse31 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (= v_prenex_27 v_arrayElimCell_88))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (forall ((v_arrayElimCell_88 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int)) (let ((.cse32 (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24))) (or (= (select (select (store (store .cse32 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store .cse32 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88)))))) .cse0) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (let ((.cse33 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= (select (select (store (store .cse33 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (= (select (select (store (store (store .cse33 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (or .cse0 (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_95) (= (select (select (store (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (or .cse5 (and .cse22 (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_arrayElimCell_88 Int)) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int)) (let ((.cse34 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= (select (select (store (store .cse34 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store (store .cse34 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88))))) (forall ((v_prenex_27 Int)) (or (forall ((v_arrayElimCell_88 Int)) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse35 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse36 (store .cse35 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse35 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (= (select (select (store .cse36 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store .cse36 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_arrayElimCell_88 Int)) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse37 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse38 (store .cse37 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse37 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (= (select (select (store .cse38 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store .cse38 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88))))) (or .cse5 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_arrayElimCell_86 Int)) (let ((.cse39 (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse39 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store .cse39 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))))) (or .cse5 (and .cse22 (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse40 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store (store .cse40 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store (store .cse40 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88)))))))) (or .cse5 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse41 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store (store .cse41 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (= (select (select (store (store (store (store .cse41 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88))))) (forall ((v_prenex_27 Int)) (or (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse43 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse42 (store .cse43 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse42 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store .cse42 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= (select (select (store (store (store .cse43 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|))) (or .cse0 (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= (select (select (store (store (store (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)) |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (or .cse5 (and .cse6 (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (let ((.cse44 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= (select (select (store (store .cse44 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_95) (= (select (select (store (store (store .cse44 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))) (forall ((v_ArrVal_1329 (Array Int Int)) (v_ArrVal_1339 (Array Int Int)) (v_arrayElimCell_95 Int) (v_ArrVal_1333 (Array Int Int)) (v_ArrVal_1326 Int) (|v_ULTIMATE.start_main_#t~malloc7#1.base_8| Int)) (let ((.cse45 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_ArrVal_1326)))) (or (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_#t~malloc3#1.base|) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_arrayElimCell_95) (= (select (select (store (store .cse45 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |v_ULTIMATE.start_main_#t~malloc7#1.base_8| |c_ULTIMATE.start_main_~end~0#1.base|) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_95) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_95) (= (select (select (store (store (store .cse45 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_ArrVal_1329) v_arrayElimCell_95 v_ArrVal_1333) |v_ULTIMATE.start_main_#t~malloc7#1.base_8| v_ArrVal_1339) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))) (or .cse5 (forall ((v_prenex_27 Int) (v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse46 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (or (= v_prenex_27 v_arrayElimCell_88) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= (select (select (store (store .cse46 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (= (select (select (store (store (store (store .cse46 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_arrayElimCell_88 Int)) (or (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (forall ((v_prenex_26 Int) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int))) (let ((.cse47 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse48 (store .cse47 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (forall ((v_prenex_22 (Array Int Int))) (= (select (select (store (store (store .cse47 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)) (= (select (select (store .cse48 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (forall ((v_ArrVal_1337 (Array Int Int)) (v_arrayElimCell_86 Int)) (= (select (select (store (store .cse48 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))))) (forall ((v_prenex_27 Int)) (or (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_27) (= v_prenex_27 |c_ULTIMATE.start_main_~end~0#1.base|) (forall ((v_prenex_26 Int) (v_ArrVal_1337 (Array Int Int)) (v_prenex_24 (Array Int Int)) (v_prenex_23 (Array Int Int)) (v_prenex_22 (Array Int Int)) (v_arrayElimCell_86 Int) (v_arrayElimCell_88 Int)) (let ((.cse50 (store |c_#memory_int#1| |c_ULTIMATE.start_main_~end~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~end~0#1.offset| v_prenex_26)))) (let ((.cse49 (store .cse50 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_24))) (or (= (select (select (store (store .cse49 v_prenex_27 v_ArrVal_1337) v_arrayElimCell_86 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_~end~0#1.base| v_arrayElimCell_88) (= v_prenex_27 v_arrayElimCell_88) (= (select (select (store .cse49 v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1) (= |c_ULTIMATE.start_main_#t~malloc3#1.base| v_arrayElimCell_88) (= (select (select (store (store (store .cse50 |c_ULTIMATE.start_main_#t~malloc3#1.base| v_prenex_22) v_arrayElimCell_88 v_prenex_24) v_prenex_27 v_prenex_23) |c_ULTIMATE.start_main_~list~0#1.base|) .cse2) 1)))))))))) is different from false